[ARM] 4256/1: i.MX/MX1 SDHC fix/workaround of SD card recognition problems

The SDHC controllers cannot process shorter transfers.
They has to be handled as longer ones, but it such case CRC
error is evaluated. There was a case in the code still,
where this error is not ignored as it should to be process
these transfers.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by Pavel Pisa and committed by Russell King 2cb3320b b3c6b76f

+12 -1
+12 -1
drivers/mmc/imxmmc.c
··· 569 569 570 570 if(host->dma_dir == DMA_FROM_DEVICE) { 571 571 imxmci_busy_wait_for_status(host, &stat, 572 - STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE, 572 + STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE | 573 + STATUS_TIME_OUT_READ, 573 574 50, "imxmci_cpu_driven_data read"); 574 575 575 576 while((stat & (STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE)) && 577 + !(stat & STATUS_TIME_OUT_READ) && 576 578 (host->data_cnt < 512)) { 577 579 578 580 udelay(20); /* required for clocks < 8MHz*/ ··· 603 601 604 602 if(host->dma_size & 0x1ff) 605 603 stat &= ~STATUS_CRC_READ_ERR; 604 + 605 + if(stat & STATUS_TIME_OUT_READ) { 606 + dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read timeout STATUS = 0x%x\n", 607 + stat); 608 + trans_done = -1; 609 + } 606 610 607 611 } else { 608 612 imxmci_busy_wait_for_status(host, &stat, ··· 716 708 * stat from IRQ time so do I 717 709 */ 718 710 stat |= host->status_reg; 711 + 712 + if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) 713 + stat &= ~STATUS_CRC_READ_ERR; 719 714 720 715 if(test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) { 721 716 imxmci_busy_wait_for_status(host, &stat,