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powerpc: clean inclusions of asm/feature-fixups.h

files not using feature fixup don't need asm/feature-fixups.h
files using feature fixup need asm/feature-fixups.h

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

authored by

Christophe Leroy and committed by
Michael Ellerman 2c86cd18 5c35a02c

+44 -4
-1
arch/powerpc/include/asm/cputable.h
··· 4 4 5 5 6 6 #include <linux/types.h> 7 - #include <asm/feature-fixups.h> 8 7 #include <uapi/asm/cputable.h> 9 8 #include <asm/asm-const.h> 10 9
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arch/powerpc/include/asm/dbell.h
··· 16 16 #include <linux/threads.h> 17 17 18 18 #include <asm/ppc-opcode.h> 19 + #include <asm/feature-fixups.h> 19 20 20 21 #define PPC_DBELL_MSG_BRDCAST (0x04000000) 21 22 #define PPC_DBELL_TYPE(x) (((x) & 0xf) << (63-36))
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arch/powerpc/include/asm/dt_cpu_ftrs.h
··· 10 10 */ 11 11 12 12 #include <linux/types.h> 13 - #include <asm/feature-fixups.h> 14 13 #include <uapi/asm/cputable.h> 15 14 16 15 #ifdef CONFIG_PPC_DT_CPU_FTRS
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arch/powerpc/include/asm/exception-64s.h
··· 35 35 * implementations as possible. 36 36 */ 37 37 #include <asm/head-64.h> 38 + #include <asm/feature-fixups.h> 38 39 39 40 /* PACA save area offsets (exgen, exmc, etc) */ 40 41 #define EX_R9 0
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arch/powerpc/include/asm/firmware.h
··· 14 14 15 15 #ifdef __KERNEL__ 16 16 17 - #include <asm/feature-fixups.h> 18 17 #include <asm/asm-const.h> 19 18 20 19 /* firmware feature bitmask values */
+2
arch/powerpc/include/asm/kvm_booke_hv_asm.h
··· 9 9 #ifndef ASM_KVM_BOOKE_HV_ASM_H 10 10 #define ASM_KVM_BOOKE_HV_ASM_H 11 11 12 + #include <asm/feature-fixups.h> 13 + 12 14 #ifdef __ASSEMBLY__ 13 15 14 16 /*
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arch/powerpc/include/asm/mmu.h
··· 5 5 6 6 #include <linux/types.h> 7 7 8 - #include <asm/feature-fixups.h> 9 8 #include <asm/asm-const.h> 10 9 11 10 /*
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arch/powerpc/include/asm/ppc_asm.h
··· 9 9 #include <asm/processor.h> 10 10 #include <asm/ppc-opcode.h> 11 11 #include <asm/firmware.h> 12 + #include <asm/feature-fixups.h> 12 13 13 14 #ifdef __ASSEMBLY__ 14 15
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arch/powerpc/include/asm/reg.h
··· 14 14 #include <linux/stringify.h> 15 15 #include <asm/cputable.h> 16 16 #include <asm/asm-const.h> 17 + #include <asm/feature-fixups.h> 17 18 18 19 /* Pickup Book E specific registers. */ 19 20 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
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arch/powerpc/kernel/cpu_setup_6xx.S
··· 16 16 #include <asm/asm-offsets.h> 17 17 #include <asm/cache.h> 18 18 #include <asm/mmu.h> 19 + #include <asm/feature-fixups.h> 19 20 20 21 _GLOBAL(__setup_cpu_603) 21 22 mflr r5
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arch/powerpc/kernel/entry_32.S
··· 34 34 #include <asm/ptrace.h> 35 35 #include <asm/export.h> 36 36 #include <asm/asm-405.h> 37 + #include <asm/feature-fixups.h> 37 38 38 39 /* 39 40 * MSR_KERNEL is > 0x10000 on 4xx/Book-E since it include MSR_CE.
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arch/powerpc/kernel/entry_64.S
··· 44 44 #else 45 45 #include <asm/exception-64e.h> 46 46 #endif 47 + #include <asm/feature-fixups.h> 47 48 48 49 /* 49 50 * System calls.
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arch/powerpc/kernel/exceptions-64e.S
··· 27 27 #include <asm/hw_irq.h> 28 28 #include <asm/kvm_asm.h> 29 29 #include <asm/kvm_booke_hv_asm.h> 30 + #include <asm/feature-fixups.h> 30 31 31 32 /* XXX This will ultimately add space for a special exception save 32 33 * structure used to save things like SRR0/SRR1, SPRGs, MAS, etc...
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arch/powerpc/kernel/exceptions-64s.S
··· 18 18 #include <asm/ptrace.h> 19 19 #include <asm/cpuidle.h> 20 20 #include <asm/head-64.h> 21 + #include <asm/feature-fixups.h> 21 22 22 23 /* 23 24 * There are a few constraints to be concerned with.
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arch/powerpc/kernel/fpu.S
··· 26 26 #include <asm/ptrace.h> 27 27 #include <asm/export.h> 28 28 #include <asm/asm-compat.h> 29 + #include <asm/feature-fixups.h> 29 30 30 31 #ifdef CONFIG_VSX 31 32 #define __REST_32FPVSRS(n,c,base) \
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arch/powerpc/kernel/head_32.S
··· 35 35 #include <asm/bug.h> 36 36 #include <asm/kvm_book3s_asm.h> 37 37 #include <asm/export.h> 38 + #include <asm/feature-fixups.h> 38 39 39 40 /* 601 only have IBAT; cr0.eq is set on 601 when using this macro */ 40 41 #define LOAD_BAT(n, reg, RA, RB) \
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arch/powerpc/kernel/head_64.S
··· 44 44 #include <asm/cputhreads.h> 45 45 #include <asm/ppc-opcode.h> 46 46 #include <asm/export.h> 47 + #include <asm/feature-fixups.h> 47 48 48 49 /* The physical memory is laid out such that the secondary processor 49 50 * spin code sits at 0x0000...0x00ff. On server, the vectors follow
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arch/powerpc/kernel/head_fsl_booke.S
··· 43 43 #include <asm/cache.h> 44 44 #include <asm/ptrace.h> 45 45 #include <asm/export.h> 46 + #include <asm/feature-fixups.h> 46 47 #include "head_booke.h" 47 48 48 49 /* As with the other PowerPC ports, it is expected that when code
+1
arch/powerpc/kernel/idle_6xx.S
··· 20 20 #include <asm/thread_info.h> 21 21 #include <asm/ppc_asm.h> 22 22 #include <asm/asm-offsets.h> 23 + #include <asm/feature-fixups.h> 23 24 24 25 .text 25 26
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arch/powerpc/kernel/idle_book3s.S
··· 24 24 #include <asm/book3s/64/mmu-hash.h> 25 25 #include <asm/mmu.h> 26 26 #include <asm/asm-compat.h> 27 + #include <asm/feature-fixups.h> 27 28 28 29 #undef DEBUG 29 30
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arch/powerpc/kernel/idle_e500.S
··· 17 17 #include <asm/thread_info.h> 18 18 #include <asm/ppc_asm.h> 19 19 #include <asm/asm-offsets.h> 20 + #include <asm/feature-fixups.h> 20 21 21 22 .text 22 23
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arch/powerpc/kernel/idle_power4.S
··· 16 16 #include <asm/asm-offsets.h> 17 17 #include <asm/irqflags.h> 18 18 #include <asm/hw_irq.h> 19 + #include <asm/feature-fixups.h> 19 20 20 21 #undef DEBUG 21 22
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arch/powerpc/kernel/l2cr_6xx.S
··· 45 45 #include <asm/ppc_asm.h> 46 46 #include <asm/cache.h> 47 47 #include <asm/page.h> 48 + #include <asm/feature-fixups.h> 48 49 49 50 /* Usage: 50 51
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arch/powerpc/kernel/misc_32.S
··· 34 34 #include <asm/bug.h> 35 35 #include <asm/ptrace.h> 36 36 #include <asm/export.h> 37 + #include <asm/feature-fixups.h> 37 38 38 39 .text 39 40
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arch/powerpc/kernel/misc_64.S
··· 28 28 #include <asm/ptrace.h> 29 29 #include <asm/mmu.h> 30 30 #include <asm/export.h> 31 + #include <asm/feature-fixups.h> 31 32 32 33 .text 33 34
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arch/powerpc/kernel/setup_32.c
··· 41 41 #include <asm/cpu_has_feature.h> 42 42 #include <asm/asm-prototypes.h> 43 43 #include <asm/kdump.h> 44 + #include <asm/feature-fixups.h> 44 45 45 46 #define DBG(fmt...) 46 47
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arch/powerpc/kernel/setup_64.c
··· 68 68 #include <asm/opal.h> 69 69 #include <asm/cputhreads.h> 70 70 #include <asm/hw_irq.h> 71 + #include <asm/feature-fixups.h> 71 72 72 73 #include "setup.h" 73 74
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arch/powerpc/kernel/swsusp_32.S
··· 7 7 #include <asm/ppc_asm.h> 8 8 #include <asm/asm-offsets.h> 9 9 #include <asm/mmu.h> 10 + #include <asm/feature-fixups.h> 10 11 11 12 /* 12 13 * Structure for storing CPU registers on the save area.
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arch/powerpc/kernel/swsusp_asm64.S
··· 13 13 #include <asm/thread_info.h> 14 14 #include <asm/ppc_asm.h> 15 15 #include <asm/asm-offsets.h> 16 + #include <asm/feature-fixups.h> 16 17 17 18 /* 18 19 * Structure for storing CPU registers on the save area.
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arch/powerpc/kernel/tm.S
··· 13 13 #include <asm/reg.h> 14 14 #include <asm/bug.h> 15 15 #include <asm/export.h> 16 + #include <asm/feature-fixups.h> 16 17 17 18 #ifdef CONFIG_VSX 18 19 /* See fpu.S, this is borrowed from there */
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arch/powerpc/kvm/book3s_64_slb.S
··· 18 18 */ 19 19 20 20 #include <asm/asm-compat.h> 21 + #include <asm/feature-fixups.h> 21 22 22 23 #define SHADOW_SLB_ENTRY_LEN 0x10 23 24 #define OFFSET_ESID(x) (SHADOW_SLB_ENTRY_LEN * x)
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arch/powerpc/kvm/book3s_hv_interrupts.S
··· 28 28 #include <asm/exception-64s.h> 29 29 #include <asm/ppc-opcode.h> 30 30 #include <asm/asm-compat.h> 31 + #include <asm/feature-fixups.h> 31 32 32 33 /***************************************************************************** 33 34 * *
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arch/powerpc/kvm/book3s_hv_rmhandlers.S
··· 33 33 #include <asm/xive-regs.h> 34 34 #include <asm/thread_info.h> 35 35 #include <asm/asm-compat.h> 36 + #include <asm/feature-fixups.h> 36 37 37 38 /* Sign-extend HDEC if not on POWER9 */ 38 39 #define EXTEND_HDEC(reg) \
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arch/powerpc/kvm/book3s_segment.S
··· 20 20 /* Real mode helpers */ 21 21 22 22 #include <asm/asm-compat.h> 23 + #include <asm/feature-fixups.h> 23 24 24 25 #if defined(CONFIG_PPC_BOOK3S_64) 25 26
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arch/powerpc/lib/copypage_64.S
··· 11 11 #include <asm/ppc_asm.h> 12 12 #include <asm/asm-offsets.h> 13 13 #include <asm/export.h> 14 + #include <asm/feature-fixups.h> 14 15 15 16 .section ".toc","aw" 16 17 PPC64_CACHES:
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arch/powerpc/lib/copyuser_64.S
··· 10 10 #include <asm/ppc_asm.h> 11 11 #include <asm/export.h> 12 12 #include <asm/asm-compat.h> 13 + #include <asm/feature-fixups.h> 13 14 14 15 #ifdef __BIG_ENDIAN__ 15 16 #define sLd sld /* Shift towards low-numbered address. */
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arch/powerpc/lib/hweight_64.S
··· 20 20 #include <asm/processor.h> 21 21 #include <asm/ppc_asm.h> 22 22 #include <asm/export.h> 23 + #include <asm/feature-fixups.h> 23 24 24 25 /* Note: This code relies on -mminimal-toc */ 25 26
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arch/powerpc/lib/memcpy_64.S
··· 10 10 #include <asm/ppc_asm.h> 11 11 #include <asm/export.h> 12 12 #include <asm/asm-compat.h> 13 + #include <asm/feature-fixups.h> 13 14 14 15 .align 7 15 16 _GLOBAL_TOC(memcpy)
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arch/powerpc/mm/hash_low_32.S
··· 27 27 #include <asm/thread_info.h> 28 28 #include <asm/asm-offsets.h> 29 29 #include <asm/export.h> 30 + #include <asm/feature-fixups.h> 30 31 31 32 #ifdef CONFIG_SMP 32 33 .section .bss
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arch/powerpc/mm/hash_native_64.c
··· 30 30 #include <asm/udbg.h> 31 31 #include <asm/kexec.h> 32 32 #include <asm/ppc-opcode.h> 33 + #include <asm/feature-fixups.h> 33 34 34 35 #include <misc/cxl-base.h> 35 36
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arch/powerpc/mm/slb_low.S
··· 22 22 #include <asm/mmu.h> 23 23 #include <asm/pgtable.h> 24 24 #include <asm/firmware.h> 25 + #include <asm/feature-fixups.h> 25 26 26 27 /* 27 28 * This macro generates asm code to compute the VSID scramble
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arch/powerpc/mm/tlb_low_64e.S
··· 22 22 #include <asm/ppc-opcode.h> 23 23 #include <asm/kvm_asm.h> 24 24 #include <asm/kvm_booke_hv_asm.h> 25 + #include <asm/feature-fixups.h> 25 26 26 27 #ifdef CONFIG_PPC_64K_PAGES 27 28 #define VPTE_PMD_SHIFT (PTE_INDEX_SIZE+1)
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arch/powerpc/mm/tlb_nohash_low.S
··· 35 35 #include <asm/processor.h> 36 36 #include <asm/bug.h> 37 37 #include <asm/asm-compat.h> 38 + #include <asm/feature-fixups.h> 38 39 39 40 #if defined(CONFIG_40x) 40 41
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arch/powerpc/platforms/powermac/cache.S
··· 17 17 #include <asm/processor.h> 18 18 #include <asm/ppc_asm.h> 19 19 #include <asm/cputable.h> 20 + #include <asm/feature-fixups.h> 20 21 21 22 /* 22 23 * Flush and disable all data caches (dL1, L2, L3). This is used
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arch/powerpc/platforms/powermac/sleep.S
··· 18 18 #include <asm/thread_info.h> 19 19 #include <asm/asm-offsets.h> 20 20 #include <asm/mmu.h> 21 + #include <asm/feature-fixups.h> 21 22 22 23 #define MAGIC 0x4c617273 /* 'Lars' */ 23 24
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arch/powerpc/platforms/powernv/opal-wrappers.S
··· 15 15 #include <asm/asm-offsets.h> 16 16 #include <asm/opal.h> 17 17 #include <asm/asm-compat.h> 18 + #include <asm/feature-fixups.h> 18 19 19 20 .section ".text" 20 21
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arch/powerpc/platforms/pseries/hvCall.S
··· 13 13 #include <asm/ppc_asm.h> 14 14 #include <asm/asm-offsets.h> 15 15 #include <asm/ptrace.h> 16 + #include <asm/feature-fixups.h> 16 17 17 18 .section ".text" 18 19
tools/testing/selftests/powerpc/copyloops/asm/feature-fixups.h