···740740 dma_addr_t dma_handle;741741742742 dma_handle = pci_map_single(pdev, addr, size, direction);743743- if (pci_dma_mapping_error(dma_handle)) {743743+ if (pci_dma_mapping_error(pdev, dma_handle)) {744744 /*745745 * reduce current DMA mapping usage,746746 * delay and try again later or
+2-1
Documentation/HOWTO
···7777When a kernel change causes the interface that the kernel exposes to7878userspace to change, it is recommended that you send the information or7979a patch to the manual pages explaining the change to the manual pages8080-maintainer at mtk.manpages@gmail.com.8080+maintainer at mtk.manpages@gmail.com, and CC the list8181+linux-api@vger.kernel.org.81828283Here is a list of files that are in the kernel source tree that are8384required reading:
+2
Documentation/SubmitChecklist
···6767686819: All new userspace interfaces are documented in Documentation/ABI/.6969 See Documentation/ABI/README for more information.7070+ Patches that change userspace interfaces should be CCed to7171+ linux-api@vger.kernel.org.7072717320: Check that it all passes `make headers_check'.7274
+2-2
Documentation/ioctl/cdrom.txt
···271271272272 usage:273273274274- ioctl(fd, CDROMEJECT, 0);274274+ ioctl(fd, CDROMCLOSETRAY, 0);275275276276 inputs: none277277278278 outputs: none279279280280 error returns:281281- ENOSYS cd drive not capable of ejecting281281+ ENOSYS cd drive not capable of closing the tray282282 EBUSY other processes are accessing drive, or door is locked283283284284 notes:
+4-3
Documentation/sysctl/kernel.txt
···351351352352softlockup_thresh:353353354354-This value can be used to lower the softlockup tolerance355355-threshold. The default threshold is 10s. If a cpu is locked up356356-for 10s, the kernel complains. Valid values are 1-60s.354354+This value can be used to lower the softlockup tolerance threshold. The355355+default threshold is 60 seconds. If a cpu is locked up for 60 seconds,356356+the kernel complains. Valid values are 1-60 seconds. Setting this357357+tunable to zero will disable the softlockup detection altogether.357358358359==============================================================359360
+12
Documentation/usb/anchors.txt
···4242are called in the reverse temporal order they were submitted.4343This way no data can be reordered.44444545+usb_unlink_anchored_urbs()4646+--------------------------4747+4848+This function unlinks all URBs associated with an anchor. The URBs4949+are processed in the reverse temporal order they were submitted.5050+This is similar to usb_kill_anchored_urbs(), but it will not sleep.5151+Therefore no guarantee is made that the URBs have been unlinked when5252+the call returns. They may be unlinked later but will be unlinked in5353+finite time.5454+4555usb_wait_anchor_empty_timeout()4656-------------------------------47574858This function waits for all URBs associated with an anchor to finish4959or a timeout, whichever comes first. Its return value will tell you5060whether the timeout was reached.6161+6262+
+5-5
MAINTAINERS
···11981198S: Maintained1199119912001200CPUSETS12011201-P: Paul Jackson12021201P: Paul Menage12031203-M: pj@sgi.com12041202M: menage@google.com12051203L: linux-kernel@vger.kernel.org12061204W: http://www.bullopensource.org/cpuset/···19821984I2C/SMBUS STUB DRIVER19831985P: Mark M. Hoffman19841986M: mhoffman@lightlink.com19851985-L: lm-sensors@lm-sensors.org19871987+L: i2c@lm-sensors.org19861988S: Maintained1987198919881990I2C SUBSYSTEM···27042706P: Michael Kerrisk27052707M: mtk.manpages@gmail.com27062708W: http://www.kernel.org/doc/man-pages27092709+L: linux-man@vger.kernel.org27072710S: Supported2708271127092712MARVELL LIBERTAS WIRELESS DRIVER···37253726SIS 96X I2C/SMBUS DRIVER37263727P: Mark M. Hoffman37273728M: mhoffman@lightlink.com37283728-L: lm-sensors@lm-sensors.org37293729+L: i2c@lm-sensors.org37293730S: Maintained3730373137313732SIS FRAMEBUFFER DRIVER···3832383338333834SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEMENT38343835P: Liam Girdwood38353835-M: liam.girdwood@wolfsonmicro.com38363836+M: lrg@slimlogic.co.uk38363837P: Mark Brown38373838M: broonie@opensource.wolfsonmicro.com38383839T: git opensource.wolfsonmicro.com/linux-2.6-asoc38393840L: alsa-devel@alsa-project.org (subscribers-only)38413841+W: http://alsa-project.org/main/index.php/ASoC38403842S: Supported3841384338423844SPI SUBSYSTEM
···11/*22- * include/asm/cnt32_to_63.h -- extend a 32-bit counter to 63 bits22+ * Extend a 32-bit counter to 63 bits33 *44 * Author: Nicolas Pitre55 * Created: December 3, 2006···1010 * as published by the Free Software Foundation.1111 */12121313-#ifndef __INCLUDE_CNT32_TO_63_H__1414-#define __INCLUDE_CNT32_TO_63_H__1313+#ifndef __LINUX_CNT32_TO_63_H__1414+#define __LINUX_CNT32_TO_63_H__15151616#include <linux/compiler.h>1717-#include <asm/types.h>1717+#include <linux/types.h>1818#include <asm/byteorder.h>19192020-/*2121- * Prototype: u64 cnt32_to_63(u32 cnt)2020+/* this is used only to give gcc a clue about good code generation */2121+union cnt32_to_63 {2222+ struct {2323+#if defined(__LITTLE_ENDIAN)2424+ u32 lo, hi;2525+#elif defined(__BIG_ENDIAN)2626+ u32 hi, lo;2727+#endif2828+ };2929+ u64 val;3030+};3131+3232+3333+/**3434+ * cnt32_to_63 - Expand a 32-bit counter to a 63-bit counter3535+ * @cnt_lo: The low part of the counter3636+ *2237 * Many hardware clock counters are only 32 bits wide and therefore have2338 * a relatively short period making wrap-arounds rather frequent. This2439 * is a problem when implementing sched_clock() for example, where a 64-bit···6651 * clear-bit instruction. Otherwise caller must remember to clear the top6752 * bit explicitly.6853 */6969-7070-/* this is used only to give gcc a clue about good code generation */7171-typedef union {7272- struct {7373-#if defined(__LITTLE_ENDIAN)7474- u32 lo, hi;7575-#elif defined(__BIG_ENDIAN)7676- u32 hi, lo;7777-#endif7878- };7979- u64 val;8080-} cnt32_to_63_t;8181-8254#define cnt32_to_63(cnt_lo) \8355({ \8484- static volatile u32 __m_cnt_hi = 0; \8585- cnt32_to_63_t __x; \5656+ static volatile u32 __m_cnt_hi; \5757+ union cnt32_to_63 __x; \8658 __x.hi = __m_cnt_hi; \8759 __x.lo = (cnt_lo); \8888- if (unlikely((s32)(__x.hi ^ __x.lo) < 0)) \6060+ if (unlikely((s32)(__x.hi ^ __x.lo) < 0)) \8961 __m_cnt_hi = __x.hi = (__x.hi ^ 0x80000000) + (__x.hi >> 31); \9062 __x.val; \9163})
-2
arch/arm/kernel/kgdb.c
···111111 case 'D':112112 case 'k':113113 case 'c':114114- kgdb_contthread = NULL;115115-116114 /*117115 * Try to read optional parameter, pc unchanged if no parm.118116 * If this was a compiled breakpoint, we need to move
···216216 default "01000000" if PLAT_M32104UT217217 default "00800000" if PLAT_OAKS32R218218219219-config NOHIGHMEM220220- bool221221- default y222222-223219config ARCH_DISCONTIGMEM_ENABLE224220 bool "Internal RAM Support"225221 depends on CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104···406410source "drivers/pci/Kconfig"407411408412config ISA409409- bool "ISA support"410410- help411411- Find out whether you have ISA slots on your motherboard. ISA is the412412- name of a bus system, i.e. the way the CPU talks to the other stuff413413- inside your box. If you have ISA, say Y, otherwise N.413413+ bool414414415415source "drivers/pcmcia/Kconfig"416416
+1-1
arch/m32r/kernel/entry.S
···143143 and3 r4, r4, #0x8000 ; check BSM bit144144#endif145145 beqz r4, resume_kernel146146-ENTRY(resume_userspace)146146+resume_userspace:147147 DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt148148 ; setting need_resched or sigpending149149 ; between sampling and the iret
-1
arch/m32r/kernel/head.S
···2929 .global _end3030ENTRY(stext)3131ENTRY(_stext)3232-ENTRY(startup_32)3332 /* Setup up the stack pointer */3433 LDIMM (r0, spi_stack_top)3534 LDIMM (r1, spu_stack_top)
···1414#include <asm/delay.h>1515#include <asm/irq.h>1616#include <asm/tlbflush.h>1717+#include <asm/pgtable.h>17181819/* platform dependent support */1920EXPORT_SYMBOL(boot_cpu_data);···6665EXPORT_SYMBOL(copy_page);6766EXPORT_SYMBOL(clear_page);6867EXPORT_SYMBOL(strlen);6868+EXPORT_SYMBOL(empty_zero_page);69697070EXPORT_SYMBOL(_inb);7171EXPORT_SYMBOL(_inw);
+2-28
arch/m32r/kernel/process.c
···35353636#include <linux/err.h>37373838-static int hlt_counter=0;3939-4038/*4139 * Return saved PC of a blocked thread.4240 */···4648/*4749 * Powermanagement idle function, if any..4850 */4949-void (*pm_idle)(void) = NULL;5050-EXPORT_SYMBOL(pm_idle);5151+static void (*pm_idle)(void) = NULL;51525253void (*pm_power_off)(void) = NULL;5354EXPORT_SYMBOL(pm_power_off);5454-5555-void disable_hlt(void)5656-{5757- hlt_counter++;5858-}5959-6060-EXPORT_SYMBOL(disable_hlt);6161-6262-void enable_hlt(void)6363-{6464- hlt_counter--;6565-}6666-6767-EXPORT_SYMBOL(enable_hlt);68556956/*7057 * We use this is we don't have any better7158 * idle routine..7259 */7373-void default_idle(void)6060+static void default_idle(void)7461{7562 /* M32R_FIXME: Please use "cpu_sleep" mode. */7663 cpu_relax();···241258 tsk->thread.lr = (unsigned long)ret_from_fork;242259243260 return 0;244244-}245245-246246-/*247247- * Capture the user space registers if the task is not running (in user space)248248- */249249-int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)250250-{251251- /* M32R_FIXME */252252- return 1;253261}254262255263asmlinkage int sys_fork(unsigned long r0, unsigned long r1, unsigned long r2,
···14031403 depends on CPU_MIPS32_R214041404 #depends on CPU_MIPS64_R2 # once there is hardware ...14051405 depends on SYS_SUPPORTS_MULTITHREADING14061406- select GENERIC_CLOCKEVENTS_BROADCAST14071406 select CPU_MIPSR2_IRQ_VI14081407 select CPU_MIPSR2_IRQ_EI14091408 select MIPS_MT···14501451 Includes a loader for loading an elf relocatable object14511452 onto another VPE and running it.1452145314531453-config MIPS_MT_SMTC_INSTANT_REPLAY14541454- bool "Low-latency Dispatch of Deferred SMTC IPIs"14551455- depends on MIPS_MT_SMTC && !PREEMPT14561456- default y14571457- help14581458- SMTC pseudo-interrupts between TCs are deferred and queued14591459- if the target TC is interrupt-inhibited (IXMT). In the first14601460- SMTC prototypes, these queued IPIs were serviced on return14611461- to user mode, or on entry into the kernel idle loop. The14621462- INSTANT_REPLAY option dispatches them as part of local_irq_restore()14631463- processing, which adds runtime overhead (hence the option to turn14641464- it off), but ensures that IPIs are handled promptly even under14651465- heavy I/O interrupt load.14661466-14671454config MIPS_MT_SMTC_IM_BACKSTOP14681455 bool "Use per-TC register bits as backstop for inhibited IM bits"14691456 depends on MIPS_MT_SMTC14701470- default y14571457+ default n14711458 help14721459 To support multiple TC microthreads acting as "CPUs" within14731460 a VPE, VPE-wide interrupt mask bits must be specially manipulated14741461 during interrupt handling. To support legacy drivers and interrupt14751462 controller management code, SMTC has a "backstop" to track and14761463 if necessary restore the interrupt mask. This has some performance14771477- impact on interrupt service overhead. Disable it only if you know14781478- what you are doing.14641464+ impact on interrupt service overhead.1479146514801466config MIPS_MT_SMTC_IRQAFF14811467 bool "Support IRQ affinity API"···14701486 Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.)14711487 for SMTC Linux kernel. Requires platform support, of which14721488 an example can be found in the MIPS kernel i8259 and Malta14731473- platform code. It is recommended that MIPS_MT_SMTC_INSTANT_REPLAY14741474- be enabled if MIPS_MT_SMTC_IRQAFF is used. Adds overhead to14751475- interrupt dispatch, and should be used only if you know what14761476- you are doing.14891489+ platform code. Adds some overhead to interrupt dispatch, and14901490+ should be used only if you know what you are doing.1477149114781492config MIPS_VPE_LOADER_TOM14791493 bool "Load VPE program into memory hidden from linux"
···12121313#include <asm/smtc_ipi.h>1414#include <asm/time.h>1515+#include <asm/cevt-r4k.h>1616+1717+/*1818+ * The SMTC Kernel for the 34K, 1004K, et. al. replaces several1919+ * of these routines with SMTC-specific variants.2020+ */2121+2222+#ifndef CONFIG_MIPS_MT_SMTC15231624static int mips_next_event(unsigned long delta,1725 struct clock_event_device *evt)···2719 unsigned int cnt;2820 int res;29213030-#ifdef CONFIG_MIPS_MT_SMTC3131- {3232- unsigned long flags, vpflags;3333- local_irq_save(flags);3434- vpflags = dvpe();3535-#endif3622 cnt = read_c0_count();3723 cnt += delta;3824 write_c0_compare(cnt);3925 res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0;4040-#ifdef CONFIG_MIPS_MT_SMTC4141- evpe(vpflags);4242- local_irq_restore(flags);4343- }4444-#endif4526 return res;4627}47284848-static void mips_set_mode(enum clock_event_mode mode,4949- struct clock_event_device *evt)2929+#endif /* CONFIG_MIPS_MT_SMTC */3030+3131+void mips_set_clock_mode(enum clock_event_mode mode,3232+ struct clock_event_device *evt)5033{5134 /* Nothing to do ... */5235}53365454-static DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device);5555-static int cp0_timer_irq_installed;3737+DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device);3838+int cp0_timer_irq_installed;56395757-/*5858- * Timer ack for an R4k-compatible timer of a known frequency.5959- */6060-static void c0_timer_ack(void)6161-{6262- write_c0_compare(read_c0_compare());6363-}4040+#ifndef CONFIG_MIPS_MT_SMTC64416565-/*6666- * Possibly handle a performance counter interrupt.6767- * Return true if the timer interrupt should not be checked6868- */6969-static inline int handle_perf_irq(int r2)7070-{7171- /*7272- * The performance counter overflow interrupt may be shared with the7373- * timer interrupt (cp0_perfcount_irq < 0). If it is and a7474- * performance counter has overflowed (perf_irq() == IRQ_HANDLED)7575- * and we can't reliably determine if a counter interrupt has also7676- * happened (!r2) then don't check for a timer interrupt.7777- */7878- return (cp0_perfcount_irq < 0) &&7979- perf_irq() == IRQ_HANDLED &&8080- !r2;8181-}8282-8383-static irqreturn_t c0_compare_interrupt(int irq, void *dev_id)4242+irqreturn_t c0_compare_interrupt(int irq, void *dev_id)8443{8544 const int r2 = cpu_has_mips_r2;8645 struct clock_event_device *cd;···6893 * interrupt. Being the paranoiacs we are we check anyway.6994 */7095 if (!r2 || (read_c0_cause() & (1 << 30))) {7171- c0_timer_ack();7272-#ifdef CONFIG_MIPS_MT_SMTC7373- if (cpu_data[cpu].vpe_id)7474- goto out;7575- cpu = 0;7676-#endif9696+ /* Clear Count/Compare Interrupt */9797+ write_c0_compare(read_c0_compare());7798 cd = &per_cpu(mips_clockevent_device, cpu);7899 cd->event_handler(cd);79100 }···78107 return IRQ_HANDLED;79108}801098181-static struct irqaction c0_compare_irqaction = {110110+#endif /* Not CONFIG_MIPS_MT_SMTC */111111+112112+struct irqaction c0_compare_irqaction = {82113 .handler = c0_compare_interrupt,8383-#ifdef CONFIG_MIPS_MT_SMTC8484- .flags = IRQF_DISABLED,8585-#else86114 .flags = IRQF_DISABLED | IRQF_PERCPU,8787-#endif88115 .name = "timer",89116};901179191-#ifdef CONFIG_MIPS_MT_SMTC9292-DEFINE_PER_CPU(struct clock_event_device, smtc_dummy_clockevent_device);931189494-static void smtc_set_mode(enum clock_event_mode mode,9595- struct clock_event_device *evt)9696-{9797-}9898-9999-static void mips_broadcast(cpumask_t mask)100100-{101101- unsigned int cpu;102102-103103- for_each_cpu_mask(cpu, mask)104104- smtc_send_ipi(cpu, SMTC_CLOCK_TICK, 0);105105-}106106-107107-static void setup_smtc_dummy_clockevent_device(void)108108-{109109- //uint64_t mips_freq = mips_hpt_^frequency;110110- unsigned int cpu = smp_processor_id();111111- struct clock_event_device *cd;112112-113113- cd = &per_cpu(smtc_dummy_clockevent_device, cpu);114114-115115- cd->name = "SMTC";116116- cd->features = CLOCK_EVT_FEAT_DUMMY;117117-118118- /* Calculate the min / max delta */119119- cd->mult = 0; //div_sc((unsigned long) mips_freq, NSEC_PER_SEC, 32);120120- cd->shift = 0; //32;121121- cd->max_delta_ns = 0; //clockevent_delta2ns(0x7fffffff, cd);122122- cd->min_delta_ns = 0; //clockevent_delta2ns(0x30, cd);123123-124124- cd->rating = 200;125125- cd->irq = 17; //-1;126126-// if (cpu)127127-// cd->cpumask = CPU_MASK_ALL; // cpumask_of_cpu(cpu);128128-// else129129- cd->cpumask = cpumask_of_cpu(cpu);130130-131131- cd->set_mode = smtc_set_mode;132132-133133- cd->broadcast = mips_broadcast;134134-135135- clockevents_register_device(cd);136136-}137137-#endif138138-139139-static void mips_event_handler(struct clock_event_device *dev)119119+void mips_event_handler(struct clock_event_device *dev)140120{141121}142122···99177 return (read_c0_cause() >> cp0_compare_irq) & 0x100;100178}101179102102-static int c0_compare_int_usable(void)180180+/*181181+ * Compare interrupt can be routed and latched outside the core,182182+ * so a single execution hazard barrier may not be enough to give183183+ * it time to clear as seen in the Cause register. 4 time the184184+ * pipeline depth seems reasonably conservative, and empirically185185+ * works better in configurations with high CPU/bus clock ratios.186186+ */187187+188188+#define compare_change_hazard() \189189+ do { \190190+ irq_disable_hazard(); \191191+ irq_disable_hazard(); \192192+ irq_disable_hazard(); \193193+ irq_disable_hazard(); \194194+ } while (0)195195+196196+int c0_compare_int_usable(void)103197{104198 unsigned int delta;105199 unsigned int cnt;···125187 */126188 if (c0_compare_int_pending()) {127189 write_c0_compare(read_c0_count());128128- irq_disable_hazard();190190+ compare_change_hazard();129191 if (c0_compare_int_pending())130192 return 0;131193 }···134196 cnt = read_c0_count();135197 cnt += delta;136198 write_c0_compare(cnt);137137- irq_disable_hazard();199199+ compare_change_hazard();138200 if ((int)(read_c0_count() - cnt) < 0)139201 break;140202 /* increase delta if the timer was already expired */···143205 while ((int)(read_c0_count() - cnt) <= 0)144206 ; /* Wait for expiry */145207208208+ compare_change_hazard();146209 if (!c0_compare_int_pending())147210 return 0;148211149212 write_c0_compare(read_c0_count());150150- irq_disable_hazard();213213+ compare_change_hazard();151214 if (c0_compare_int_pending())152215 return 0;153216···157218 */158219 return 1;159220}221221+222222+#ifndef CONFIG_MIPS_MT_SMTC160223161224int __cpuinit mips_clockevent_init(void)162225{···169228170229 if (!cpu_has_counter || !mips_hpt_frequency)171230 return -ENXIO;172172-173173-#ifdef CONFIG_MIPS_MT_SMTC174174- setup_smtc_dummy_clockevent_device();175175-176176- /*177177- * On SMTC we only register VPE0's compare interrupt as clockevent178178- * device.179179- */180180- if (cpu)181181- return 0;182182-#endif183231184232 if (!c0_compare_int_usable())185233 return -ENXIO;···195265196266 cd->rating = 300;197267 cd->irq = irq;198198-#ifdef CONFIG_MIPS_MT_SMTC199199- cd->cpumask = CPU_MASK_ALL;200200-#else201268 cd->cpumask = cpumask_of_cpu(cpu);202202-#endif203269 cd->set_next_event = mips_next_event;204204- cd->set_mode = mips_set_mode;270270+ cd->set_mode = mips_set_clock_mode;205271 cd->event_handler = mips_event_handler;206272207273 clockevents_register_device(cd);···207281208282 cp0_timer_irq_installed = 1;209283210210-#ifdef CONFIG_MIPS_MT_SMTC211211-#define CPUCTR_IMASKBIT (0x100 << cp0_compare_irq)212212- setup_irq_smtc(irq, &c0_compare_irqaction, CPUCTR_IMASKBIT);213213-#else214284 setup_irq(irq, &c0_compare_irqaction);215215-#endif216285217286 return 0;218287}288288+289289+#endif /* Not CONFIG_MIPS_MT_SMTC */
+321
arch/mips/kernel/cevt-smtc.c
···11+/*22+ * This file is subject to the terms and conditions of the GNU General Public33+ * License. See the file "COPYING" in the main directory of this archive44+ * for more details.55+ *66+ * Copyright (C) 2007 MIPS Technologies, Inc.77+ * Copyright (C) 2007 Ralf Baechle <ralf@linux-mips.org>88+ * Copyright (C) 2008 Kevin D. Kissell, Paralogos sarl99+ */1010+#include <linux/clockchips.h>1111+#include <linux/interrupt.h>1212+#include <linux/percpu.h>1313+1414+#include <asm/smtc_ipi.h>1515+#include <asm/time.h>1616+#include <asm/cevt-r4k.h>1717+1818+/*1919+ * Variant clock event timer support for SMTC on MIPS 34K, 1004K2020+ * or other MIPS MT cores.2121+ *2222+ * Notes on SMTC Support:2323+ *2424+ * SMTC has multiple microthread TCs pretending to be Linux CPUs.2525+ * But there's only one Count/Compare pair per VPE, and Compare2626+ * interrupts are taken opportunisitically by available TCs2727+ * bound to the VPE with the Count register. The new timer2828+ * framework provides for global broadcasts, but we really2929+ * want VPE-level multicasts for best behavior. So instead3030+ * of invoking the high-level clock-event broadcast code,3131+ * this version of SMTC support uses the historical SMTC3232+ * multicast mechanisms "under the hood", appearing to the3333+ * generic clock layer as if the interrupts are per-CPU.3434+ *3535+ * The approach taken here is to maintain a set of NR_CPUS3636+ * virtual timers, and track which "CPU" needs to be alerted3737+ * at each event.3838+ *3939+ * It's unlikely that we'll see a MIPS MT core with more than4040+ * 2 VPEs, but we *know* that we won't need to handle more4141+ * VPEs than we have "CPUs". So NCPUs arrays of NCPUs elements4242+ * is always going to be overkill, but always going to be enough.4343+ */4444+4545+unsigned long smtc_nexttime[NR_CPUS][NR_CPUS];4646+static int smtc_nextinvpe[NR_CPUS];4747+4848+/*4949+ * Timestamps stored are absolute values to be programmed5050+ * into Count register. Valid timestamps will never be zero.5151+ * If a Zero Count value is actually calculated, it is converted5252+ * to be a 1, which will introduce 1 or two CPU cycles of error5353+ * roughly once every four billion events, which at 1000 HZ means5454+ * about once every 50 days. If that's actually a problem, one5555+ * could alternate squashing 0 to 1 and to -1.5656+ */5757+5858+#define MAKEVALID(x) (((x) == 0L) ? 1L : (x))5959+#define ISVALID(x) ((x) != 0L)6060+6161+/*6262+ * Time comparison is subtle, as it's really truncated6363+ * modular arithmetic.6464+ */6565+6666+#define IS_SOONER(a, b, reference) \6767+ (((a) - (unsigned long)(reference)) < ((b) - (unsigned long)(reference)))6868+6969+/*7070+ * CATCHUP_INCREMENT, used when the function falls behind the counter.7171+ * Could be an increasing function instead of a constant;7272+ */7373+7474+#define CATCHUP_INCREMENT 647575+7676+static int mips_next_event(unsigned long delta,7777+ struct clock_event_device *evt)7878+{7979+ unsigned long flags;8080+ unsigned int mtflags;8181+ unsigned long timestamp, reference, previous;8282+ unsigned long nextcomp = 0L;8383+ int vpe = current_cpu_data.vpe_id;8484+ int cpu = smp_processor_id();8585+ local_irq_save(flags);8686+ mtflags = dmt();8787+8888+ /*8989+ * Maintain the per-TC virtual timer9090+ * and program the per-VPE shared Count register9191+ * as appropriate here...9292+ */9393+ reference = (unsigned long)read_c0_count();9494+ timestamp = MAKEVALID(reference + delta);9595+ /*9696+ * To really model the clock, we have to catch the case9797+ * where the current next-in-VPE timestamp is the old9898+ * timestamp for the calling CPE, but the new value is9999+ * in fact later. In that case, we have to do a full100100+ * scan and discover the new next-in-VPE CPU id and101101+ * timestamp.102102+ */103103+ previous = smtc_nexttime[vpe][cpu];104104+ if (cpu == smtc_nextinvpe[vpe] && ISVALID(previous)105105+ && IS_SOONER(previous, timestamp, reference)) {106106+ int i;107107+ int soonest = cpu;108108+109109+ /*110110+ * Update timestamp array here, so that new111111+ * value gets considered along with those of112112+ * other virtual CPUs on the VPE.113113+ */114114+ smtc_nexttime[vpe][cpu] = timestamp;115115+ for_each_online_cpu(i) {116116+ if (ISVALID(smtc_nexttime[vpe][i])117117+ && IS_SOONER(smtc_nexttime[vpe][i],118118+ smtc_nexttime[vpe][soonest], reference)) {119119+ soonest = i;120120+ }121121+ }122122+ smtc_nextinvpe[vpe] = soonest;123123+ nextcomp = smtc_nexttime[vpe][soonest];124124+ /*125125+ * Otherwise, we don't have to process the whole array rank,126126+ * we just have to see if the event horizon has gotten closer.127127+ */128128+ } else {129129+ if (!ISVALID(smtc_nexttime[vpe][smtc_nextinvpe[vpe]]) ||130130+ IS_SOONER(timestamp,131131+ smtc_nexttime[vpe][smtc_nextinvpe[vpe]], reference)) {132132+ smtc_nextinvpe[vpe] = cpu;133133+ nextcomp = timestamp;134134+ }135135+ /*136136+ * Since next-in-VPE may me the same as the executing137137+ * virtual CPU, we update the array *after* checking138138+ * its value.139139+ */140140+ smtc_nexttime[vpe][cpu] = timestamp;141141+ }142142+143143+ /*144144+ * It may be that, in fact, we don't need to update Compare,145145+ * but if we do, we want to make sure we didn't fall into146146+ * a crack just behind Count.147147+ */148148+ if (ISVALID(nextcomp)) {149149+ write_c0_compare(nextcomp);150150+ ehb();151151+ /*152152+ * We never return an error, we just make sure153153+ * that we trigger the handlers as quickly as154154+ * we can if we fell behind.155155+ */156156+ while ((nextcomp - (unsigned long)read_c0_count())157157+ > (unsigned long)LONG_MAX) {158158+ nextcomp += CATCHUP_INCREMENT;159159+ write_c0_compare(nextcomp);160160+ ehb();161161+ }162162+ }163163+ emt(mtflags);164164+ local_irq_restore(flags);165165+ return 0;166166+}167167+168168+169169+void smtc_distribute_timer(int vpe)170170+{171171+ unsigned long flags;172172+ unsigned int mtflags;173173+ int cpu;174174+ struct clock_event_device *cd;175175+ unsigned long nextstamp = 0L;176176+ unsigned long reference;177177+178178+179179+repeat:180180+ for_each_online_cpu(cpu) {181181+ /*182182+ * Find virtual CPUs within the current VPE who have183183+ * unserviced timer requests whose time is now past.184184+ */185185+ local_irq_save(flags);186186+ mtflags = dmt();187187+ if (cpu_data[cpu].vpe_id == vpe &&188188+ ISVALID(smtc_nexttime[vpe][cpu])) {189189+ reference = (unsigned long)read_c0_count();190190+ if ((smtc_nexttime[vpe][cpu] - reference)191191+ > (unsigned long)LONG_MAX) {192192+ smtc_nexttime[vpe][cpu] = 0L;193193+ emt(mtflags);194194+ local_irq_restore(flags);195195+ /*196196+ * We don't send IPIs to ourself.197197+ */198198+ if (cpu != smp_processor_id()) {199199+ smtc_send_ipi(cpu, SMTC_CLOCK_TICK, 0);200200+ } else {201201+ cd = &per_cpu(mips_clockevent_device, cpu);202202+ cd->event_handler(cd);203203+ }204204+ } else {205205+ /* Local to VPE but Valid Time not yet reached. */206206+ if (!ISVALID(nextstamp) ||207207+ IS_SOONER(smtc_nexttime[vpe][cpu], nextstamp,208208+ reference)) {209209+ smtc_nextinvpe[vpe] = cpu;210210+ nextstamp = smtc_nexttime[vpe][cpu];211211+ }212212+ emt(mtflags);213213+ local_irq_restore(flags);214214+ }215215+ } else {216216+ emt(mtflags);217217+ local_irq_restore(flags);218218+219219+ }220220+ }221221+ /* Reprogram for interrupt at next soonest timestamp for VPE */222222+ if (ISVALID(nextstamp)) {223223+ write_c0_compare(nextstamp);224224+ ehb();225225+ if ((nextstamp - (unsigned long)read_c0_count())226226+ > (unsigned long)LONG_MAX)227227+ goto repeat;228228+ }229229+}230230+231231+232232+irqreturn_t c0_compare_interrupt(int irq, void *dev_id)233233+{234234+ int cpu = smp_processor_id();235235+236236+ /* If we're running SMTC, we've got MIPS MT and therefore MIPS32R2 */237237+ handle_perf_irq(1);238238+239239+ if (read_c0_cause() & (1 << 30)) {240240+ /* Clear Count/Compare Interrupt */241241+ write_c0_compare(read_c0_compare());242242+ smtc_distribute_timer(cpu_data[cpu].vpe_id);243243+ }244244+ return IRQ_HANDLED;245245+}246246+247247+248248+int __cpuinit mips_clockevent_init(void)249249+{250250+ uint64_t mips_freq = mips_hpt_frequency;251251+ unsigned int cpu = smp_processor_id();252252+ struct clock_event_device *cd;253253+ unsigned int irq;254254+ int i;255255+ int j;256256+257257+ if (!cpu_has_counter || !mips_hpt_frequency)258258+ return -ENXIO;259259+ if (cpu == 0) {260260+ for (i = 0; i < num_possible_cpus(); i++) {261261+ smtc_nextinvpe[i] = 0;262262+ for (j = 0; j < num_possible_cpus(); j++)263263+ smtc_nexttime[i][j] = 0L;264264+ }265265+ /*266266+ * SMTC also can't have the usablility test267267+ * run by secondary TCs once Compare is in use.268268+ */269269+ if (!c0_compare_int_usable())270270+ return -ENXIO;271271+ }272272+273273+ /*274274+ * With vectored interrupts things are getting platform specific.275275+ * get_c0_compare_int is a hook to allow a platform to return the276276+ * interrupt number of it's liking.277277+ */278278+ irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;279279+ if (get_c0_compare_int)280280+ irq = get_c0_compare_int();281281+282282+ cd = &per_cpu(mips_clockevent_device, cpu);283283+284284+ cd->name = "MIPS";285285+ cd->features = CLOCK_EVT_FEAT_ONESHOT;286286+287287+ /* Calculate the min / max delta */288288+ cd->mult = div_sc((unsigned long) mips_freq, NSEC_PER_SEC, 32);289289+ cd->shift = 32;290290+ cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);291291+ cd->min_delta_ns = clockevent_delta2ns(0x300, cd);292292+293293+ cd->rating = 300;294294+ cd->irq = irq;295295+ cd->cpumask = cpumask_of_cpu(cpu);296296+ cd->set_next_event = mips_next_event;297297+ cd->set_mode = mips_set_clock_mode;298298+ cd->event_handler = mips_event_handler;299299+300300+ clockevents_register_device(cd);301301+302302+ /*303303+ * On SMTC we only want to do the data structure304304+ * initialization and IRQ setup once.305305+ */306306+ if (cpu)307307+ return 0;308308+ /*309309+ * And we need the hwmask associated with the c0_compare310310+ * vector to be initialized.311311+ */312312+ irq_hwmask[irq] = (0x100 << cp0_compare_irq);313313+ if (cp0_timer_irq_installed)314314+ return 0;315315+316316+ cp0_timer_irq_installed = 1;317317+318318+ setup_irq(irq, &c0_compare_irqaction);319319+320320+ return 0;321321+}
+7-3
arch/mips/kernel/cpu-probe.c
···5454 * interrupt is requested" restriction in the MIPS32/MIPS64 architecture makes5555 * using this version a gamble.5656 */5757-static void r4k_wait_irqoff(void)5757+void r4k_wait_irqoff(void)5858{5959 local_irq_disable();6060 if (!need_resched())6161- __asm__(" .set mips3 \n"6161+ __asm__(" .set push \n"6262+ " .set mips3 \n"6263 " wait \n"6363- " .set mips0 \n");6464+ " .set pop \n");6465 local_irq_enable();6666+ __asm__(" .globl __pastwait \n"6767+ "__pastwait: \n");6868+ return;6569}66706771/*
···236236237237 atomic_set(&kgdb_cpu_doing_single_step, -1);238238 if (remcom_in_buffer[0] == 's')239239- if (kgdb_contthread)240240- atomic_set(&kgdb_cpu_doing_single_step, cpu);239239+ atomic_set(&kgdb_cpu_doing_single_step, cpu);241240242241 return 0;243242 }
+1-1
arch/mips/kernel/mips-mt-fpaff.c
···159159/*160160 * FPU Use Factor empirically derived from experiments on 34K161161 */162162-#define FPUSEFACTOR 333162162+#define FPUSEFACTOR 2000163163164164static __init int mt_fp_affinity_init(void)165165{
+9-10
arch/mips/kernel/process.c
···5555 while (1) {5656 tick_nohz_stop_sched_tick(1);5757 while (!need_resched()) {5858-#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG5858+#ifdef CONFIG_MIPS_MT_SMTC5959 extern void smtc_idle_loop_hook(void);60606161 smtc_idle_loop_hook();···145145 */146146 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);147147 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);148148+149149+#ifdef CONFIG_MIPS_MT_SMTC150150+ /*151151+ * SMTC restores TCStatus after Status, and the CU bits152152+ * are aliased there.153153+ */154154+ childregs->cp0_tcstatus &= ~(ST0_CU2|ST0_CU1);155155+#endif148156 clear_tsk_thread_flag(p, TIF_USEDFPU);149157150158#ifdef CONFIG_MIPS_MT_FPAFF151159 clear_tsk_thread_flag(p, TIF_FPUBOUND);152152-153153- /*154154- * FPU affinity support is cleaner if we track the155155- * user-visible CPU affinity from the very beginning.156156- * The generic cpus_allowed mask will already have157157- * been copied from the parent before copy_thread158158- * is invoked.159159- */160160- p->thread.user_cpus_allowed = p->cpus_allowed;161160#endif /* CONFIG_MIPS_MT_FPAFF */162161163162 if (clone_flags & CLONE_SETTLS)
+1-1
arch/mips/kernel/ptrace.c
···238238 case FPC_EIR: { /* implementation / version register */239239 unsigned int flags;240240#ifdef CONFIG_MIPS_MT_SMTC241241- unsigned int irqflags;241241+ unsigned long irqflags;242242 unsigned int mtflags;243243#endif /* CONFIG_MIPS_MT_SMTC */244244
+136-122
arch/mips/kernel/smtc.c
···11-/* Copyright (C) 2004 Mips Technologies, Inc */11+/*22+ * This program is free software; you can redistribute it and/or33+ * modify it under the terms of the GNU General Public License44+ * as published by the Free Software Foundation; either version 255+ * of the License, or (at your option) any later version.66+ *77+ * This program is distributed in the hope that it will be useful,88+ * but WITHOUT ANY WARRANTY; without even the implied warranty of99+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the1010+ * GNU General Public License for more details.1111+ *1212+ * You should have received a copy of the GNU General Public License1313+ * along with this program; if not, write to the Free Software1414+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.1515+ *1616+ * Copyright (C) 2004 Mips Technologies, Inc1717+ * Copyright (C) 2008 Kevin D. Kissell1818+ */219320#include <linux/clockchips.h>421#include <linux/kernel.h>···3821#include <asm/time.h>3922#include <asm/addrspace.h>4023#include <asm/smtc.h>4141-#include <asm/smtc_ipi.h>4224#include <asm/smtc_proc.h>43254426/*···74587559asiduse smtc_live_asid[MAX_SMTC_TLBS][MAX_SMTC_ASIDS];76607777-/*7878- * Clock interrupt "latch" buffers, per "CPU"7979- */8080-8181-static atomic_t ipi_timer_latch[NR_CPUS];82618362/*8463 * Number of InterProcessor Interrupt (IPI) message buffers to allocate···81708271#define IPIBUF_PER_CPU 483728484-static struct smtc_ipi_q IPIQ[NR_CPUS];7373+struct smtc_ipi_q IPIQ[NR_CPUS];8574static struct smtc_ipi_q freeIPIq;86758776···293282 * phys_cpu_present_map and the logical/physical mappings.294283 */295284296296-int __init mipsmt_build_cpu_map(int start_cpu_slot)285285+int __init smtc_build_cpu_map(int start_cpu_slot)297286{298287 int i, ntcs;299288···336325 write_tc_c0_tcstatus((read_tc_c0_tcstatus()337326 & ~(TCSTATUS_TKSU | TCSTATUS_DA | TCSTATUS_IXMT))338327 | TCSTATUS_A);339339- write_tc_c0_tccontext(0);328328+ /*329329+ * TCContext gets an offset from the base of the IPIQ array330330+ * to be used in low-level code to detect the presence of331331+ * an active IPI queue332332+ */333333+ write_tc_c0_tccontext((sizeof(struct smtc_ipi_q) * cpu) << 16);340334 /* Bind tc to vpe */341335 write_tc_c0_tcbind(vpe);342336 /* In general, all TCs should have the same cpu_data indications */···352336 cpu_data[cpu].options &= ~MIPS_CPU_FPU;353337 cpu_data[cpu].vpe_id = vpe;354338 cpu_data[cpu].tc_id = tc;339339+ /* Multi-core SMTC hasn't been tested, but be prepared */340340+ cpu_data[cpu].core = (read_vpe_c0_ebase() >> 1) & 0xff;355341}356342343343+/*344344+ * Tweak to get Count registes in as close a sync as possible.345345+ * Value seems good for 34K-class cores.346346+ */357347358358-void mipsmt_prepare_cpus(void)348348+#define CP0_SKEW 8349349+350350+void smtc_prepare_cpus(int cpus)359351{360352 int i, vpe, tc, ntc, nvpe, tcpervpe[NR_CPUS], slop, cpu;361353 unsigned long flags;···387363 IPIQ[i].head = IPIQ[i].tail = NULL;388364 spin_lock_init(&IPIQ[i].lock);389365 IPIQ[i].depth = 0;390390- atomic_set(&ipi_timer_latch[i], 0);391366 }392367393368 /* cpu_data index starts at zero */394369 cpu = 0;395370 cpu_data[cpu].vpe_id = 0;396371 cpu_data[cpu].tc_id = 0;372372+ cpu_data[cpu].core = (read_c0_ebase() >> 1) & 0xff;397373 cpu++;398374399375 /* Report on boot-time options */···508484 write_vpe_c0_compare(0);509485 /* Propagate Config7 */510486 write_vpe_c0_config7(read_c0_config7());511511- write_vpe_c0_count(read_c0_count());487487+ write_vpe_c0_count(read_c0_count() + CP0_SKEW);488488+ ehb();512489 }513490 /* enable multi-threading within VPE */514491 write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() | VPECONTROL_TE);···581556void __cpuinit smtc_boot_secondary(int cpu, struct task_struct *idle)582557{583558 extern u32 kernelsp[NR_CPUS];584584- long flags;559559+ unsigned long flags;585560 int mtflags;586561587562 LOCK_MT_PRA();···610585611586void smtc_init_secondary(void)612587{613613- /*614614- * Start timer on secondary VPEs if necessary.615615- * plat_timer_setup has already have been invoked by init/main616616- * on "boot" TC. Like per_cpu_trap_init() hack, this assumes that617617- * SMTC init code assigns TCs consdecutively and in ascending order618618- * to across available VPEs.619619- */620620- if (((read_c0_tcbind() & TCBIND_CURTC) != 0) &&621621- ((read_c0_tcbind() & TCBIND_CURVPE)622622- != cpu_data[smp_processor_id() - 1].vpe_id)){623623- write_c0_compare(read_c0_count() + mips_hpt_frequency/HZ);624624- }625625-626588 local_irq_enable();627589}628590629591void smtc_smp_finish(void)630592{593593+ int cpu = smp_processor_id();594594+595595+ /*596596+ * Lowest-numbered CPU per VPE starts a clock tick.597597+ * Like per_cpu_trap_init() hack, this assumes that598598+ * SMTC init code assigns TCs consdecutively and599599+ * in ascending order across available VPEs.600600+ */601601+ if (cpu > 0 && (cpu_data[cpu].vpe_id != cpu_data[cpu - 1].vpe_id))602602+ write_c0_compare(read_c0_count() + mips_hpt_frequency/HZ);603603+631604 printk("TC %d going on-line as CPU %d\n",632605 cpu_data[smp_processor_id()].tc_id, smp_processor_id());633606}···776753{777754 int tcstatus;778755 struct smtc_ipi *pipi;779779- long flags;756756+ unsigned long flags;780757 int mtflags;758758+ unsigned long tcrestart;759759+ extern void r4k_wait_irqoff(void), __pastwait(void);781760782761 if (cpu == smp_processor_id()) {783762 printk("Cannot Send IPI to self!\n");···796771 pipi->arg = (void *)action;797772 pipi->dest = cpu;798773 if (cpu_data[cpu].vpe_id != cpu_data[smp_processor_id()].vpe_id) {799799- if (type == SMTC_CLOCK_TICK)800800- atomic_inc(&ipi_timer_latch[cpu]);801774 /* If not on same VPE, enqueue and send cross-VPE interrupt */802775 smtc_ipi_nq(&IPIQ[cpu], pipi);803776 LOCK_CORE_PRA();···823800824801 if ((tcstatus & TCSTATUS_IXMT) != 0) {825802 /*826826- * Spin-waiting here can deadlock,827827- * so we queue the message for the target TC.803803+ * If we're in the the irq-off version of the wait804804+ * loop, we need to force exit from the wait and805805+ * do a direct post of the IPI.806806+ */807807+ if (cpu_wait == r4k_wait_irqoff) {808808+ tcrestart = read_tc_c0_tcrestart();809809+ if (tcrestart >= (unsigned long)r4k_wait_irqoff810810+ && tcrestart < (unsigned long)__pastwait) {811811+ write_tc_c0_tcrestart(__pastwait);812812+ tcstatus &= ~TCSTATUS_IXMT;813813+ write_tc_c0_tcstatus(tcstatus);814814+ goto postdirect;815815+ }816816+ }817817+ /*818818+ * Otherwise we queue the message for the target TC819819+ * to pick up when he does a local_irq_restore()828820 */829821 write_tc_c0_tchalt(0);830822 UNLOCK_CORE_PRA();831831- /* Try to reduce redundant timer interrupt messages */832832- if (type == SMTC_CLOCK_TICK) {833833- if (atomic_postincrement(&ipi_timer_latch[cpu])!=0){834834- smtc_ipi_nq(&freeIPIq, pipi);835835- return;836836- }837837- }838823 smtc_ipi_nq(&IPIQ[cpu], pipi);839824 } else {840840- if (type == SMTC_CLOCK_TICK)841841- atomic_inc(&ipi_timer_latch[cpu]);825825+postdirect:842826 post_direct_ipi(cpu, pipi);843827 write_tc_c0_tchalt(0);844828 UNLOCK_CORE_PRA();···913883 smp_call_function_interrupt();914884}915885916916-DECLARE_PER_CPU(struct clock_event_device, smtc_dummy_clockevent_device);886886+DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device);917887918888void ipi_decode(struct smtc_ipi *pipi)919889{···921891 struct clock_event_device *cd;922892 void *arg_copy = pipi->arg;923893 int type_copy = pipi->type;924924- int ticks;925925-926894 smtc_ipi_nq(&freeIPIq, pipi);927895 switch (type_copy) {928896 case SMTC_CLOCK_TICK:929897 irq_enter();930898 kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + 1]++;931931- cd = &per_cpu(smtc_dummy_clockevent_device, cpu);932932- ticks = atomic_read(&ipi_timer_latch[cpu]);933933- atomic_sub(ticks, &ipi_timer_latch[cpu]);934934- while (ticks) {935935- cd->event_handler(cd);936936- ticks--;937937- }899899+ cd = &per_cpu(mips_clockevent_device, cpu);900900+ cd->event_handler(cd);938901 irq_exit();939902 break;940903···960937 }961938}962939940940+/*941941+ * Similar to smtc_ipi_replay(), but invoked from context restore,942942+ * so it reuses the current exception frame rather than set up a943943+ * new one with self_ipi.944944+ */945945+963946void deferred_smtc_ipi(void)964947{965965- struct smtc_ipi *pipi;966966- unsigned long flags;967967-/* DEBUG */968968- int q = smp_processor_id();948948+ int cpu = smp_processor_id();969949970950 /*971951 * Test is not atomic, but much faster than a dequeue,972952 * and the vast majority of invocations will have a null queue.953953+ * If irq_disabled when this was called, then any IPIs queued954954+ * after we test last will be taken on the next irq_enable/restore.955955+ * If interrupts were enabled, then any IPIs added after the956956+ * last test will be taken directly.973957 */974974- if (IPIQ[q].head != NULL) {975975- while((pipi = smtc_ipi_dq(&IPIQ[q])) != NULL) {976976- /* ipi_decode() should be called with interrupts off */977977- local_irq_save(flags);958958+959959+ while (IPIQ[cpu].head != NULL) {960960+ struct smtc_ipi_q *q = &IPIQ[cpu];961961+ struct smtc_ipi *pipi;962962+ unsigned long flags;963963+964964+ /*965965+ * It may be possible we'll come in with interrupts966966+ * already enabled.967967+ */968968+ local_irq_save(flags);969969+970970+ spin_lock(&q->lock);971971+ pipi = __smtc_ipi_dq(q);972972+ spin_unlock(&q->lock);973973+ if (pipi != NULL)978974 ipi_decode(pipi);979979- local_irq_restore(flags);980980- }975975+ /*976976+ * The use of the __raw_local restore isn't977977+ * as obviously necessary here as in smtc_ipi_replay(),978978+ * but it's more efficient, given that we're already979979+ * running down the IPI queue.980980+ */981981+ __raw_local_irq_restore(flags);981982 }982983}983984···1022975 struct smtc_ipi *pipi;1023976 unsigned long tcstatus;1024977 int sent;10251025- long flags;978978+ unsigned long flags;1026979 unsigned int mtflags;1027980 unsigned int vpflags;1028981···1113106611141067/*11151068 * SMTC-specific hacks invoked from elsewhere in the kernel.11161116- *11171117- * smtc_ipi_replay is called from raw_local_irq_restore which is only ever11181118- * called with interrupts disabled. We do rely on interrupts being disabled11191119- * here because using spin_lock_irqsave()/spin_unlock_irqrestore() would11201120- * result in a recursive call to raw_local_irq_restore().11211069 */1122107011231123-static void __smtc_ipi_replay(void)10711071+ /*10721072+ * smtc_ipi_replay is called from raw_local_irq_restore10731073+ */10741074+10751075+void smtc_ipi_replay(void)11241076{11251077 unsigned int cpu = smp_processor_id();1126107811271079 /*11281080 * To the extent that we've ever turned interrupts off,11291081 * we may have accumulated deferred IPIs. This is subtle.11301130- * If we use the smtc_ipi_qdepth() macro, we'll get an11311131- * exact number - but we'll also disable interrupts11321132- * and create a window of failure where a new IPI gets11331133- * queued after we test the depth but before we re-enable11341134- * interrupts. So long as IXMT never gets set, however,11351082 * we should be OK: If we pick up something and dispatch11361083 * it here, that's great. If we see nothing, but concurrent11371084 * with this operation, another TC sends us an IPI, IXMT11381085 * is clear, and we'll handle it as a real pseudo-interrupt11391139- * and not a pseudo-pseudo interrupt.10861086+ * and not a pseudo-pseudo interrupt. The important thing10871087+ * is to do the last check for queued message *after* the10881088+ * re-enabling of interrupts.11401089 */11411141- if (IPIQ[cpu].depth > 0) {11421142- while (1) {11431143- struct smtc_ipi_q *q = &IPIQ[cpu];11441144- struct smtc_ipi *pipi;11451145- extern void self_ipi(struct smtc_ipi *);10901090+ while (IPIQ[cpu].head != NULL) {10911091+ struct smtc_ipi_q *q = &IPIQ[cpu];10921092+ struct smtc_ipi *pipi;10931093+ unsigned long flags;1146109411471147- spin_lock(&q->lock);11481148- pipi = __smtc_ipi_dq(q);11491149- spin_unlock(&q->lock);11501150- if (!pipi)11511151- break;10951095+ /*10961096+ * It's just possible we'll come in with interrupts10971097+ * already enabled.10981098+ */10991099+ local_irq_save(flags);1152110011011101+ spin_lock(&q->lock);11021102+ pipi = __smtc_ipi_dq(q);11031103+ spin_unlock(&q->lock);11041104+ /*11051105+ ** But use a raw restore here to avoid recursion.11061106+ */11071107+ __raw_local_irq_restore(flags);11081108+11091109+ if (pipi) {11531110 self_ipi(pipi);11541111 smtc_cpu_stats[cpu].selfipis++;11551112 }11561113 }11571157-}11581158-11591159-void smtc_ipi_replay(void)11601160-{11611161- raw_local_irq_disable();11621162- __smtc_ipi_replay();11631114}1164111511651116EXPORT_SYMBOL(smtc_ipi_replay);···12381193 }12391194 }1240119512411241- /*12421242- * Now that we limit outstanding timer IPIs, check for hung TC12431243- */12441244- for (tc = 0; tc < NR_CPUS; tc++) {12451245- /* Don't check ourself - we'll dequeue IPIs just below */12461246- if ((tc != smp_processor_id()) &&12471247- atomic_read(&ipi_timer_latch[tc]) > timerq_limit) {12481248- if (clock_hang_reported[tc] == 0) {12491249- pdb_msg += sprintf(pdb_msg,12501250- "TC %d looks hung with timer latch at %d\n",12511251- tc, atomic_read(&ipi_timer_latch[tc]));12521252- clock_hang_reported[tc]++;12531253- }12541254- }12551255- }12561196 emt(mtflags);12571197 local_irq_restore(flags);12581198 if (pdb_msg != &id_ho_db_msg[0])12591199 printk("CPU%d: %s", smp_processor_id(), id_ho_db_msg);12601200#endif /* CONFIG_SMTC_IDLE_HOOK_DEBUG */1261120112621262- /*12631263- * Replay any accumulated deferred IPIs. If "Instant Replay"12641264- * is in use, there should never be any.12651265- */12661266-#ifndef CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY12671267- {12681268- unsigned long flags;12691269-12701270- local_irq_save(flags);12711271- __smtc_ipi_replay();12721272- local_irq_restore(flags);12731273- }12741274-#endif /* CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY */12021202+ smtc_ipi_replay();12751203}1276120412771205void smtc_soft_dump(void)···12601242 printk("%d: %ld\n", i, smtc_cpu_stats[i].selfipis);12611243 }12621244 smtc_ipi_qdump();12631263- printk("Timer IPI Backlogs:\n");12641264- for (i=0; i < NR_CPUS; i++) {12651265- printk("%d: %d\n", i, atomic_read(&ipi_timer_latch[i]));12661266- }12671245 printk("%d Recoveries of \"stolen\" FPU\n",12681246 atomic_read(&smtc_fpu_recoveries));12691247}
···84848585static void __init msmtc_smp_setup(void)8686{8787- mipsmt_build_cpu_map(0);8787+ /*8888+ * we won't get the definitive value until8989+ * we've run smtc_prepare_cpus later, but9090+ * we would appear to need an upper bound now.9191+ */9292+ smp_num_siblings = smtc_build_cpu_map(0);8893}89949095static void __init msmtc_prepare_cpus(unsigned int max_cpus)9196{9292- mipsmt_prepare_cpus();9797+ smtc_prepare_cpus(max_cpus);9398}949995100struct plat_smp_ops msmtc_smp_ops = {
+1
arch/mips/pci/Makefile
···1515obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o1616obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o1717obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o1818+obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o18191920#2021# These are still pretty much in the old state, watch, go blind.
+60
arch/mips/pci/pci-bcm47xx.c
···11+/*22+ * Copyright (C) 2008 Aurelien Jarno <aurelien@aurel32.net>33+ *44+ * This program is free software; you can redistribute it and/or modify it55+ * under the terms of the GNU General Public License as published by the66+ * Free Software Foundation; either version 2 of the License, or (at your77+ * option) any later version.88+ *99+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED1010+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF1111+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN1212+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,1313+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT1414+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF1515+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON1616+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT1717+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF1818+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.1919+ *2020+ * You should have received a copy of the GNU General Public License along2121+ * with this program; if not, write to the Free Software Foundation, Inc.,2222+ * 675 Mass Ave, Cambridge, MA 02139, USA.2323+ */2424+2525+#include <linux/types.h>2626+#include <linux/pci.h>2727+#include <linux/ssb/ssb.h>2828+2929+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)3030+{3131+ return 0;3232+}3333+3434+int pcibios_plat_dev_init(struct pci_dev *dev)3535+{3636+ int res;3737+ u8 slot, pin;3838+3939+ res = ssb_pcibios_plat_dev_init(dev);4040+ if (res < 0) {4141+ printk(KERN_ALERT "PCI: Failed to init device %s\n",4242+ pci_name(dev));4343+ return res;4444+ }4545+4646+ pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);4747+ slot = PCI_SLOT(dev->devfn);4848+ res = ssb_pcibios_map_irq(dev, slot, pin);4949+5050+ /* IRQ-0 and IRQ-1 are software interrupts. */5151+ if (res < 2) {5252+ printk(KERN_ALERT "PCI: Failed to map IRQ of device %s\n",5353+ pci_name(dev));5454+ return res;5555+ }5656+5757+ dev->irq = res;5858+ return 0;5959+}6060+
+33-11
arch/mips/pci/pci-ip27.c
···143143 */144144int __devinit pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)145145{146146- struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);147147- int irq = bc->pci_int[slot];146146+ return 0;147147+}148148149149- if (irq == -1) {150150- irq = bc->pci_int[slot] = request_bridge_irq(bc);151151- if (irq < 0)152152- panic("Can't allocate interrupt for PCI device %s\n",153153- pci_name(dev));149149+/* Most MIPS systems have straight-forward swizzling needs. */150150+static inline u8 bridge_swizzle(u8 pin, u8 slot)151151+{152152+ return (((pin - 1) + slot) % 4) + 1;153153+}154154+155155+static inline struct pci_dev *bridge_root_dev(struct pci_dev *dev)156156+{157157+ while (dev->bus->parent) {158158+ /* Move up the chain of bridges. */159159+ dev = dev->bus->self;154160 }155161156156- irq_to_bridge[irq] = bc;157157- irq_to_slot[irq] = slot;158158-159159- return irq;162162+ return dev;160163}161164162165/* Do platform specific device initialization at pci_enable_device() time */163166int pcibios_plat_dev_init(struct pci_dev *dev)164167{168168+ struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);169169+ struct pci_dev *rdev = bridge_root_dev(dev);170170+ int slot = PCI_SLOT(rdev->devfn);171171+ int irq;172172+173173+ irq = bc->pci_int[slot];174174+ if (irq == -1) {175175+ irq = request_bridge_irq(bc);176176+ if (irq < 0)177177+ return irq;178178+179179+ bc->pci_int[slot] = irq;180180+ }181181+182182+ irq_to_bridge[irq] = bc;183183+ irq_to_slot[irq] = slot;184184+185185+ dev->irq = irq;186186+165187 return 0;166188}167189
+49-30
arch/mn10300/kernel/irq.c
···2020atomic_t irq_err_count;21212222/*2323- * MN10300 INTC controller operations2323+ * MN10300 interrupt controller operations2424 */2525-static void mn10300_cpupic_disable(unsigned int irq)2626-{2727- u16 tmp = GxICR(irq);2828- GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;2929- tmp = GxICR(irq);3030-}3131-3232-static void mn10300_cpupic_enable(unsigned int irq)3333-{3434- u16 tmp = GxICR(irq);3535- GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;3636- tmp = GxICR(irq);3737-}3838-3925static void mn10300_cpupic_ack(unsigned int irq)4026{4127 u16 tmp;···4660static void mn10300_cpupic_unmask(unsigned int irq)4761{4862 u16 tmp = GxICR(irq);4949- GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT;5050- tmp = GxICR(irq);5151-}5252-5353-static void mn10300_cpupic_end(unsigned int irq)5454-{5555- u16 tmp = GxICR(irq);5663 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;5764 tmp = GxICR(irq);5865}59666060-static struct irq_chip mn10300_cpu_pic = {6161- .name = "cpu",6262- .disable = mn10300_cpupic_disable,6363- .enable = mn10300_cpupic_enable,6767+static void mn10300_cpupic_unmask_clear(unsigned int irq)6868+{6969+ /* the MN10300 PIC latches its interrupt request bit, even after the7070+ * device has ceased to assert its interrupt line and the interrupt7171+ * channel has been disabled in the PIC, so for level-triggered7272+ * interrupts we need to clear the request bit when we re-enable */7373+ u16 tmp = GxICR(irq);7474+ GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT;7575+ tmp = GxICR(irq);7676+}7777+7878+/*7979+ * MN10300 PIC level-triggered IRQ handling.8080+ *8181+ * The PIC has no 'ACK' function per se. It is possible to clear individual8282+ * channel latches, but each latch relatches whether or not the channel is8383+ * masked, so we need to clear the latch when we unmask the channel.8484+ *8585+ * Also for this reason, we don't supply an ack() op (it's unused anyway if8686+ * mask_ack() is provided), and mask_ack() just masks.8787+ */8888+static struct irq_chip mn10300_cpu_pic_level = {8989+ .name = "cpu_l",9090+ .disable = mn10300_cpupic_mask,9191+ .enable = mn10300_cpupic_unmask_clear,9292+ .ack = NULL,9393+ .mask = mn10300_cpupic_mask,9494+ .mask_ack = mn10300_cpupic_mask,9595+ .unmask = mn10300_cpupic_unmask_clear,9696+};9797+9898+/*9999+ * MN10300 PIC edge-triggered IRQ handling.100100+ *101101+ * We use the latch clearing function of the PIC as the 'ACK' function.102102+ */103103+static struct irq_chip mn10300_cpu_pic_edge = {104104+ .name = "cpu_e",105105+ .disable = mn10300_cpupic_mask,106106+ .enable = mn10300_cpupic_unmask,64107 .ack = mn10300_cpupic_ack,65108 .mask = mn10300_cpupic_mask,66109 .mask_ack = mn10300_cpupic_mask_ack,67110 .unmask = mn10300_cpupic_unmask,6868- .end = mn10300_cpupic_end,69111};7011271113/*···128114 */129115void set_intr_postackable(int irq)130116{131131- set_irq_handler(irq, handle_level_irq);117117+ set_irq_chip_and_handler(irq, &mn10300_cpu_pic_level,118118+ handle_level_irq);132119}133120134121/*···141126142127 for (irq = 0; irq < NR_IRQS; irq++)143128 if (irq_desc[irq].chip == &no_irq_type)144144- set_irq_chip_and_handler(irq, &mn10300_cpu_pic,145145- handle_edge_irq);129129+ /* due to the PIC latching interrupt requests, even130130+ * when the IRQ is disabled, IRQ_PENDING is superfluous131131+ * and we can use handle_level_irq() for edge-triggered132132+ * interrupts */133133+ set_irq_chip_and_handler(irq, &mn10300_cpu_pic_edge,134134+ handle_level_irq);146135 unit_init_IRQ();147136}148137
+41-11
arch/mn10300/kernel/time.c
···11/* MN10300 Low level time management22 *33- * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.33+ * Copyright (C) 2007-2008 Red Hat, Inc. All Rights Reserved.44 * Written by David Howells (dhowells@redhat.com)55 * - Derived from arch/i386/kernel/time.c66 *···1616#include <linux/init.h>1717#include <linux/smp.h>1818#include <linux/profile.h>1919+#include <linux/cnt32_to_63.h>1920#include <asm/irq.h>2021#include <asm/div64.h>2122#include <asm/processor.h>···4140 .name = "timer",4241};43424343+static unsigned long sched_clock_multiplier;4444+4445/*4546 * scheduler clock - returns current time in nanosec units.4647 */4748unsigned long long sched_clock(void)4849{4950 union {5050- unsigned long long l;5151- u32 w[2];5252- } quot;5151+ unsigned long long ll;5252+ unsigned l[2];5353+ } tsc64, result;5454+ unsigned long tsc, tmp;5555+ unsigned product[3]; /* 96-bit intermediate value */53565454- quot.w[0] = mn10300_last_tsc - get_cycles();5555- quot.w[1] = 1000000000;5757+ /* read the TSC value5858+ */5959+ tsc = 0 - get_cycles(); /* get_cycles() counts down */56605757- asm("mulu %2,%3,%0,%1"5858- : "=r"(quot.w[1]), "=r"(quot.w[0])5959- : "0"(quot.w[1]), "1"(quot.w[0])6161+ /* expand to 64-bits.6262+ * - sched_clock() must be called once a minute or better or the6363+ * following will go horribly wrong - see cnt32_to_63()6464+ */6565+ tsc64.ll = cnt32_to_63(tsc) & 0x7fffffffffffffffULL;6666+6767+ /* scale the 64-bit TSC value to a nanosecond value via a 96-bit6868+ * intermediate6969+ */7070+ asm("mulu %2,%0,%3,%0 \n" /* LSW * mult -> 0:%3:%0 */7171+ "mulu %2,%1,%2,%1 \n" /* MSW * mult -> %2:%1:0 */7272+ "add %3,%1 \n"7373+ "addc 0,%2 \n" /* result in %2:%1:%0 */7474+ : "=r"(product[0]), "=r"(product[1]), "=r"(product[2]), "=r"(tmp)7575+ : "0"(tsc64.l[0]), "1"(tsc64.l[1]), "2"(sched_clock_multiplier)6076 : "cc");61776262- do_div(quot.l, MN10300_TSCCLK);7878+ result.l[0] = product[1] << 16 | product[0] >> 16;7979+ result.l[1] = product[2] << 16 | product[1] >> 16;63806464- return quot.l;8181+ return result.ll;8282+}8383+8484+/*8585+ * initialise the scheduler clock8686+ */8787+static void __init mn10300_sched_clock_init(void)8888+{8989+ sched_clock_multiplier =9090+ __muldiv64u(NSEC_PER_SEC, 1 << 16, MN10300_TSCCLK);6591}66926793/*···156128 /* start the watchdog timer */157129 watchdog_go();158130#endif131131+132132+ mn10300_sched_clock_init();159133}
+1-1
arch/mn10300/unit-asb2303/unit-init.c
···5151 switch (GET_XIRQ_TRIGGER(extnum)) {5252 case XIRQ_TRIGGER_HILEVEL:5353 case XIRQ_TRIGGER_LOWLEVEL:5454- set_irq_handler(XIRQ2IRQ(extnum), handle_level_irq);5454+ set_intr_postackable(XIRQ2IRQ(extnum));5555 break;5656 default:5757 break;
+1-1
arch/mn10300/unit-asb2305/unit-init.c
···5252 switch (GET_XIRQ_TRIGGER(extnum)) {5353 case XIRQ_TRIGGER_HILEVEL:5454 case XIRQ_TRIGGER_LOWLEVEL:5555- set_irq_handler(XIRQ2IRQ(extnum), handle_level_irq);5555+ set_intr_postackable(XIRQ2IRQ(extnum));5656 break;5757 default:5858 break;
···3434#include <asm/smp.h>35353636#ifdef CONFIG_HOTPLUG_CPU3737-/* this is used for software suspend, and that shuts down3838- * CPUs even while the system is still booting... */3939-#define cpu_should_die() (cpu_is_offline(smp_processor_id()) && \4040- (system_state == SYSTEM_RUNNING \4141- || system_state == SYSTEM_BOOTING))3737+#define cpu_should_die() cpu_is_offline(smp_processor_id())4238#else4339#define cpu_should_die() 04440#endif
···246246 return 1;247247}248248249249+static cpumask_t c1e_mask = CPU_MASK_NONE;250250+static int c1e_detected;251251+252252+void c1e_remove_cpu(int cpu)253253+{254254+ cpu_clear(cpu, c1e_mask);255255+}256256+249257/*250258 * C1E aware idle routine. We check for C1E active in the interrupt251259 * pending message MSR. If we detect C1E, then we handle it the same···261253 */262254static void c1e_idle(void)263255{264264- static cpumask_t c1e_mask = CPU_MASK_NONE;265265- static int c1e_detected;266266-267256 if (need_resched())268257 return;269258···270265 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);271266 if (lo & K8_INTP_C1E_ACTIVE_MASK) {272267 c1e_detected = 1;273273- mark_tsc_unstable("TSC halt in C1E");274274- printk(KERN_INFO "System has C1E enabled\n");268268+ if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))269269+ mark_tsc_unstable("TSC halt in AMD C1E");270270+ printk(KERN_INFO "System has AMD C1E enabled\n");271271+ set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E);275272 }276273 }277274
+2
arch/x86/kernel/process_32.c
···5555#include <asm/tlbflush.h>5656#include <asm/cpu.h>5757#include <asm/kdebug.h>5858+#include <asm/idle.h>58595960asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");6061···8988 cpu_clear(cpu, cpu_callin_map);90899190 numa_remove_cpu(cpu);9191+ c1e_remove_cpu(cpu);9292}93939494/* We don't actually take CPU down, just spin without interrupts. */
···309309static void nv_nf2_thaw(struct ata_port *ap);310310static void nv_ck804_freeze(struct ata_port *ap);311311static void nv_ck804_thaw(struct ata_port *ap);312312+static int nv_hardreset(struct ata_link *link, unsigned int *class,313313+ unsigned long deadline);312314static int nv_adma_slave_config(struct scsi_device *sdev);313315static int nv_adma_check_atapi_dma(struct ata_queued_cmd *qc);314316static void nv_adma_qc_prep(struct ata_queued_cmd *qc);···405403 .slave_configure = nv_swncq_slave_config,406404};407405408408-static struct ata_port_operations nv_generic_ops = {406406+/* OSDL bz3352 reports that some nv controllers can't determine device407407+ * signature reliably and nv_hardreset is implemented to work around408408+ * the problem. This was reported on nf3 and it's unclear whether any409409+ * other controllers are affected. However, the workaround has been410410+ * applied to all variants and there isn't much to gain by trying to411411+ * find out exactly which ones are affected at this point especially412412+ * because NV has moved over to ahci for newer controllers.413413+ */414414+static struct ata_port_operations nv_common_ops = {409415 .inherits = &ata_bmdma_port_ops,410410- .hardreset = ATA_OP_NULL,416416+ .hardreset = nv_hardreset,411417 .scr_read = nv_scr_read,412418 .scr_write = nv_scr_write,413419};414420421421+/* OSDL bz11195 reports that link doesn't come online after hardreset422422+ * on generic nv's and there have been several other similar reports423423+ * on linux-ide. Disable hardreset for generic nv's.424424+ */425425+static struct ata_port_operations nv_generic_ops = {426426+ .inherits = &nv_common_ops,427427+ .hardreset = ATA_OP_NULL,428428+};429429+415430static struct ata_port_operations nv_nf2_ops = {416416- .inherits = &nv_generic_ops,431431+ .inherits = &nv_common_ops,417432 .freeze = nv_nf2_freeze,418433 .thaw = nv_nf2_thaw,419434};420435421436static struct ata_port_operations nv_ck804_ops = {422422- .inherits = &nv_generic_ops,437437+ .inherits = &nv_common_ops,423438 .freeze = nv_ck804_freeze,424439 .thaw = nv_ck804_thaw,425440 .host_stop = nv_ck804_host_stop,426441};427442428443static struct ata_port_operations nv_adma_ops = {429429- .inherits = &nv_generic_ops,444444+ .inherits = &nv_common_ops,430445431446 .check_atapi_dma = nv_adma_check_atapi_dma,432447 .sff_tf_read = nv_adma_tf_read,···467448};468449469450static struct ata_port_operations nv_swncq_ops = {470470- .inherits = &nv_generic_ops,451451+ .inherits = &nv_common_ops,471452472453 .qc_defer = ata_std_qc_defer,473454 .qc_prep = nv_swncq_qc_prep,···16031584 mask |= (NV_INT_MASK_MCP55 << shift);16041585 writel(mask, mmio_base + NV_INT_ENABLE_MCP55);16051586 ata_sff_thaw(ap);15871587+}15881588+15891589+static int nv_hardreset(struct ata_link *link, unsigned int *class,15901590+ unsigned long deadline)15911591+{15921592+ int rc;15931593+15941594+ /* SATA hardreset fails to retrieve proper device signature on15951595+ * some controllers. Request follow up SRST. For more info,15961596+ * see http://bugzilla.kernel.org/show_bug.cgi?id=335215971597+ */15981598+ rc = sata_sff_hardreset(link, class, deadline);15991599+ if (rc)16001600+ return rc;16011601+ return -EAGAIN;16061602}1607160316081604static void nv_adma_error_handler(struct ata_port *ap)
···180180};181181182182183183-static int i2c_powermac_remove(struct platform_device *dev)183183+static int __devexit i2c_powermac_remove(struct platform_device *dev)184184{185185 struct i2c_adapter *adapter = platform_get_drvdata(dev);186186 struct pmac_i2c_bus *bus = i2c_get_adapdata(adapter);···200200}201201202202203203-static int __devexit i2c_powermac_probe(struct platform_device *dev)203203+static int __devinit i2c_powermac_probe(struct platform_device *dev)204204{205205 struct pmac_i2c_bus *bus = dev->dev.platform_data;206206 struct device_node *parent = NULL;
+3-1
drivers/i2c/i2c-dev.c
···583583 goto out;584584585585 i2c_dev_class = class_create(THIS_MODULE, "i2c-dev");586586- if (IS_ERR(i2c_dev_class))586586+ if (IS_ERR(i2c_dev_class)) {587587+ res = PTR_ERR(i2c_dev_class);587588 goto out_unreg_chrdev;589589+ }588590589591 res = i2c_add_driver(&i2cdev_driver);590592 if (res)
+14
drivers/ide/Kconfig
···292292 tristate "generic/default IDE chipset support"293293 depends on ALPHA || X86 || IA64 || M32R || MIPS294294 help295295+ This is the generic IDE driver. This driver attaches to the296296+ fixed legacy ports (e.g. on PCs 0x1f0/0x170, 0x1e8/0x168 and297297+ so on). Please note that if this driver is built into the298298+ kernel or loaded before other ATA (IDE or libata) drivers299299+ and the controller is located at legacy ports, this driver300300+ may grab those ports and thus can prevent the controller301301+ specific driver from attaching.302302+303303+ Also, currently, IDE generic doesn't allow IRQ sharing304304+ meaning that the IRQs it grabs won't be available to other305305+ controllers sharing those IRQs which usually makes drivers306306+ for those controllers fail. Generally, it's not a good idea307307+ to load IDE generic driver on modern systems.308308+295309 If unsure, say N.296310297311config BLK_DEV_PLATFORM
···837837 struct dm_table *map = dm_get_table(md);838838 struct dm_target *ti;839839 sector_t max_sectors;840840- int max_size;840840+ int max_size = 0;841841842842 if (unlikely(!map))843843- return 0;843843+ goto out;844844845845 ti = dm_table_find_target(map, bvm->bi_sector);846846+ if (!dm_target_is_valid(ti))847847+ goto out_table;846848847849 /*848850 * Find maximum amount of I/O that won't need splitting···863861 if (max_size && ti->type->merge)864862 max_size = ti->type->merge(ti, bvm, biovec, max_size);865863864864+out_table:865865+ dm_table_put(map);866866+867867+out:866868 /*867869 * Always allow an entire first page868870 */869871 if (max_size <= biovec->bv_len && !(bvm->bi_size >> SECTOR_SHIFT))870872 max_size = biovec->bv_len;871871-872872- dm_table_put(map);873873874874 return max_size;875875}
+2-2
drivers/mfd/Kconfig
···21212222config MFD_SM501_GPIO2323 bool "Export GPIO via GPIO layer"2424- depends on MFD_SM501 && HAVE_GPIO_LIB2424+ depends on MFD_SM501 && GPIOLIB2525 ---help---2626 This option uses the gpio library layer to export the 64 GPIO2727 lines on the SM501. The platform data is used to supply the···29293030config MFD_ASIC33131 bool "Support for Compaq ASIC3"3232- depends on GENERIC_HARDIRQS && HAVE_GPIO_LIB && ARM3232+ depends on GENERIC_HARDIRQS && GPIOLIB && ARM3333 ---help---3434 This driver supports the ASIC3 multifunction chip found on many3535 PDAs (mainly iPAQ and HTC based ones)
+1-1
drivers/mfd/asic3.c
···312312 struct asic3 *asic = platform_get_drvdata(pdev);313313 unsigned long clksel = 0;314314 unsigned int irq, irq_base;315315- int map_size;316315 int ret;317316318317 ret = platform_get_irq(pdev, 0);···533534 struct asic3 *asic;534535 struct resource *mem;535536 unsigned long clksel;537537+ int map_size;536538 int ret = 0;537539538540 asic = kzalloc(sizeof(struct asic3), GFP_KERNEL);
···432432 regs_buff[11] = er32(TIDV);433433434434 regs_buff[12] = adapter->hw.phy.type; /* PHY type (IGP=1, M88=0) */435435+436436+ /* ethtool doesn't use anything past this point, so all this437437+ * code is likely legacy junk for apps that may or may not438438+ * exist */435439 if (hw->phy.type == e1000_phy_m88) {436440 e1e_rphy(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);437441 regs_buff[13] = (u32)phy_data; /* cable length */···451447 regs_buff[22] = adapter->phy_stats.receive_errors;452448 regs_buff[23] = regs_buff[13]; /* mdix mode */453449 }454454- regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */450450+ regs_buff[21] = 0; /* was idle_errors */455451 e1e_rphy(hw, PHY_1000T_STATUS, &phy_data);456452 regs_buff[24] = (u32)phy_data; /* phy local receiver status */457453 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */···532528533529 if (eeprom->magic != (adapter->pdev->vendor | (adapter->pdev->device << 16)))534530 return -EFAULT;531531+532532+ if (adapter->flags & FLAG_READ_ONLY_NVM)533533+ return -EINVAL;535534536535 max_len = hw->nvm.word_size * 2;537536
+78
drivers/net/e1000e/ich8lan.c
···5858#define ICH_FLASH_HSFCTL 0x00065959#define ICH_FLASH_FADDR 0x00086060#define ICH_FLASH_FDATA0 0x00106161+#define ICH_FLASH_PR0 0x007461626263#define ICH_FLASH_READ_COMMAND_TIMEOUT 5006364#define ICH_FLASH_WRITE_COMMAND_TIMEOUT 500···149148 u32 gmwag :8; /* 31:24 GbE Master Write Access Grant */150149 } hsf_flregacc;151150 u16 regval;151151+};152152+153153+/* ICH Flash Protected Region */154154+union ich8_flash_protected_range {155155+ struct ich8_pr {156156+ u32 base:13; /* 0:12 Protected Range Base */157157+ u32 reserved1:2; /* 13:14 Reserved */158158+ u32 rpe:1; /* 15 Read Protection Enable */159159+ u32 limit:13; /* 16:28 Protected Range Limit */160160+ u32 reserved2:2; /* 29:30 Reserved */161161+ u32 wpe:1; /* 31 Write Protection Enable */162162+ } range;163163+ u32 regval;152164};153165154166static s32 e1000_setup_link_ich8lan(struct e1000_hw *hw);···380366 return 0;381367}382368369369+static DEFINE_MUTEX(nvm_mutex);370370+static pid_t nvm_owner = -1;371371+383372/**384373 * e1000_acquire_swflag_ich8lan - Acquire software control flag385374 * @hw: pointer to the HW structure···395378{396379 u32 extcnf_ctrl;397380 u32 timeout = PHY_CFG_TIMEOUT;381381+382382+ might_sleep();383383+384384+ if (!mutex_trylock(&nvm_mutex)) {385385+ WARN(1, KERN_ERR "e1000e mutex contention. Owned by pid %d\n",386386+ nvm_owner);387387+ mutex_lock(&nvm_mutex);388388+ }389389+ nvm_owner = current->pid;398390399391 while (timeout) {400392 extcnf_ctrl = er32(EXTCNF_CTRL);···419393420394 if (!timeout) {421395 hw_dbg(hw, "FW or HW has locked the resource for too long.\n");396396+ nvm_owner = -1;397397+ mutex_unlock(&nvm_mutex);422398 return -E1000_ERR_CONFIG;423399 }424400···442414 extcnf_ctrl = er32(EXTCNF_CTRL);443415 extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG;444416 ew32(EXTCNF_CTRL, extcnf_ctrl);417417+418418+ nvm_owner = -1;419419+ mutex_unlock(&nvm_mutex);445420}446421447422/**···13151284 * programming failed.13161285 */13171286 if (ret_val) {12871287+ /* Possibly read-only, see e1000e_write_protect_nvm_ich8lan() */13181288 hw_dbg(hw, "Flash commit failed.\n");13191289 e1000_release_swflag_ich8lan(hw);13201290 return ret_val;···14031371 }1404137214051373 return e1000e_validate_nvm_checksum_generic(hw);13741374+}13751375+13761376+/**13771377+ * e1000e_write_protect_nvm_ich8lan - Make the NVM read-only13781378+ * @hw: pointer to the HW structure13791379+ *13801380+ * To prevent malicious write/erase of the NVM, set it to be read-only13811381+ * so that the hardware ignores all write/erase cycles of the NVM via13821382+ * the flash control registers. The shadow-ram copy of the NVM will13831383+ * still be updated, however any updates to this copy will not stick13841384+ * across driver reloads.13851385+ **/13861386+void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw)13871387+{13881388+ union ich8_flash_protected_range pr0;13891389+ union ich8_hws_flash_status hsfsts;13901390+ u32 gfpreg;13911391+ s32 ret_val;13921392+13931393+ ret_val = e1000_acquire_swflag_ich8lan(hw);13941394+ if (ret_val)13951395+ return;13961396+13971397+ gfpreg = er32flash(ICH_FLASH_GFPREG);13981398+13991399+ /* Write-protect GbE Sector of NVM */14001400+ pr0.regval = er32flash(ICH_FLASH_PR0);14011401+ pr0.range.base = gfpreg & FLASH_GFPREG_BASE_MASK;14021402+ pr0.range.limit = ((gfpreg >> 16) & FLASH_GFPREG_BASE_MASK);14031403+ pr0.range.wpe = true;14041404+ ew32flash(ICH_FLASH_PR0, pr0.regval);14051405+14061406+ /*14071407+ * Lock down a subset of GbE Flash Control Registers, e.g.14081408+ * PR0 to prevent the write-protection from being lifted.14091409+ * Once FLOCKDN is set, the registers protected by it cannot14101410+ * be written until FLOCKDN is cleared by a hardware reset.14111411+ */14121412+ hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);14131413+ hsfsts.hsf_status.flockdn = true;14141414+ ew32flash(ICH_FLASH_HSFSTS, hsfsts.regval);14151415+14161416+ e1000_release_swflag_ich8lan(hw);14061417}1407141814081419/**···17941719 hw_dbg(hw, "Issuing a global reset to ich8lan");17951720 ew32(CTRL, (ctrl | E1000_CTRL_RST));17961721 msleep(20);17221722+17231723+ /* release the swflag because it is not reset by hardware reset */17241724+ e1000_release_swflag_ich8lan(hw);1797172517981726 ret_val = e1000e_get_auto_rd_done(hw);17991727 if (ret_val) {
+35-37
drivers/net/e1000e/netdev.c
···47474848#include "e1000.h"49495050-#define DRV_VERSION "0.3.3.3-k2"5050+#define DRV_VERSION "0.3.3.3-k6"5151char e1000e_driver_name[] = "e1000e";5252const char e1000e_driver_version[] = DRV_VERSION;5353···11151115 writel(0, adapter->hw.hw_addr + rx_ring->tail);11161116}1117111711181118+static void e1000e_downshift_workaround(struct work_struct *work)11191119+{11201120+ struct e1000_adapter *adapter = container_of(work,11211121+ struct e1000_adapter, downshift_task);11221122+11231123+ e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);11241124+}11251125+11181126/**11191127 * e1000_intr_msi - Interrupt Handler11201128 * @irq: interrupt number···11471139 */11481140 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&11491141 (!(er32(STATUS) & E1000_STATUS_LU)))11501150- e1000e_gig_downshift_workaround_ich8lan(hw);11421142+ schedule_work(&adapter->downshift_task);1151114311521144 /*11531145 * 80003ES2LAN workaround-- For packet buffer work-around on···12131205 */12141206 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&12151207 (!(er32(STATUS) & E1000_STATUS_LU)))12161216- e1000e_gig_downshift_workaround_ich8lan(hw);12081208+ schedule_work(&adapter->downshift_task);1217120912181210 /*12191211 * 80003ES2LAN workaround--···26002592 /* Explicitly disable IRQ since the NIC can be in any state. */26012593 e1000_irq_disable(adapter);2602259426032603- spin_lock_init(&adapter->stats_lock);26042604-26052595 set_bit(__E1000_DOWN, &adapter->state);26062596 return 0;26072597···29182912 return 0;29192913}2920291429152915+/**29162916+ * e1000e_update_phy_task - work thread to update phy29172917+ * @work: pointer to our work struct29182918+ *29192919+ * this worker thread exists because we must acquire a29202920+ * semaphore to read the phy, which we could msleep while29212921+ * waiting for it, and we can't msleep in a timer.29222922+ **/29232923+static void e1000e_update_phy_task(struct work_struct *work)29242924+{29252925+ struct e1000_adapter *adapter = container_of(work,29262926+ struct e1000_adapter, update_phy_task);29272927+ e1000_get_phy_info(&adapter->hw);29282928+}29292929+29212930/*29222931 * Need to wait a few seconds after link up to get diagnostic information from29232932 * the phy···29402919static void e1000_update_phy_info(unsigned long data)29412920{29422921 struct e1000_adapter *adapter = (struct e1000_adapter *) data;29432943- e1000_get_phy_info(&adapter->hw);29222922+ schedule_work(&adapter->update_phy_task);29442923}2945292429462925/**···29512930{29522931 struct e1000_hw *hw = &adapter->hw;29532932 struct pci_dev *pdev = adapter->pdev;29542954- unsigned long irq_flags;29552955- u16 phy_tmp;29562956-29572957-#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF2958293329592934 /*29602935 * Prevent stats update while adapter is being reset, or if the pci···29602943 return;29612944 if (pci_channel_offline(pdev))29622945 return;29632963-29642964- spin_lock_irqsave(&adapter->stats_lock, irq_flags);29652965-29662966- /*29672967- * these counters are modified from e1000_adjust_tbi_stats,29682968- * called from the interrupt context, so they must only29692969- * be written while holding adapter->stats_lock29702970- */2971294629722947 adapter->stats.crcerrs += er32(CRCERRS);29732948 adapter->stats.gprc += er32(GPRC);···3031302230323023 /* Tx Dropped needs to be maintained elsewhere */3033302430343034- /* Phy Stats */30353035- if (hw->phy.media_type == e1000_media_type_copper) {30363036- if ((adapter->link_speed == SPEED_1000) &&30373037- (!e1e_rphy(hw, PHY_1000T_STATUS, &phy_tmp))) {30383038- phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;30393039- adapter->phy_stats.idle_errors += phy_tmp;30403040- }30413041- }30423042-30433025 /* Management Stats */30443026 adapter->stats.mgptc += er32(MGTPTC);30453027 adapter->stats.mgprc += er32(MGTPRC);30463028 adapter->stats.mgpdc += er32(MGTPDC);30473047-30483048- spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);30493029}3050303030513031/**···30463048 struct e1000_hw *hw = &adapter->hw;30473049 struct e1000_phy_regs *phy = &adapter->phy_regs;30483050 int ret_val;30493049- unsigned long irq_flags;30503050-30513051-30523052- spin_lock_irqsave(&adapter->stats_lock, irq_flags);3053305130543052 if ((er32(STATUS) & E1000_STATUS_LU) &&30553053 (adapter->hw.phy.media_type == e1000_media_type_copper)) {···30763082 phy->stat1000 = 0;30773083 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);30783084 }30793079-30803080- spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);30813085}3082308630833087static void e1000_print_link_info(struct e1000_adapter *adapter)···4459446744604468 adapter->bd_number = cards_found++;4461446944704470+ e1000e_check_options(adapter);44714471+44624472 /* setup adapter struct */44634473 err = e1000_sw_init(adapter);44644474 if (err)···44754481 err = ei->get_variants(adapter);44764482 if (err)44774483 goto err_hw_init;44844484+44854485+ if ((adapter->flags & FLAG_IS_ICH) &&44864486+ (adapter->flags & FLAG_READ_ONLY_NVM))44874487+ e1000e_write_protect_nvm_ich8lan(&adapter->hw);4478448844794489 hw->mac.ops.get_bus_info(&adapter->hw);44804490···4570457245714573 INIT_WORK(&adapter->reset_task, e1000_reset_task);45724574 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);45734573-45744574- e1000e_check_options(adapter);45754575+ INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);45764576+ INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);4575457745764578 /* Initialize link parameters. User can change them with ethtool */45774579 adapter->hw.mac.autoneg = 1;
+30
drivers/net/e1000e/param.c
···133133 */134134E1000_PARAM(KumeranLockLoss, "Enable Kumeran lock loss workaround");135135136136+/*137137+ * Write Protect NVM138138+ *139139+ * Valid Range: 0, 1140140+ *141141+ * Default Value: 1 (enabled)142142+ */143143+E1000_PARAM(WriteProtectNVM, "Write-protect NVM [WARNING: disabling this can lead to corrupted NVM]");144144+136145struct e1000_option {137146 enum { enable_option, range_option, list_option } type;138147 const char *name;···395386 if (hw->mac.type == e1000_ich8lan)396387 e1000e_set_kmrn_lock_loss_workaround_ich8lan(hw,397388 opt.def);389389+ }390390+ }391391+ { /* Write-protect NVM */392392+ const struct e1000_option opt = {393393+ .type = enable_option,394394+ .name = "Write-protect NVM",395395+ .err = "defaulting to Enabled",396396+ .def = OPTION_ENABLED397397+ };398398+399399+ if (adapter->flags & FLAG_IS_ICH) {400400+ if (num_WriteProtectNVM > bd) {401401+ unsigned int write_protect_nvm = WriteProtectNVM[bd];402402+ e1000_validate_option(&write_protect_nvm, &opt,403403+ adapter);404404+ if (write_protect_nvm)405405+ adapter->flags |= FLAG_READ_ONLY_NVM;406406+ } else {407407+ if (opt.def)408408+ adapter->flags |= FLAG_READ_ONLY_NVM;409409+ }398410 }399411 }400412}
+9-2
drivers/net/wireless/ath9k/core.c
···294294 * hardware is gone (invalid).295295 */296296297297- if (!sc->sc_invalid)298298- ath9k_hw_set_interrupts(ah, 0);299297 ath_draintxq(sc, false);300298 if (!sc->sc_invalid) {301299 ath_stoprecv(sc);···795797 if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)796798 sc->sc_imask |= ATH9K_INT_CST;797799800800+ /* Note: We disable MIB interrupts for now as we don't yet801801+ * handle processing ANI, otherwise you will get an interrupt802802+ * storm after about 7 hours of usage making the system unusable803803+ * with huge latency. Once we do have ANI processing included804804+ * we can re-enable this interrupt. */805805+#if 0798806 /*799807 * Enable MIB interrupts when there are hardware phy counters.800808 * Note we only do this (at the moment) for station mode.···808804 if (ath9k_hw_phycounters(ah) &&809805 ((sc->sc_opmode == ATH9K_M_STA) || (sc->sc_opmode == ATH9K_M_IBSS)))810806 sc->sc_imask |= ATH9K_INT_MIB;807807+#endif811808 /*812809 * Some hardware processes the TIM IE and fires an813810 * interrupt when the TIM bit is set. For hardware···1341133613421337 DPRINTF(sc, ATH_DBG_CONFIG, "%s\n", __func__);1343133813391339+ tasklet_kill(&sc->intr_tq);13401340+ tasklet_kill(&sc->bcon_tasklet);13441341 ath_stop(sc);13451342 if (!sc->sc_invalid)13461343 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
-1
drivers/net/wireless/ath9k/core.h
···974974 u32 sc_keymax; /* size of key cache */975975 DECLARE_BITMAP(sc_keymap, ATH_KEYMAX); /* key use bit map */976976 u8 sc_splitmic; /* split TKIP MIC keys */977977- int sc_keytype;978977979978 /* RX */980979 struct list_head sc_rxbuf;
+8-4
drivers/net/wireless/ath9k/main.c
···206206 if (!ret)207207 return -EIO;208208209209- if (mac)210210- sc->sc_keytype = hk.kv_type;211209 return 0;212210}213211···776778 case DISABLE_KEY:777779 ath_key_delete(sc, key);778780 clear_bit(key->keyidx, sc->sc_keymap);779779- sc->sc_keytype = ATH9K_CIPHER_CLR;780781 break;781782 default:782783 ret = -EINVAL;···14111414{14121415 struct ieee80211_hw *hw = pci_get_drvdata(pdev);14131416 struct ath_softc *sc = hw->priv;14171417+ enum ath9k_int status;1414141814151415- if (pdev->irq)14191419+ if (pdev->irq) {14201420+ ath9k_hw_set_interrupts(sc->sc_ah, 0);14211421+ /* clear the ISR */14221422+ ath9k_hw_getisr(sc->sc_ah, &status);14231423+ sc->sc_invalid = 1;14161424 free_irq(pdev->irq, sc);14251425+ }14171426 ath_detach(sc);14271427+14181428 pci_iounmap(pdev, sc->mem);14191429 pci_release_region(pdev, 0);14201430 pci_disable_device(pdev);
+3-3
drivers/net/wireless/ath9k/xmit.c
···315315 txctl->keyix = tx_info->control.hw_key->hw_key_idx;316316 txctl->frmlen += tx_info->control.icv_len;317317318318- if (sc->sc_keytype == ATH9K_CIPHER_WEP)318318+ if (tx_info->control.hw_key->alg == ALG_WEP)319319 txctl->keytype = ATH9K_KEY_TYPE_WEP;320320- else if (sc->sc_keytype == ATH9K_CIPHER_TKIP)320320+ else if (tx_info->control.hw_key->alg == ALG_TKIP)321321 txctl->keytype = ATH9K_KEY_TYPE_TKIP;322322- else if (sc->sc_keytype == ATH9K_CIPHER_AES_CCM)322322+ else if (tx_info->control.hw_key->alg == ALG_CCMP)323323 txctl->keytype = ATH9K_KEY_TYPE_AES;324324 }325325
···161617171818#include <linux/kernel.h>1919+#include <linux/sched.h>1920#include <linux/pci.h>2021#include <linux/stat.h>2122#include <linux/topology.h>···485484#endif /* HAVE_PCI_LEGACY */486485487486#ifdef HAVE_PCI_MMAP487487+488488+static int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)489489+{490490+ unsigned long nr, start, size;491491+492492+ nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;493493+ start = vma->vm_pgoff;494494+ size = pci_resource_len(pdev, resno) >> PAGE_SHIFT;495495+ if (start < size && size - start >= nr)496496+ return 1;497497+ WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",498498+ current->comm, start, start+nr, pci_name(pdev), resno, size);499499+ return 0;500500+}501501+488502/**489503 * pci_mmap_resource - map a PCI resource into user memory space490504 * @kobj: kobject for mapping···525509 break;526510 if (i >= PCI_ROM_RESOURCE)527511 return -ENODEV;512512+513513+ if (!pci_mmap_fits(pdev, i, vma))514514+ return -EINVAL;528515529516 /* pci_mmap_page_range() expects the same kind of entry as coming530517 * from /proc/bus/pci/ which is a "user visible" value. If this is
+1-1
drivers/pci/pcie/aspm.c
···527527 */528528 pci_read_config_dword(child_dev, child_pos + PCI_EXP_DEVCAP,529529 ®32);530530- if (!(reg32 & PCI_EXP_DEVCAP_RBER && !aspm_force)) {530530+ if (!(reg32 & PCI_EXP_DEVCAP_RBER) && !aspm_force) {531531 printk("Pre-1.1 PCIe device detected, "532532 "disable ASPM for %s. It can be enabled forcedly"533533 " with 'pcie_aspm=force'\n", pci_name(pdev));
···852852void scsi_io_completion(struct scsi_cmnd *cmd, unsigned int good_bytes)853853{854854 int result = cmd->result;855855- int this_count = scsi_bufflen(cmd);855855+ int this_count;856856 struct request_queue *q = cmd->device->request_queue;857857 struct request *req = cmd->request;858858 int error = 0;···908908 */909909 if (scsi_end_request(cmd, error, good_bytes, result == 0) == NULL)910910 return;911911+ this_count = blk_rq_bytes(req);911912912913 /* good_bytes = 0, or (inclusive) there were leftovers and913914 * result = 0, so scsi_end_request couldn't retry.
+19-13
drivers/serial/atmel_serial.c
···131131struct atmel_uart_port {132132 struct uart_port uart; /* uart */133133 struct clk *clk; /* uart clock */134134- unsigned short suspended; /* is port suspended? */134134+ int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */135135+ u32 backup_imr; /* IMR saved during suspend */135136 int break_active; /* break being received */136137137138 short use_dma_rx; /* enable PDC receiver */···985984 * This is called on uart_open() or a resume event.986985 */987986 clk_enable(atmel_port->clk);987987+988988+ /* re-enable interrupts if we disabled some on suspend */989989+ UART_PUT_IER(port, atmel_port->backup_imr);988990 break;989991 case 3:992992+ /* Back up the interrupt mask and disable all interrupts */993993+ atmel_port->backup_imr = UART_GET_IMR(port);994994+ UART_PUT_IDR(port, -1);995995+990996 /*991997 * Disable the peripheral clock for this serial port.992998 * This is called on uart_close() or a suspend event.···14831475 cpu_relax();14841476 }1485147714861486- if (device_may_wakeup(&pdev->dev)14871487- && !atmel_serial_clk_will_stop())14881488- enable_irq_wake(port->irq);14891489- else {14901490- uart_suspend_port(&atmel_uart, port);14911491- atmel_port->suspended = 1;14921492- }14781478+ /* we can not wake up if we're running on slow clock */14791479+ atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);14801480+ if (atmel_serial_clk_will_stop())14811481+ device_set_wakeup_enable(&pdev->dev, 0);14821482+14831483+ uart_suspend_port(&atmel_uart, port);1493148414941485 return 0;14951486}···14981491 struct uart_port *port = platform_get_drvdata(pdev);14991492 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);1500149315011501- if (atmel_port->suspended) {15021502- uart_resume_port(&atmel_uart, port);15031503- atmel_port->suspended = 0;15041504- } else15051505- disable_irq_wake(port->irq);14941494+ uart_resume_port(&atmel_uart, port);14951495+ device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);1506149615071497 return 0;15081498}···15171513 BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE));1518151415191515 port = &atmel_ports[pdev->id];15161516+ port->backup_imr = 0;15171517+15201518 atmel_init_port(port, pdev);1521151915221520 if (!atmel_use_dma_rx(&port->uart)) {
+1-1
drivers/spi/orion_spi.c
···427427 goto msg_rejected;428428 }429429430430- if (t->speed_hz < orion_spi->min_speed) {430430+ if (t->speed_hz && t->speed_hz < orion_spi->min_speed) {431431 dev_err(&spi->dev,432432 "message rejected : "433433 "device min speed (%d Hz) exceeds "
···18761876 * with IRQF_SHARED. As usb_hcd_irq() will always disable18771877 * interrupts we can remove it here.18781878 */18791879- irqflags &= ~IRQF_DISABLED;18791879+ if (irqflags & IRQF_SHARED)18801880+ irqflags &= ~IRQF_DISABLED;1880188118811882 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",18821883 hcd->driver->description, hcd->self.busnum);
+17-22
drivers/usb/core/hub.c
···26832683 USB_PORT_STAT_C_ENABLE);26842684#endif2685268526862686- /* Try to use the debounce delay for protection against26872687- * port-enable changes caused, for example, by EMI.26882688- */26892689- if (portchange & (USB_PORT_STAT_C_CONNECTION |26902690- USB_PORT_STAT_C_ENABLE)) {26912691- status = hub_port_debounce(hub, port1);26922692- if (status < 0) {26932693- if (printk_ratelimit())26942694- dev_err (hub_dev, "connect-debounce failed, "26952695- "port %d disabled\n", port1);26962696- portstatus &= ~USB_PORT_STAT_CONNECTION;26972697- } else {26982698- portstatus = status;26992699- }27002700- }27012701-27022686 /* Try to resuscitate an existing device */27032687 udev = hdev->children[port1-1];27042688 if ((portstatus & USB_PORT_STAT_CONNECTION) && udev &&27052689 udev->state != USB_STATE_NOTATTACHED) {27062706-27072690 usb_lock_device(udev);27082691 if (portstatus & USB_PORT_STAT_ENABLE) {27092692 status = 0; /* Nothing to do */27102710- } else if (!udev->persist_enabled) {27112711- status = -ENODEV; /* Mustn't resuscitate */2712269327132694#ifdef CONFIG_USB_SUSPEND27142714- } else if (udev->state == USB_STATE_SUSPENDED) {26952695+ } else if (udev->state == USB_STATE_SUSPENDED &&26962696+ udev->persist_enabled) {27152697 /* For a suspended device, treat this as a27162698 * remote wakeup event.27172699 */···27082726#endif2709272727102728 } else {27112711- status = usb_reset_device(udev);27292729+ status = -ENODEV; /* Don't resuscitate */27122730 }27132731 usb_unlock_device(udev);27142732···27232741 usb_disconnect(&hdev->children[port1-1]);27242742 clear_bit(port1, hub->change_bits);2725274327442744+ if (portchange & (USB_PORT_STAT_C_CONNECTION |27452745+ USB_PORT_STAT_C_ENABLE)) {27462746+ status = hub_port_debounce(hub, port1);27472747+ if (status < 0) {27482748+ if (printk_ratelimit())27492749+ dev_err(hub_dev, "connect-debounce failed, "27502750+ "port %d disabled\n", port1);27512751+ portstatus &= ~USB_PORT_STAT_CONNECTION;27522752+ } else {27532753+ portstatus = status;27542754+ }27552755+ }27562756+27262757 /* Return now if debouncing failed or nothing is connected */27272758 if (!(portstatus & USB_PORT_STAT_CONNECTION)) {27282759···27432748 if ((wHubCharacteristics & HUB_CHAR_LPSM) < 227442749 && !(portstatus & (1 << USB_PORT_FEAT_POWER)))27452750 set_port_feature(hdev, port1, USB_PORT_FEAT_POWER);27462746-27512751+27472752 if (portstatus & USB_PORT_STAT_ENABLE)27482753 goto done;27492754 return;
+1-1
drivers/usb/gadget/fsl_usb2_udc.c
···223223 fsl_writel(tmp, &dr_regs->endpointlistaddr);224224225225 VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x",226226- (int)udc->ep_qh, (int)tmp,226226+ udc->ep_qh, (int)tmp,227227 fsl_readl(&dr_regs->endpointlistaddr));228228229229 /* Config PHY interface */
···733733 ((le16_to_cpu(dev->descriptor.idVendor) == ATEN_VENDOR_ID) &&734734 (le16_to_cpu(dev->descriptor.idProduct) == ATEN_PRODUCT_ID)) ||735735 ((le16_to_cpu(dev->descriptor.idVendor) == ALCOR_VENDOR_ID) &&736736- (le16_to_cpu(dev->descriptor.idProduct) == ALCOR_PRODUCT_ID))) {736736+ (le16_to_cpu(dev->descriptor.idProduct) == ALCOR_PRODUCT_ID)) ||737737+ ((le16_to_cpu(dev->descriptor.idVendor) == SIEMENS_VENDOR_ID) &&738738+ (le16_to_cpu(dev->descriptor.idProduct) == SIEMENS_PRODUCT_ID_EF81))) {737739 if (interface != dev->actconfig->interface[0]) {738740 /* check out the endpoints of the other interface*/739741 iface_desc = dev->actconfig->interface[0]->cur_altsetting;
-12
drivers/usb/storage/Kconfig
···146146 on the resulting scsi device node returns the Karma to normal147147 operation.148148149149-config USB_STORAGE_SIERRA150150- bool "Sierra Wireless TRU-Install Feature Support"151151- depends on USB_STORAGE152152- help153153- Say Y here to include additional code to support Sierra Wireless154154- products with the TRU-Install feature (e.g., AC597E, AC881U).155155-156156- This code switches the Sierra Wireless device from being in157157- Mass Storage mode to Modem mode. It also has the ability to158158- support host software upgrades should full Linux support be added159159- to TRU-Install.160160-161149config USB_STORAGE_CYPRESS_ATACB162150 bool "SAT emulation on Cypress USB/ATA Bridge with ATACB"163151 depends on USB_STORAGE
···160160 US_SC_DEVICE, US_PR_DEVICE, NULL,161161 US_FL_MAX_SECTORS_64 ),162162163163+/* Reported by Filip Joelsson <filip@blueturtle.nu> */164164+UNUSUAL_DEV( 0x0421, 0x005d, 0x0001, 0x0600,165165+ "Nokia",166166+ "Nokia 3110c",167167+ US_SC_DEVICE, US_PR_DEVICE, NULL,168168+ US_FL_FIX_CAPACITY ),169169+163170/* Reported by Mario Rettig <mariorettig@web.de> */164171UNUSUAL_DEV( 0x0421, 0x042e, 0x0100, 0x0100,165172 "Nokia",···238231 "5300",239232 US_SC_DEVICE, US_PR_DEVICE, NULL,240233 US_FL_FIX_CAPACITY ),234234+235235+/* Reported by Richard Nauber <RichardNauber@web.de> */236236+UNUSUAL_DEV( 0x0421, 0x04fa, 0x0601, 0x0601,237237+ "Nokia",238238+ "6300",239239+ US_SC_DEVICE, US_PR_DEVICE, NULL,240240+ US_FL_FIX_CAPACITY ),241241+242242+/* Patch for Nokia 5310 capacity */243243+UNUSUAL_DEV( 0x0421, 0x006a, 0x0000, 0x0591,244244+ "Nokia",245245+ "5310",246246+ US_SC_DEVICE, US_PR_DEVICE, NULL,247247+ US_FL_FIX_CAPACITY ),241248242249/* Reported by Olaf Hering <olh@suse.de> from novell bug #105878 */243250UNUSUAL_DEV( 0x0424, 0x0fdc, 0x0210, 0x0210,···1008987 US_SC_DEVICE, US_PR_DEVICE, NULL,1009988 US_FL_FIX_CAPACITY ),1010989990990+/* Reported by Adrian Pilchowiec <adi1981@epf.pl> */991991+UNUSUAL_DEV( 0x071b, 0x3203, 0x0000, 0x0000,992992+ "RockChip",993993+ "MP3",994994+ US_SC_DEVICE, US_PR_DEVICE, NULL,995995+ US_FL_NO_WP_DETECT | US_FL_MAX_SECTORS_64),996996+1011997/* Reported by Massimiliano Ghilardi <massimiliano.ghilardi@gmail.com>1012998 * This USB MP3/AVI player device fails and disconnects if more than 1281013999 * sectors (64kB) are read/written in a single command, and may be present···16041576 US_SC_DEVICE, US_PR_DEVICE, NULL,16051577 0),1606157816071607-#ifdef CONFIG_USB_STORAGE_SIERRA16081579/* Reported by Kevin Lloyd <linux@sierrawireless.com>16091580 * Entry is needed for the initializer function override,16101581 * which instructs the device to load as a modem···16141587 "USB MMC Storage",16151588 US_SC_DEVICE, US_PR_DEVICE, sierra_ms_init,16161589 0),16171617-#endif1618159016191591/* Reported by Jaco Kroon <jaco@kroon.co.za>16201592 * The usb-storage module found on the Digitech GNX4 (and supposedly other
-2
drivers/usb/storage/usb.c
···102102#ifdef CONFIG_USB_STORAGE_CYPRESS_ATACB103103#include "cypress_atacb.h"104104#endif105105-#ifdef CONFIG_USB_STORAGE_SIERRA106105#include "sierra_ms.h"107107-#endif108106109107/* Some informational data */110108MODULE_AUTHOR("Matthew Dharm <mdharm-usb@one-eyed-alien.net>");
+5-1
drivers/video/console/fbcon.c
···2400240024012401 if (!fbcon_is_inactive(vc, info)) {24022402 if (ops->blank_state != blank) {24032403+ int ret = 1;24042404+24032405 ops->blank_state = blank;24042406 fbcon_cursor(vc, blank ? CM_ERASE : CM_DRAW);24052407 ops->cursor_flash = (!blank);2406240824072407- if (fb_blank(info, blank))24092409+ if (info->fbops->fb_blank)24102410+ ret = info->fbops->fb_blank(blank, info);24112411+ if (ret)24082412 fbcon_generic_blank(vc, info, blank);24092413 }24102414
···173173 .identity = "PNX4008 Watchdog",174174};175175176176-static long pnx4008_wdt_ioctl(struct inode *inode, struct file *file,177177- unsigned int cmd, unsigned long arg)176176+static long pnx4008_wdt_ioctl(struct file *file, unsigned int cmd,177177+ unsigned long arg)178178{179179 int ret = -ENOTTY;180180 int time;
+3-3
drivers/watchdog/rc32434_wdt.c
···182182 return 0;183183}184184185185-static int rc32434_wdt_ioctl(struct inode *inode, struct file *file,186186- unsigned int cmd, unsigned long arg)185185+static long rc32434_wdt_ioctl(struct file *file, unsigned int cmd,186186+ unsigned long arg)187187{188188 void __user *argp = (void __user *)arg;189189 int new_timeout;···242242 .owner = THIS_MODULE,243243 .llseek = no_llseek,244244 .write = rc32434_wdt_write,245245- .ioctl = rc32434_wdt_ioctl,245245+ .unlocked_ioctl = rc32434_wdt_ioctl,246246 .open = rc32434_wdt_open,247247 .release = rc32434_wdt_release,248248};
+3-3
drivers/watchdog/rdc321x_wdt.c
···144144 return 0;145145}146146147147-static int rdc321x_wdt_ioctl(struct inode *inode, struct file *file,148148- unsigned int cmd, unsigned long arg)147147+static long rdc321x_wdt_ioctl(struct file *file, unsigned int cmd,148148+ unsigned long arg)149149{150150 void __user *argp = (void __user *)arg;151151 unsigned int value;···204204static const struct file_operations rdc321x_wdt_fops = {205205 .owner = THIS_MODULE,206206 .llseek = no_llseek,207207- .ioctl = rdc321x_wdt_ioctl,207207+ .unlocked_ioctl = rdc321x_wdt_ioctl,208208 .open = rdc321x_wdt_open,209209 .write = rdc321x_wdt_write,210210 .release = rdc321x_wdt_release,
+8-7
drivers/watchdog/wdt285.c
···115115 return 0;116116}117117118118-static ssize_t watchdog_write(struct file *file, const char *data,119119- size_t len, loff_t *ppos)118118+static ssize_t watchdog_write(struct file *file, const char __user *data,119119+ size_t len, loff_t *ppos)120120{121121 /*122122 * Refresh the timer.···133133};134134135135static long watchdog_ioctl(struct file *file, unsigned int cmd,136136- unsigned long arg)136136+ unsigned long arg)137137{138138 unsigned int new_margin;139139+ int __user *int_arg = (int __user *)arg;139140 int ret = -ENOTTY;140141141142 switch (cmd) {142143 case WDIOC_GETSUPPORT:143144 ret = 0;144144- if (copy_to_user((void *)arg, &ident, sizeof(ident)))145145+ if (copy_to_user((void __user *)arg, &ident, sizeof(ident)))145146 ret = -EFAULT;146147 break;147148148149 case WDIOC_GETSTATUS:149150 case WDIOC_GETBOOTSTATUS:150150- ret = put_user(0, (int *)arg);151151+ ret = put_user(0, int_arg);151152 break;152153153154 case WDIOC_KEEPALIVE:···157156 break;158157159158 case WDIOC_SETTIMEOUT:160160- ret = get_user(new_margin, (int *)arg);159159+ ret = get_user(new_margin, int_arg);161160 if (ret)162161 break;163162···172171 watchdog_ping();173172 /* Fall */174173 case WDIOC_GETTIMEOUT:175175- ret = put_user(soft_margin, (int *)arg);174174+ ret = put_user(soft_margin, int_arg);176175 break;177176 }178177 return ret;
···13951395 if (dentry->d_parent != parent)13961396 goto next;1397139713981398+ /* non-existing due to RCU? */13991399+ if (d_unhashed(dentry))14001400+ goto next;14011401+13981402 /*13991403 * It is safe to compare names since d_move() cannot14001404 * change the qstr (protected by d_lock).···14141410 goto next;14151411 }1416141214171417- if (!d_unhashed(dentry)) {14181418- atomic_inc(&dentry->d_count);14191419- found = dentry;14201420- }14131413+ atomic_inc(&dentry->d_count);14141414+ found = dentry;14211415 spin_unlock(&dentry->d_lock);14221416 break;14231417next:
···323323}324324325325/*326326- * remove_kevent - cleans up and ultimately frees the given kevent326326+ * remove_kevent - cleans up the given kevent327327 *328328 * Caller must hold dev->ev_mutex.329329 */···334334335335 dev->event_count--;336336 dev->queue_size -= sizeof(struct inotify_event) + kevent->event.len;337337+}337338339339+/*340340+ * free_kevent - frees the given kevent.341341+ */342342+static void free_kevent(struct inotify_kernel_event *kevent)343343+{338344 kfree(kevent->name);339345 kmem_cache_free(event_cachep, kevent);340346}···356350 struct inotify_kernel_event *kevent;357351 kevent = inotify_dev_get_event(dev);358352 remove_kevent(dev, kevent);353353+ free_kevent(kevent);359354 }360355}361356···440433 dev = file->private_data;441434442435 while (1) {443443- int events;444436445437 prepare_to_wait(&dev->wq, &wait, TASK_INTERRUPTIBLE);446438447439 mutex_lock(&dev->ev_mutex);448448- events = !list_empty(&dev->events);449449- mutex_unlock(&dev->ev_mutex);450450- if (events) {440440+ if (!list_empty(&dev->events)) {451441 ret = 0;452442 break;453443 }444444+ mutex_unlock(&dev->ev_mutex);454445455446 if (file->f_flags & O_NONBLOCK) {456447 ret = -EAGAIN;···467462 if (ret)468463 return ret;469464470470- mutex_lock(&dev->ev_mutex);471465 while (1) {472466 struct inotify_kernel_event *kevent;473467···485481 }486482 break;487483 }484484+ remove_kevent(dev, kevent);485485+486486+ /*487487+ * Must perform the copy_to_user outside the mutex in order488488+ * to avoid a lock order reversal with mmap_sem.489489+ */490490+ mutex_unlock(&dev->ev_mutex);488491489492 if (copy_to_user(buf, &kevent->event, event_size)) {490493 ret = -EFAULT;···509498 count -= kevent->event.len;510499 }511500512512- remove_kevent(dev, kevent);501501+ free_kevent(kevent);502502+503503+ mutex_lock(&dev->ev_mutex);513504 }514505 mutex_unlock(&dev->ev_mutex);515506
+1-1
fs/ramfs/file-nommu.c
···5858 * size 0 on the assumption that it's going to be used for an mmap of shared5959 * memory6060 */6161-static int ramfs_nommu_expand_for_mapping(struct inode *inode, size_t newsize)6161+int ramfs_nommu_expand_for_mapping(struct inode *inode, size_t newsize)6262{6363 struct pagevec lru_pvec;6464 unsigned long npages, xpages, loop, limit;
+1-1
fs/ubifs/debug.c
···538538 printk(KERN_DEBUG "\t%d orphan inode numbers:\n", n);539539 for (i = 0; i < n; i++)540540 printk(KERN_DEBUG "\t ino %llu\n",541541- le64_to_cpu(orph->inos[i]));541541+ (unsigned long long)le64_to_cpu(orph->inos[i]));542542 break;543543 }544544 default:
+1-1
fs/ubifs/dir.c
···426426427427 while (1) {428428 dbg_gen("feed '%s', ino %llu, new f_pos %#x",429429- dent->name, le64_to_cpu(dent->inum),429429+ dent->name, (unsigned long long)le64_to_cpu(dent->inum),430430 key_hash_flash(c, &dent->key));431431 ubifs_assert(dent->ch.sqnum > ubifs_inode(dir)->creat_sqnum);432432
-1
fs/ubifs/find.c
···507507 rsvd_idx_lebs = 0;508508 lebs = c->lst.empty_lebs + c->freeable_cnt + c->idx_gc_cnt -509509 c->lst.taken_empty_lebs;510510- ubifs_assert(lebs + c->lst.idx_lebs >= c->min_idx_lebs);511510 if (rsvd_idx_lebs < lebs)512511 /*513512 * OK to allocate an empty LEB, but we still don't want to go
+11-3
fs/ubifs/gc.c
···334334335335 err = move_nodes(c, sleb);336336 if (err)337337- goto out;337337+ goto out_inc_seq;338338339339 err = gc_sync_wbufs(c);340340 if (err)341341- goto out;341341+ goto out_inc_seq;342342343343 err = ubifs_change_one_lp(c, lnum, c->leb_size, 0, 0, 0, 0);344344 if (err)345345- goto out;345345+ goto out_inc_seq;346346347347 /* Allow for races with TNC */348348 c->gced_lnum = lnum;···369369out:370370 ubifs_scan_destroy(sleb);371371 return err;372372+373373+out_inc_seq:374374+ /* We may have moved at least some nodes so allow for races with TNC */375375+ c->gced_lnum = lnum;376376+ smp_wmb();377377+ c->gc_seq += 1;378378+ smp_wmb();379379+ goto out;372380}373381374382/**
···14761476 }1477147714781478 err = fallible_read_node(c, key, &zbr, node);14791479- if (maybe_leb_gced(c, zbr.lnum, gc_seq1)) {14791479+ if (err <= 0 || maybe_leb_gced(c, zbr.lnum, gc_seq1)) {14801480 /*14811481 * The node may have been GC'ed out from under us so try again14821482 * while keeping the TNC mutex locked.
+3-91
fs/xfs/xfs_inode.c
···41184118 ASSERT(nextents <= XFS_LINEAR_EXTS);41194119 size = nextents * sizeof(xfs_bmbt_rec_t);4120412041214121- xfs_iext_irec_compact_full(ifp);41214121+ xfs_iext_irec_compact_pages(ifp);41224122 ASSERT(ifp->if_real_bytes == XFS_IEXT_BUFSZ);4123412341244124 ep = ifp->if_u1.if_ext_irec->er_extbuf;···44494449 * compaction policy is as follows:44504450 *44514451 * Full Compaction: Extents fit into a single page (or inline buffer)44524452- * Full Compaction: Extents occupy less than 10% of allocated space44534453- * Partial Compaction: Extents occupy > 10% and < 50% of allocated space44524452+ * Partial Compaction: Extents occupy less than 50% of allocated space44544453 * No Compaction: Extents occupy at least 50% of allocated space44554454 */44564455void···44704471 xfs_iext_direct_to_inline(ifp, nextents);44714472 } else if (nextents <= XFS_LINEAR_EXTS) {44724473 xfs_iext_indirect_to_direct(ifp);44734473- } else if (nextents < (nlists * XFS_LINEAR_EXTS) >> 3) {44744474- xfs_iext_irec_compact_full(ifp);44754474 } else if (nextents < (nlists * XFS_LINEAR_EXTS) >> 1) {44764475 xfs_iext_irec_compact_pages(ifp);44774476 }···44934496 erp_next = erp + 1;44944497 if (erp_next->er_extcount <=44954498 (XFS_LINEAR_EXTS - erp->er_extcount)) {44964496- memmove(&erp->er_extbuf[erp->er_extcount],44994499+ memcpy(&erp->er_extbuf[erp->er_extcount],44974500 erp_next->er_extbuf, erp_next->er_extcount *44984501 sizeof(xfs_bmbt_rec_t));44994502 erp->er_extcount += erp_next->er_extcount;···45094512 } else {45104513 erp_idx++;45114514 }45124512- }45134513-}45144514-45154515-/*45164516- * Fully compact the extent records managed by the indirection array.45174517- */45184518-void45194519-xfs_iext_irec_compact_full(45204520- xfs_ifork_t *ifp) /* inode fork pointer */45214521-{45224522- xfs_bmbt_rec_host_t *ep, *ep_next; /* extent record pointers */45234523- xfs_ext_irec_t *erp, *erp_next; /* extent irec pointers */45244524- int erp_idx = 0; /* extent irec index */45254525- int ext_avail; /* empty entries in ex list */45264526- int ext_diff; /* number of exts to add */45274527- int nlists; /* number of irec's (ex lists) */45284528-45294529- ASSERT(ifp->if_flags & XFS_IFEXTIREC);45304530-45314531- nlists = ifp->if_real_bytes / XFS_IEXT_BUFSZ;45324532- erp = ifp->if_u1.if_ext_irec;45334533- ep = &erp->er_extbuf[erp->er_extcount];45344534- erp_next = erp + 1;45354535- ep_next = erp_next->er_extbuf;45364536-45374537- while (erp_idx < nlists - 1) {45384538- /*45394539- * Check how many extent records are available in this irec.45404540- * If there is none skip the whole exercise.45414541- */45424542- ext_avail = XFS_LINEAR_EXTS - erp->er_extcount;45434543- if (ext_avail) {45444544-45454545- /*45464546- * Copy over as many as possible extent records into45474547- * the previous page.45484548- */45494549- ext_diff = MIN(ext_avail, erp_next->er_extcount);45504550- memcpy(ep, ep_next, ext_diff * sizeof(xfs_bmbt_rec_t));45514551- erp->er_extcount += ext_diff;45524552- erp_next->er_extcount -= ext_diff;45534553-45544554- /*45554555- * If the next irec is empty now we can simply45564556- * remove it.45574557- */45584558- if (erp_next->er_extcount == 0) {45594559- /*45604560- * Free page before removing extent record45614561- * so er_extoffs don't get modified in45624562- * xfs_iext_irec_remove.45634563- */45644564- kmem_free(erp_next->er_extbuf);45654565- erp_next->er_extbuf = NULL;45664566- xfs_iext_irec_remove(ifp, erp_idx + 1);45674567- erp = &ifp->if_u1.if_ext_irec[erp_idx];45684568- nlists = ifp->if_real_bytes / XFS_IEXT_BUFSZ;45694569-45704570- /*45714571- * If the next irec is not empty move up the content45724572- * that has not been copied to the previous page to45734573- * the beggining of this one.45744574- */45754575- } else {45764576- memmove(erp_next->er_extbuf, &ep_next[ext_diff],45774577- erp_next->er_extcount *45784578- sizeof(xfs_bmbt_rec_t));45794579- ep_next = erp_next->er_extbuf;45804580- memset(&ep_next[erp_next->er_extcount], 0,45814581- (XFS_LINEAR_EXTS -45824582- erp_next->er_extcount) *45834583- sizeof(xfs_bmbt_rec_t));45844584- }45854585- }45864586-45874587- if (erp->er_extcount == XFS_LINEAR_EXTS) {45884588- erp_idx++;45894589- if (erp_idx < nlists)45904590- erp = &ifp->if_u1.if_ext_irec[erp_idx];45914591- else45924592- break;45934593- }45944594- ep = &erp->er_extbuf[erp->er_extcount];45954595- erp_next = erp + 1;45964596- ep_next = erp_next->er_extbuf;45974515 }45984516}45994517
+46
include/asm-mips/cevt-r4k.h
···11+/*22+ * This file is subject to the terms and conditions of the GNU General Public33+ * License. See the file "COPYING" in the main directory of this archive44+ * for more details.55+ *66+ * Copyright (C) 2008 Kevin D. Kissell77+ */88+99+/*1010+ * Definitions used for common event timer implementation1111+ * for MIPS 4K-type processors and their MIPS MT variants.1212+ * Avoids unsightly extern declarations in C files.1313+ */1414+#ifndef __ASM_CEVT_R4K_H1515+#define __ASM_CEVT_R4K_H1616+1717+DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device);1818+1919+void mips_event_handler(struct clock_event_device *dev);2020+int c0_compare_int_usable(void);2121+void mips_set_clock_mode(enum clock_event_mode, struct clock_event_device *);2222+irqreturn_t c0_compare_interrupt(int, void *);2323+2424+extern struct irqaction c0_compare_irqaction;2525+extern int cp0_timer_irq_installed;2626+2727+/*2828+ * Possibly handle a performance counter interrupt.2929+ * Return true if the timer interrupt should not be checked3030+ */3131+3232+static inline int handle_perf_irq(int r2)3333+{3434+ /*3535+ * The performance counter overflow interrupt may be shared with the3636+ * timer interrupt (cp0_perfcount_irq < 0). If it is and a3737+ * performance counter has overflowed (perf_irq() == IRQ_HANDLED)3838+ * and we can't reliably determine if a counter interrupt has also3939+ * happened (!r2) then don't check for a timer interrupt.4040+ */4141+ return (cp0_perfcount_irq < 0) &&4242+ perf_irq() == IRQ_HANDLED &&4343+ !r2;4444+}4545+4646+#endif /* __ASM_CEVT_R4K_H */
+23-3
include/asm-mips/irqflags.h
···3838 " .set pop \n"3939 " .endm");40404141+extern void smtc_ipi_replay(void);4242+4143static inline void raw_local_irq_enable(void)4244{4545+#ifdef CONFIG_MIPS_MT_SMTC4646+ /*4747+ * SMTC kernel needs to do a software replay of queued4848+ * IPIs, at the cost of call overhead on each local_irq_enable()4949+ */5050+ smtc_ipi_replay();5151+#endif4352 __asm__ __volatile__(4453 "raw_local_irq_enable"4554 : /* no outputs */4655 : /* no inputs */4756 : "memory");4857}5858+49595060/*5161 * For cli() we have to insert nops to make sure that the new value···195185 " .set pop \n"196186 " .endm \n");197187198198-extern void smtc_ipi_replay(void);199188200189static inline void raw_local_irq_restore(unsigned long flags)201190{202191 unsigned long __tmp1;203192204204-#ifdef CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY193193+#ifdef CONFIG_MIPS_MT_SMTC205194 /*206206- * CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY does prompt replay of deferred195195+ * SMTC kernel needs to do a software replay of queued207196 * IPIs, at the cost of branch and call overhead on each208197 * local_irq_restore()209198 */210199 if (unlikely(!(flags & 0x0400)))211200 smtc_ipi_replay();212201#endif202202+203203+ __asm__ __volatile__(204204+ "raw_local_irq_restore\t%0"205205+ : "=r" (__tmp1)206206+ : "0" (flags)207207+ : "memory");208208+}209209+210210+static inline void __raw_local_irq_restore(unsigned long flags)211211+{212212+ unsigned long __tmp1;213213214214 __asm__ __volatile__(215215 "raw_local_irq_restore\t%0"
···66 */7788#include <asm/mips_mt.h>99+#include <asm/smtc_ipi.h>9101011/*1112 * System-wide SMTC status information···3938struct task_struct;40394140void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu);4242-4141+void self_ipi(struct smtc_ipi *);4342void smtc_flush_tlb_asid(unsigned long asid);4444-extern int mipsmt_build_cpu_map(int startslot);4545-extern void mipsmt_prepare_cpus(void);4343+extern int smtc_build_cpu_map(int startslot);4444+extern void smtc_prepare_cpus(int cpus);4645extern void smtc_smp_finish(void);4746extern void smtc_boot_secondary(int cpu, struct task_struct *t);4847extern void smtc_cpus_done(void);4848+49495050/*5151 * Sharing the TLB between multiple VPEs means that the
+61-11
include/asm-mips/stackframe.h
···297297#ifdef CONFIG_MIPS_MT_SMTC298298 .set mips32r2299299 /*300300- * This may not really be necessary if ints are already301301- * inhibited here.300300+ * We need to make sure the read-modify-write301301+ * of Status below isn't perturbed by an interrupt302302+ * or cross-TC access, so we need to do at least a DMT,303303+ * protected by an interrupt-inhibit. But setting IXMT304304+ * also creates a few-cycle window where an IPI could305305+ * be queued and not be detected before potentially306306+ * returning to a WAIT or user-mode loop. It must be307307+ * replayed.308308+ *309309+ * We're in the middle of a context switch, and310310+ * we can't dispatch it directly without trashing311311+ * some registers, so we'll try to detect this unlikely312312+ * case and program a software interrupt in the VPE,313313+ * as would be done for a cross-VPE IPI. To accomodate314314+ * the handling of that case, we're doing a DVPE instead315315+ * of just a DMT here to protect against other threads.316316+ * This is a lot of cruft to cover a tiny window.317317+ * If you can find a better design, implement it!318318+ *302319 */303320 mfc0 v0, CP0_TCSTATUS304321 ori v0, TCSTATUS_IXMT305322 mtc0 v0, CP0_TCSTATUS306323 _ehb307307- DMT 5 # dmt a1324324+ DVPE 5 # dvpe a1308325 jal mips_ihb309326#endif /* CONFIG_MIPS_MT_SMTC */310327 mfc0 a0, CP0_STATUS···342325 */343326 LONG_L v1, PT_TCSTATUS(sp)344327 _ehb345345- mfc0 v0, CP0_TCSTATUS328328+ mfc0 a0, CP0_TCSTATUS346329 andi v1, TCSTATUS_IXMT347347- /* We know that TCStatua.IXMT should be set from above */348348- xori v0, v0, TCSTATUS_IXMT349349- or v0, v0, v1350350- mtc0 v0, CP0_TCSTATUS351351- _ehb352352- andi a1, a1, VPECONTROL_TE330330+ bnez v1, 0f331331+332332+/*333333+ * We'd like to detect any IPIs queued in the tiny window334334+ * above and request an software interrupt to service them335335+ * when we ERET.336336+ *337337+ * Computing the offset into the IPIQ array of the executing338338+ * TC's IPI queue in-line would be tedious. We use part of339339+ * the TCContext register to hold 16 bits of offset that we340340+ * can add in-line to find the queue head.341341+ */342342+ mfc0 v0, CP0_TCCONTEXT343343+ la a2, IPIQ344344+ srl v0, v0, 16345345+ addu a2, a2, v0346346+ LONG_L v0, 0(a2)347347+ beqz v0, 0f348348+/*349349+ * If we have a queue, provoke dispatch within the VPE by setting C_SW1350350+ */351351+ mfc0 v0, CP0_CAUSE352352+ ori v0, v0, C_SW1353353+ mtc0 v0, CP0_CAUSE354354+0:355355+ /*356356+ * This test should really never branch but357357+ * let's be prudent here. Having atomized358358+ * the shared register modifications, we can359359+ * now EVPE, and must do so before interrupts360360+ * are potentially re-enabled.361361+ */362362+ andi a1, a1, MVPCONTROL_EVP353363 beqz a1, 1f354354- emt364364+ evpe3553651:366366+ /* We know that TCStatua.IXMT should be set from above */367367+ xori a0, a0, TCSTATUS_IXMT368368+ or a0, a0, v1369369+ mtc0 a0, CP0_TCSTATUS370370+ _ehb371371+356372 .set mips0357373#endif /* CONFIG_MIPS_MT_SMTC */358374 LONG_L v1, PT_EPC(sp)
···4747 * HRTIMER_CB_IRQSAFE: Callback may run in hardirq context4848 * HRTIMER_CB_IRQSAFE_NO_RESTART: Callback may run in hardirq context and4949 * does not restart the timer5050- * HRTIMER_CB_IRQSAFE_NO_SOFTIRQ: Callback must run in hardirq context5151- * Special mode for tick emultation5050+ * HRTIMER_CB_IRQSAFE_PERCPU: Callback must run in hardirq context5151+ * Special mode for tick emulation and5252+ * scheduler timer. Such timers are per5353+ * cpu and not allowed to be migrated on5454+ * cpu unplug.5555+ * HRTIMER_CB_IRQSAFE_UNLOCKED: Callback should run in hardirq context5656+ * with timer->base lock unlocked5757+ * used for timers which call wakeup to5858+ * avoid lock order problems with rq->lock5259 */5360enum hrtimer_cb_mode {5461 HRTIMER_CB_SOFTIRQ,5562 HRTIMER_CB_IRQSAFE,5663 HRTIMER_CB_IRQSAFE_NO_RESTART,5757- HRTIMER_CB_IRQSAFE_NO_SOFTIRQ,6464+ HRTIMER_CB_IRQSAFE_PERCPU,6565+ HRTIMER_CB_IRQSAFE_UNLOCKED,5866};59676068/*···7567 * 0x02 callback function running7668 * 0x04 callback pending (high resolution mode)7769 *7878- * Special case:7070+ * Special cases:7971 * 0x03 callback function running and enqueued8072 * (was requeued on another CPU)7373+ * 0x09 timer was migrated on CPU hotunplug8174 * The "callback function running and enqueued" status is only possible on8275 * SMP. It happens for example when a posix timer expired and the callback8376 * queued a signal. Between dropping the lock which protects the posix timer···9687#define HRTIMER_STATE_ENQUEUED 0x019788#define HRTIMER_STATE_CALLBACK 0x029889#define HRTIMER_STATE_PENDING 0x049090+#define HRTIMER_STATE_MIGRATE 0x08999110092/**10193 * struct hrtimer - the basic hrtimer structure
+4-4
include/linux/pci.h
···534534#ifdef CONFIG_PCI_LEGACY535535struct pci_dev __deprecated *pci_find_device(unsigned int vendor,536536 unsigned int device,537537- const struct pci_dev *from);537537+ struct pci_dev *from);538538struct pci_dev __deprecated *pci_find_slot(unsigned int bus,539539 unsigned int devfn);540540#endif /* CONFIG_PCI_LEGACY */···550550 struct pci_dev *from);551551struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,552552 unsigned int ss_vendor, unsigned int ss_device,553553- const struct pci_dev *from);553553+ struct pci_dev *from);554554struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);555555struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);556556struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);···816816817817static inline struct pci_dev *pci_find_device(unsigned int vendor,818818 unsigned int device,819819- const struct pci_dev *from)819819+ struct pci_dev *from)820820{821821 return NULL;822822}···838838 unsigned int device,839839 unsigned int ss_vendor,840840 unsigned int ss_device,841841- const struct pci_dev *from)841841+ struct pci_dev *from)842842{843843 return NULL;844844}
+1
include/linux/ramfs.h
···66 int flags, const char *dev_name, void *data, struct vfsmount *mnt);7788#ifndef CONFIG_MMU99+extern int ramfs_nommu_expand_for_mapping(struct inode *inode, size_t newsize);910extern unsigned long ramfs_nommu_get_unmapped_area(struct file *file,1011 unsigned long addr,1112 unsigned long len,
···708708 int result;709709710710 if (initcall_debug) {711711- print_fn_descriptor_symbol("calling %s\n", fn);711711+ printk("calling %pF\n", fn);712712 t0 = ktime_get();713713 }714714···718718 t1 = ktime_get();719719 delta = ktime_sub(t1, t0);720720721721- print_fn_descriptor_symbol("initcall %s", fn);722722- printk(" returned %d after %Ld msecs\n", result,721721+ printk("initcall %pF returned %d after %Ld msecs\n",722722+ fn, result,723723 (unsigned long long) delta.tv64 >> 20);724724 }725725···737737 local_irq_enable();738738 }739739 if (msgbuf[0]) {740740- print_fn_descriptor_symbol(KERN_WARNING "initcall %s", fn);741741- printk(" returned with %s\n", msgbuf);740740+ printk("initcall %pF returned with %s\n", fn, msgbuf);742741 }743742744743 return result;
+3-2
kernel/cgroup.c
···27382738 */27392739void cgroup_mm_owner_callbacks(struct task_struct *old, struct task_struct *new)27402740{27412741- struct cgroup *oldcgrp, *newcgrp;27412741+ struct cgroup *oldcgrp, *newcgrp = NULL;2742274227432743 if (need_mm_owner_callback) {27442744 int i;27452745 for (i = 0; i < CGROUP_SUBSYS_COUNT; i++) {27462746 struct cgroup_subsys *ss = subsys[i];27472747 oldcgrp = task_cgroup(old, ss->subsys_id);27482748- newcgrp = task_cgroup(new, ss->subsys_id);27482748+ if (new)27492749+ newcgrp = task_cgroup(new, ss->subsys_id);27492750 if (oldcgrp == newcgrp)27502751 continue;27512752 if (ss->mm_owner_changed)
+10-2
kernel/exit.c
···583583 * If there are other users of the mm and the owner (us) is exiting584584 * we need to find a new owner to take on the responsibility.585585 */586586- if (!mm)587587- return 0;588586 if (atomic_read(&mm->mm_users) <= 1)589587 return 0;590588 if (mm->owner != p)···625627 } while_each_thread(g, c);626628627629 read_unlock(&tasklist_lock);630630+ /*631631+ * We found no owner yet mm_users > 1: this implies that we are632632+ * most likely racing with swapoff (try_to_unuse()) or /proc or633633+ * ptrace or page migration (get_task_mm()). Mark owner as NULL,634634+ * so that subsystems can understand the callback and take action.635635+ */636636+ down_write(&mm->mmap_sem);637637+ cgroup_mm_owner_callbacks(mm->owner, NULL);638638+ mm->owner = NULL;639639+ up_write(&mm->mmap_sem);628640 return;629641630642assign_new_owner:
+85-10
kernel/hrtimer.c
···672672 */673673 BUG_ON(timer->function(timer) != HRTIMER_NORESTART);674674 return 1;675675- case HRTIMER_CB_IRQSAFE_NO_SOFTIRQ:675675+ case HRTIMER_CB_IRQSAFE_PERCPU:676676+ case HRTIMER_CB_IRQSAFE_UNLOCKED:676677 /*677678 * This is solely for the sched tick emulation with678679 * dynamic tick support to ensure that we do not679680 * restart the tick right on the edge and end up with680681 * the tick timer in the softirq ! The calling site681681- * takes care of this.682682+ * takes care of this. Also used for hrtimer sleeper !682683 */683684 debug_hrtimer_deactivate(timer);684685 return 1;···12461245 timer_stats_account_hrtimer(timer);1247124612481247 fn = timer->function;12491249- if (timer->cb_mode == HRTIMER_CB_IRQSAFE_NO_SOFTIRQ) {12481248+ if (timer->cb_mode == HRTIMER_CB_IRQSAFE_PERCPU ||12491249+ timer->cb_mode == HRTIMER_CB_IRQSAFE_UNLOCKED) {12501250 /*12511251 * Used for scheduler timers, avoid lock inversion with12521252 * rq->lock and tasklist_lock.···14541452 sl->timer.function = hrtimer_wakeup;14551453 sl->task = task;14561454#ifdef CONFIG_HIGH_RES_TIMERS14571457- sl->timer.cb_mode = HRTIMER_CB_IRQSAFE_NO_SOFTIRQ;14551455+ sl->timer.cb_mode = HRTIMER_CB_IRQSAFE_UNLOCKED;14581456#endif14591457}14601458···1593159115941592#ifdef CONFIG_HOTPLUG_CPU1595159315961596-static void migrate_hrtimer_list(struct hrtimer_clock_base *old_base,15971597- struct hrtimer_clock_base *new_base)15941594+static int migrate_hrtimer_list(struct hrtimer_clock_base *old_base,15951595+ struct hrtimer_clock_base *new_base, int dcpu)15981596{15991597 struct hrtimer *timer;16001598 struct rb_node *node;15991599+ int raise = 0;1601160016021601 while ((node = rb_first(&old_base->active))) {16031602 timer = rb_entry(node, struct hrtimer, node);16041603 BUG_ON(hrtimer_callback_running(timer));16051604 debug_hrtimer_deactivate(timer);16061606- __remove_hrtimer(timer, old_base, HRTIMER_STATE_INACTIVE, 0);16051605+16061606+ /*16071607+ * Should not happen. Per CPU timers should be16081608+ * canceled _before_ the migration code is called16091609+ */16101610+ if (timer->cb_mode == HRTIMER_CB_IRQSAFE_PERCPU) {16111611+ __remove_hrtimer(timer, old_base,16121612+ HRTIMER_STATE_INACTIVE, 0);16131613+ WARN(1, "hrtimer (%p %p)active but cpu %d dead\n",16141614+ timer, timer->function, dcpu);16151615+ continue;16161616+ }16171617+16181618+ /*16191619+ * Mark it as STATE_MIGRATE not INACTIVE otherwise the16201620+ * timer could be seen as !active and just vanish away16211621+ * under us on another CPU16221622+ */16231623+ __remove_hrtimer(timer, old_base, HRTIMER_STATE_MIGRATE, 0);16071624 timer->base = new_base;16081625 /*16091626 * Enqueue the timer. Allow reprogramming of the event device16101627 */16111628 enqueue_hrtimer(timer, new_base, 1);16291629+16301630+#ifdef CONFIG_HIGH_RES_TIMERS16311631+ /*16321632+ * Happens with high res enabled when the timer was16331633+ * already expired and the callback mode is16341634+ * HRTIMER_CB_IRQSAFE_UNLOCKED (hrtimer_sleeper). The16351635+ * enqueue code does not move them to the soft irq16361636+ * pending list for performance/latency reasons, but16371637+ * in the migration state, we need to do that16381638+ * otherwise we end up with a stale timer.16391639+ */16401640+ if (timer->state == HRTIMER_STATE_MIGRATE) {16411641+ timer->state = HRTIMER_STATE_PENDING;16421642+ list_add_tail(&timer->cb_entry,16431643+ &new_base->cpu_base->cb_pending);16441644+ raise = 1;16451645+ }16461646+#endif16471647+ /* Clear the migration state bit */16481648+ timer->state &= ~HRTIMER_STATE_MIGRATE;16121649 }16501650+ return raise;16131651}16521652+16531653+#ifdef CONFIG_HIGH_RES_TIMERS16541654+static int migrate_hrtimer_pending(struct hrtimer_cpu_base *old_base,16551655+ struct hrtimer_cpu_base *new_base)16561656+{16571657+ struct hrtimer *timer;16581658+ int raise = 0;16591659+16601660+ while (!list_empty(&old_base->cb_pending)) {16611661+ timer = list_entry(old_base->cb_pending.next,16621662+ struct hrtimer, cb_entry);16631663+16641664+ __remove_hrtimer(timer, timer->base, HRTIMER_STATE_PENDING, 0);16651665+ timer->base = &new_base->clock_base[timer->base->index];16661666+ list_add_tail(&timer->cb_entry, &new_base->cb_pending);16671667+ raise = 1;16681668+ }16691669+ return raise;16701670+}16711671+#else16721672+static int migrate_hrtimer_pending(struct hrtimer_cpu_base *old_base,16731673+ struct hrtimer_cpu_base *new_base)16741674+{16751675+ return 0;16761676+}16771677+#endif1614167816151679static void migrate_hrtimers(int cpu)16161680{16171681 struct hrtimer_cpu_base *old_base, *new_base;16181618- int i;16821682+ int i, raise = 0;1619168316201684 BUG_ON(cpu_online(cpu));16211685 old_base = &per_cpu(hrtimer_bases, cpu);···16941626 spin_lock_nested(&old_base->lock, SINGLE_DEPTH_NESTING);1695162716961628 for (i = 0; i < HRTIMER_MAX_CLOCK_BASES; i++) {16971697- migrate_hrtimer_list(&old_base->clock_base[i],16981698- &new_base->clock_base[i]);16291629+ if (migrate_hrtimer_list(&old_base->clock_base[i],16301630+ &new_base->clock_base[i], cpu))16311631+ raise = 1;16991632 }16331633+16341634+ if (migrate_hrtimer_pending(old_base, new_base))16351635+ raise = 1;1700163617011637 spin_unlock(&old_base->lock);17021638 spin_unlock(&new_base->lock);17031639 local_irq_enable();17041640 put_cpu_var(hrtimer_bases);16411641+16421642+ if (raise)16431643+ hrtimer_raise_softirq();17051644}17061645#endif /* CONFIG_HOTPLUG_CPU */17071646
+7-1
kernel/kexec.c
···753753 *old = addr | (*old & ~PAGE_MASK);754754755755 /* The old page I have found cannot be a756756- * destination page, so return it.756756+ * destination page, so return it if it's757757+ * gfp_flags honor the ones passed in.757758 */759759+ if (!(gfp_mask & __GFP_HIGHMEM) &&760760+ PageHighMem(old_page)) {761761+ kimage_free_pages(old_page);762762+ continue;763763+ }758764 addr = old_addr;759765 page = old_page;760766 break;
+5-5
kernel/kgdb.c
···488488 if (err)489489 return err;490490 if (CACHE_FLUSH_IS_SAFE)491491- flush_icache_range(addr, addr + length + 1);491491+ flush_icache_range(addr, addr + length);492492 return 0;493493 }494494···14621462 * Get the passive CPU lock which will hold all the non-primary14631463 * CPU in a spin state while the debugger is active14641464 */14651465- if (!kgdb_single_step || !kgdb_contthread) {14651465+ if (!kgdb_single_step) {14661466 for (i = 0; i < NR_CPUS; i++)14671467 atomic_set(&passive_cpu_wait[i], 1);14681468 }···1475147514761476#ifdef CONFIG_SMP14771477 /* Signal the other CPUs to enter kgdb_wait() */14781478- if ((!kgdb_single_step || !kgdb_contthread) && kgdb_do_roundup)14781478+ if ((!kgdb_single_step) && kgdb_do_roundup)14791479 kgdb_roundup_cpus(flags);14801480#endif14811481···14941494 kgdb_post_primary_code(ks->linux_regs, ks->ex_vector, ks->err_code);14951495 kgdb_deactivate_sw_breakpoints();14961496 kgdb_single_step = 0;14971497- kgdb_contthread = NULL;14971497+ kgdb_contthread = current;14981498 exception_level = 0;1499149915001500 /* Talk to debugger with gdbserial protocol */···15081508 kgdb_info[ks->cpu].task = NULL;15091509 atomic_set(&cpu_in_kgdb[ks->cpu], 0);1510151015111511- if (!kgdb_single_step || !kgdb_contthread) {15111511+ if (!kgdb_single_step) {15121512 for (i = NR_CPUS-1; i >= 0; i--)15131513 atomic_set(&passive_cpu_wait[i], 0);15141514 /*
···235235 case CLOCK_EVT_NOTIFY_BROADCAST_FORCE:236236 if (!cpu_isset(cpu, tick_broadcast_mask)) {237237 cpu_set(cpu, tick_broadcast_mask);238238- if (td->mode == TICKDEV_MODE_PERIODIC)238238+ if (tick_broadcast_device.mode ==239239+ TICKDEV_MODE_PERIODIC)239240 clockevents_shutdown(dev);240241 }241242 if (*reason == CLOCK_EVT_NOTIFY_BROADCAST_FORCE)···246245 if (!tick_broadcast_force &&247246 cpu_isset(cpu, tick_broadcast_mask)) {248247 cpu_clear(cpu, tick_broadcast_mask);249249- if (td->mode == TICKDEV_MODE_PERIODIC)248248+ if (tick_broadcast_device.mode ==249249+ TICKDEV_MODE_PERIODIC)250250 tick_setup_periodic(dev, 0);251251 }252252 break;···575573 cpu_clear(cpu, tick_broadcast_oneshot_mask);576574577575 spin_unlock_irqrestore(&tick_broadcast_lock, flags);576576+}577577+578578+/*579579+ * Check, whether the broadcast device is in one shot mode580580+ */581581+int tick_broadcast_oneshot_active(void)582582+{583583+ return tick_broadcast_device.mode == TICKDEV_MODE_ONESHOT;578584}579585580586#endif
+6-4
kernel/time/tick-common.c
···3333 */3434ktime_t tick_next_period;3535ktime_t tick_period;3636-int tick_do_timer_cpu __read_mostly = -1;3636+int tick_do_timer_cpu __read_mostly = TICK_DO_TIMER_BOOT;3737DEFINE_SPINLOCK(tick_device_lock);38383939/*···109109 if (!tick_device_is_functional(dev))110110 return;111111112112- if (dev->features & CLOCK_EVT_FEAT_PERIODIC) {112112+ if ((dev->features & CLOCK_EVT_FEAT_PERIODIC) &&113113+ !tick_broadcast_oneshot_active()) {113114 clockevents_set_mode(dev, CLOCK_EVT_MODE_PERIODIC);114115 } else {115116 unsigned long seq;···149148 * If no cpu took the do_timer update, assign it to150149 * this cpu:151150 */152152- if (tick_do_timer_cpu == -1) {151151+ if (tick_do_timer_cpu == TICK_DO_TIMER_BOOT) {153152 tick_do_timer_cpu = cpu;154153 tick_next_period = ktime_get();155154 tick_period = ktime_set(0, NSEC_PER_SEC / HZ);···301300 if (*cpup == tick_do_timer_cpu) {302301 int cpu = first_cpu(cpu_online_map);303302304304- tick_do_timer_cpu = (cpu != NR_CPUS) ? cpu : -1;303303+ tick_do_timer_cpu = (cpu != NR_CPUS) ? cpu :304304+ TICK_DO_TIMER_NONE;305305 }306306 spin_unlock_irqrestore(&tick_device_lock, flags);307307}
+7
kernel/time/tick-internal.h
···11/*22 * tick internal variable and functions used by low/high res code33 */44+55+#define TICK_DO_TIMER_NONE -166+#define TICK_DO_TIMER_BOOT -277+48DECLARE_PER_CPU(struct tick_device, tick_cpu_device);59extern spinlock_t tick_device_lock;610extern ktime_t tick_next_period;···3531extern void tick_broadcast_switch_to_oneshot(void);3632extern void tick_shutdown_broadcast_oneshot(unsigned int *cpup);3733extern int tick_resume_broadcast_oneshot(struct clock_event_device *bc);3434+extern int tick_broadcast_oneshot_active(void);3835# else /* BROADCAST */3936static inline void tick_broadcast_setup_oneshot(struct clock_event_device *bc)4037{···4439static inline void tick_broadcast_oneshot_control(unsigned long reason) { }4540static inline void tick_broadcast_switch_to_oneshot(void) { }4641static inline void tick_shutdown_broadcast_oneshot(unsigned int *cpup) { }4242+static inline int tick_broadcast_oneshot_active(void) { return 0; }4743# endif /* !BROADCAST */48444945#else /* !ONESHOT */···7468{7569 return 0;7670}7171+static inline int tick_broadcast_oneshot_active(void) { return 0; }7772#endif /* !TICK_ONESHOT */78737974/*
+8-5
kernel/time/tick-sched.c
···7575 incr * ticks);7676 }7777 do_timer(++ticks);7878+7979+ /* Keep the tick_next_period variable up to date */8080+ tick_next_period = ktime_add(last_jiffies_update, tick_period);7881 }7982 write_sequnlock(&xtime_lock);8083}···224221 */225222 if (unlikely(!cpu_online(cpu))) {226223 if (cpu == tick_do_timer_cpu)227227- tick_do_timer_cpu = -1;224224+ tick_do_timer_cpu = TICK_DO_TIMER_NONE;228225 }229226230227 if (unlikely(ts->nohz_mode == NOHZ_MODE_INACTIVE))···306303 * invoked.307304 */308305 if (cpu == tick_do_timer_cpu)309309- tick_do_timer_cpu = -1;306306+ tick_do_timer_cpu = TICK_DO_TIMER_NONE;310307311308 ts->idle_sleeps++;312309···471468 * this duty, then the jiffies update is still serialized by472469 * xtime_lock.473470 */474474- if (unlikely(tick_do_timer_cpu == -1))471471+ if (unlikely(tick_do_timer_cpu == TICK_DO_TIMER_NONE))475472 tick_do_timer_cpu = cpu;476473477474 /* Check, if the jiffies need an update */···573570 * this duty, then the jiffies update is still serialized by574571 * xtime_lock.575572 */576576- if (unlikely(tick_do_timer_cpu == -1))573573+ if (unlikely(tick_do_timer_cpu == TICK_DO_TIMER_NONE))577574 tick_do_timer_cpu = cpu;578575#endif579576···625622 */626623 hrtimer_init(&ts->sched_timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);627624 ts->sched_timer.function = tick_sched_timer;628628- ts->sched_timer.cb_mode = HRTIMER_CB_IRQSAFE_NO_SOFTIRQ;625625+ ts->sched_timer.cb_mode = HRTIMER_CB_IRQSAFE_PERCPU;629626630627 /* Get the next period (per cpu) */631628 ts->sched_timer.expires = tick_init_jiffy_update();
···250250251251struct mem_cgroup *mem_cgroup_from_task(struct task_struct *p)252252{253253+ /*254254+ * mm_update_next_owner() may clear mm->owner to NULL255255+ * if it races with swapoff, page migration, etc.256256+ * So this can be called with p == NULL.257257+ */258258+ if (unlikely(!p))259259+ return NULL;260260+253261 return container_of(task_subsys_state(p, mem_cgroup_subsys_id),254262 struct mem_cgroup, css);255263}···557549 if (likely(!memcg)) {558550 rcu_read_lock();559551 mem = mem_cgroup_from_task(rcu_dereference(mm->owner));552552+ if (unlikely(!mem)) {553553+ rcu_read_unlock();554554+ kmem_cache_free(page_cgroup_cache, pc);555555+ return 0;556556+ }560557 /*561558 * For every charge from the cgroup, increment reference count562559 */···814801815802 rcu_read_lock();816803 mem = mem_cgroup_from_task(rcu_dereference(mm->owner));804804+ if (unlikely(!mem)) {805805+ rcu_read_unlock();806806+ return 0;807807+ }817808 css_get(&mem->css);818809 rcu_read_unlock();819810820811 do {821812 progress = try_to_free_mem_cgroup_pages(mem, gfp_mask);813813+ progress += res_counter_check_under_limit(&mem->res);822814 } while (!progress && --retry);823815824816 css_put(&mem->css);
+8-5
mm/page_alloc.c
···268268{269269 int i;270270 int nr_pages = 1 << order;271271+ struct page *p = page + 1;271272272273 set_compound_page_dtor(page, free_compound_page);273274 set_compound_order(page, order);274275 __SetPageHead(page);275275- for (i = 1; i < nr_pages; i++) {276276- struct page *p = page + i;277277-276276+ for (i = 1; i < nr_pages; i++, p++) {277277+ if (unlikely((i & (MAX_ORDER_NR_PAGES - 1)) == 0))278278+ p = pfn_to_page(page_to_pfn(page) + i);278279 __SetPageTail(p);279280 p->first_page = page;280281 }···285284{286285 int i;287286 int nr_pages = 1 << order;287287+ struct page *p = page + 1;288288289289 if (unlikely(compound_order(page) != order))290290 bad_page(page);···293291 if (unlikely(!PageHead(page)))294292 bad_page(page);295293 __ClearPageHead(page);296296- for (i = 1; i < nr_pages; i++) {297297- struct page *p = page + i;294294+ for (i = 1; i < nr_pages; i++, p++) {295295+ if (unlikely((i & (MAX_ORDER_NR_PAGES - 1)) == 0))296296+ p = pfn_to_page(page_to_pfn(page) + i);298297299298 if (unlikely(!PageTail(p) |300299 (p->first_page != page)))
+8-4
mm/page_isolation.c
···114114115115int test_pages_isolated(unsigned long start_pfn, unsigned long end_pfn)116116{117117- unsigned long pfn;117117+ unsigned long pfn, flags;118118 struct page *page;119119+ struct zone *zone;120120+ int ret;119121120122 pfn = start_pfn;121123 /*···133131 if (pfn < end_pfn)134132 return -EBUSY;135133 /* Check all pages are free or Marked as ISOLATED */136136- if (__test_page_isolated_in_pageblock(start_pfn, end_pfn))137137- return 0;138138- return -EBUSY;134134+ zone = page_zone(pfn_to_page(pfn));135135+ spin_lock_irqsave(&zone->lock, flags);136136+ ret = __test_page_isolated_in_pageblock(start_pfn, end_pfn);137137+ spin_unlock_irqrestore(&zone->lock, flags);138138+ return ret ? 0 : -EBUSY;139139}
+15-15
mm/tiny-shmem.c
···6565 if (!dentry)6666 goto put_memory;67676868- error = -ENOSPC;6969- inode = ramfs_get_inode(root->d_sb, S_IFREG | S_IRWXUGO, 0);7070- if (!inode)7171- goto put_dentry;7272-7373- d_instantiate(dentry, inode);7468 error = -ENFILE;7575- file = alloc_file(shm_mnt, dentry, FMODE_WRITE | FMODE_READ,7676- &ramfs_file_operations);6969+ file = get_empty_filp();7770 if (!file)7871 goto put_dentry;79728080- inode->i_nlink = 0; /* It is unlinked */8181-8282- /* notify everyone as to the change of file size */8383- error = do_truncate(dentry, size, 0, file);8484- if (error < 0)7373+ error = -ENOSPC;7474+ inode = ramfs_get_inode(root->d_sb, S_IFREG | S_IRWXUGO, 0);7575+ if (!inode)8576 goto close_file;86777878+ d_instantiate(dentry, inode);7979+ inode->i_size = size;8080+ inode->i_nlink = 0; /* It is unlinked */8181+ init_file(file, shm_mnt, dentry, FMODE_WRITE | FMODE_READ,8282+ &ramfs_file_operations);8383+8484+#ifndef CONFIG_MMU8585+ error = ramfs_nommu_expand_for_mapping(inode, size);8686+ if (error)8787+ goto close_file;8888+#endif8789 return file;88908991close_file:9092 put_filp(file);9191- return ERR_PTR(error);9292-9393put_dentry:9494 dput(dentry);9595put_memory:
+8-2
net/9p/client.c
···7575 int option;7676 int ret = 0;77777878- clnt->trans_mod = v9fs_default_trans();7978 clnt->dotu = 1;8079 clnt->msize = 8192;8180···107108 clnt->msize = option;108109 break;109110 case Opt_trans:110110- clnt->trans_mod = v9fs_match_trans(&args[0]);111111+ clnt->trans_mod = v9fs_get_trans_by_name(&args[0]);111112 break;112113 case Opt_legacy:113114 clnt->dotu = 0;···116117 continue;117118 }118119 }120120+121121+ if (!clnt->trans_mod)122122+ clnt->trans_mod = v9fs_get_default_trans();123123+119124 kfree(options);120125 return ret;121126}···153150 if (!clnt)154151 return ERR_PTR(-ENOMEM);155152153153+ clnt->trans_mod = NULL;156154 clnt->trans = NULL;157155 spin_lock_init(&clnt->lock);158156 INIT_LIST_HEAD(&clnt->fidlist);···238234 kfree(clnt->trans);239235 clnt->trans = NULL;240236 }237237+238238+ v9fs_put_trans(clnt->trans_mod);241239242240 list_for_each_entry_safe(fid, fidptr, &clnt->fidlist, flist)243241 p9_fid_destroy(fid);
···9797 hdrlen -= 2;9898 if (!(optinfo->flags & IP6T_OPTS_OPTS)) {9999 return ret;100100- } else if (optinfo->flags & IP6T_OPTS_NSTRICT) {101101- pr_debug("Not strict - not implemented");102100 } else {103101 pr_debug("Strict ");104102 pr_debug("#%d ", optinfo->optsnr);···175177 pr_debug("ip6t_opts: unknown flags %X\n", optsinfo->invflags);176178 return false;177179 }180180+181181+ if (optsinfo->flags & IP6T_OPTS_NSTRICT) {182182+ pr_debug("ip6t_opts: Not strict - not implemented");183183+ return false;184184+ }185185+178186 return true;179187}180188
+2
net/ipv6/route.c
···26882688 if (ret)26892689 goto out_kmem_cache;2690269026912691+ ip6_dst_blackhole_ops.kmem_cachep = ip6_dst_ops_template.kmem_cachep;26922692+26912693 /* Registering of the loopback is done before this portion of code,26922694 * the loopback reference in rt6_info will not be taken, do it26932695 * manually for init_net */
···10121012 return retval;10131013}1014101410151015+struct sctp_chunk *sctp_make_violation_paramlen(10161016+ const struct sctp_association *asoc,10171017+ const struct sctp_chunk *chunk,10181018+ struct sctp_paramhdr *param)10191019+{10201020+ struct sctp_chunk *retval;10211021+ static const char error[] = "The following parameter had invalid length:";10221022+ size_t payload_len = sizeof(error) + sizeof(sctp_errhdr_t) +10231023+ sizeof(sctp_paramhdr_t);10241024+10251025+ retval = sctp_make_abort(asoc, chunk, payload_len);10261026+ if (!retval)10271027+ goto nodata;10281028+10291029+ sctp_init_cause(retval, SCTP_ERROR_PROTO_VIOLATION,10301030+ sizeof(error) + sizeof(sctp_paramhdr_t));10311031+ sctp_addto_chunk(retval, sizeof(error), error);10321032+ sctp_addto_param(retval, sizeof(sctp_paramhdr_t), param);10331033+10341034+nodata:10351035+ return retval;10361036+}10371037+10151038/* Make a HEARTBEAT chunk. */10161039struct sctp_chunk *sctp_make_heartbeat(const struct sctp_association *asoc,10171040 const struct sctp_transport *transport,···18051782 const struct sctp_chunk *chunk,18061783 struct sctp_chunk **errp)18071784{18081808- static const char error[] = "The following parameter had invalid length:";18091809- size_t payload_len = WORD_ROUND(sizeof(error)) +18101810- sizeof(sctp_paramhdr_t);18111811-18121812-18131785 /* This is a fatal error. Any accumulated non-fatal errors are18141786 * not reported.18151787 */···18121794 sctp_chunk_free(*errp);1813179518141796 /* Create an error chunk and fill it in with our payload. */18151815- *errp = sctp_make_op_error_space(asoc, chunk, payload_len);18161816-18171817- if (*errp) {18181818- sctp_init_cause(*errp, SCTP_ERROR_PROTO_VIOLATION,18191819- sizeof(error) + sizeof(sctp_paramhdr_t));18201820- sctp_addto_chunk(*errp, sizeof(error), error);18211821- sctp_addto_param(*errp, sizeof(sctp_paramhdr_t), param);18221822- }17971797+ *errp = sctp_make_violation_paramlen(asoc, chunk, param);1823179818241799 return 0;18251800}
+37-11
net/sctp/sm_statefuns.c
···119119 const struct sctp_endpoint *ep,120120 const struct sctp_association *asoc,121121 const sctp_subtype_t type,122122- void *arg,122122+ void *arg, void *ext,123123 sctp_cmd_seq_t *commands);124124125125static sctp_disposition_t sctp_sf_violation_ctsn(···34253425 addr_param = (union sctp_addr_param *)hdr->params;34263426 length = ntohs(addr_param->p.length);34273427 if (length < sizeof(sctp_paramhdr_t))34283428- return sctp_sf_violation_paramlen(ep, asoc, type,34283428+ return sctp_sf_violation_paramlen(ep, asoc, type, arg,34293429 (void *)addr_param, commands);3430343034313431 /* Verify the ASCONF chunk before processing it. */···34333433 (sctp_paramhdr_t *)((void *)addr_param + length),34343434 (void *)chunk->chunk_end,34353435 &err_param))34363436- return sctp_sf_violation_paramlen(ep, asoc, type,34373437- (void *)&err_param, commands);34363436+ return sctp_sf_violation_paramlen(ep, asoc, type, arg,34373437+ (void *)err_param, commands);3438343834393439 /* ADDIP 5.2 E1) Compare the value of the serial number to the value34403440 * the endpoint stored in a new association variable···35423542 (sctp_paramhdr_t *)addip_hdr->params,35433543 (void *)asconf_ack->chunk_end,35443544 &err_param))35453545- return sctp_sf_violation_paramlen(ep, asoc, type,35463546- (void *)&err_param, commands);35453545+ return sctp_sf_violation_paramlen(ep, asoc, type, arg,35463546+ (void *)err_param, commands);3547354735483548 if (last_asconf) {35493549 addip_hdr = (sctp_addiphdr_t *)last_asconf->subh.addip_hdr;···42404240 const struct sctp_endpoint *ep,42414241 const struct sctp_association *asoc,42424242 const sctp_subtype_t type,42434243- void *arg,42444244- sctp_cmd_seq_t *commands) {42454245- static const char err_str[] = "The following parameter had invalid length:";42434243+ void *arg, void *ext,42444244+ sctp_cmd_seq_t *commands)42454245+{42464246+ struct sctp_chunk *chunk = arg;42474247+ struct sctp_paramhdr *param = ext;42484248+ struct sctp_chunk *abort = NULL;4246424942474247- return sctp_sf_abort_violation(ep, asoc, arg, commands, err_str,42484248- sizeof(err_str));42504250+ if (sctp_auth_recv_cid(SCTP_CID_ABORT, asoc))42514251+ goto discard;42524252+42534253+ /* Make the abort chunk. */42544254+ abort = sctp_make_violation_paramlen(asoc, chunk, param);42554255+ if (!abort)42564256+ goto nomem;42574257+42584258+ sctp_add_cmd_sf(commands, SCTP_CMD_REPLY, SCTP_CHUNK(abort));42594259+ SCTP_INC_STATS(SCTP_MIB_OUTCTRLCHUNKS);42604260+42614261+ sctp_add_cmd_sf(commands, SCTP_CMD_SET_SK_ERR,42624262+ SCTP_ERROR(ECONNABORTED));42634263+ sctp_add_cmd_sf(commands, SCTP_CMD_ASSOC_FAILED,42644264+ SCTP_PERR(SCTP_ERROR_PROTO_VIOLATION));42654265+ SCTP_DEC_STATS(SCTP_MIB_CURRESTAB);42664266+42674267+discard:42684268+ sctp_sf_pdiscard(ep, asoc, SCTP_ST_CHUNK(0), arg, commands);42694269+42704270+ SCTP_INC_STATS(SCTP_MIB_ABORTEDS);42714271+42724272+ return SCTP_DISPOSITION_ABORT;42734273+nomem:42744274+ return SCTP_DISPOSITION_NOMEM;42494275}4250427642514277/* Handle a protocol violation when the peer trying to advance the
+2
net/socket.c
···15111511 goto out_put;15121512}1513151315141514+#if 015141515#ifdef HAVE_SET_RESTORE_SIGMASK15151516asmlinkage long sys_paccept(int fd, struct sockaddr __user *upeer_sockaddr,15161517 int __user *upeer_addrlen,···1564156315651564 return do_accept(fd, upeer_sockaddr, upeer_addrlen, flags);15661565}15661566+#endif15671567#endif1568156815691569asmlinkage long sys_accept(int fd, struct sockaddr __user *upeer_sockaddr,
+7-3
net/xfrm/xfrm_output.c
···2727 - skb_headroom(skb);2828 int ntail = dst->dev->needed_tailroom - skb_tailroom(skb);29293030- if (nhead > 0 || ntail > 0)3131- return pskb_expand_head(skb, nhead, ntail, GFP_ATOMIC);3030+ if (nhead <= 0) {3131+ if (ntail <= 0)3232+ return 0;3333+ nhead = 0;3434+ } else if (ntail < 0)3535+ ntail = 0;32363333- return 0;3737+ return pskb_expand_head(skb, nhead, ntail, GFP_ATOMIC);3438}35393640static int xfrm_output_one(struct sk_buff *skb, int err)
+57-66
scripts/kconfig/conf.c
···32323333static int indent = 1;3434static int valid_stdin = 1;3535+static int sync_kconfig;3536static int conf_cnt;3637static char line[128];3738static struct menu *rootEntry;···66656766static void check_stdin(void)6867{6969- if (!valid_stdin && input_mode == ask_silent) {6868+ if (!valid_stdin) {7069 printf(_("aborted!\n\n"));7170 printf(_("Console input/output is redirected. "));7271 printf(_("Run 'make oldconfig' to update configuration.\n\n"));···428427 check_conf(child);429428}430429431431-static void conf_do_update(void)432432-{433433- /* Update until a loop caused no more changes */434434- do {435435- conf_cnt = 0;436436- check_conf(&rootmenu);437437- } while (conf_cnt);438438-}439439-440440-static int conf_silent_update(void)441441-{442442- const char *name;443443-444444- if (conf_get_changed()) {445445- name = getenv("KCONFIG_NOSILENTUPDATE");446446- if (name && *name) {447447- fprintf(stderr,448448- _("\n*** Kernel configuration requires explicit update.\n\n"));449449- return 1;450450- }451451- conf_do_update();452452- }453453- return 0;454454-}455455-456456-static int conf_update(void)457457-{458458- rootEntry = &rootmenu;459459- conf(&rootmenu);460460- if (input_mode == ask_all) {461461- input_mode = ask_silent;462462- valid_stdin = 1;463463- }464464- conf_do_update();465465- return 0;466466-}467467-468430int main(int ac, char **av)469431{470432 int opt;···441477 while ((opt = getopt(ac, av, "osdD:nmyrh")) != -1) {442478 switch (opt) {443479 case 'o':444444- input_mode = ask_new;480480+ input_mode = ask_silent;445481 break;446482 case 's':447483 input_mode = ask_silent;448448- valid_stdin = isatty(0) && isatty(1) && isatty(2);484484+ sync_kconfig = 1;449485 break;450486 case 'd':451487 input_mode = set_default;···483519 name = av[optind];484520 conf_parse(name);485521 //zconfdump(stdout);522522+ if (sync_kconfig) {523523+ if (stat(".config", &tmpstat)) {524524+ fprintf(stderr, _("***\n"525525+ "*** You have not yet configured your kernel!\n"526526+ "*** (missing kernel .config file)\n"527527+ "***\n"528528+ "*** Please run some configurator (e.g. \"make oldconfig\" or\n"529529+ "*** \"make menuconfig\" or \"make xconfig\").\n"530530+ "***\n"));531531+ exit(1);532532+ }533533+ }534534+486535 switch (input_mode) {487536 case set_default:488537 if (!defconfig_file)···508531 }509532 break;510533 case ask_silent:511511- if (stat(".config", &tmpstat)) {512512- printf(_("***\n"513513- "*** You have not yet configured your kernel!\n"514514- "*** (missing kernel .config file)\n"515515- "***\n"516516- "*** Please run some configurator (e.g. \"make oldconfig\" or\n"517517- "*** \"make menuconfig\" or \"make xconfig\").\n"518518- "***\n"));519519- exit(1);520520- }521534 case ask_all:522535 case ask_new:523536 conf_read(NULL);···536569 default:537570 break;538571 }572572+573573+ if (sync_kconfig) {574574+ if (conf_get_changed()) {575575+ name = getenv("KCONFIG_NOSILENTUPDATE");576576+ if (name && *name) {577577+ fprintf(stderr,578578+ _("\n*** Kernel configuration requires explicit update.\n\n"));579579+ return 1;580580+ }581581+ }582582+ valid_stdin = isatty(0) && isatty(1) && isatty(2);583583+ }584584+539585 switch (input_mode) {540586 case set_no:541587 conf_set_all_new_symbols(def_no);···565585 case set_default:566586 conf_set_all_new_symbols(def_default);567587 break;568568- case ask_silent:569588 case ask_new:570570- if (conf_silent_update())571571- exit(1);572572- break;573589 case ask_all:574574- if (conf_update())575575- exit(1);590590+ rootEntry = &rootmenu;591591+ conf(&rootmenu);592592+ input_mode = ask_silent;593593+ /* fall through */594594+ case ask_silent:595595+ /* Update until a loop caused no more changes */596596+ do {597597+ conf_cnt = 0;598598+ check_conf(&rootmenu);599599+ } while (conf_cnt);576600 break;577601 }578602579579- if (conf_write(NULL)) {580580- fprintf(stderr, _("\n*** Error during writing of the kernel configuration.\n\n"));581581- exit(1);582582- }583583- /* ask_silent is used during the build so we shall update autoconf.584584- * All other commands are only used to generate a config.585585- */586586- if (input_mode == ask_silent && conf_write_autoconf()) {587587- fprintf(stderr, _("\n*** Error during writing of the kernel configuration.\n\n"));588588- return 1;603603+ if (sync_kconfig) {604604+ /* silentoldconfig is used during the build so we shall update autoconf.605605+ * All other commands are only used to generate a config.606606+ */607607+ if (conf_get_changed() && conf_write(NULL)) {608608+ fprintf(stderr, _("\n*** Error during writing of the kernel configuration.\n\n"));609609+ exit(1);610610+ }611611+ if (conf_write_autoconf()) {612612+ fprintf(stderr, _("\n*** Error during update of the kernel configuration.\n\n"));613613+ return 1;614614+ }615615+ } else {616616+ if (conf_write(NULL)) {617617+ fprintf(stderr, _("\n*** Error during writing of the kernel configuration.\n\n"));618618+ exit(1);619619+ }589620 }590621 return 0;591622}
+6-2
scripts/kconfig/confdata.c
···222222 continue;223223 if (def == S_DEF_USER) {224224 sym = sym_find(line + 9);225225- if (!sym)225225+ if (!sym) {226226+ sym_add_change_count(1);226227 break;228228+ }227229 } else {228230 sym = sym_lookup(line + 9, 0);229231 if (sym->type == S_UNKNOWN)···261259 }262260 if (def == S_DEF_USER) {263261 sym = sym_find(line + 7);264264- if (!sym)262262+ if (!sym) {263263+ sym_add_change_count(1);265264 break;265265+ }266266 } else {267267 sym = sym_lookup(line + 7, 0);268268 if (sym->type == S_UNKNOWN)
···490490491491#endif492492493493-static int cs4270_i2c_probe(struct i2c_adapter *adap, int addr, int kind);494494-495495-/*496496- * Notify the driver that a new I2C bus has been found.497497- *498498- * This function is called for each I2C bus in the system. The function499499- * then asks the I2C subsystem to probe that bus at the addresses on which500500- * our device (the CS4270) could exist. If a device is found at one of501501- * those addresses, then our probe function (cs4270_i2c_probe) is called.502502- */503503-static int cs4270_i2c_attach(struct i2c_adapter *adapter)504504-{505505- return i2c_probe(adapter, &addr_data, cs4270_i2c_probe);506506-}507507-508508-static int cs4270_i2c_detach(struct i2c_client *client)509509-{510510- struct snd_soc_codec *codec = i2c_get_clientdata(client);511511-512512- i2c_detach_client(client);513513- codec->control_data = NULL;514514-515515- kfree(codec->reg_cache);516516- codec->reg_cache = NULL;517517-518518- kfree(client);519519- return 0;520520-}493493+static int cs4270_i2c_probe(struct i2c_client *, const struct i2c_device_id *);521494522495/* A list of non-DAPM controls that the CS4270 supports */523496static const struct snd_kcontrol_new cs4270_snd_controls[] = {···498525 CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1)499526};500527528528+static const struct i2c_device_id cs4270_id[] = {529529+ {"cs4270", 0},530530+ {}531531+};532532+MODULE_DEVICE_TABLE(i2c, cs4270_id);533533+501534static struct i2c_driver cs4270_i2c_driver = {502535 .driver = {503536 .name = "CS4270 I2C",504537 .owner = THIS_MODULE,505538 },506506- .id = I2C_DRIVERID_CS4270,507507- .attach_adapter = cs4270_i2c_attach,508508- .detach_client = cs4270_i2c_detach,539539+ .id_table = cs4270_id,540540+ .probe = cs4270_i2c_probe,509541};510542511543/*···539561 * Note: snd_soc_new_pcms() must be called before this function can be called,540562 * because of snd_ctl_add().541563 */542542-static int cs4270_i2c_probe(struct i2c_adapter *adapter, int addr, int kind)564564+static int cs4270_i2c_probe(struct i2c_client *i2c_client,565565+ const struct i2c_device_id *id)543566{544567 struct snd_soc_device *socdev = cs4270_socdev;545568 struct snd_soc_codec *codec = socdev->codec;546546- struct i2c_client *i2c_client = NULL;547569 int i;548570 int ret = 0;549571···556578557579 /* Note: codec_dai->codec is NULL here */558580559559- i2c_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);560560- if (!i2c_client) {561561- printk(KERN_ERR "cs4270: could not allocate I2C client\n");562562- return -ENOMEM;563563- }564564-565581 codec->reg_cache = kzalloc(CS4270_NUMREGS, GFP_KERNEL);566582 if (!codec->reg_cache) {567583 printk(KERN_ERR "cs4270: could not allocate register cache\n");568584 ret = -ENOMEM;569585 goto error;570586 }571571-572572- i2c_set_clientdata(i2c_client, codec);573573- strcpy(i2c_client->name, "CS4270");574574-575575- i2c_client->driver = &cs4270_i2c_driver;576576- i2c_client->adapter = adapter;577577- i2c_client->addr = addr;578587579588 /* Verify that we have a CS4270 */580589···577612 goto error;578613 }579614580580- printk(KERN_INFO "cs4270: found device at I2C address %X\n", addr);615615+ printk(KERN_INFO "cs4270: found device at I2C address %X\n",616616+ i2c_client->addr);581617 printk(KERN_INFO "cs4270: hardware revision %X\n", ret & 0xF);582582-583583- /* Tell the I2C layer a new client has arrived */584584-585585- ret = i2c_attach_client(i2c_client);586586- if (ret) {587587- printk(KERN_ERR "cs4270: could not attach codec, "588588- "I2C address %x, error code %i\n", addr, ret);589589- goto error;590590- }591618592619 codec->control_data = i2c_client;593620 codec->read = cs4270_read_reg_cache;···605648 goto error;606649 }607650651651+ i2c_set_clientdata(i2c_client, codec);652652+608653 return 0;609654610655error:611611- if (codec->control_data) {612612- i2c_detach_client(i2c_client);613613- codec->control_data = NULL;614614- }656656+ codec->control_data = NULL;615657616658 kfree(codec->reg_cache);617659 codec->reg_cache = NULL;618660 codec->reg_cache_size = 0;619619-620620- kfree(i2c_client);621661622662 return ret;623663}···681727 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);682728 if (ret < 0) {683729 printk(KERN_ERR "cs4270: failed to create PCMs\n");684684- return ret;730730+ goto error_free_codec;685731 }686732687733#ifdef USE_I2C···690736 ret = i2c_add_driver(&cs4270_i2c_driver);691737 if (ret) {692738 printk(KERN_ERR "cs4270: failed to attach driver");693693- snd_soc_free_pcms(socdev);694694- return ret;739739+ goto error_free_pcms;695740 }696741697742 /* Did we find a CS4270 on the I2C bus? */···712759 ret = snd_soc_register_card(socdev);713760 if (ret < 0) {714761 printk(KERN_ERR "cs4270: failed to register card\n");715715- snd_soc_free_pcms(socdev);716716- return ret;762762+ goto error_del_driver;717763 }764764+765765+ return 0;766766+767767+error_del_driver:768768+#ifdef USE_I2C769769+ i2c_del_driver(&cs4270_i2c_driver);770770+771771+error_free_pcms:772772+#endif773773+ snd_soc_free_pcms(socdev);774774+775775+error_free_codec:776776+ kfree(socdev->codec);777777+ socdev->codec = NULL;718778719779 return ret;720780}···739773 snd_soc_free_pcms(socdev);740774741775#ifdef USE_I2C742742- if (socdev->codec->control_data)743743- i2c_del_driver(&cs4270_i2c_driver);776776+ i2c_del_driver(&cs4270_i2c_driver);744777#endif745778746779 kfree(socdev->codec);
+2-2
sound/soc/codecs/wm8753.c
···583583584584 /* out 4 */585585 {"Out4 Mux", "VREF", "VREF"},586586- {"Out4 Mux", "Capture ST", "Capture ST Mixer"},586586+ {"Out4 Mux", "Capture ST", "Playback Mixer"},587587 {"Out4 Mux", "LOUT2", "LOUT2"},588588 {"Out 4", NULL, "Out4 Mux"},589589 {"OUT4", NULL, "Out 4"},···607607 /* Capture Right Mux */608608 {"Capture Right Mux", "PGA", "Right Capture Volume"},609609 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},610610- {"Capture Right Mux", "Sidetone", "Capture ST Mixer"},610610+ {"Capture Right Mux", "Sidetone", "Playback Mixer"},611611612612 /* Mono Capture mixer-mux */613613 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},