Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: kirkwood: Add Check Point L-50 board

This patch adds dts for the Check Point L-50 from 600/1100 series
routers.

Specification:
-CPU: Marvell Kirkwood 88F6821 1200MHz
-RAM: 512MB
-Flash: NAND 512MB
-WiFi: mPCIe card based on Atheros AR9287 b/g/n
-WAN: 1 Gigabit Port (Marvell 88E1116R PHY)
-LAN: 9 Gigabit Ports (2x Marvell 88E6171(5+4))
-USB: 2x USB2.0
-Express card slot
-SD card slot
-Serial console: RJ-45 115200 8n1
-Unsupported DSL

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

authored by

Pawel Dembicki and committed by
Gregory CLEMENT
2bf399de c589d6da

+439
+1
arch/arm/boot/dts/Makefile
··· 279 279 kirkwood-iomega_ix2_200.dtb \ 280 280 kirkwood-is2.dtb \ 281 281 kirkwood-km_kirkwood.dtb \ 282 + kirkwood-l-50.dtb \ 282 283 kirkwood-laplug.dtb \ 283 284 kirkwood-linkstation-lsqvl.dtb \ 284 285 kirkwood-linkstation-lsvl.dtb \
+438
arch/arm/boot/dts/kirkwood-l-50.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Check Point L-50 Board Description 4 + * Copyright 2020 Pawel Dembicki <paweldembicki@gmail.com> 5 + */ 6 + 7 + /dts-v1/; 8 + 9 + #include "kirkwood.dtsi" 10 + #include "kirkwood-6281.dtsi" 11 + 12 + / { 13 + model = "Check Point L-50"; 14 + compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood"; 15 + 16 + memory { 17 + device_type = "memory"; 18 + reg = <0x00000000 0x20000000>; 19 + }; 20 + 21 + chosen { 22 + bootargs = "console=ttyS0,115200n8"; 23 + stdout-path = &uart0; 24 + }; 25 + 26 + ocp@f1000000 { 27 + pinctrl: pin-controller@10000 { 28 + pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>; 29 + pinctrl-names = "default"; 30 + 31 + pmx_sysrst: pmx-sysrst { 32 + marvell,pins = "mpp6"; 33 + marvell,function = "sysrst"; 34 + }; 35 + 36 + pmx_button29: pmx_button29 { 37 + marvell,pins = "mpp29"; 38 + marvell,function = "gpio"; 39 + }; 40 + 41 + pmx_led38: pmx_led38 { 42 + marvell,pins = "mpp38"; 43 + marvell,function = "gpio"; 44 + }; 45 + 46 + pmx_sdio_cd: pmx-sdio-cd { 47 + marvell,pins = "mpp46"; 48 + marvell,function = "gpio"; 49 + }; 50 + }; 51 + 52 + serial@12000 { 53 + status = "okay"; 54 + }; 55 + 56 + mvsdio@90000 { 57 + status = "okay"; 58 + cd-gpios = <&gpio1 14 9>; 59 + }; 60 + 61 + i2c@11000 { 62 + status = "okay"; 63 + clock-frequency = <400000>; 64 + 65 + gpio2: gpio-expander@20{ 66 + #gpio-cells = <2>; 67 + #interrupt-cells = <2>; 68 + compatible = "semtech,sx1505q"; 69 + reg = <0x20>; 70 + 71 + gpio-controller; 72 + }; 73 + 74 + /* Three GPIOs from 0x21 exp. are undescribed in dts: 75 + * 1: DSL module reset (active low) 76 + * 5: mPCIE reset (active low) 77 + * 6: Express card reset (active low) 78 + */ 79 + gpio3: gpio-expander@21{ 80 + #gpio-cells = <2>; 81 + #interrupt-cells = <2>; 82 + compatible = "semtech,sx1505q"; 83 + reg = <0x21>; 84 + 85 + gpio-controller; 86 + }; 87 + 88 + rtc@30 { 89 + compatible = "s35390a"; 90 + reg = <0x30>; 91 + }; 92 + }; 93 + }; 94 + 95 + leds { 96 + compatible = "gpio-leds"; 97 + 98 + status_green { 99 + label = "l-50:green:status"; 100 + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; 101 + }; 102 + 103 + status_red { 104 + label = "l-50:red:status"; 105 + gpios = <&gpio3 2 GPIO_ACTIVE_LOW>; 106 + }; 107 + 108 + wifi { 109 + label = "l-50:green:wifi"; 110 + gpios = <&gpio2 7 GPIO_ACTIVE_LOW>; 111 + linux,default-trigger = "phy0tpt"; 112 + }; 113 + 114 + internet_green { 115 + label = "l-50:green:internet"; 116 + gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; 117 + }; 118 + 119 + internet_red { 120 + label = "l-50:red:internet"; 121 + gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 122 + }; 123 + 124 + usb1_green { 125 + label = "l-50:green:usb1"; 126 + gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 127 + linux,default-trigger = "usbport"; 128 + trigger-sources = <&hub_port3>; 129 + }; 130 + 131 + usb1_red { 132 + label = "l-50:red:usb1"; 133 + gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; 134 + }; 135 + 136 + usb2_green { 137 + label = "l-50:green:usb2"; 138 + gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; 139 + linux,default-trigger = "usbport"; 140 + trigger-sources = <&hub_port1>; 141 + }; 142 + 143 + usb2_red { 144 + label = "l-50:red:usb2"; 145 + gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; 146 + }; 147 + }; 148 + 149 + usb2_pwr { 150 + compatible = "regulator-fixed"; 151 + regulator-name = "usb2_pwr"; 152 + 153 + regulator-min-microvolt = <5000000>; 154 + regulator-max-microvolt = <5000000>; 155 + gpio = <&gpio3 3 GPIO_ACTIVE_LOW>; 156 + regulator-always-on; 157 + }; 158 + 159 + usb1_pwr { 160 + compatible = "regulator-fixed"; 161 + regulator-name = "usb1_pwr"; 162 + 163 + regulator-min-microvolt = <5000000>; 164 + regulator-max-microvolt = <5000000>; 165 + gpio = <&gpio3 4 GPIO_ACTIVE_LOW>; 166 + regulator-always-on; 167 + }; 168 + 169 + mpcie_pwr { 170 + compatible = "regulator-fixed"; 171 + regulator-name = "mpcie_pwr"; 172 + 173 + regulator-min-microvolt = <3300000>; 174 + regulator-max-microvolt = <3300000>; 175 + gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>; 176 + enable-active-high; 177 + regulator-always-on; 178 + }; 179 + 180 + express_card_pwr { 181 + compatible = "regulator-fixed"; 182 + regulator-name = "express_card_pwr"; 183 + 184 + regulator-min-microvolt = <3300000>; 185 + regulator-max-microvolt = <3300000>; 186 + gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; 187 + enable-active-high; 188 + regulator-always-on; 189 + }; 190 + 191 + keys { 192 + compatible = "gpio-keys"; 193 + 194 + factory_defaults { 195 + label = "factory_defaults"; 196 + gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; 197 + linux,code = <KEY_RESTART>; 198 + }; 199 + }; 200 + }; 201 + 202 + &mdio { 203 + status = "okay"; 204 + 205 + ethphy8: ethernet-phy@8 { 206 + reg = <0x08>; 207 + }; 208 + 209 + switch0: switch@10 { 210 + compatible = "marvell,mv88e6085"; 211 + #address-cells = <1>; 212 + #size-cells = <0>; 213 + reg = <0x10>; 214 + dsa,member = <0 0>; 215 + 216 + ports { 217 + #address-cells = <1>; 218 + #size-cells = <0>; 219 + 220 + port@0 { 221 + reg = <0>; 222 + label = "lan5"; 223 + }; 224 + 225 + port@1 { 226 + reg = <1>; 227 + label = "lan1"; 228 + }; 229 + 230 + port@2 { 231 + reg = <2>; 232 + label = "lan6"; 233 + }; 234 + 235 + port@3 { 236 + reg = <3>; 237 + label = "lan2"; 238 + }; 239 + 240 + port@4 { 241 + reg = <4>; 242 + label = "lan7"; 243 + }; 244 + 245 + switch0port5: port@5 { 246 + reg = <5>; 247 + phy-mode = "rgmii-txid"; 248 + link = <&switch1port5>; 249 + fixed-link { 250 + speed = <1000>; 251 + full-duplex; 252 + }; 253 + }; 254 + 255 + port@6 { 256 + reg = <6>; 257 + label = "cpu"; 258 + phy-mode = "rgmii-id"; 259 + ethernet = <&eth1port>; 260 + fixed-link { 261 + speed = <1000>; 262 + full-duplex; 263 + }; 264 + }; 265 + }; 266 + }; 267 + 268 + switch@11 { 269 + compatible = "marvell,mv88e6085"; 270 + #address-cells = <1>; 271 + #size-cells = <0>; 272 + reg = <0x11>; 273 + dsa,member = <0 1>; 274 + 275 + ports { 276 + #address-cells = <1>; 277 + #size-cells = <0>; 278 + 279 + port@0 { 280 + reg = <0>; 281 + label = "lan3"; 282 + }; 283 + 284 + port@1 { 285 + reg = <1>; 286 + label = "lan8"; 287 + }; 288 + 289 + port@2 { 290 + reg = <2>; 291 + label = "lan4"; 292 + }; 293 + 294 + port@3 { 295 + reg = <3>; 296 + label = "dmz"; 297 + }; 298 + 299 + switch1port5: port@5 { 300 + reg = <5>; 301 + phy-mode = "rgmii-txid"; 302 + link = <&switch0port5>; 303 + fixed-link { 304 + speed = <1000>; 305 + full-duplex; 306 + }; 307 + }; 308 + 309 + port@6 { 310 + reg = <6>; 311 + label = "dsl"; 312 + fixed-link { 313 + speed = <100>; 314 + full-duplex; 315 + }; 316 + }; 317 + }; 318 + }; 319 + }; 320 + 321 + &eth0 { 322 + status = "okay"; 323 + ethernet0-port@0 { 324 + phy-handle = <&ethphy8>; 325 + }; 326 + }; 327 + 328 + &eth1 { 329 + status = "okay"; 330 + ethernet1-port@0 { 331 + speed = <1000>; 332 + duplex = <1>; 333 + }; 334 + }; 335 + 336 + &nand { 337 + status = "okay"; 338 + pinctrl-0 = <&pmx_nand>; 339 + pinctrl-names = "default"; 340 + 341 + partition@0 { 342 + label = "u-boot"; 343 + reg = <0x00000000 0x000c0000>; 344 + }; 345 + 346 + partition@a0000 { 347 + label = "bootldr-env"; 348 + reg = <0x000c0000 0x00040000>; 349 + }; 350 + 351 + partition@100000 { 352 + label = "kernel-1"; 353 + reg = <0x00100000 0x00800000>; 354 + }; 355 + 356 + partition@900000 { 357 + label = "rootfs-1"; 358 + reg = <0x00900000 0x07100000>; 359 + }; 360 + 361 + partition@7a00000 { 362 + label = "kernel-2"; 363 + reg = <0x07a00000 0x00800000>; 364 + }; 365 + 366 + partition@8200000 { 367 + label = "rootfs-2"; 368 + reg = <0x08200000 0x07100000>; 369 + }; 370 + 371 + partition@f300000 { 372 + label = "default_sw"; 373 + reg = <0x0f300000 0x07900000>; 374 + }; 375 + 376 + partition@16c00000 { 377 + label = "logs"; 378 + reg = <0x16c00000 0x01800000>; 379 + }; 380 + 381 + partition@18400000 { 382 + label = "preset_cfg"; 383 + reg = <0x18400000 0x00100000>; 384 + }; 385 + 386 + partition@18500000 { 387 + label = "adsl"; 388 + reg = <0x18500000 0x00100000>; 389 + }; 390 + 391 + partition@18600000 { 392 + label = "storage"; 393 + reg = <0x18600000 0x07a00000>; 394 + }; 395 + }; 396 + 397 + &rtc { 398 + status = "disabled"; 399 + }; 400 + 401 + &pciec { 402 + status = "okay"; 403 + }; 404 + 405 + &pcie0 { 406 + status = "okay"; 407 + }; 408 + 409 + &sata_phy0 { 410 + status = "disabled"; 411 + }; 412 + 413 + &sata_phy1 { 414 + status = "disabled"; 415 + }; 416 + 417 + &usb0 { 418 + #address-cells = <1>; 419 + #size-cells = <0>; 420 + status = "okay"; 421 + 422 + port@1 { 423 + #address-cells = <1>; 424 + #size-cells = <0>; 425 + reg = <1>; 426 + #trigger-source-cells = <0>; 427 + 428 + hub_port1: port@1 { 429 + reg = <1>; 430 + #trigger-source-cells = <0>; 431 + }; 432 + 433 + hub_port3: port@3 { 434 + reg = <3>; 435 + #trigger-source-cells = <0>; 436 + }; 437 + }; 438 + };