Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

perf tools arm64: Add support for VG register

Add the name of the VG register so it can be used in --user-regs

The event will fail to open if the register is requested but not
available so only add it to the mask if the kernel supports sve and also
if it supports that specific register.

Committer notes:

Add conditional definition of HWCAP_SVE, as suggested by Leo Yan, to
build on older systems where this is not available in the system
headers.

Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: James Clark <james.clark@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: German Gomez <german.gomez@arm.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.garry@huawei.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lore.kernel.org/r/20220525154114.718321-6-james.clark@arm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

authored by

James Clark and committed by
Arnaldo Carvalho de Melo
2be00431 d511578b

+40
+38
tools/perf/arch/arm64/util/perf_regs.c
··· 2 2 #include <errno.h> 3 3 #include <regex.h> 4 4 #include <string.h> 5 + #include <sys/auxv.h> 5 6 #include <linux/kernel.h> 6 7 #include <linux/zalloc.h> 7 8 9 + #include "../../../perf-sys.h" 8 10 #include "../../../util/debug.h" 9 11 #include "../../../util/event.h" 10 12 #include "../../../util/perf_regs.h" 13 + 14 + #ifndef HWCAP_SVE 15 + #define HWCAP_SVE (1 << 22) 16 + #endif 11 17 12 18 const struct sample_reg sample_reg_masks[] = { 13 19 SMPL_REG(x0, PERF_REG_ARM64_X0), ··· 49 43 SMPL_REG(lr, PERF_REG_ARM64_LR), 50 44 SMPL_REG(sp, PERF_REG_ARM64_SP), 51 45 SMPL_REG(pc, PERF_REG_ARM64_PC), 46 + SMPL_REG(vg, PERF_REG_ARM64_VG), 52 47 SMPL_REG_END 53 48 }; 54 49 ··· 137 130 } 138 131 139 132 return SDT_ARG_VALID; 133 + } 134 + 135 + uint64_t arch__user_reg_mask(void) 136 + { 137 + struct perf_event_attr attr = { 138 + .type = PERF_TYPE_HARDWARE, 139 + .config = PERF_COUNT_HW_CPU_CYCLES, 140 + .sample_type = PERF_SAMPLE_REGS_USER, 141 + .disabled = 1, 142 + .exclude_kernel = 1, 143 + .sample_period = 1, 144 + .sample_regs_user = PERF_REGS_MASK 145 + }; 146 + int fd; 147 + 148 + if (getauxval(AT_HWCAP) & HWCAP_SVE) 149 + attr.sample_regs_user |= SMPL_REG_MASK(PERF_REG_ARM64_VG); 150 + 151 + /* 152 + * Check if the pmu supports perf extended regs, before 153 + * returning the register mask to sample. 154 + */ 155 + if (attr.sample_regs_user != PERF_REGS_MASK) { 156 + event_attr_init(&attr); 157 + fd = sys_perf_event_open(&attr, 0, -1, -1, 0); 158 + if (fd != -1) { 159 + close(fd); 160 + return attr.sample_regs_user; 161 + } 162 + } 163 + return PERF_REGS_MASK; 140 164 }
+2
tools/perf/util/perf_regs.c
··· 103 103 return "lr"; 104 104 case PERF_REG_ARM64_PC: 105 105 return "pc"; 106 + case PERF_REG_ARM64_VG: 107 + return "vg"; 106 108 default: 107 109 return NULL; 108 110 }