tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

x86, crc32-pclmul: Fix build with older binutils

binutils prior to 2.18 (e.g. the ones found on SLE10) don't support
assembling PEXTRD, so a macro based approach like the one for PCLMULQDQ
in the same file should be used.

This requires making the helper macros capable of recognizing 32-bit
general purpose register operands.

[ hpa: tagging for stable as it is a low risk build fix ]

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Link: http://lkml.kernel.org/r/51A6142A02000078000D99D8@nat28.tlf.novell.com
Cc: Alexander Boyko <alexander_boyko@xyratex.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Huang Ying <ying.huang@intel.com>
Cc: <stable@vger.kernel.org> v3.9
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>

authored by

Jan Beulich and committed by
H. Peter Anvin 2baad612 e9d0626e

+73 -3
+1 -1
arch/x86/crypto/crc32-pclmul_asm.S
··· 240 240 pand %xmm3, %xmm1 241 241 PCLMULQDQ 0x00, CONSTANT, %xmm1 242 242 pxor %xmm2, %xmm1 243 - pextrd $0x01, %xmm1, %eax 243 + PEXTRD 0x01, %xmm1, %eax 244 244 245 245 ret 246 246 ENDPROC(crc32_pclmul_le_16)
+72 -2
arch/x86/include/asm/inst.h
··· 9 9 10 10 #define REG_NUM_INVALID 100 11 11 12 - #define REG_TYPE_R64 0 13 - #define REG_TYPE_XMM 1 12 + #define REG_TYPE_R32 0 13 + #define REG_TYPE_R64 1 14 + #define REG_TYPE_XMM 2 14 15 #define REG_TYPE_INVALID 100 16 + 17 + .macro R32_NUM opd r32 18 + \opd = REG_NUM_INVALID 19 + .ifc \r32,%eax 20 + \opd = 0 21 + .endif 22 + .ifc \r32,%ecx 23 + \opd = 1 24 + .endif 25 + .ifc \r32,%edx 26 + \opd = 2 27 + .endif 28 + .ifc \r32,%ebx 29 + \opd = 3 30 + .endif 31 + .ifc \r32,%esp 32 + \opd = 4 33 + .endif 34 + .ifc \r32,%ebp 35 + \opd = 5 36 + .endif 37 + .ifc \r32,%esi 38 + \opd = 6 39 + .endif 40 + .ifc \r32,%edi 41 + \opd = 7 42 + .endif 43 + #ifdef CONFIG_X86_64 44 + .ifc \r32,%r8d 45 + \opd = 8 46 + .endif 47 + .ifc \r32,%r9d 48 + \opd = 9 49 + .endif 50 + .ifc \r32,%r10d 51 + \opd = 10 52 + .endif 53 + .ifc \r32,%r11d 54 + \opd = 11 55 + .endif 56 + .ifc \r32,%r12d 57 + \opd = 12 58 + .endif 59 + .ifc \r32,%r13d 60 + \opd = 13 61 + .endif 62 + .ifc \r32,%r14d 63 + \opd = 14 64 + .endif 65 + .ifc \r32,%r15d 66 + \opd = 15 67 + .endif 68 + #endif 69 + .endm 15 70 16 71 .macro R64_NUM opd r64 17 72 \opd = REG_NUM_INVALID 73 + #ifdef CONFIG_X86_64 18 74 .ifc \r64,%rax 19 75 \opd = 0 20 76 .endif ··· 119 63 .ifc \r64,%r15 120 64 \opd = 15 121 65 .endif 66 + #endif 122 67 .endm 123 68 124 69 .macro XMM_NUM opd xmm ··· 175 118 .endm 176 119 177 120 .macro REG_TYPE type reg 121 + R32_NUM reg_type_r32 \reg 178 122 R64_NUM reg_type_r64 \reg 179 123 XMM_NUM reg_type_xmm \reg 180 124 .if reg_type_r64 <> REG_NUM_INVALID 181 125 \type = REG_TYPE_R64 126 + .elseif reg_type_r32 <> REG_NUM_INVALID 127 + \type = REG_TYPE_R32 182 128 .elseif reg_type_xmm <> REG_NUM_INVALID 183 129 \type = REG_TYPE_XMM 184 130 .else ··· 219 159 PFX_REX clmul_opd1 clmul_opd2 220 160 .byte 0x0f, 0x3a, 0x44 221 161 MODRM 0xc0 clmul_opd1 clmul_opd2 162 + .byte \imm8 163 + .endm 164 + 165 + .macro PEXTRD imm8 xmm gpr 166 + R32_NUM extrd_opd1 \gpr 167 + XMM_NUM extrd_opd2 \xmm 168 + PFX_OPD_SIZE 169 + PFX_REX extrd_opd1 extrd_opd2 170 + .byte 0x0f, 0x3a, 0x16 171 + MODRM 0xc0 extrd_opd1 extrd_opd2 222 172 .byte \imm8 223 173 .endm 224 174