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Merge branch 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev into drm-next
rcar-du support for r8a7793/4
* 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev:
drm: rcar-du: Add support for the R8A7794 DU
drm: rcar-du: Add support for the R8A7793 DU
+38
-8
+9
-5
Documentation/devicetree/bindings/video/renesas,du.txt
+9
-5
Documentation/devicetree/bindings/video/renesas,du.txt
···
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5
- compatible: must be one of the following.
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- "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
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7
- "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
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-
- "renesas,du-r8a7791" for R8A7791 (R-Car M2) compatible DU
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+
- "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
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+
- "renesas,du-r8a7793" for R8A7793 (R-Car M2-N) compatible DU
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+
- "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
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- reg: A list of base address and length of each memory resource, one for
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each entry in the reg-names property.
···
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- clock-names: Name of the clocks. This property is model-dependent.
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- R8A7779 uses a single functional clock. The clock doesn't need to be
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named.
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-
- R8A7790 and R8A7791 use one functional clock per channel and one clock
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-
per LVDS encoder. The functional clocks must be named "du.x" with "x"
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-
being the channel numerical index. The LVDS clocks must be named
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+
- R8A779[0134] use one functional clock per channel and one clock per LVDS
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+
encoder (if available). The functional clocks must be named "du.x" with
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+
"x" being the channel numerical index. The LVDS clocks must be named
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"lvds.x" with "x" being the LVDS encoder numerical index.
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- In addition to the functional and encoder clocks, all DU versions also
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support externally supplied pixel clocks. Those clocks are optional.
···
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-----------------------------------------------------------------------------
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R8A7779 (H1) DPAD 0 DPAD 1 -
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R8A7790 (H2) DPAD LVDS 0 LVDS 1
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-
R8A7791 (M2) DPAD LVDS 0 -
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+
R8A7791 (M2-W) DPAD LVDS 0 -
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+
R8A7793 (M2-N) DPAD LVDS 0 -
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+
R8A7794 (E2) DPAD 0 DPAD 1 -
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Example: R8A7790 (R-Car H2) DU
+26
-1
drivers/gpu/drm/rcar-du/rcar_du_drv.c
+26
-1
drivers/gpu/drm/rcar-du/rcar_du_drv.c
···
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.num_lvds = 2,
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};
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+
/* M2-W (r8a7791) and M2-N (r8a7793) are identical */
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static const struct rcar_du_device_info rcar_du_r8a7791_info = {
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.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
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| RCAR_DU_FEATURE_EXT_CTRL_REGS,
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.num_crtcs = 2,
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.routes = {
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-
/* R8A7791 has one RGB output, one LVDS output and one
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+
/* R8A779[13] has one RGB output, one LVDS output and one
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* (currently unsupported) TCON output.
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*/
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[RCAR_DU_OUTPUT_DPAD0] = {
···
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.num_lvds = 1,
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};
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+
static const struct rcar_du_device_info rcar_du_r8a7794_info = {
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+
.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
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+
| RCAR_DU_FEATURE_EXT_CTRL_REGS,
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+
.num_crtcs = 2,
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+
.routes = {
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+
/* R8A7794 has two RGB outputs and one (currently unsupported)
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+
* TCON output.
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+
*/
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+
[RCAR_DU_OUTPUT_DPAD0] = {
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+
.possible_crtcs = BIT(0),
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+
.encoder_type = DRM_MODE_ENCODER_NONE,
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+
.port = 0,
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+
},
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[RCAR_DU_OUTPUT_DPAD1] = {
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.possible_crtcs = BIT(1),
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.encoder_type = DRM_MODE_ENCODER_NONE,
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+
.port = 1,
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+
},
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+
},
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+
.num_lvds = 0,
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+
};
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+
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static const struct of_device_id rcar_du_of_table[] = {
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{ .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info },
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{ .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info },
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{ .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info },
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+
{ .compatible = "renesas,du-r8a7793", .data = &rcar_du_r8a7791_info },
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+
{ .compatible = "renesas,du-r8a7794", .data = &rcar_du_r8a7794_info },
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{ }
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};
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+3
-2
drivers/gpu/drm/rcar-du/rcar_du_group.c
+3
-2
drivers/gpu/drm/rcar-du/rcar_du_group.c
···
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u32 defr8 = DEFR8_CODE | DEFR8_DEFE8;
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/* The DEFR8 register for the first group also controls RGB output
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-
* routing to DPAD0
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+
* routing to DPAD0 for DU instances that support it.
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*/
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-
if (rgrp->index == 0)
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+
if (rgrp->dev->info->routes[RCAR_DU_OUTPUT_DPAD0].possible_crtcs > 1 &&
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+
rgrp->index == 0)
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defr8 |= DEFR8_DRGBS_DU(rgrp->dev->dpad0_source);
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rcar_du_group_write(rgrp, DEFR8, defr8);