Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

pinctrl: meson: Rename REG_* to MESON_REG_*

Currently compilation test fails on x86 due to name collision. The usual
way to fix that is to move both conflicting parts to their own namespaces.

Rename REG_* to MESON_REG_* as a prerequisite for enabling COMPILE_TEST.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>

+26 -26
+12 -12
drivers/pinctrl/meson/pinctrl-meson.c
··· 218 218 unsigned int pin, 219 219 bool out) 220 220 { 221 - return meson_pinconf_set_gpio_bit(pc, pin, REG_DIR, !out); 221 + return meson_pinconf_set_gpio_bit(pc, pin, MESON_REG_DIR, !out); 222 222 } 223 223 224 224 static int meson_pinconf_get_output(struct meson_pinctrl *pc, 225 225 unsigned int pin) 226 226 { 227 - int ret = meson_pinconf_get_gpio_bit(pc, pin, REG_DIR); 227 + int ret = meson_pinconf_get_gpio_bit(pc, pin, MESON_REG_DIR); 228 228 229 229 if (ret < 0) 230 230 return ret; ··· 236 236 unsigned int pin, 237 237 bool high) 238 238 { 239 - return meson_pinconf_set_gpio_bit(pc, pin, REG_OUT, high); 239 + return meson_pinconf_set_gpio_bit(pc, pin, MESON_REG_OUT, high); 240 240 } 241 241 242 242 static int meson_pinconf_get_drive(struct meson_pinctrl *pc, 243 243 unsigned int pin) 244 244 { 245 - return meson_pinconf_get_gpio_bit(pc, pin, REG_OUT); 245 + return meson_pinconf_get_gpio_bit(pc, pin, MESON_REG_OUT); 246 246 } 247 247 248 248 static int meson_pinconf_set_output_drive(struct meson_pinctrl *pc, ··· 269 269 if (ret) 270 270 return ret; 271 271 272 - meson_calc_reg_and_bit(bank, pin, REG_PULLEN, &reg, &bit); 272 + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, &reg, &bit); 273 273 ret = regmap_update_bits(pc->reg_pullen, reg, BIT(bit), 0); 274 274 if (ret) 275 275 return ret; ··· 288 288 if (ret) 289 289 return ret; 290 290 291 - meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit); 291 + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULL, &reg, &bit); 292 292 if (pull_up) 293 293 val = BIT(bit); 294 294 ··· 296 296 if (ret) 297 297 return ret; 298 298 299 - meson_calc_reg_and_bit(bank, pin, REG_PULLEN, &reg, &bit); 299 + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, &reg, &bit); 300 300 ret = regmap_update_bits(pc->reg_pullen, reg, BIT(bit), BIT(bit)); 301 301 if (ret) 302 302 return ret; ··· 321 321 if (ret) 322 322 return ret; 323 323 324 - meson_calc_reg_and_bit(bank, pin, REG_DS, &reg, &bit); 324 + meson_calc_reg_and_bit(bank, pin, MESON_REG_DS, &reg, &bit); 325 325 326 326 if (drive_strength_ua <= 500) { 327 327 ds_val = MESON_PINCONF_DRV_500UA; ··· 407 407 if (ret) 408 408 return ret; 409 409 410 - meson_calc_reg_and_bit(bank, pin, REG_PULLEN, &reg, &bit); 410 + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, &reg, &bit); 411 411 412 412 ret = regmap_read(pc->reg_pullen, reg, &val); 413 413 if (ret) ··· 416 416 if (!(val & BIT(bit))) { 417 417 conf = PIN_CONFIG_BIAS_DISABLE; 418 418 } else { 419 - meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit); 419 + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULL, &reg, &bit); 420 420 421 421 ret = regmap_read(pc->reg_pull, reg, &val); 422 422 if (ret) ··· 447 447 if (ret) 448 448 return ret; 449 449 450 - meson_calc_reg_and_bit(bank, pin, REG_DS, &reg, &bit); 450 + meson_calc_reg_and_bit(bank, pin, MESON_REG_DS, &reg, &bit); 451 451 452 452 ret = regmap_read(pc->reg_ds, reg, &val); 453 453 if (ret) ··· 595 595 if (ret) 596 596 return ret; 597 597 598 - meson_calc_reg_and_bit(bank, gpio, REG_IN, &reg, &bit); 598 + meson_calc_reg_and_bit(bank, gpio, MESON_REG_IN, &reg, &bit); 599 599 regmap_read(pc->reg_gpio, reg, &val); 600 600 601 601 return !!(val & BIT(bit));
+14 -14
drivers/pinctrl/meson/pinctrl-meson.h
··· 63 63 * enum meson_reg_type - type of registers encoded in @meson_reg_desc 64 64 */ 65 65 enum meson_reg_type { 66 - REG_PULLEN, 67 - REG_PULL, 68 - REG_DIR, 69 - REG_OUT, 70 - REG_IN, 71 - REG_DS, 72 - NUM_REG, 66 + MESON_REG_PULLEN, 67 + MESON_REG_PULL, 68 + MESON_REG_DIR, 69 + MESON_REG_OUT, 70 + MESON_REG_IN, 71 + MESON_REG_DS, 72 + MESON_NUM_REG, 73 73 }; 74 74 75 75 /** ··· 102 102 unsigned int last; 103 103 int irq_first; 104 104 int irq_last; 105 - struct meson_reg_desc regs[NUM_REG]; 105 + struct meson_reg_desc regs[MESON_NUM_REG]; 106 106 }; 107 107 108 108 struct meson_pinctrl_data { ··· 150 150 .irq_first = fi, \ 151 151 .irq_last = li, \ 152 152 .regs = { \ 153 - [REG_PULLEN] = { per, peb }, \ 154 - [REG_PULL] = { pr, pb }, \ 155 - [REG_DIR] = { dr, db }, \ 156 - [REG_OUT] = { or, ob }, \ 157 - [REG_IN] = { ir, ib }, \ 158 - [REG_DS] = { dsr, dsb }, \ 153 + [MESON_REG_PULLEN] = { per, peb }, \ 154 + [MESON_REG_PULL] = { pr, pb }, \ 155 + [MESON_REG_DIR] = { dr, db }, \ 156 + [MESON_REG_OUT] = { or, ob }, \ 157 + [MESON_REG_IN] = { ir, ib }, \ 158 + [MESON_REG_DS] = { dsr, dsb }, \ 159 159 }, \ 160 160 } 161 161