tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915/pxp: Implement PXP irq handler
The HW will generate a teardown interrupt when session termination is
required, which requires i915 to submit a terminating batch. Once the HW
is done with the termination it will generate another interrupt, at
which point it is safe to re-create the session.
Since the termination and re-creation flow is something we want to
trigger from the driver as well, use a common work function that can be
called both from the irq handler and from the driver set-up flows, which
has the addded benefit of allowing us to skip any extra locks because
the work itself serializes the operations.
v2: use struct completion instead of bool (Chris)
v3: drop locks, clean up functions and improve comments (Chris),
move to common work function.
v4: improve comments, simplify wait logic (Rodrigo)
v5: unconditionally set interrupts, rename state_attacked var (Rodrigo)
v10: remove inclusion of intel_gt_types.h from intel_pxp.h (Jani)
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210924191452.1539378-10-alan.previn.teres.alexis@intel.com
authored by
Huang, Sean Z
and committed by
Rodrigo Vivi
2ae09687
95c9e122
+284
-16
+1
drivers/gpu/drm/i915/Makefile
+1
drivers/gpu/drm/i915/Makefile
+7
drivers/gpu/drm/i915/gt/intel_gt_irq.c
+7
drivers/gpu/drm/i915/gt/intel_gt_irq.c
···
13
13
#include "intel_lrc_reg.h"
14
14
#include "intel_uncore.h"
15
15
#include "intel_rps.h"
16
+
#include "pxp/intel_pxp_irq.h"
16
17
17
18
static void guc_irq_handler(struct intel_guc *guc, u16 iir)
18
19
{
···
64
63
65
64
if (instance == OTHER_GTPM_INSTANCE)
66
65
return gen11_rps_irq_handler(>->rps, iir);
66
+
67
+
if (instance == OTHER_KCR_INSTANCE)
68
+
return intel_pxp_irq_handler(>->pxp, iir);
67
69
68
70
WARN_ONCE(1, "unhandled other interrupt instance=0x%x, iir=0x%x\n",
69
71
instance, iir);
···
200
196
intel_uncore_write(uncore, GEN11_GPM_WGBOXPERF_INTR_MASK, ~0);
201
197
intel_uncore_write(uncore, GEN11_GUC_SG_INTR_ENABLE, 0);
202
198
intel_uncore_write(uncore, GEN11_GUC_SG_INTR_MASK, ~0);
199
+
200
+
intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_ENABLE, 0);
201
+
intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_MASK, ~0);
203
202
}
204
203
205
204
void gen11_gt_irq_postinstall(struct intel_gt *gt)
+1
drivers/gpu/drm/i915/i915_reg.h
+1
drivers/gpu/drm/i915/i915_reg.h
+60
-6
drivers/gpu/drm/i915/pxp/intel_pxp.c
+60
-6
drivers/gpu/drm/i915/pxp/intel_pxp.c
···
2
2
/*
3
3
* Copyright(c) 2020 Intel Corporation.
4
4
*/
5
+
#include <linux/workqueue.h>
5
6
#include "intel_pxp.h"
7
+
#include "intel_pxp_irq.h"
6
8
#include "intel_pxp_session.h"
7
9
#include "intel_pxp_tee.h"
8
10
#include "gt/intel_context.h"
···
82
80
83
81
mutex_init(&pxp->tee_mutex);
84
82
83
+
/*
84
+
* we'll use the completion to check if there is a termination pending,
85
+
* so we start it as completed and we reinit it when a termination
86
+
* is triggered.
87
+
*/
88
+
init_completion(&pxp->termination);
89
+
complete_all(&pxp->termination);
90
+
91
+
INIT_WORK(&pxp->session_work, intel_pxp_session_work);
92
+
85
93
ret = create_vcs_context(pxp);
86
94
if (ret)
87
95
return;
···
120
108
destroy_vcs_context(pxp);
121
109
}
122
110
111
+
void intel_pxp_mark_termination_in_progress(struct intel_pxp *pxp)
112
+
{
113
+
pxp->arb_is_valid = false;
114
+
reinit_completion(&pxp->termination);
115
+
}
116
+
117
+
static void intel_pxp_queue_termination(struct intel_pxp *pxp)
118
+
{
119
+
struct intel_gt *gt = pxp_to_gt(pxp);
120
+
121
+
/*
122
+
* We want to get the same effect as if we received a termination
123
+
* interrupt, so just pretend that we did.
124
+
*/
125
+
spin_lock_irq(>->irq_lock);
126
+
intel_pxp_mark_termination_in_progress(pxp);
127
+
pxp->session_events |= PXP_TERMINATION_REQUEST;
128
+
queue_work(system_unbound_wq, &pxp->session_work);
129
+
spin_unlock_irq(>->irq_lock);
130
+
}
131
+
132
+
/*
133
+
* the arb session is restarted from the irq work when we receive the
134
+
* termination completion interrupt
135
+
*/
136
+
int intel_pxp_wait_for_arb_start(struct intel_pxp *pxp)
137
+
{
138
+
if (!intel_pxp_is_enabled(pxp))
139
+
return 0;
140
+
141
+
if (!wait_for_completion_timeout(&pxp->termination,
142
+
msecs_to_jiffies(100)))
143
+
return -ETIMEDOUT;
144
+
145
+
if (!pxp->arb_is_valid)
146
+
return -EIO;
147
+
148
+
return 0;
149
+
}
150
+
123
151
void intel_pxp_init_hw(struct intel_pxp *pxp)
124
152
{
125
-
int ret;
126
-
127
153
kcr_pxp_enable(pxp_to_gt(pxp));
154
+
intel_pxp_irq_enable(pxp);
128
155
129
-
/* always emit a full termination to clean the state */
130
-
ret = intel_pxp_terminate_arb_session_and_global(pxp);
131
-
if (!ret)
132
-
intel_pxp_create_arb_session(pxp);
156
+
/*
157
+
* the session could've been attacked while we weren't loaded, so
158
+
* handle it as if it was and re-create it.
159
+
*/
160
+
intel_pxp_queue_termination(pxp);
133
161
}
134
162
135
163
void intel_pxp_fini_hw(struct intel_pxp *pxp)
136
164
{
137
165
kcr_pxp_disable(pxp_to_gt(pxp));
166
+
167
+
intel_pxp_irq_disable(pxp);
138
168
}
+8
drivers/gpu/drm/i915/pxp/intel_pxp.h
+8
drivers/gpu/drm/i915/pxp/intel_pxp.h
···
22
22
23
23
void intel_pxp_init_hw(struct intel_pxp *pxp);
24
24
void intel_pxp_fini_hw(struct intel_pxp *pxp);
25
+
26
+
void intel_pxp_mark_termination_in_progress(struct intel_pxp *pxp);
27
+
int intel_pxp_wait_for_arb_start(struct intel_pxp *pxp);
25
28
#else
26
29
static inline void intel_pxp_init(struct intel_pxp *pxp)
27
30
{
···
32
29
33
30
static inline void intel_pxp_fini(struct intel_pxp *pxp)
34
31
{
32
+
}
33
+
34
+
static inline int intel_pxp_wait_for_arb_start(struct intel_pxp *pxp)
35
+
{
36
+
return -ENODEV;
35
37
}
36
38
#endif
37
39
+100
drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
+100
drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
···
1
+
// SPDX-License-Identifier: MIT
2
+
/*
3
+
* Copyright(c) 2020 Intel Corporation.
4
+
*/
5
+
#include <linux/workqueue.h>
6
+
#include "intel_pxp.h"
7
+
#include "intel_pxp_irq.h"
8
+
#include "intel_pxp_session.h"
9
+
#include "gt/intel_gt_irq.h"
10
+
#include "gt/intel_gt_types.h"
11
+
#include "i915_irq.h"
12
+
#include "i915_reg.h"
13
+
14
+
/**
15
+
* intel_pxp_irq_handler - Handles PXP interrupts.
16
+
* @pxp: pointer to pxp struct
17
+
* @iir: interrupt vector
18
+
*/
19
+
void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
20
+
{
21
+
struct intel_gt *gt = pxp_to_gt(pxp);
22
+
23
+
if (GEM_WARN_ON(!intel_pxp_is_enabled(pxp)))
24
+
return;
25
+
26
+
lockdep_assert_held(>->irq_lock);
27
+
28
+
if (unlikely(!iir))
29
+
return;
30
+
31
+
if (iir & (GEN12_DISPLAY_PXP_STATE_TERMINATED_INTERRUPT |
32
+
GEN12_DISPLAY_APP_TERMINATED_PER_FW_REQ_INTERRUPT)) {
33
+
/* immediately mark PXP as inactive on termination */
34
+
intel_pxp_mark_termination_in_progress(pxp);
35
+
pxp->session_events |= PXP_TERMINATION_REQUEST;
36
+
}
37
+
38
+
if (iir & GEN12_DISPLAY_STATE_RESET_COMPLETE_INTERRUPT)
39
+
pxp->session_events |= PXP_TERMINATION_COMPLETE;
40
+
41
+
if (pxp->session_events)
42
+
queue_work(system_unbound_wq, &pxp->session_work);
43
+
}
44
+
45
+
static inline void __pxp_set_interrupts(struct intel_gt *gt, u32 interrupts)
46
+
{
47
+
struct intel_uncore *uncore = gt->uncore;
48
+
const u32 mask = interrupts << 16;
49
+
50
+
intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_ENABLE, mask);
51
+
intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_MASK, ~mask);
52
+
}
53
+
54
+
static inline void pxp_irq_reset(struct intel_gt *gt)
55
+
{
56
+
spin_lock_irq(>->irq_lock);
57
+
gen11_gt_reset_one_iir(gt, 0, GEN11_KCR);
58
+
spin_unlock_irq(>->irq_lock);
59
+
}
60
+
61
+
void intel_pxp_irq_enable(struct intel_pxp *pxp)
62
+
{
63
+
struct intel_gt *gt = pxp_to_gt(pxp);
64
+
65
+
spin_lock_irq(>->irq_lock);
66
+
67
+
if (!pxp->irq_enabled)
68
+
WARN_ON_ONCE(gen11_gt_reset_one_iir(gt, 0, GEN11_KCR));
69
+
70
+
__pxp_set_interrupts(gt, GEN12_PXP_INTERRUPTS);
71
+
pxp->irq_enabled = true;
72
+
73
+
spin_unlock_irq(>->irq_lock);
74
+
}
75
+
76
+
void intel_pxp_irq_disable(struct intel_pxp *pxp)
77
+
{
78
+
struct intel_gt *gt = pxp_to_gt(pxp);
79
+
80
+
/*
81
+
* We always need to submit a global termination when we re-enable the
82
+
* interrupts, so there is no need to make sure that the session state
83
+
* makes sense at the end of this function. Just make sure this is not
84
+
* called in a path were the driver consider the session as valid and
85
+
* doesn't call a termination on restart.
86
+
*/
87
+
GEM_WARN_ON(intel_pxp_is_active(pxp));
88
+
89
+
spin_lock_irq(>->irq_lock);
90
+
91
+
pxp->irq_enabled = false;
92
+
__pxp_set_interrupts(gt, 0);
93
+
94
+
spin_unlock_irq(>->irq_lock);
95
+
intel_synchronize_irq(gt->i915);
96
+
97
+
pxp_irq_reset(gt);
98
+
99
+
flush_work(&pxp->session_work);
100
+
}
+32
drivers/gpu/drm/i915/pxp/intel_pxp_irq.h
+32
drivers/gpu/drm/i915/pxp/intel_pxp_irq.h
···
1
+
/* SPDX-License-Identifier: MIT */
2
+
/*
3
+
* Copyright(c) 2020, Intel Corporation. All rights reserved.
4
+
*/
5
+
6
+
#ifndef __INTEL_PXP_IRQ_H__
7
+
#define __INTEL_PXP_IRQ_H__
8
+
9
+
#include <linux/types.h>
10
+
11
+
struct intel_pxp;
12
+
13
+
#define GEN12_DISPLAY_PXP_STATE_TERMINATED_INTERRUPT BIT(1)
14
+
#define GEN12_DISPLAY_APP_TERMINATED_PER_FW_REQ_INTERRUPT BIT(2)
15
+
#define GEN12_DISPLAY_STATE_RESET_COMPLETE_INTERRUPT BIT(3)
16
+
17
+
#define GEN12_PXP_INTERRUPTS \
18
+
(GEN12_DISPLAY_PXP_STATE_TERMINATED_INTERRUPT | \
19
+
GEN12_DISPLAY_APP_TERMINATED_PER_FW_REQ_INTERRUPT | \
20
+
GEN12_DISPLAY_STATE_RESET_COMPLETE_INTERRUPT)
21
+
22
+
#ifdef CONFIG_DRM_I915_PXP
23
+
void intel_pxp_irq_enable(struct intel_pxp *pxp);
24
+
void intel_pxp_irq_disable(struct intel_pxp *pxp);
25
+
void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir);
26
+
#else
27
+
static inline void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
28
+
{
29
+
}
30
+
#endif
31
+
32
+
#endif /* __INTEL_PXP_IRQ_H__ */
+51
-3
drivers/gpu/drm/i915/pxp/intel_pxp_session.c
+51
-3
drivers/gpu/drm/i915/pxp/intel_pxp_session.c
···
48
48
return ret;
49
49
}
50
50
51
-
int intel_pxp_create_arb_session(struct intel_pxp *pxp)
51
+
static int pxp_create_arb_session(struct intel_pxp *pxp)
52
52
{
53
53
struct intel_gt *gt = pxp_to_gt(pxp);
54
54
int ret;
···
77
77
return 0;
78
78
}
79
79
80
-
int intel_pxp_terminate_arb_session_and_global(struct intel_pxp *pxp)
80
+
static int pxp_terminate_arb_session_and_global(struct intel_pxp *pxp)
81
81
{
82
82
int ret;
83
83
struct intel_gt *gt = pxp_to_gt(pxp);
84
84
85
-
pxp->arb_is_valid = false;
85
+
/* must mark termination in progress calling this function */
86
+
GEM_WARN_ON(pxp->arb_is_valid);
86
87
87
88
/* terminate the hw sessions */
88
89
ret = intel_pxp_terminate_session(pxp, ARB_SESSION);
···
101
100
intel_uncore_write(gt->uncore, PXP_GLOBAL_TERMINATE, 1);
102
101
103
102
return ret;
103
+
}
104
+
105
+
static void pxp_terminate(struct intel_pxp *pxp)
106
+
{
107
+
int ret;
108
+
109
+
pxp->hw_state_invalidated = true;
110
+
111
+
/*
112
+
* if we fail to submit the termination there is no point in waiting for
113
+
* it to complete. PXP will be marked as non-active until the next
114
+
* termination is issued.
115
+
*/
116
+
ret = pxp_terminate_arb_session_and_global(pxp);
117
+
if (ret)
118
+
complete_all(&pxp->termination);
119
+
}
120
+
121
+
static void pxp_terminate_complete(struct intel_pxp *pxp)
122
+
{
123
+
/* Re-create the arb session after teardown handle complete */
124
+
if (fetch_and_zero(&pxp->hw_state_invalidated))
125
+
pxp_create_arb_session(pxp);
126
+
127
+
complete_all(&pxp->termination);
128
+
}
129
+
130
+
void intel_pxp_session_work(struct work_struct *work)
131
+
{
132
+
struct intel_pxp *pxp = container_of(work, typeof(*pxp), session_work);
133
+
struct intel_gt *gt = pxp_to_gt(pxp);
134
+
u32 events = 0;
135
+
136
+
spin_lock_irq(>->irq_lock);
137
+
events = fetch_and_zero(&pxp->session_events);
138
+
spin_unlock_irq(>->irq_lock);
139
+
140
+
if (!events)
141
+
return;
142
+
143
+
if (events & PXP_TERMINATION_REQUEST) {
144
+
events &= ~PXP_TERMINATION_COMPLETE;
145
+
pxp_terminate(pxp);
146
+
}
147
+
148
+
if (events & PXP_TERMINATION_COMPLETE)
149
+
pxp_terminate_complete(pxp);
104
150
}
+2
-3
drivers/gpu/drm/i915/pxp/intel_pxp_session.h
+2
-3
drivers/gpu/drm/i915/pxp/intel_pxp_session.h
···
8
8
9
9
#include <linux/types.h>
10
10
11
-
struct intel_pxp;
11
+
struct work_struct;
12
12
13
-
int intel_pxp_create_arb_session(struct intel_pxp *pxp);
14
-
int intel_pxp_terminate_arb_session_and_global(struct intel_pxp *pxp);
13
+
void intel_pxp_session_work(struct work_struct *work);
15
14
16
15
#endif /* __INTEL_PXP_SESSION_H__ */
+4
-4
drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
+4
-4
drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
···
80
80
{
81
81
struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
82
82
struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev);
83
+
int ret;
83
84
84
85
mutex_lock(&pxp->tee_mutex);
85
86
pxp->pxp_component = data;
···
89
88
90
89
/* the component is required to fully start the PXP HW */
91
90
intel_pxp_init_hw(pxp);
92
-
93
-
if (!pxp->arb_is_valid) {
91
+
ret = intel_pxp_wait_for_arb_start(pxp);
92
+
if (ret) {
94
93
drm_err(&i915->drm, "Failed to create arb session during bind\n");
95
94
intel_pxp_fini_hw(pxp);
96
95
pxp->pxp_component = NULL;
97
-
return -EIO;
98
96
}
99
97
100
-
return 0;
98
+
return ret;
101
99
}
102
100
103
101
static void i915_pxp_tee_component_unbind(struct device *i915_kdev,
+18
drivers/gpu/drm/i915/pxp/intel_pxp_types.h
+18
drivers/gpu/drm/i915/pxp/intel_pxp_types.h
···
6
6
#ifndef __INTEL_PXP_TYPES_H__
7
7
#define __INTEL_PXP_TYPES_H__
8
8
9
+
#include <linux/completion.h>
9
10
#include <linux/mutex.h>
10
11
#include <linux/types.h>
12
+
#include <linux/workqueue.h>
11
13
12
14
struct intel_context;
13
15
struct i915_pxp_component;
···
28
26
bool arb_is_valid;
29
27
30
28
struct mutex tee_mutex; /* protects the tee channel binding */
29
+
30
+
/*
31
+
* If the HW perceives an attack on the integrity of the encryption it
32
+
* will invalidate the keys and expect SW to re-initialize the session.
33
+
* We keep track of this state to make sure we only re-start the arb
34
+
* session when required.
35
+
*/
36
+
bool hw_state_invalidated;
37
+
38
+
bool irq_enabled;
39
+
struct completion termination;
40
+
41
+
struct work_struct session_work;
42
+
u32 session_events; /* protected with gt->irq_lock */
43
+
#define PXP_TERMINATION_REQUEST BIT(0)
44
+
#define PXP_TERMINATION_COMPLETE BIT(1)
31
45
};
32
46
33
47
#endif /* __INTEL_PXP_TYPES_H__ */