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[MIPS] Cobalt: Split PCI codes from setup.c
It's removed #ifdef CONFIG_PCI/#endif from cobalt setup.c .
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
authored by
Yoichi Yuasa
and committed by
Ralf Baechle
2a9effc6
cc50b67d
+48
-28
+1
arch/mips/cobalt/Makefile
+1
arch/mips/cobalt/Makefile
+47
arch/mips/cobalt/pci.c
+47
arch/mips/cobalt/pci.c
···
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/*
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* Register PCI controller.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
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* Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
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*
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <asm/gt64120.h>
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extern struct pci_ops gt64111_pci_ops;
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static struct resource cobalt_mem_resource = {
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.start = GT_DEF_PCI0_MEM0_BASE,
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.end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1,
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.name = "PCI memory",
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.flags = IORESOURCE_MEM,
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};
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static struct resource cobalt_io_resource = {
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.start = 0x1000,
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.end = GT_DEF_PCI0_IO_SIZE - 1,
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.name = "PCI I/O",
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.flags = IORESOURCE_IO,
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};
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static struct pci_controller cobalt_pci_controller = {
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.pci_ops = >64111_pci_ops,
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.mem_resource = &cobalt_mem_resource,
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.io_resource = &cobalt_io_resource,
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.io_offset = 0 - GT_DEF_PCI0_IO_BASE,
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};
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static int __init cobalt_pci_init(void)
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{
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register_pci_controller(&cobalt_pci_controller);
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return 0;
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}
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arch_initcall(cobalt_pci_init);
-28
arch/mips/cobalt/setup.c
-28
arch/mips/cobalt/setup.c
···
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GT_WRITE(GT_INTRMASK_OFS, GT_INTR_T0EXP_MSK | GT_READ(GT_INTRMASK_OFS));
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}
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extern struct pci_ops gt64111_pci_ops;
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static struct resource cobalt_mem_resource = {
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.start = GT_DEF_PCI0_MEM0_BASE,
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.end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1,
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.name = "PCI memory",
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.flags = IORESOURCE_MEM
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};
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static struct resource cobalt_io_resource = {
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.start = 0x1000,
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.end = 0xffff,
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.name = "PCI I/O",
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.flags = IORESOURCE_IO
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};
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/*
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* Cobalt doesn't have PS/2 keyboard/mouse interfaces,
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* keyboard conntroller is never used.
···
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},
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};
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static struct pci_controller cobalt_pci_controller = {
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.pci_ops = >64111_pci_ops,
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.mem_resource = &cobalt_mem_resource,
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.mem_offset = 0,
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.io_resource = &cobalt_io_resource,
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.io_offset = 0 - GT_DEF_PCI0_IO_BASE,
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};
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void __init plat_mem_setup(void)
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{
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static struct uart_port uart;
···
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cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
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printk("Cobalt board ID: %d\n", cobalt_board_id);
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#ifdef CONFIG_PCI
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register_pci_controller(&cobalt_pci_controller);
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#endif
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if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
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#ifdef CONFIG_SERIAL_8250