Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[PATCH] sata_sil24: separate out sil24_init_controller()

Separate out controller initialization from sil24_init_one() into
sil24_init_controller(). This will be used by resume.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

authored by

Tejun Heo and committed by
Jeff Garzik
2a41a610 afb5a7cb

+62 -45
+62 -45
drivers/scsi/sata_sil24.c
··· 988 988 kfree(hpriv); 989 989 } 990 990 991 + static void sil24_init_controller(struct pci_dev *pdev, int n_ports, 992 + unsigned long host_flags, 993 + void __iomem *host_base, 994 + void __iomem *port_base) 995 + { 996 + u32 tmp; 997 + int i; 998 + 999 + /* GPIO off */ 1000 + writel(0, host_base + HOST_FLASH_CMD); 1001 + 1002 + /* clear global reset & mask interrupts during initialization */ 1003 + writel(0, host_base + HOST_CTRL); 1004 + 1005 + /* init ports */ 1006 + for (i = 0; i < n_ports; i++) { 1007 + void __iomem *port = port_base + i * PORT_REGS_SIZE; 1008 + 1009 + /* Initial PHY setting */ 1010 + writel(0x20c, port + PORT_PHY_CFG); 1011 + 1012 + /* Clear port RST */ 1013 + tmp = readl(port + PORT_CTRL_STAT); 1014 + if (tmp & PORT_CS_PORT_RST) { 1015 + writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR); 1016 + tmp = ata_wait_register(port + PORT_CTRL_STAT, 1017 + PORT_CS_PORT_RST, 1018 + PORT_CS_PORT_RST, 10, 100); 1019 + if (tmp & PORT_CS_PORT_RST) 1020 + dev_printk(KERN_ERR, &pdev->dev, 1021 + "failed to clear port RST\n"); 1022 + } 1023 + 1024 + /* Configure IRQ WoC */ 1025 + if (host_flags & SIL24_FLAG_PCIX_IRQ_WOC) 1026 + writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_STAT); 1027 + else 1028 + writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR); 1029 + 1030 + /* Zero error counters. */ 1031 + writel(0x8000, port + PORT_DECODE_ERR_THRESH); 1032 + writel(0x8000, port + PORT_CRC_ERR_THRESH); 1033 + writel(0x8000, port + PORT_HSHK_ERR_THRESH); 1034 + writel(0x0000, port + PORT_DECODE_ERR_CNT); 1035 + writel(0x0000, port + PORT_CRC_ERR_CNT); 1036 + writel(0x0000, port + PORT_HSHK_ERR_CNT); 1037 + 1038 + /* Always use 64bit activation */ 1039 + writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_CLR); 1040 + 1041 + /* Clear port multiplier enable and resume bits */ 1042 + writel(PORT_CS_PM_EN | PORT_CS_RESUME, port + PORT_CTRL_CLR); 1043 + } 1044 + 1045 + /* Turn on interrupts */ 1046 + writel(IRQ_STAT_4PORTS, host_base + HOST_CTRL); 1047 + } 1048 + 991 1049 static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 992 1050 { 993 1051 static int printed_version = 0; ··· 1134 1076 } 1135 1077 } 1136 1078 1137 - /* GPIO off */ 1138 - writel(0, host_base + HOST_FLASH_CMD); 1139 - 1140 1079 /* Apply workaround for completion IRQ loss on PCI-X errata */ 1141 1080 if (probe_ent->host_flags & SIL24_FLAG_PCIX_IRQ_WOC) { 1142 1081 tmp = readl(host_base + HOST_CTRL); ··· 1145 1090 probe_ent->host_flags &= ~SIL24_FLAG_PCIX_IRQ_WOC; 1146 1091 } 1147 1092 1148 - /* clear global reset & mask interrupts during initialization */ 1149 - writel(0, host_base + HOST_CTRL); 1150 - 1151 1093 for (i = 0; i < probe_ent->n_ports; i++) { 1152 - void __iomem *port = port_base + i * PORT_REGS_SIZE; 1153 - unsigned long portu = (unsigned long)port; 1094 + unsigned long portu = 1095 + (unsigned long)port_base + i * PORT_REGS_SIZE; 1154 1096 1155 1097 probe_ent->port[i].cmd_addr = portu; 1156 1098 probe_ent->port[i].scr_addr = portu + PORT_SCONTROL; 1157 1099 1158 1100 ata_std_ports(&probe_ent->port[i]); 1159 - 1160 - /* Initial PHY setting */ 1161 - writel(0x20c, port + PORT_PHY_CFG); 1162 - 1163 - /* Clear port RST */ 1164 - tmp = readl(port + PORT_CTRL_STAT); 1165 - if (tmp & PORT_CS_PORT_RST) { 1166 - writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR); 1167 - tmp = ata_wait_register(port + PORT_CTRL_STAT, 1168 - PORT_CS_PORT_RST, 1169 - PORT_CS_PORT_RST, 10, 100); 1170 - if (tmp & PORT_CS_PORT_RST) 1171 - dev_printk(KERN_ERR, &pdev->dev, 1172 - "failed to clear port RST\n"); 1173 - } 1174 - 1175 - /* Configure IRQ WoC */ 1176 - if (probe_ent->host_flags & SIL24_FLAG_PCIX_IRQ_WOC) 1177 - writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_STAT); 1178 - else 1179 - writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR); 1180 - 1181 - /* Zero error counters. */ 1182 - writel(0x8000, port + PORT_DECODE_ERR_THRESH); 1183 - writel(0x8000, port + PORT_CRC_ERR_THRESH); 1184 - writel(0x8000, port + PORT_HSHK_ERR_THRESH); 1185 - writel(0x0000, port + PORT_DECODE_ERR_CNT); 1186 - writel(0x0000, port + PORT_CRC_ERR_CNT); 1187 - writel(0x0000, port + PORT_HSHK_ERR_CNT); 1188 - 1189 - /* Always use 64bit activation */ 1190 - writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_CLR); 1191 - 1192 - /* Clear port multiplier enable and resume bits */ 1193 - writel(PORT_CS_PM_EN | PORT_CS_RESUME, port + PORT_CTRL_CLR); 1194 1101 } 1195 1102 1196 - /* Turn on interrupts */ 1197 - writel(IRQ_STAT_4PORTS, host_base + HOST_CTRL); 1103 + sil24_init_controller(pdev, probe_ent->n_ports, probe_ent->host_flags, 1104 + host_base, port_base); 1198 1105 1199 1106 pci_set_master(pdev); 1200 1107