Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'rproc-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux

Pull remoteproc updates from Bjorn Andersson:
"Support for booting the iMX remoteprocs using MMIO, instead of SMCCC
is added. The iMX driver is also extended to support delivering
interrupts from an arbitrary number of vdev.

Support is added to the TI PRU driver, to allow GPMUX to be controlled
from DeviceTree.

The Qualcomm coredump collector is extended to fall back to generating
a full coredump, in the case that the loaded firmware doesn't support
generating minidump. The overly terse MD abbreviation of "MINIDUMP" is
expanded, to make the code easier on the eye.

The list of Qualcomm Sensor Low Power Island (SLPI) instances
supported is cleaned up, and SDM845 is added. SDM630/636/660 support
for the modem subsystem (mss) is added.

All the Qualcomm drivers are transitioned to of_reserved_mem_lookup()
instead of open coding the resolution of reserved-memory regions, to
gain handling of error cases. A couple of drivers are transitioned to
use devm_platform_ioremap_resource_byname().

The stm32 remoteproc driver's PM operations are updated to modern
macros, to avoid the "unused variable"-warning in some configurations.

Drivers are transitioned away from directly including of_device.h"

* tag 'rproc-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (23 commits)
remoteproc: pru: add support for configuring GPMUX based on client setup
remoteproc: stm32: fix incorrect optional pointers
remoteproc: imx_rproc: Switch iMX8MN/MP from SMCCC to MMIO
dt-bindings: remoteproc: imx_rproc: Support i.MX8MN/P MMIO
dt-bindings: remoteproc: qcom,msm8996-mss-pil: Fix 8996 clocks
remoteproc: qcom: pas: add SDM845 SLPI compatible
remoteproc: qcom: q6v5-mss: Add support for SDM630/636/660
dt-bindings: remoteproc: qcom,msm8996-mss-pil: Add SDM660 compatible
remoteproc: qcom: Expand MD_* as MINIDUMP_*
remoteproc: qcom: pas: refactor SLPI remoteproc init
dt-bindings: remoteproc: qcom: adsp: add qcom,sdm845-slpi-pas compatible
remoteproc: qcom: wcnss: use devm_platform_ioremap_resource_byname()
remoteproc: qcom: q6v5: use devm_platform_ioremap_resource_byname()
dt-bindings: remoteproc: qcom: sm6115-pas: Add QCM2290
remoteproc: qcom: Add full coredump fallback mechanism
remoteproc: core: Export the rproc coredump APIs
remoteproc: qcom: Use of_reserved_mem_lookup()
remoteproc: imx_rproc: iterate all notifiyids in rx callback
dt-bindings: remoteproc: qcom,adsp: bring back firmware-name
dt-bindings: remoteproc: qcom,sm8550-pas: require memory-region
...

+366 -177
+20
Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
··· 20 20 - fsl,imx7ulp-cm4 21 21 - fsl,imx8mm-cm4 22 22 - fsl,imx8mn-cm7 23 + - fsl,imx8mn-cm7-mmio 23 24 - fsl,imx8mp-cm7 25 + - fsl,imx8mp-cm7-mmio 24 26 - fsl,imx8mq-cm4 25 27 - fsl,imx8qm-cm4 26 28 - fsl,imx8qxp-cm4 ··· 72 70 description: 73 71 Specify CPU entry address for SCU enabled processor. 74 72 73 + fsl,iomuxc-gpr: 74 + $ref: /schemas/types.yaml#/definitions/phandle 75 + description: 76 + Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit. 77 + 75 78 fsl,resource-id: 76 79 $ref: /schemas/types.yaml#/definitions/uint32 77 80 description: ··· 85 78 86 79 required: 87 80 - compatible 81 + 82 + allOf: 83 + - if: 84 + properties: 85 + compatible: 86 + not: 87 + contains: 88 + enum: 89 + - fsl,imx8mn-cm7-mmio 90 + - fsl,imx8mp-cm7-mmio 91 + then: 92 + properties: 93 + fsl,iomuxc-gpr: false 88 94 89 95 additionalProperties: false 90 96
+24
Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
··· 26 26 - qcom,sdm660-adsp-pas 27 27 - qcom,sdm845-adsp-pas 28 28 - qcom,sdm845-cdsp-pas 29 + - qcom,sdm845-slpi-pas 29 30 30 31 reg: 31 32 maxItems: 1 ··· 45 44 maxItems: 1 46 45 description: Reference to the reserved-memory for the Hexagon core 47 46 47 + firmware-name: 48 + maxItems: 1 49 + description: Firmware name for the Hexagon core 50 + 48 51 required: 49 52 - compatible 53 + - memory-region 50 54 51 55 unevaluatedProperties: false 52 56 ··· 69 63 - qcom,msm8998-adsp-pas 70 64 - qcom,sdm845-adsp-pas 71 65 - qcom,sdm845-cdsp-pas 66 + - qcom,sdm845-slpi-pas 72 67 then: 73 68 properties: 74 69 clocks: ··· 111 104 - qcom,msm8998-slpi-pas 112 105 - qcom,sdm845-adsp-pas 113 106 - qcom,sdm845-cdsp-pas 107 + - qcom,sdm845-slpi-pas 114 108 then: 115 109 properties: 116 110 interrupts: ··· 164 156 - const: ssc_cx 165 157 required: 166 158 - px-supply 159 + 160 + - if: 161 + properties: 162 + compatible: 163 + enum: 164 + - qcom,sdm845-slpi-pas 165 + then: 166 + properties: 167 + power-domains: 168 + items: 169 + - description: LCX power domain 170 + - description: LMX power domain 171 + power-domain-names: 172 + items: 173 + - const: lcx 174 + - const: lmx 167 175 168 176 - if: 169 177 properties:
+7 -5
Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml
··· 19 19 enum: 20 20 - qcom,msm8996-mss-pil 21 21 - qcom,msm8998-mss-pil 22 + - qcom,sdm660-mss-pil 22 23 - qcom,sdm845-mss-pil 23 24 24 25 reg: ··· 216 215 - description: GCC MSS IFACE clock 217 216 - description: GCC MSS BUS clock 218 217 - description: GCC MSS MEM clock 219 - - description: RPMH XO clock 218 + - description: RPM XO clock 220 219 - description: GCC MSS GPLL0 clock 221 220 - description: GCC MSS SNOC_AXI clock 222 221 - description: GCC MSS MNOC_AXI clock 223 - - description: RPMH PNOC clock 224 - - description: GCC MSS PRNG clock 225 - - description: RPMH QDSS clock 222 + - description: RPM PNOC clock 223 + - description: RPM QDSS clock 226 224 clock-names: 227 225 items: 228 226 - const: iface ··· 245 245 - if: 246 246 properties: 247 247 compatible: 248 - const: qcom,msm8998-mss-pil 248 + enum: 249 + - qcom,msm8998-mss-pil 250 + - qcom,sdm660-mss-pil 249 251 then: 250 252 properties: 251 253 clocks:
-1
Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
··· 82 82 - clock-names 83 83 - interrupts 84 84 - interrupt-names 85 - - memory-region 86 85 - qcom,smem-states 87 86 - qcom,smem-state-names 88 87
+2 -1
Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml
··· 42 42 smd-edge: false 43 43 44 44 memory-region: 45 - minItems: 1 45 + maxItems: 1 46 46 description: Reference to the reserved-memory for the Hexagon core 47 47 48 48 firmware-name: ··· 52 52 required: 53 53 - compatible 54 54 - reg 55 + - memory-region 55 56 56 57 allOf: 57 58 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
+2 -1
Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml
··· 51 51 - const: mss 52 52 53 53 memory-region: 54 - minItems: 1 54 + maxItems: 1 55 55 description: Reference to the reserved-memory for the Hexagon core 56 56 57 57 qcom,qmp: ··· 67 67 required: 68 68 - compatible 69 69 - reg 70 + - memory-region 70 71 71 72 allOf: 72 73 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
+2 -1
Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml
··· 38 38 smd-edge: false 39 39 40 40 memory-region: 41 - minItems: 1 41 + maxItems: 1 42 42 description: Reference to the reserved-memory for the Hexagon core 43 43 44 44 firmware-name: ··· 48 48 required: 49 49 - compatible 50 50 - reg 51 + - memory-region 51 52 52 53 allOf: 53 54 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
+2 -1
Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml
··· 38 38 smd-edge: false 39 39 40 40 memory-region: 41 - minItems: 1 41 + maxItems: 1 42 42 description: Reference to the reserved-memory for the Hexagon core 43 43 44 44 firmware-name: ··· 48 48 required: 49 49 - compatible 50 50 - reg 51 + - memory-region 51 52 52 53 allOf: 53 54 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
+2 -1
Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml
··· 46 46 - const: mss 47 47 48 48 memory-region: 49 - minItems: 1 49 + maxItems: 1 50 50 description: Reference to the reserved-memory for the Hexagon core 51 51 52 52 qcom,qmp: ··· 62 62 required: 63 63 - compatible 64 64 - reg 65 + - memory-region 65 66 66 67 allOf: 67 68 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
+26 -13
Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml
··· 15 15 16 16 properties: 17 17 compatible: 18 - enum: 19 - - qcom,sm6115-adsp-pas 20 - - qcom,sm6115-cdsp-pas 21 - - qcom,sm6115-mpss-pas 18 + oneOf: 19 + - enum: 20 + - qcom,sm6115-adsp-pas 21 + - qcom,sm6115-cdsp-pas 22 + - qcom,sm6115-mpss-pas 23 + 24 + - items: 25 + - const: qcom,qcm2290-adsp-pas 26 + - const: qcom,sm6115-adsp-pas 27 + 28 + - items: 29 + - const: qcom,qcm2290-mpss-pas 30 + - const: qcom,sm6115-mpss-pas 22 31 23 32 reg: 24 33 maxItems: 1 ··· 41 32 - const: xo 42 33 43 34 memory-region: 44 - minItems: 1 35 + maxItems: 1 45 36 description: Reference to the reserved-memory for the Hexagon core 46 37 47 38 smd-edge: false ··· 53 44 required: 54 45 - compatible 55 46 - reg 47 + - memory-region 56 48 57 49 allOf: 58 50 - $ref: /schemas/remoteproc/qcom,pas-common.yaml# 59 51 - if: 60 52 properties: 61 53 compatible: 62 - enum: 63 - - qcom,sm6115-adsp-pas 64 - - qcom,sm6115-cdsp-pas 54 + contains: 55 + enum: 56 + - qcom,sm6115-adsp-pas 57 + - qcom,sm6115-cdsp-pas 65 58 then: 66 59 properties: 67 60 interrupts: ··· 80 69 - if: 81 70 properties: 82 71 compatible: 83 - enum: 84 - - qcom,sm6115-cdsp-pas 85 - - qcom,sm6115-mpss-pas 72 + contains: 73 + enum: 74 + - qcom,sm6115-cdsp-pas 75 + - qcom,sm6115-mpss-pas 86 76 then: 87 77 properties: 88 78 power-domains: ··· 96 84 - if: 97 85 properties: 98 86 compatible: 99 - enum: 100 - - qcom,sm6115-adsp-pas 87 + contains: 88 + enum: 89 + - qcom,sm6115-adsp-pas 101 90 then: 102 91 properties: 103 92 power-domains:
+2 -1
Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml
··· 36 36 description: Reference to the AOSS side-channel message RAM. 37 37 38 38 memory-region: 39 - minItems: 1 39 + maxItems: 1 40 40 description: Reference to the reserved-memory for the Hexagon core 41 41 42 42 smd-edge: false ··· 48 48 required: 49 49 - compatible 50 50 - reg 51 + - memory-region 51 52 52 53 allOf: 53 54 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
+2 -1
Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml
··· 40 40 description: Reference to the AOSS side-channel message RAM. 41 41 42 42 memory-region: 43 - minItems: 1 43 + maxItems: 1 44 44 description: Reference to the reserved-memory for the Hexagon core 45 45 46 46 smd-edge: false ··· 52 52 required: 53 53 - compatible 54 54 - reg 55 + - memory-region 55 56 56 57 allOf: 57 58 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
+2 -1
Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml
··· 43 43 smd-edge: false 44 44 45 45 memory-region: 46 - minItems: 1 46 + maxItems: 1 47 47 description: Reference to the reserved-memory for the Hexagon core 48 48 49 49 firmware-name: ··· 53 53 required: 54 54 - compatible 55 55 - reg 56 + - memory-region 56 57 57 58 allOf: 58 59 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
+1
Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml
··· 53 53 required: 54 54 - compatible 55 55 - reg 56 + - memory-region 56 57 57 58 allOf: 58 59 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
+1 -2
drivers/remoteproc/imx_dsp_rproc.c
··· 12 12 #include <linux/mailbox_client.h> 13 13 #include <linux/mfd/syscon.h> 14 14 #include <linux/module.h> 15 - #include <linux/of_address.h> 16 - #include <linux/of_device.h> 15 + #include <linux/of.h> 17 16 #include <linux/of_reserved_mem.h> 18 17 #include <linux/platform_device.h> 19 18 #include <linux/pm_domain.h>
+68 -5
drivers/remoteproc/imx_rproc.c
··· 13 13 #include <linux/mailbox_client.h> 14 14 #include <linux/mfd/syscon.h> 15 15 #include <linux/module.h> 16 + #include <linux/of.h> 16 17 #include <linux/of_address.h> 17 18 #include <linux/of_reserved_mem.h> 18 - #include <linux/of_device.h> 19 19 #include <linux/platform_device.h> 20 20 #include <linux/pm_domain.h> 21 21 #include <linux/regmap.h> ··· 39 39 | IMX7D_SW_M4C_RST) 40 40 #define IMX7D_M4_STOP (IMX7D_ENABLE_M4 | IMX7D_SW_M4C_RST | \ 41 41 IMX7D_SW_M4C_NON_SCLR_RST) 42 + 43 + #define IMX8M_M7_STOP (IMX7D_ENABLE_M4 | IMX7D_SW_M4C_RST) 44 + #define IMX8M_M7_POLL IMX7D_ENABLE_M4 45 + 46 + #define IMX8M_GPR22 0x58 47 + #define IMX8M_GPR22_CM7_CPUWAIT BIT(0) 42 48 43 49 /* Address: 0x020D8000 */ 44 50 #define IMX6SX_SRC_SCR 0x00 ··· 97 91 struct imx_rproc { 98 92 struct device *dev; 99 93 struct regmap *regmap; 94 + struct regmap *gpr; 100 95 struct rproc *rproc; 101 96 const struct imx_rproc_dcfg *dcfg; 102 97 struct imx_rproc_mem mem[IMX_RPROC_MEM_MAX]; ··· 292 285 { 0x80000000, 0x80000000, 0x60000000, 0 }, 293 286 }; 294 287 288 + static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn_mmio = { 289 + .src_reg = IMX7D_SRC_SCR, 290 + .src_mask = IMX7D_M4_RST_MASK, 291 + .src_start = IMX7D_M4_START, 292 + .src_stop = IMX8M_M7_STOP, 293 + .gpr_reg = IMX8M_GPR22, 294 + .gpr_wait = IMX8M_GPR22_CM7_CPUWAIT, 295 + .att = imx_rproc_att_imx8mn, 296 + .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn), 297 + .method = IMX_RPROC_MMIO, 298 + }; 299 + 295 300 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = { 296 301 .att = imx_rproc_att_imx8mn, 297 302 .att_size = ARRAY_SIZE(imx_rproc_att_imx8mn), ··· 384 365 385 366 switch (dcfg->method) { 386 367 case IMX_RPROC_MMIO: 387 - ret = regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask, 388 - dcfg->src_start); 368 + if (priv->gpr) { 369 + ret = regmap_clear_bits(priv->gpr, dcfg->gpr_reg, 370 + dcfg->gpr_wait); 371 + } else { 372 + ret = regmap_update_bits(priv->regmap, dcfg->src_reg, 373 + dcfg->src_mask, 374 + dcfg->src_start); 375 + } 389 376 break; 390 377 case IMX_RPROC_SMC: 391 378 arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_START, 0, 0, 0, 0, 0, 0, &res); ··· 420 395 421 396 switch (dcfg->method) { 422 397 case IMX_RPROC_MMIO: 398 + if (priv->gpr) { 399 + ret = regmap_set_bits(priv->gpr, dcfg->gpr_reg, 400 + dcfg->gpr_wait); 401 + if (ret) { 402 + dev_err(priv->dev, 403 + "Failed to quiescence M4 platform!\n"); 404 + return ret; 405 + } 406 + } 407 + 423 408 ret = regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask, 424 409 dcfg->src_stop); 425 410 break; ··· 760 725 return 0; 761 726 } 762 727 728 + static int imx_rproc_notified_idr_cb(int id, void *ptr, void *data) 729 + { 730 + struct rproc *rproc = data; 731 + 732 + rproc_vq_interrupt(rproc, id); 733 + 734 + return 0; 735 + } 736 + 763 737 static void imx_rproc_vq_work(struct work_struct *work) 764 738 { 765 739 struct imx_rproc *priv = container_of(work, struct imx_rproc, 766 740 rproc_work); 741 + struct rproc *rproc = priv->rproc; 767 742 768 - rproc_vq_interrupt(priv->rproc, 0); 769 - rproc_vq_interrupt(priv->rproc, 1); 743 + idr_for_each(&rproc->notifyids, imx_rproc_notified_idr_cb, rproc); 770 744 } 771 745 772 746 static void imx_rproc_rx_callback(struct mbox_client *cl, void *msg) ··· 1027 983 break; 1028 984 } 1029 985 986 + priv->gpr = syscon_regmap_lookup_by_phandle(dev->of_node, "fsl,iomuxc-gpr"); 987 + if (IS_ERR(priv->gpr)) 988 + priv->gpr = NULL; 989 + 1030 990 regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon"); 1031 991 if (IS_ERR(regmap)) { 1032 992 dev_err(dev, "failed to find syscon\n"); ··· 1039 991 1040 992 priv->regmap = regmap; 1041 993 regmap_attach_dev(dev, regmap, &config); 994 + 995 + if (priv->gpr) { 996 + ret = regmap_read(priv->gpr, dcfg->gpr_reg, &val); 997 + if (val & dcfg->gpr_wait) { 998 + /* 999 + * After cold boot, the CM indicates its in wait 1000 + * state, but not fully powered off. Power it off 1001 + * fully so firmware can be loaded into it. 1002 + */ 1003 + imx_rproc_stop(priv->rproc); 1004 + return 0; 1005 + } 1006 + } 1042 1007 1043 1008 ret = regmap_read(regmap, dcfg->src_reg, &val); 1044 1009 if (ret) { ··· 1194 1133 { .compatible = "fsl,imx8mm-cm4", .data = &imx_rproc_cfg_imx8mq }, 1195 1134 { .compatible = "fsl,imx8mn-cm7", .data = &imx_rproc_cfg_imx8mn }, 1196 1135 { .compatible = "fsl,imx8mp-cm7", .data = &imx_rproc_cfg_imx8mn }, 1136 + { .compatible = "fsl,imx8mn-cm7-mmio", .data = &imx_rproc_cfg_imx8mn_mmio }, 1137 + { .compatible = "fsl,imx8mp-cm7-mmio", .data = &imx_rproc_cfg_imx8mn_mmio }, 1197 1138 { .compatible = "fsl,imx8qxp-cm4", .data = &imx_rproc_cfg_imx8qxp }, 1198 1139 { .compatible = "fsl,imx8qm-cm4", .data = &imx_rproc_cfg_imx8qm }, 1199 1140 { .compatible = "fsl,imx8ulp-cm33", .data = &imx_rproc_cfg_imx8ulp },
+2
drivers/remoteproc/imx_rproc.h
··· 31 31 u32 src_mask; 32 32 u32 src_start; 33 33 u32 src_stop; 34 + u32 gpr_reg; 35 + u32 gpr_wait; 34 36 const struct imx_rproc_att *att; 35 37 size_t att_size; 36 38 enum imx_rproc_method method;
+2 -1
drivers/remoteproc/omap_remoteproc.c
··· 19 19 #include <linux/clk/ti.h> 20 20 #include <linux/err.h> 21 21 #include <linux/io.h> 22 - #include <linux/of_device.h> 22 + #include <linux/of.h> 23 + #include <linux/of_platform.h> 23 24 #include <linux/of_reserved_mem.h> 24 25 #include <linux/platform_device.h> 25 26 #include <linux/pm_runtime.h>
+24 -1
drivers/remoteproc/pru_rproc.c
··· 16 16 #include <linux/debugfs.h> 17 17 #include <linux/irqdomain.h> 18 18 #include <linux/module.h> 19 - #include <linux/of_device.h> 19 + #include <linux/of.h> 20 20 #include <linux/of_irq.h> 21 + #include <linux/platform_device.h> 21 22 #include <linux/remoteproc/pruss.h> 22 23 #include <linux/pruss_driver.h> 23 24 #include <linux/remoteproc.h> ··· 110 109 * @dbg_single_step: debug state variable to set PRU into single step mode 111 110 * @dbg_continuous: debug state variable to restore PRU execution mode 112 111 * @evt_count: number of mapped events 112 + * @gpmux_save: saved value for gpmux config 113 113 */ 114 114 struct pru_rproc { 115 115 int id; ··· 129 127 u32 dbg_single_step; 130 128 u32 dbg_continuous; 131 129 u8 evt_count; 130 + u8 gpmux_save; 132 131 }; 133 132 134 133 static inline u32 pru_control_read_reg(struct pru_rproc *pru, unsigned int reg) ··· 231 228 struct device *dev; 232 229 const char *fw_name; 233 230 int ret; 231 + u32 mux; 234 232 235 233 rproc = __pru_rproc_get(np, index); 236 234 if (IS_ERR(rproc)) ··· 255 251 256 252 if (pru_id) 257 253 *pru_id = pru->id; 254 + 255 + ret = pruss_cfg_get_gpmux(pru->pruss, pru->id, &pru->gpmux_save); 256 + if (ret) { 257 + dev_err(dev, "failed to get cfg gpmux: %d\n", ret); 258 + goto err; 259 + } 260 + 261 + /* An error here is acceptable for backward compatibility */ 262 + ret = of_property_read_u32_index(np, "ti,pruss-gp-mux-sel", index, 263 + &mux); 264 + if (!ret) { 265 + ret = pruss_cfg_set_gpmux(pru->pruss, pru->id, mux); 266 + if (ret) { 267 + dev_err(dev, "failed to set cfg gpmux: %d\n", ret); 268 + goto err; 269 + } 270 + } 258 271 259 272 ret = of_property_read_string_index(np, "firmware-name", index, 260 273 &fw_name); ··· 310 289 return; 311 290 312 291 pru = rproc->priv; 292 + 293 + pruss_cfg_set_gpmux(pru->pruss, pru->id, pru->gpmux_save); 313 294 314 295 pru_rproc_set_firmware(rproc, NULL); 315 296
+15 -6
drivers/remoteproc/qcom_common.c
··· 29 29 #define MAX_NUM_OF_SS 10 30 30 #define MAX_REGION_NAME_LENGTH 16 31 31 #define SBL_MINIDUMP_SMEM_ID 602 32 - #define MD_REGION_VALID ('V' << 24 | 'A' << 16 | 'L' << 8 | 'I' << 0) 33 - #define MD_SS_ENCR_DONE ('D' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) 34 - #define MD_SS_ENABLED ('E' << 24 | 'N' << 16 | 'B' << 8 | 'L' << 0) 32 + #define MINIDUMP_REGION_VALID ('V' << 24 | 'A' << 16 | 'L' << 8 | 'I' << 0) 33 + #define MINIDUMP_SS_ENCR_DONE ('D' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) 34 + #define MINIDUMP_SS_ENABLED ('E' << 24 | 'N' << 16 | 'B' << 8 | 'L' << 0) 35 35 36 36 /** 37 37 * struct minidump_region - Minidump region ··· 125 125 126 126 for (i = 0; i < seg_cnt; i++) { 127 127 memcpy_fromio(&region, ptr + i, sizeof(region)); 128 - if (le32_to_cpu(region.valid) == MD_REGION_VALID) { 128 + if (le32_to_cpu(region.valid) == MINIDUMP_REGION_VALID) { 129 129 name = kstrndup(region.name, MAX_REGION_NAME_LENGTH - 1, GFP_KERNEL); 130 130 if (!name) { 131 131 iounmap(ptr); ··· 168 168 */ 169 169 if (subsystem->regions_baseptr == 0 || 170 170 le32_to_cpu(subsystem->status) != 1 || 171 - le32_to_cpu(subsystem->enabled) != MD_SS_ENABLED || 172 - le32_to_cpu(subsystem->encryption_status) != MD_SS_ENCR_DONE) { 171 + le32_to_cpu(subsystem->enabled) != MINIDUMP_SS_ENABLED) { 172 + return rproc_coredump(rproc); 173 + } 174 + 175 + if (le32_to_cpu(subsystem->encryption_status) != MINIDUMP_SS_ENCR_DONE) { 173 176 dev_err(&rproc->dev, "Minidump not ready, skipping\n"); 174 177 return; 175 178 } 179 + 180 + /** 181 + * Clear out the dump segments populated by parse_fw before 182 + * re-populating them with minidump segments. 183 + */ 184 + rproc_coredump_cleanup(rproc); 176 185 177 186 ret = qcom_add_minidump_segments(rproc, subsystem, rproc_dumpfn_t); 178 187 if (ret) {
+12 -14
drivers/remoteproc/qcom_q6v5_adsp.c
··· 14 14 #include <linux/kernel.h> 15 15 #include <linux/mfd/syscon.h> 16 16 #include <linux/module.h> 17 - #include <linux/of_address.h> 18 - #include <linux/of_device.h> 17 + #include <linux/of.h> 18 + #include <linux/of_reserved_mem.h> 19 19 #include <linux/platform_device.h> 20 20 #include <linux/pm_domain.h> 21 21 #include <linux/pm_runtime.h> ··· 637 637 638 638 static int adsp_alloc_memory_region(struct qcom_adsp *adsp) 639 639 { 640 + struct reserved_mem *rmem = NULL; 640 641 struct device_node *node; 641 - struct resource r; 642 - int ret; 643 642 644 643 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0); 645 - if (!node) { 646 - dev_err(adsp->dev, "no memory-region specified\n"); 644 + if (node) 645 + rmem = of_reserved_mem_lookup(node); 646 + of_node_put(node); 647 + 648 + if (!rmem) { 649 + dev_err(adsp->dev, "unable to resolve memory-region\n"); 647 650 return -EINVAL; 648 651 } 649 652 650 - ret = of_address_to_resource(node, 0, &r); 651 - of_node_put(node); 652 - if (ret) 653 - return ret; 654 - 655 - adsp->mem_phys = adsp->mem_reloc = r.start; 656 - adsp->mem_size = resource_size(&r); 653 + adsp->mem_phys = adsp->mem_reloc = rmem->base; 654 + adsp->mem_size = rmem->size; 657 655 adsp->mem_region = devm_ioremap_wc(adsp->dev, 658 656 adsp->mem_phys, adsp->mem_size); 659 657 if (!adsp->mem_region) { 660 658 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n", 661 - &r.start, adsp->mem_size); 659 + &rmem->base, adsp->mem_size); 662 660 return -EBUSY; 663 661 } 664 662
+75 -20
drivers/remoteproc/qcom_q6v5_mss.c
··· 15 15 #include <linux/kernel.h> 16 16 #include <linux/mfd/syscon.h> 17 17 #include <linux/module.h> 18 - #include <linux/of_address.h> 19 - #include <linux/of_device.h> 18 + #include <linux/of.h> 20 19 #include <linux/of_reserved_mem.h> 20 + #include <linux/of_platform.h> 21 21 #include <linux/platform_device.h> 22 22 #include <linux/pm_domain.h> 23 23 #include <linux/pm_runtime.h> ··· 71 71 #define QDSP6SS_MEM_PWR_CTL 0x0B0 72 72 #define QDSP6V6SS_MEM_PWR_CTL 0x034 73 73 #define QDSP6SS_STRAP_ACC 0x110 74 + #define QDSP6V62SS_BHS_STATUS 0x0C4 74 75 75 76 /* AXI Halt Register Offsets */ 76 77 #define AXI_HALTREQ_REG 0x0 ··· 124 123 #define QDSP6v56_CLAMP_QMC_MEM BIT(22) 125 124 #define QDSP6SS_XO_CBCR 0x0038 126 125 #define QDSP6SS_ACC_OVERRIDE_VAL 0x20 126 + #define QDSP6v55_BHS_EN_REST_ACK BIT(0) 127 127 128 128 /* QDSP6v65 parameters */ 129 129 #define QDSP6SS_CORE_CBCR 0x20 ··· 132 130 #define QDSP6SS_BOOT_CORE_START 0x400 133 131 #define QDSP6SS_BOOT_CMD 0x404 134 132 #define BOOT_FSM_TIMEOUT 10000 133 + #define BHS_CHECK_MAX_LOOPS 200 135 134 136 135 struct reg_info { 137 136 struct regulator *reg; ··· 253 250 MSS_MSM8998, 254 251 MSS_SC7180, 255 252 MSS_SC7280, 253 + MSS_SDM660, 256 254 MSS_SDM845, 257 255 }; 258 256 ··· 704 700 } else if (qproc->version == MSS_MSM8909 || 705 701 qproc->version == MSS_MSM8953 || 706 702 qproc->version == MSS_MSM8996 || 707 - qproc->version == MSS_MSM8998) { 703 + qproc->version == MSS_MSM8998 || 704 + qproc->version == MSS_SDM660) { 708 705 709 706 if (qproc->version != MSS_MSM8909 && 710 707 qproc->version != MSS_MSM8953) ··· 739 734 val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); 740 735 udelay(1); 741 736 737 + if (qproc->version == MSS_SDM660) { 738 + ret = readl_relaxed_poll_timeout(qproc->reg_base + QDSP6V62SS_BHS_STATUS, 739 + i, (i & QDSP6v55_BHS_EN_REST_ACK), 740 + 1, BHS_CHECK_MAX_LOOPS); 741 + if (ret == -ETIMEDOUT) { 742 + dev_err(qproc->dev, "BHS_EN_REST_ACK not set!\n"); 743 + return -ETIMEDOUT; 744 + } 745 + } 746 + 742 747 /* Put LDO in bypass mode */ 743 748 val |= QDSP6v56_LDO_BYP; 744 749 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); ··· 771 756 mem_pwr_ctl = QDSP6SS_MEM_PWR_CTL; 772 757 i = 19; 773 758 } else { 774 - /* MSS_MSM8998 */ 759 + /* MSS_MSM8998, MSS_SDM660 */ 775 760 mem_pwr_ctl = QDSP6V6SS_MEM_PWR_CTL; 776 761 i = 28; 777 762 } ··· 1890 1875 struct device_node *child; 1891 1876 struct reserved_mem *rmem; 1892 1877 struct device_node *node; 1893 - struct resource r; 1894 - int ret; 1895 1878 1896 1879 /* 1897 1880 * In the absence of mba/mpss sub-child, extract the mba and mpss ··· 1904 1891 of_node_put(child); 1905 1892 } 1906 1893 1907 - ret = of_address_to_resource(node, 0, &r); 1908 - of_node_put(node); 1909 - if (ret) { 1910 - dev_err(qproc->dev, "unable to resolve mba region\n"); 1911 - return ret; 1894 + if (!node) { 1895 + dev_err(qproc->dev, "no mba memory-region specified\n"); 1896 + return -EINVAL; 1912 1897 } 1913 1898 1914 - qproc->mba_phys = r.start; 1915 - qproc->mba_size = resource_size(&r); 1899 + rmem = of_reserved_mem_lookup(node); 1900 + of_node_put(node); 1901 + if (!rmem) { 1902 + dev_err(qproc->dev, "unable to resolve mba region\n"); 1903 + return -EINVAL; 1904 + } 1905 + 1906 + qproc->mba_phys = rmem->base; 1907 + qproc->mba_size = rmem->size; 1916 1908 1917 1909 if (!child) { 1918 1910 node = of_parse_phandle(qproc->dev->of_node, ··· 1928 1910 of_node_put(child); 1929 1911 } 1930 1912 1931 - ret = of_address_to_resource(node, 0, &r); 1932 - of_node_put(node); 1933 - if (ret) { 1934 - dev_err(qproc->dev, "unable to resolve mpss region\n"); 1935 - return ret; 1913 + if (!node) { 1914 + dev_err(qproc->dev, "no mpss memory-region specified\n"); 1915 + return -EINVAL; 1936 1916 } 1937 1917 1938 - qproc->mpss_phys = qproc->mpss_reloc = r.start; 1939 - qproc->mpss_size = resource_size(&r); 1918 + rmem = of_reserved_mem_lookup(node); 1919 + of_node_put(node); 1920 + if (!rmem) { 1921 + dev_err(qproc->dev, "unable to resolve mpss region\n"); 1922 + return -EINVAL; 1923 + } 1924 + 1925 + qproc->mpss_phys = qproc->mpss_reloc = rmem->base; 1926 + qproc->mpss_size = rmem->size; 1940 1927 1941 1928 if (!child) { 1942 1929 node = of_parse_phandle(qproc->dev->of_node, "memory-region", 2); ··· 2212 2189 .has_ext_cntl_regs = true, 2213 2190 .has_vq6 = true, 2214 2191 .version = MSS_SC7280, 2192 + }; 2193 + 2194 + static const struct rproc_hexagon_res sdm660_mss = { 2195 + .hexagon_mba_image = "mba.mbn", 2196 + .proxy_clk_names = (char*[]){ 2197 + "xo", 2198 + "qdss", 2199 + "mem", 2200 + NULL 2201 + }, 2202 + .active_clk_names = (char*[]){ 2203 + "iface", 2204 + "bus", 2205 + "gpll0_mss", 2206 + "mnoc_axi", 2207 + "snoc_axi", 2208 + NULL 2209 + }, 2210 + .proxy_pd_names = (char*[]){ 2211 + "cx", 2212 + "mx", 2213 + NULL 2214 + }, 2215 + .need_mem_protection = true, 2216 + .has_alt_reset = false, 2217 + .has_mba_logs = false, 2218 + .has_spare_reg = false, 2219 + .has_qaccept_regs = false, 2220 + .has_ext_cntl_regs = false, 2221 + .has_vq6 = false, 2222 + .version = MSS_SDM660, 2215 2223 }; 2216 2224 2217 2225 static const struct rproc_hexagon_res sdm845_mss = { ··· 2527 2473 { .compatible = "qcom,msm8998-mss-pil", .data = &msm8998_mss}, 2528 2474 { .compatible = "qcom,sc7180-mss-pil", .data = &sc7180_mss}, 2529 2475 { .compatible = "qcom,sc7280-mss-pil", .data = &sc7280_mss}, 2476 + { .compatible = "qcom,sdm660-mss-pil", .data = &sdm660_mss}, 2530 2477 { .compatible = "qcom,sdm845-mss-pil", .data = &sdm845_mss}, 2531 2478 { }, 2532 2479 };
+38 -64
drivers/remoteproc/qcom_q6v5_pas.c
··· 13 13 #include <linux/interrupt.h> 14 14 #include <linux/kernel.h> 15 15 #include <linux/module.h> 16 + #include <linux/of.h> 16 17 #include <linux/of_address.h> 17 - #include <linux/of_device.h> 18 + #include <linux/of_reserved_mem.h> 18 19 #include <linux/platform_device.h> 19 20 #include <linux/pm_domain.h> 20 21 #include <linux/pm_runtime.h> ··· 426 425 .start = adsp_start, 427 426 .stop = adsp_stop, 428 427 .da_to_va = adsp_da_to_va, 428 + .parse_fw = qcom_register_dump_segments, 429 429 .load = adsp_load, 430 430 .panic = adsp_panic, 431 431 .coredump = adsp_minidump, ··· 535 533 536 534 static int adsp_alloc_memory_region(struct qcom_adsp *adsp) 537 535 { 536 + struct reserved_mem *rmem; 538 537 struct device_node *node; 539 - struct resource r; 540 - int ret; 541 538 542 539 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0); 543 540 if (!node) { ··· 544 543 return -EINVAL; 545 544 } 546 545 547 - ret = of_address_to_resource(node, 0, &r); 546 + rmem = of_reserved_mem_lookup(node); 548 547 of_node_put(node); 549 - if (ret) 550 - return ret; 548 + if (!rmem) { 549 + dev_err(adsp->dev, "unable to resolve memory-region\n"); 550 + return -EINVAL; 551 + } 551 552 552 - adsp->mem_phys = adsp->mem_reloc = r.start; 553 - adsp->mem_size = resource_size(&r); 553 + adsp->mem_phys = adsp->mem_reloc = rmem->base; 554 + adsp->mem_size = rmem->size; 554 555 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size); 555 556 if (!adsp->mem_region) { 556 557 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n", 557 - &r.start, adsp->mem_size); 558 + &rmem->base, adsp->mem_size); 558 559 return -EBUSY; 559 560 } 560 561 ··· 569 566 return -EINVAL; 570 567 } 571 568 572 - ret = of_address_to_resource(node, 0, &r); 573 - if (ret) 574 - return ret; 569 + rmem = of_reserved_mem_lookup(node); 570 + of_node_put(node); 571 + if (!rmem) { 572 + dev_err(adsp->dev, "unable to resolve dtb memory-region\n"); 573 + return -EINVAL; 574 + } 575 575 576 - adsp->dtb_mem_phys = adsp->dtb_mem_reloc = r.start; 577 - adsp->dtb_mem_size = resource_size(&r); 576 + adsp->dtb_mem_phys = adsp->dtb_mem_reloc = rmem->base; 577 + adsp->dtb_mem_size = rmem->size; 578 578 adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size); 579 579 if (!adsp->dtb_mem_region) { 580 580 dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n", 581 - &r.start, adsp->dtb_mem_size); 581 + &rmem->base, adsp->dtb_mem_size); 582 582 return -EBUSY; 583 583 } 584 584 ··· 590 584 591 585 static int adsp_assign_memory_region(struct qcom_adsp *adsp) 592 586 { 587 + struct reserved_mem *rmem = NULL; 593 588 struct qcom_scm_vmperm perm; 594 589 struct device_node *node; 595 - struct resource r; 596 590 int ret; 597 591 598 592 if (!adsp->region_assign_idx) 599 593 return 0; 600 594 601 595 node = of_parse_phandle(adsp->dev->of_node, "memory-region", adsp->region_assign_idx); 602 - if (!node) { 603 - dev_err(adsp->dev, "missing shareable memory-region\n"); 596 + if (node) 597 + rmem = of_reserved_mem_lookup(node); 598 + of_node_put(node); 599 + if (!rmem) { 600 + dev_err(adsp->dev, "unable to resolve shareable memory-region\n"); 604 601 return -EINVAL; 605 602 } 606 - 607 - ret = of_address_to_resource(node, 0, &r); 608 - if (ret) 609 - return ret; 610 603 611 604 perm.vmid = QCOM_SCM_VMID_MSS_MSA; 612 605 perm.perm = QCOM_SCM_PERM_RW; 613 606 614 - adsp->region_assign_phys = r.start; 615 - adsp->region_assign_size = resource_size(&r); 607 + adsp->region_assign_phys = rmem->base; 608 + adsp->region_assign_size = rmem->size; 616 609 adsp->region_assign_perms = BIT(QCOM_SCM_VMID_HLOS); 617 610 618 611 ret = qcom_scm_assign_mem(adsp->region_assign_phys, ··· 1017 1012 .ssctl_id = 0x12, 1018 1013 }; 1019 1014 1020 - static const struct adsp_data slpi_resource_init = { 1015 + static const struct adsp_data msm8996_slpi_resource_init = { 1021 1016 .crash_reason_smem = 424, 1022 1017 .firmware_name = "slpi.mdt", 1023 1018 .pas_id = 12, ··· 1031 1026 .ssctl_id = 0x16, 1032 1027 }; 1033 1028 1034 - static const struct adsp_data sm8150_slpi_resource = { 1029 + static const struct adsp_data sdm845_slpi_resource_init = { 1035 1030 .crash_reason_smem = 424, 1036 1031 .firmware_name = "slpi.mdt", 1037 1032 .pas_id = 12, ··· 1045 1040 .ssr_name = "dsps", 1046 1041 .sysmon_name = "slpi", 1047 1042 .ssctl_id = 0x16, 1048 - }; 1049 - 1050 - static const struct adsp_data sm8250_slpi_resource = { 1051 - .crash_reason_smem = 424, 1052 - .firmware_name = "slpi.mdt", 1053 - .pas_id = 12, 1054 - .auto_boot = true, 1055 - .proxy_pd_names = (char*[]){ 1056 - "lcx", 1057 - "lmx", 1058 - NULL 1059 - }, 1060 - .load_state = "slpi", 1061 - .ssr_name = "dsps", 1062 - .sysmon_name = "slpi", 1063 - .ssctl_id = 0x16, 1064 - }; 1065 - 1066 - static const struct adsp_data sm8350_slpi_resource = { 1067 - .crash_reason_smem = 424, 1068 - .firmware_name = "slpi.mdt", 1069 - .pas_id = 12, 1070 - .auto_boot = true, 1071 - .proxy_pd_names = (char*[]){ 1072 - "lcx", 1073 - "lmx", 1074 - NULL 1075 - }, 1076 - .load_state = "slpi", 1077 - .ssr_name = "dsps", 1078 - .sysmon_name = "slpi", 1079 - .ssctl_id = 0x16, 1080 1043 }; 1081 1044 1082 1045 static const struct adsp_data wcss_resource_init = { ··· 1155 1182 { .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource}, 1156 1183 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init}, 1157 1184 { .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource}, 1158 - { .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init}, 1185 + { .compatible = "qcom,msm8996-slpi-pil", .data = &msm8996_slpi_resource_init}, 1159 1186 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource}, 1160 - { .compatible = "qcom,msm8998-slpi-pas", .data = &slpi_resource_init}, 1187 + { .compatible = "qcom,msm8998-slpi-pas", .data = &msm8996_slpi_resource_init}, 1161 1188 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init }, 1162 1189 { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init }, 1163 1190 { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init }, ··· 1172 1199 { .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init}, 1173 1200 { .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init}, 1174 1201 { .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init}, 1202 + { .compatible = "qcom,sdm845-slpi-pas", .data = &sdm845_slpi_resource_init}, 1175 1203 { .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource}, 1176 1204 { .compatible = "qcom,sm6115-adsp-pas", .data = &adsp_resource_init}, 1177 1205 { .compatible = "qcom,sm6115-cdsp-pas", .data = &cdsp_resource_init}, ··· 1183 1209 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource}, 1184 1210 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource}, 1185 1211 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init}, 1186 - { .compatible = "qcom,sm8150-slpi-pas", .data = &sm8150_slpi_resource}, 1212 + { .compatible = "qcom,sm8150-slpi-pas", .data = &sdm845_slpi_resource_init}, 1187 1213 { .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource}, 1188 1214 { .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource}, 1189 - { .compatible = "qcom,sm8250-slpi-pas", .data = &sm8250_slpi_resource}, 1215 + { .compatible = "qcom,sm8250-slpi-pas", .data = &sdm845_slpi_resource_init}, 1190 1216 { .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource}, 1191 1217 { .compatible = "qcom,sm8350-cdsp-pas", .data = &sm8350_cdsp_resource}, 1192 - { .compatible = "qcom,sm8350-slpi-pas", .data = &sm8350_slpi_resource}, 1218 + { .compatible = "qcom,sm8350-slpi-pas", .data = &sdm845_slpi_resource_init}, 1193 1219 { .compatible = "qcom,sm8350-mpss-pas", .data = &mpss_resource_init}, 1194 1220 { .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource}, 1195 1221 { .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource}, 1196 - { .compatible = "qcom,sm8450-slpi-pas", .data = &sm8350_slpi_resource}, 1222 + { .compatible = "qcom,sm8450-slpi-pas", .data = &sdm845_slpi_resource_init}, 1197 1223 { .compatible = "qcom,sm8450-mpss-pas", .data = &sm8450_mpss_resource}, 1198 1224 { .compatible = "qcom,sm8550-adsp-pas", .data = &sm8550_adsp_resource}, 1199 1225 { .compatible = "qcom,sm8550-cdsp-pas", .data = &sm8550_cdsp_resource},
+1 -2
drivers/remoteproc/qcom_q6v5_wcss.c
··· 837 837 return -ENOMEM; 838 838 839 839 if (wcss->version == WCSS_IPQ8074) { 840 - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rmb"); 841 - wcss->rmb_base = devm_ioremap_resource(&pdev->dev, res); 840 + wcss->rmb_base = devm_platform_ioremap_resource_byname(pdev, "rmb"); 842 841 if (IS_ERR(wcss->rmb_base)) 843 842 return PTR_ERR(wcss->rmb_base); 844 843 }
-1
drivers/remoteproc/qcom_sysmon.c
··· 9 9 #include <linux/interrupt.h> 10 10 #include <linux/io.h> 11 11 #include <linux/of_irq.h> 12 - #include <linux/of_platform.h> 13 12 #include <linux/platform_device.h> 14 13 #include <linux/remoteproc/qcom_rproc.h> 15 14 #include <linux/rpmsg.h>
+13 -17
drivers/remoteproc/qcom_wcnss.c
··· 14 14 #include <linux/kernel.h> 15 15 #include <linux/module.h> 16 16 #include <linux/io.h> 17 - #include <linux/of_address.h> 18 - #include <linux/of_device.h> 17 + #include <linux/of.h> 18 + #include <linux/of_reserved_mem.h> 19 19 #include <linux/platform_device.h> 20 20 #include <linux/pm_domain.h> 21 21 #include <linux/pm_runtime.h> ··· 506 506 507 507 static int wcnss_alloc_memory_region(struct qcom_wcnss *wcnss) 508 508 { 509 + struct reserved_mem *rmem = NULL; 509 510 struct device_node *node; 510 - struct resource r; 511 - int ret; 512 511 513 512 node = of_parse_phandle(wcnss->dev->of_node, "memory-region", 0); 514 - if (!node) { 515 - dev_err(wcnss->dev, "no memory-region specified\n"); 513 + if (node) 514 + rmem = of_reserved_mem_lookup(node); 515 + of_node_put(node); 516 + 517 + if (!rmem) { 518 + dev_err(wcnss->dev, "unable to resolve memory-region\n"); 516 519 return -EINVAL; 517 520 } 518 521 519 - ret = of_address_to_resource(node, 0, &r); 520 - of_node_put(node); 521 - if (ret) 522 - return ret; 523 - 524 - wcnss->mem_phys = wcnss->mem_reloc = r.start; 525 - wcnss->mem_size = resource_size(&r); 522 + wcnss->mem_phys = wcnss->mem_reloc = rmem->base; 523 + wcnss->mem_size = rmem->size; 526 524 wcnss->mem_region = devm_ioremap_wc(wcnss->dev, wcnss->mem_phys, wcnss->mem_size); 527 525 if (!wcnss->mem_region) { 528 526 dev_err(wcnss->dev, "unable to map memory region: %pa+%zx\n", 529 - &r.start, wcnss->mem_size); 527 + &rmem->base, wcnss->mem_size); 530 528 return -EBUSY; 531 529 } 532 530 ··· 536 538 const char *fw_name = WCNSS_FIRMWARE_NAME; 537 539 const struct wcnss_data *data; 538 540 struct qcom_wcnss *wcnss; 539 - struct resource *res; 540 541 struct rproc *rproc; 541 542 void __iomem *mmio; 542 543 int ret; ··· 573 576 574 577 mutex_init(&wcnss->iris_lock); 575 578 576 - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pmu"); 577 - mmio = devm_ioremap_resource(&pdev->dev, res); 579 + mmio = devm_platform_ioremap_resource_byname(pdev, "pmu"); 578 580 if (IS_ERR(mmio)) { 579 581 ret = PTR_ERR(mmio); 580 582 goto free_rproc;
+1
drivers/remoteproc/qcom_wcnss_iris.c
··· 10 10 #include <linux/clk.h> 11 11 #include <linux/kernel.h> 12 12 #include <linux/module.h> 13 + #include <linux/of.h> 13 14 #include <linux/of_device.h> 14 15 #include <linux/platform_device.h> 15 16 #include <linux/regulator/consumer.h>
+2 -1
drivers/remoteproc/rcar_rproc.c
··· 5 5 6 6 #include <linux/limits.h> 7 7 #include <linux/module.h> 8 - #include <linux/of_device.h> 8 + #include <linux/of.h> 9 9 #include <linux/of_reserved_mem.h> 10 + #include <linux/platform_device.h> 10 11 #include <linux/pm_runtime.h> 11 12 #include <linux/remoteproc.h> 12 13 #include <linux/reset.h>
+2
drivers/remoteproc/remoteproc_coredump.c
··· 32 32 kfree(entry); 33 33 } 34 34 } 35 + EXPORT_SYMBOL_GPL(rproc_coredump_cleanup); 35 36 36 37 /** 37 38 * rproc_coredump_add_segment() - add segment of device memory to coredump ··· 328 327 */ 329 328 wait_for_completion(&dump_state.dump_done); 330 329 } 330 + EXPORT_SYMBOL_GPL(rproc_coredump); 331 331 332 332 /** 333 333 * rproc_coredump_using_sections() - perform coredump using section headers
-4
drivers/remoteproc/remoteproc_internal.h
··· 76 76 int rproc_init_sysfs(void); 77 77 void rproc_exit_sysfs(void); 78 78 79 - /* from remoteproc_coredump.c */ 80 - void rproc_coredump_cleanup(struct rproc *rproc); 81 - void rproc_coredump(struct rproc *rproc); 82 - 83 79 #ifdef CONFIG_REMOTEPROC_CDEV 84 80 void rproc_init_cdev(void); 85 81 void rproc_exit_cdev(void);
-1
drivers/remoteproc/st_slim_rproc.c
··· 12 12 #include <linux/kernel.h> 13 13 #include <linux/module.h> 14 14 #include <linux/of.h> 15 - #include <linux/of_device.h> 16 15 #include <linux/platform_device.h> 17 16 #include <linux/remoteproc.h> 18 17 #include <linux/remoteproc/st_slim_rproc.h>
+8 -8
drivers/remoteproc/stm32_rproc.c
··· 12 12 #include <linux/mailbox_client.h> 13 13 #include <linux/mfd/syscon.h> 14 14 #include <linux/module.h> 15 - #include <linux/of_address.h> 16 - #include <linux/of_device.h> 15 + #include <linux/of.h> 17 16 #include <linux/of_reserved_mem.h> 17 + #include <linux/platform_device.h> 18 18 #include <linux/pm_wakeirq.h> 19 19 #include <linux/regmap.h> 20 20 #include <linux/remoteproc.h> ··· 921 921 rproc_free(rproc); 922 922 } 923 923 924 - static int __maybe_unused stm32_rproc_suspend(struct device *dev) 924 + static int stm32_rproc_suspend(struct device *dev) 925 925 { 926 926 struct rproc *rproc = dev_get_drvdata(dev); 927 927 struct stm32_rproc *ddata = rproc->priv; ··· 932 932 return 0; 933 933 } 934 934 935 - static int __maybe_unused stm32_rproc_resume(struct device *dev) 935 + static int stm32_rproc_resume(struct device *dev) 936 936 { 937 937 struct rproc *rproc = dev_get_drvdata(dev); 938 938 struct stm32_rproc *ddata = rproc->priv; ··· 943 943 return 0; 944 944 } 945 945 946 - static SIMPLE_DEV_PM_OPS(stm32_rproc_pm_ops, 947 - stm32_rproc_suspend, stm32_rproc_resume); 946 + static DEFINE_SIMPLE_DEV_PM_OPS(stm32_rproc_pm_ops, 947 + stm32_rproc_suspend, stm32_rproc_resume); 948 948 949 949 static struct platform_driver stm32_rproc_driver = { 950 950 .probe = stm32_rproc_probe, 951 951 .remove_new = stm32_rproc_remove, 952 952 .driver = { 953 953 .name = "stm32-rproc", 954 - .pm = &stm32_rproc_pm_ops, 955 - .of_match_table = of_match_ptr(stm32_rproc_match), 954 + .pm = pm_ptr(&stm32_rproc_pm_ops), 955 + .of_match_table = stm32_rproc_match, 956 956 }, 957 957 }; 958 958 module_platform_driver(stm32_rproc_driver);
+1 -1
drivers/remoteproc/ti_k3_dsp_remoteproc.c
··· 9 9 #include <linux/io.h> 10 10 #include <linux/mailbox_client.h> 11 11 #include <linux/module.h> 12 - #include <linux/of_device.h> 12 + #include <linux/of.h> 13 13 #include <linux/of_reserved_mem.h> 14 14 #include <linux/omap-mailbox.h> 15 15 #include <linux/platform_device.h>
+2 -1
drivers/remoteproc/ti_k3_r5_remoteproc.c
··· 12 12 #include <linux/kernel.h> 13 13 #include <linux/mailbox_client.h> 14 14 #include <linux/module.h> 15 + #include <linux/of.h> 15 16 #include <linux/of_address.h> 16 - #include <linux/of_device.h> 17 17 #include <linux/of_reserved_mem.h> 18 + #include <linux/of_platform.h> 18 19 #include <linux/omap-mailbox.h> 19 20 #include <linux/platform_device.h> 20 21 #include <linux/pm_runtime.h>
+1 -1
drivers/remoteproc/wkup_m3_rproc.c
··· 12 12 #include <linux/interrupt.h> 13 13 #include <linux/kernel.h> 14 14 #include <linux/module.h> 15 - #include <linux/of_device.h> 15 + #include <linux/of.h> 16 16 #include <linux/of_address.h> 17 17 #include <linux/platform_device.h> 18 18 #include <linux/pm_runtime.h>
+4
include/linux/remoteproc.h
··· 690 690 int rproc_set_firmware(struct rproc *rproc, const char *fw_name); 691 691 void rproc_report_crash(struct rproc *rproc, enum rproc_crash_type type); 692 692 void *rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem); 693 + 694 + /* from remoteproc_coredump.c */ 695 + void rproc_coredump_cleanup(struct rproc *rproc); 696 + void rproc_coredump(struct rproc *rproc); 693 697 void rproc_coredump_using_sections(struct rproc *rproc); 694 698 int rproc_coredump_add_segment(struct rproc *rproc, dma_addr_t da, size_t size); 695 699 int rproc_coredump_add_custom_segment(struct rproc *rproc,