Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

reset: uniphier: add PXs3 reset data

Add basic reset data for Socionext's new SoC PXs3.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

authored by

Masahiro Yamada and committed by
Philipp Zabel
2a158f88 7f4fbf79

+29
+3
Documentation/devicetree/bindings/reset/uniphier-reset.txt
··· 13 13 "socionext,uniphier-pxs2-reset" - for PXs2/LD6b SoC 14 14 "socionext,uniphier-ld11-reset" - for LD11 SoC 15 15 "socionext,uniphier-ld20-reset" - for LD20 SoC 16 + "socionext,uniphier-pxs3-reset" - for PXs3 SoC 16 17 - #reset-cells: should be 1. 17 18 18 19 Example: ··· 45 44 "socionext,uniphier-ld11-mio-reset" - for LD11 SoC (MIO) 46 45 "socionext,uniphier-ld11-sd-reset" - for LD11 SoC (SD) 47 46 "socionext,uniphier-ld20-sd-reset" - for LD20 SoC 47 + "socionext,uniphier-pxs3-sd-reset" - for PXs3 SoC 48 48 - #reset-cells: should be 1. 49 49 50 50 Example: ··· 76 74 "socionext,uniphier-pxs2-peri-reset" - for PXs2/LD6b SoC 77 75 "socionext,uniphier-ld11-peri-reset" - for LD11 SoC 78 76 "socionext,uniphier-ld20-peri-reset" - for LD20 SoC 77 + "socionext,uniphier-pxs3-peri-reset" - for PXs3 SoC 79 78 - #reset-cells: should be 1. 80 79 81 80 Example:
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drivers/reset/reset-uniphier.c
··· 118 118 UNIPHIER_RESET_END, 119 119 }; 120 120 121 + static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = { 122 + UNIPHIER_RESETX(2, 0x200c, 0), /* NAND */ 123 + UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */ 124 + UNIPHIER_RESETX(8, 0x200c, 12), /* STDMAC */ 125 + UNIPHIER_RESETX(12, 0x200c, 4), /* USB30 link (GIO0) */ 126 + UNIPHIER_RESETX(13, 0x200c, 5), /* USB31 link (GIO1) */ 127 + UNIPHIER_RESETX(16, 0x200c, 16), /* USB30-PHY0 */ 128 + UNIPHIER_RESETX(17, 0x200c, 18), /* USB30-PHY1 */ 129 + UNIPHIER_RESETX(18, 0x200c, 20), /* USB30-PHY2 */ 130 + UNIPHIER_RESETX(20, 0x200c, 17), /* USB31-PHY0 */ 131 + UNIPHIER_RESETX(21, 0x200c, 19), /* USB31-PHY1 */ 132 + UNIPHIER_RESET_END, 133 + }; 134 + 121 135 /* Media I/O reset data */ 122 136 #define UNIPHIER_MIO_RESET_SD(id, ch) \ 123 137 UNIPHIER_RESETX((id), 0x110 + 0x200 * (ch), 0) ··· 377 363 .compatible = "socionext,uniphier-ld20-reset", 378 364 .data = uniphier_ld20_sys_reset_data, 379 365 }, 366 + { 367 + .compatible = "socionext,uniphier-pxs3-reset", 368 + .data = uniphier_pxs3_sys_reset_data, 369 + }, 380 370 /* Media I/O reset, SD reset */ 381 371 { 382 372 .compatible = "socionext,uniphier-ld4-mio-reset", ··· 414 396 .compatible = "socionext,uniphier-ld20-sd-reset", 415 397 .data = uniphier_pro5_sd_reset_data, 416 398 }, 399 + { 400 + .compatible = "socionext,uniphier-pxs3-sd-reset", 401 + .data = uniphier_pro5_sd_reset_data, 402 + }, 417 403 /* Peripheral reset */ 418 404 { 419 405 .compatible = "socionext,uniphier-ld4-peri-reset", ··· 445 423 }, 446 424 { 447 425 .compatible = "socionext,uniphier-ld20-peri-reset", 426 + .data = uniphier_pro4_peri_reset_data, 427 + }, 428 + { 429 + .compatible = "socionext,uniphier-pxs3-peri-reset", 448 430 .data = uniphier_pro4_peri_reset_data, 449 431 }, 450 432 /* Analog signal amplifiers reset */