tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'xgene-2nd-10gbe-port'
Iyappan Subramanian says:
====================
driver: net: xgene: Enable 2nd 10GbE port on APM X-Gene SoC
This patch adds support for 2nd 10GbE on APM X-Gene SoC
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
+47
-5
+28
arch/arm64/boot/dts/apm/apm-storm.dtsi
+28
arch/arm64/boot/dts/apm/apm-storm.dtsi
···
207
207
clock-output-names = "xge0clk";
208
208
};
209
209
210
+
xge1clk: xge1clk@1f62c000 {
211
+
compatible = "apm,xgene-device-clock";
212
+
status = "disabled";
213
+
#clock-cells = <1>;
214
+
clocks = <&socplldiv2 0>;
215
+
reg = <0x0 0x1f62c000 0x0 0x1000>;
216
+
reg-names = "csr-reg";
217
+
csr-mask = <0x3>;
218
+
clock-output-names = "xge1clk";
219
+
};
220
+
210
221
sataphy1clk: sataphy1clk@1f21c000 {
211
222
compatible = "apm,xgene-device-clock";
212
223
#clock-cells = <1>;
···
822
811
<0x0 0x61 0x4>;
823
812
dma-coherent;
824
813
clocks = <&xge0clk 0>;
814
+
/* mac address will be overwritten by the bootloader */
815
+
local-mac-address = [00 00 00 00 00 00];
816
+
phy-connection-type = "xgmii";
817
+
};
818
+
819
+
xgenet1: ethernet@1f620000 {
820
+
compatible = "apm,xgene1-xgenet";
821
+
status = "disabled";
822
+
reg = <0x0 0x1f620000 0x0 0xd100>,
823
+
<0x0 0x1f600000 0x0 0Xc300>,
824
+
<0x0 0x18000000 0x0 0X8000>;
825
+
reg-names = "enet_csr", "ring_csr", "ring_cmd";
826
+
interrupts = <0x0 0x6C 0x4>,
827
+
<0x0 0x6D 0x4>;
828
+
port-id = <1>;
829
+
dma-coherent;
830
+
clocks = <&xge1clk 0>;
825
831
/* mac address will be overwritten by the bootloader */
826
832
local-mac-address = [00 00 00 00 00 00];
827
833
phy-connection-type = "xgmii";
+2
-1
drivers/net/ethernet/apm/xgene/xgene_enet_hw.c
+2
-1
drivers/net/ethernet/apm/xgene/xgene_enet_hw.c
···
107
107
{
108
108
xgene_enet_ring_set_type(ring);
109
109
110
-
if (xgene_enet_ring_owner(ring->id) == RING_OWNER_ETH0)
110
+
if (xgene_enet_ring_owner(ring->id) == RING_OWNER_ETH0 ||
111
+
xgene_enet_ring_owner(ring->id) == RING_OWNER_ETH1)
111
112
xgene_enet_ring_set_recombbuf(ring);
112
113
113
114
xgene_enet_ring_init(ring);
+12
-4
drivers/net/ethernet/apm/xgene/xgene_enet_main.c
+12
-4
drivers/net/ethernet/apm/xgene/xgene_enet_main.c
···
1305
1305
pdata->ring_num = START_RING_NUM_0;
1306
1306
break;
1307
1307
case 1:
1308
-
pdata->cpu_bufnum = START_CPU_BUFNUM_1;
1309
-
pdata->eth_bufnum = START_ETH_BUFNUM_1;
1310
-
pdata->bp_bufnum = START_BP_BUFNUM_1;
1311
-
pdata->ring_num = START_RING_NUM_1;
1308
+
if (pdata->phy_mode == PHY_INTERFACE_MODE_XGMII) {
1309
+
pdata->cpu_bufnum = XG_START_CPU_BUFNUM_1;
1310
+
pdata->eth_bufnum = XG_START_ETH_BUFNUM_1;
1311
+
pdata->bp_bufnum = XG_START_BP_BUFNUM_1;
1312
+
pdata->ring_num = XG_START_RING_NUM_1;
1313
+
} else {
1314
+
pdata->cpu_bufnum = START_CPU_BUFNUM_1;
1315
+
pdata->eth_bufnum = START_ETH_BUFNUM_1;
1316
+
pdata->bp_bufnum = START_BP_BUFNUM_1;
1317
+
pdata->ring_num = START_RING_NUM_1;
1318
+
}
1312
1319
break;
1313
1320
default:
1314
1321
break;
···
1485
1478
{ "APMC0D05", XGENE_ENET1},
1486
1479
{ "APMC0D30", XGENE_ENET1},
1487
1480
{ "APMC0D31", XGENE_ENET1},
1481
+
{ "APMC0D3F", XGENE_ENET1},
1488
1482
{ "APMC0D26", XGENE_ENET2},
1489
1483
{ "APMC0D25", XGENE_ENET2},
1490
1484
{ }
+5
drivers/net/ethernet/apm/xgene/xgene_enet_main.h
+5
drivers/net/ethernet/apm/xgene/xgene_enet_main.h
···
56
56
#define START_BP_BUFNUM_1 0x2A
57
57
#define START_RING_NUM_1 264
58
58
59
+
#define XG_START_CPU_BUFNUM_1 12
60
+
#define XG_START_ETH_BUFNUM_1 2
61
+
#define XG_START_BP_BUFNUM_1 0x22
62
+
#define XG_START_RING_NUM_1 264
63
+
59
64
#define X2_START_CPU_BUFNUM_0 0
60
65
#define X2_START_ETH_BUFNUM_0 0
61
66
#define X2_START_BP_BUFNUM_0 0x20