Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

m68k: Remove the broken Hades support

This patch removes the Hades support that was marked as BROKEN 5 years ago.

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by

Adrian Bunk and committed by
Linus Torvalds
29c8a246 7477fb6f

+23 -1000
-13
arch/m68k/Kconfig
··· 122 122 this kernel on an Atari, say Y here and browse the material 123 123 available in <file:Documentation/m68k>; otherwise say N. 124 124 125 - config HADES 126 - bool "Hades support" 127 - depends on ATARI && BROKEN 128 - help 129 - This option enables support for the Hades Atari clone. If you plan 130 - to use this kernel on a Hades, say Y here; otherwise say N. 131 - 132 125 config PCI 133 126 bool 134 - depends on HADES 135 - default y 136 127 help 137 - Find out whether you have a PCI motherboard. PCI is the name of a 138 - bus system, i.e. the way the CPU talks to the other stuff inside 139 - your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or 140 - VESA. If you have PCI, say Y, otherwise N. 141 128 142 129 config MAC 143 130 bool "Macintosh support"
-3
arch/m68k/atari/Makefile
··· 5 5 obj-y := config.o time.o debug.o ataints.o stdma.o \ 6 6 atasound.o stram.o 7 7 8 - ifeq ($(CONFIG_PCI),y) 9 - obj-$(CONFIG_HADES) += hades-pci.o 10 - endif 11 8 obj-$(CONFIG_ATARI_KBD_CORE) += atakeyb.o
+2 -4
arch/m68k/atari/ataints.c
··· 407 407 * gets overruns) 408 408 */ 409 409 410 - if (!MACH_IS_HADES) { 411 - vectors[VEC_INT2] = falcon_hblhandler; 412 - vectors[VEC_INT4] = falcon_hblhandler; 413 - } 410 + vectors[VEC_INT2] = falcon_hblhandler; 411 + vectors[VEC_INT4] = falcon_hblhandler; 414 412 } 415 413 416 414 if (ATARIHW_PRESENT(PCM_8BIT) && ATARIHW_PRESENT(MICROWIRE)) {
+12 -25
arch/m68k/atari/config.c
··· 231 231 */ 232 232 233 233 printk("Atari hardware found: "); 234 - if (MACH_IS_MEDUSA || MACH_IS_HADES) { 234 + if (MACH_IS_MEDUSA) { 235 235 /* There's no Atari video hardware on the Medusa, but all the 236 236 * addresses below generate a DTACK so no bus error occurs! */ 237 237 } else if (hwreg_present(f030_xreg)) { ··· 269 269 ATARIHW_SET(SCSI_DMA); 270 270 printk("TT_SCSI_DMA "); 271 271 } 272 - if (!MACH_IS_HADES && hwreg_present(&st_dma.dma_hi)) { 273 - ATARIHW_SET(STND_DMA); 274 - printk("STND_DMA "); 275 - } 276 272 /* 277 273 * The ST-DMA address registers aren't readable 278 274 * on all Medusas, so the test below may fail ··· 290 294 ATARIHW_SET(YM_2149); 291 295 printk("YM2149 "); 292 296 } 293 - if (!MACH_IS_MEDUSA && !MACH_IS_HADES && 294 - hwreg_present(&tt_dmasnd.ctrl)) { 297 + if (!MACH_IS_MEDUSA && hwreg_present(&tt_dmasnd.ctrl)) { 295 298 ATARIHW_SET(PCM_8BIT); 296 299 printk("PCM "); 297 300 } 298 - if (!MACH_IS_HADES && hwreg_present(&falcon_codec.unused5)) { 301 + if (hwreg_present(&falcon_codec.unused5)) { 299 302 ATARIHW_SET(CODEC); 300 303 printk("CODEC "); 301 304 } ··· 308 313 (tt_scc_dma.dma_ctrl = 0x01, (tt_scc_dma.dma_ctrl & 1) == 1) && 309 314 (tt_scc_dma.dma_ctrl = 0x00, (tt_scc_dma.dma_ctrl & 1) == 0) 310 315 #else 311 - !MACH_IS_MEDUSA && !MACH_IS_HADES 316 + !MACH_IS_MEDUSA 312 317 #endif 313 318 ) { 314 319 ATARIHW_SET(SCC_DMA); ··· 322 327 ATARIHW_SET(ST_ESCC); 323 328 printk("ST_ESCC "); 324 329 } 325 - if (MACH_IS_HADES) { 326 - ATARIHW_SET(VME); 327 - printk("VME "); 328 - } else if (hwreg_present(&tt_scu.sys_mask)) { 330 + if (hwreg_present(&tt_scu.sys_mask)) { 329 331 ATARIHW_SET(SCU); 330 332 /* Assume a VME bus if there's a SCU */ 331 333 ATARIHW_SET(VME); ··· 332 340 ATARIHW_SET(ANALOG_JOY); 333 341 printk("ANALOG_JOY "); 334 342 } 335 - if (!MACH_IS_HADES && hwreg_present(blitter.halftone)) { 343 + if (hwreg_present(blitter.halftone)) { 336 344 ATARIHW_SET(BLITTER); 337 345 printk("BLITTER "); 338 346 } ··· 341 349 printk("IDE "); 342 350 } 343 351 #if 1 /* This maybe wrong */ 344 - if (!MACH_IS_MEDUSA && !MACH_IS_HADES && 345 - hwreg_present(&tt_microwire.data) && 352 + if (!MACH_IS_MEDUSA && hwreg_present(&tt_microwire.data) && 346 353 hwreg_present(&tt_microwire.mask) && 347 354 (tt_microwire.mask = 0x7ff, 348 355 udelay(1), ··· 360 369 mach_hwclk = atari_tt_hwclk; 361 370 mach_set_clock_mmss = atari_tt_set_clock_mmss; 362 371 } 363 - if (!MACH_IS_HADES && hwreg_present(&mste_rtc.sec_ones)) { 372 + if (hwreg_present(&mste_rtc.sec_ones)) { 364 373 ATARIHW_SET(MSTE_CLK); 365 374 printk("MSTE_CLK "); 366 375 mach_hwclk = atari_mste_hwclk; 367 376 mach_set_clock_mmss = atari_mste_set_clock_mmss; 368 377 } 369 - if (!MACH_IS_MEDUSA && !MACH_IS_HADES && 370 - hwreg_present(&dma_wd.fdc_speed) && 378 + if (!MACH_IS_MEDUSA && hwreg_present(&dma_wd.fdc_speed) && 371 379 hwreg_write(&dma_wd.fdc_speed, 0)) { 372 380 ATARIHW_SET(FDCSPEED); 373 381 printk("FDC_SPEED "); 374 382 } 375 - if (!MACH_IS_HADES && !ATARIHW_PRESENT(ST_SCSI)) { 383 + if (!ATARIHW_PRESENT(ST_SCSI)) { 376 384 ATARIHW_SET(ACSI); 377 385 printk("ACSI "); 378 386 } ··· 439 449 * 0xFFxxxxxx -> 0x00xxxxxx, so that the first 16MB is accessible 440 450 * in the last 16MB of the address space. 441 451 */ 442 - tos_version = (MACH_IS_MEDUSA || MACH_IS_HADES) ? 452 + tos_version = (MACH_IS_MEDUSA) ? 443 453 0xfff : *(unsigned short *)0xff000002; 444 454 atari_rtc_year_offset = (tos_version < 0x306) ? 70 : 68; 445 455 } ··· 501 511 * On the Medusa, phys. 0x4 may contain garbage because it's no 502 512 * ROM. See above for explanation why we cannot use PTOV(4). 503 513 */ 504 - reset_addr = MACH_IS_HADES ? 0x7fe00030 : 505 - MACH_IS_MEDUSA || MACH_IS_AB40 ? 0xe00030 : 514 + reset_addr = MACH_IS_MEDUSA || MACH_IS_AB40 ? 0xe00030 : 506 515 *(unsigned long *) 0xff000004; 507 516 508 517 /* reset ACIA for switch off OverScan, if it's active */ ··· 595 606 if (MACH_IS_MEDUSA) 596 607 /* Medusa has TT _MCH cookie */ 597 608 strcat(model, "Medusa"); 598 - else if (MACH_IS_HADES) 599 - strcat(model, "Hades"); 600 609 else 601 610 strcat(model, "TT"); 602 611 break;
-440
arch/m68k/atari/hades-pci.c
··· 1 - /* 2 - * hades-pci.c - Hardware specific PCI BIOS functions the Hades Atari clone. 3 - * 4 - * Written by Wout Klaren. 5 - */ 6 - 7 - #include <linux/init.h> 8 - #include <linux/kernel.h> 9 - #include <asm/io.h> 10 - 11 - #if 0 12 - # define DBG_DEVS(args) printk args 13 - #else 14 - # define DBG_DEVS(args) 15 - #endif 16 - 17 - #if defined(CONFIG_PCI) && defined(CONFIG_HADES) 18 - 19 - #include <linux/slab.h> 20 - #include <linux/mm.h> 21 - #include <linux/pci.h> 22 - 23 - #include <asm/atarihw.h> 24 - #include <asm/atariints.h> 25 - #include <asm/byteorder.h> 26 - #include <asm/pci.h> 27 - 28 - #define HADES_MEM_BASE 0x80000000 29 - #define HADES_MEM_SIZE 0x20000000 30 - #define HADES_CONFIG_BASE 0xA0000000 31 - #define HADES_CONFIG_SIZE 0x10000000 32 - #define HADES_IO_BASE 0xB0000000 33 - #define HADES_IO_SIZE 0x10000000 34 - #define HADES_VIRT_IO_SIZE 0x00010000 /* Only 64k is remapped and actually used. */ 35 - 36 - #define N_SLOTS 4 /* Number of PCI slots. */ 37 - 38 - static const char pci_mem_name[] = "PCI memory space"; 39 - static const char pci_io_name[] = "PCI I/O space"; 40 - static const char pci_config_name[] = "PCI config space"; 41 - 42 - static struct resource config_space = { 43 - .name = pci_config_name, 44 - .start = HADES_CONFIG_BASE, 45 - .end = HADES_CONFIG_BASE + HADES_CONFIG_SIZE - 1 46 - }; 47 - static struct resource io_space = { 48 - .name = pci_io_name, 49 - .start = HADES_IO_BASE, 50 - .end = HADES_IO_BASE + HADES_IO_SIZE - 1 51 - }; 52 - 53 - static const unsigned long pci_conf_base_phys[] = { 54 - 0xA0080000, 0xA0040000, 0xA0020000, 0xA0010000 55 - }; 56 - static unsigned long pci_conf_base_virt[N_SLOTS]; 57 - static unsigned long pci_io_base_virt; 58 - 59 - /* 60 - * static void *mk_conf_addr(unsigned char bus, unsigned char device_fn, 61 - * unsigned char where) 62 - * 63 - * Calculate the address of the PCI configuration area of the given 64 - * device. 65 - * 66 - * BUG: boards with multiple functions are probably not correctly 67 - * supported. 68 - */ 69 - 70 - static void *mk_conf_addr(struct pci_dev *dev, int where) 71 - { 72 - int device = dev->devfn >> 3, function = dev->devfn & 7; 73 - void *result; 74 - 75 - DBG_DEVS(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x, pci_addr=0x%p)\n", 76 - dev->bus->number, dev->devfn, where, pci_addr)); 77 - 78 - if (device > 3) 79 - { 80 - DBG_DEVS(("mk_conf_addr: device (%d) > 3, returning NULL\n", device)); 81 - return NULL; 82 - } 83 - 84 - if (dev->bus->number != 0) 85 - { 86 - DBG_DEVS(("mk_conf_addr: bus (%d) > 0, returning NULL\n", device)); 87 - return NULL; 88 - } 89 - 90 - result = (void *) (pci_conf_base_virt[device] | (function << 8) | (where)); 91 - DBG_DEVS(("mk_conf_addr: returning pci_addr 0x%lx\n", (unsigned long) result)); 92 - return result; 93 - } 94 - 95 - static int hades_read_config_byte(struct pci_dev *dev, int where, u8 *value) 96 - { 97 - volatile unsigned char *pci_addr; 98 - 99 - *value = 0xff; 100 - 101 - if ((pci_addr = (unsigned char *) mk_conf_addr(dev, where)) == NULL) 102 - return PCIBIOS_DEVICE_NOT_FOUND; 103 - 104 - *value = *pci_addr; 105 - 106 - return PCIBIOS_SUCCESSFUL; 107 - } 108 - 109 - static int hades_read_config_word(struct pci_dev *dev, int where, u16 *value) 110 - { 111 - volatile unsigned short *pci_addr; 112 - 113 - *value = 0xffff; 114 - 115 - if (where & 0x1) 116 - return PCIBIOS_BAD_REGISTER_NUMBER; 117 - 118 - if ((pci_addr = (unsigned short *) mk_conf_addr(dev, where)) == NULL) 119 - return PCIBIOS_DEVICE_NOT_FOUND; 120 - 121 - *value = le16_to_cpu(*pci_addr); 122 - 123 - return PCIBIOS_SUCCESSFUL; 124 - } 125 - 126 - static int hades_read_config_dword(struct pci_dev *dev, int where, u32 *value) 127 - { 128 - volatile unsigned int *pci_addr; 129 - unsigned char header_type; 130 - int result; 131 - 132 - *value = 0xffffffff; 133 - 134 - if (where & 0x3) 135 - return PCIBIOS_BAD_REGISTER_NUMBER; 136 - 137 - if ((pci_addr = (unsigned int *) mk_conf_addr(dev, where)) == NULL) 138 - return PCIBIOS_DEVICE_NOT_FOUND; 139 - 140 - *value = le32_to_cpu(*pci_addr); 141 - 142 - /* 143 - * Check if the value is an address on the bus. If true, add the 144 - * base address of the PCI memory or PCI I/O area on the Hades. 145 - */ 146 - 147 - if ((result = hades_read_config_byte(dev, PCI_HEADER_TYPE, 148 - &header_type)) != PCIBIOS_SUCCESSFUL) 149 - return result; 150 - 151 - if (((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_1)) || 152 - ((header_type != PCI_HEADER_TYPE_BRIDGE) && ((where >= PCI_BASE_ADDRESS_2) && 153 - (where <= PCI_BASE_ADDRESS_5)))) 154 - { 155 - if ((*value & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) 156 - { 157 - /* 158 - * Base address register that contains an I/O address. If the 159 - * address is valid on the Hades (0 <= *value < HADES_VIRT_IO_SIZE), 160 - * add 'pci_io_base_virt' to the value. 161 - */ 162 - 163 - if (*value < HADES_VIRT_IO_SIZE) 164 - *value += pci_io_base_virt; 165 - } 166 - else 167 - { 168 - /* 169 - * Base address register that contains an memory address. If the 170 - * address is valid on the Hades (0 <= *value < HADES_MEM_SIZE), 171 - * add HADES_MEM_BASE to the value. 172 - */ 173 - 174 - if (*value == 0) 175 - { 176 - /* 177 - * Base address is 0. Test if this base 178 - * address register is used. 179 - */ 180 - 181 - *pci_addr = 0xffffffff; 182 - if (*pci_addr != 0) 183 - { 184 - *pci_addr = *value; 185 - if (*value < HADES_MEM_SIZE) 186 - *value += HADES_MEM_BASE; 187 - } 188 - } 189 - else 190 - { 191 - if (*value < HADES_MEM_SIZE) 192 - *value += HADES_MEM_BASE; 193 - } 194 - } 195 - } 196 - 197 - return PCIBIOS_SUCCESSFUL; 198 - } 199 - 200 - static int hades_write_config_byte(struct pci_dev *dev, int where, u8 value) 201 - { 202 - volatile unsigned char *pci_addr; 203 - 204 - if ((pci_addr = (unsigned char *) mk_conf_addr(dev, where)) == NULL) 205 - return PCIBIOS_DEVICE_NOT_FOUND; 206 - 207 - *pci_addr = value; 208 - 209 - return PCIBIOS_SUCCESSFUL; 210 - } 211 - 212 - static int hades_write_config_word(struct pci_dev *dev, int where, u16 value) 213 - { 214 - volatile unsigned short *pci_addr; 215 - 216 - if ((pci_addr = (unsigned short *) mk_conf_addr(dev, where)) == NULL) 217 - return PCIBIOS_DEVICE_NOT_FOUND; 218 - 219 - *pci_addr = cpu_to_le16(value); 220 - 221 - return PCIBIOS_SUCCESSFUL; 222 - } 223 - 224 - static int hades_write_config_dword(struct pci_dev *dev, int where, u32 value) 225 - { 226 - volatile unsigned int *pci_addr; 227 - unsigned char header_type; 228 - int result; 229 - 230 - if ((pci_addr = (unsigned int *) mk_conf_addr(dev, where)) == NULL) 231 - return PCIBIOS_DEVICE_NOT_FOUND; 232 - 233 - /* 234 - * Check if the value is an address on the bus. If true, subtract the 235 - * base address of the PCI memory or PCI I/O area on the Hades. 236 - */ 237 - 238 - if ((result = hades_read_config_byte(dev, PCI_HEADER_TYPE, 239 - &header_type)) != PCIBIOS_SUCCESSFUL) 240 - return result; 241 - 242 - if (((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_1)) || 243 - ((header_type != PCI_HEADER_TYPE_BRIDGE) && ((where >= PCI_BASE_ADDRESS_2) && 244 - (where <= PCI_BASE_ADDRESS_5)))) 245 - { 246 - if ((value & PCI_BASE_ADDRESS_SPACE) == 247 - PCI_BASE_ADDRESS_SPACE_IO) 248 - { 249 - /* 250 - * I/O address. Check if the address is valid address on 251 - * the Hades (pci_io_base_virt <= value < pci_io_base_virt + 252 - * HADES_VIRT_IO_SIZE) or if the value is 0xffffffff. If not 253 - * true do not write the base address register. If it is a 254 - * valid base address subtract 'pci_io_base_virt' from the value. 255 - */ 256 - 257 - if ((value >= pci_io_base_virt) && (value < (pci_io_base_virt + 258 - HADES_VIRT_IO_SIZE))) 259 - value -= pci_io_base_virt; 260 - else 261 - { 262 - if (value != 0xffffffff) 263 - return PCIBIOS_SET_FAILED; 264 - } 265 - } 266 - else 267 - { 268 - /* 269 - * Memory address. Check if the address is valid address on 270 - * the Hades (HADES_MEM_BASE <= value < HADES_MEM_BASE + HADES_MEM_SIZE) or 271 - * if the value is 0xffffffff. If not true do not write 272 - * the base address register. If it is a valid base address 273 - * subtract HADES_MEM_BASE from the value. 274 - */ 275 - 276 - if ((value >= HADES_MEM_BASE) && (value < (HADES_MEM_BASE + HADES_MEM_SIZE))) 277 - value -= HADES_MEM_BASE; 278 - else 279 - { 280 - if (value != 0xffffffff) 281 - return PCIBIOS_SET_FAILED; 282 - } 283 - } 284 - } 285 - 286 - *pci_addr = cpu_to_le32(value); 287 - 288 - return PCIBIOS_SUCCESSFUL; 289 - } 290 - 291 - /* 292 - * static inline void hades_fixup(void) 293 - * 294 - * Assign IRQ numbers as used by Linux to the interrupt pins 295 - * of the PCI cards. 296 - */ 297 - 298 - static void __init hades_fixup(int pci_modify) 299 - { 300 - char irq_tab[4] = { 301 - [0] = IRQ_TT_MFP_IO0, /* Slot 0. */ 302 - [1] = IRQ_TT_MFP_IO1, /* Slot 1. */ 303 - [2] = IRQ_TT_MFP_SCC, /* Slot 2. */ 304 - [3] = IRQ_TT_MFP_SCSIDMA /* Slot 3. */ 305 - }; 306 - struct pci_dev *dev = NULL; 307 - unsigned char slot; 308 - 309 - /* 310 - * Go through all devices, fixing up irqs as we see fit: 311 - */ 312 - 313 - while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) 314 - { 315 - if (dev->class >> 16 != PCI_BASE_CLASS_BRIDGE) 316 - { 317 - slot = PCI_SLOT(dev->devfn); /* Determine slot number. */ 318 - dev->irq = irq_tab[slot]; 319 - if (pci_modify) 320 - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); 321 - } 322 - } 323 - } 324 - 325 - /* 326 - * static void hades_conf_device(struct pci_dev *dev) 327 - * 328 - * Machine dependent Configure the given device. 329 - * 330 - * Parameters: 331 - * 332 - * dev - the pci device. 333 - */ 334 - 335 - static void __init hades_conf_device(struct pci_dev *dev) 336 - { 337 - pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 0); 338 - } 339 - 340 - static struct pci_ops hades_pci_ops = { 341 - .read_byte = hades_read_config_byte, 342 - .read_word = hades_read_config_word, 343 - .read_dword = hades_read_config_dword, 344 - .write_byte = hades_write_config_byte, 345 - .write_word = hades_write_config_word, 346 - .write_dword = hades_write_config_dword 347 - }; 348 - 349 - /* 350 - * struct pci_bus_info *init_hades_pci(void) 351 - * 352 - * Machine specific initialisation: 353 - * 354 - * - Allocate and initialise a 'pci_bus_info' structure 355 - * - Initialise hardware 356 - * 357 - * Result: pointer to 'pci_bus_info' structure. 358 - */ 359 - 360 - struct pci_bus_info * __init init_hades_pci(void) 361 - { 362 - struct pci_bus_info *bus; 363 - int i; 364 - 365 - /* 366 - * Remap I/O and configuration space. 367 - */ 368 - 369 - pci_io_base_virt = (unsigned long) ioremap(HADES_IO_BASE, HADES_VIRT_IO_SIZE); 370 - 371 - for (i = 0; i < N_SLOTS; i++) 372 - pci_conf_base_virt[i] = (unsigned long) ioremap(pci_conf_base_phys[i], 0x10000); 373 - 374 - /* 375 - * Allocate memory for bus info structure. 376 - */ 377 - 378 - bus = kzalloc(sizeof(struct pci_bus_info), GFP_KERNEL); 379 - if (unlikely(!bus)) 380 - goto iounmap_base_virt; 381 - 382 - /* 383 - * Claim resources. The m68k has no separate I/O space, both 384 - * PCI memory space and PCI I/O space are in memory space. Therefore 385 - * the I/O resources are requested in memory space as well. 386 - */ 387 - 388 - if (unlikely(request_resource(&iomem_resource, &config_space) != 0)) 389 - goto free_bus; 390 - 391 - if (unlikely(request_resource(&iomem_resource, &io_space) != 0)) 392 - goto release_config_space; 393 - 394 - bus->mem_space.start = HADES_MEM_BASE; 395 - bus->mem_space.end = HADES_MEM_BASE + HADES_MEM_SIZE - 1; 396 - bus->mem_space.name = pci_mem_name; 397 - #if 1 398 - if (unlikely(request_resource(&iomem_resource, &bus->mem_space) != 0)) 399 - goto release_io_space; 400 - #endif 401 - bus->io_space.start = pci_io_base_virt; 402 - bus->io_space.end = pci_io_base_virt + HADES_VIRT_IO_SIZE - 1; 403 - bus->io_space.name = pci_io_name; 404 - #if 1 405 - if (unlikely(request_resource(&ioport_resource, &bus->io_space) != 0)) 406 - goto release_bus_mem_space; 407 - #endif 408 - /* 409 - * Set hardware dependent functions. 410 - */ 411 - 412 - bus->m68k_pci_ops = &hades_pci_ops; 413 - bus->fixup = hades_fixup; 414 - bus->conf_device = hades_conf_device; 415 - 416 - /* 417 - * Select high to low edge for PCI interrupts. 418 - */ 419 - 420 - tt_mfp.active_edge &= ~0x27; 421 - 422 - return bus; 423 - 424 - release_bus_mem_space: 425 - release_resource(&bus->mem_space); 426 - release_io_space: 427 - release_resource(&io_space); 428 - release_config_space: 429 - release_resource(&config_space); 430 - free_bus: 431 - kfree(bus); 432 - iounmap_base_virt: 433 - iounmap((void *)pci_io_base_virt); 434 - 435 - for (i = 0; i < N_SLOTS; i++) 436 - iounmap((void *)pci_conf_base_virt[i]); 437 - 438 - return NULL; 439 - } 440 - #endif
+4 -2
arch/m68k/kernel/bios32.c
··· 476 476 printk("Linux/m68k PCI BIOS32 revision %x.%02x\n", MAJOR_REV, MINOR_REV); 477 477 478 478 bus_info = NULL; 479 - #ifdef CONFIG_HADES 479 + 480 + /* Hades code was: 480 481 if (MACH_IS_HADES) 481 482 bus_info = init_hades_pci(); 482 - #endif 483 + */ 484 + 483 485 if (bus_info != NULL) 484 486 { 485 487 printk("PCI: Probing PCI hardware\n");
+1 -1
arch/m68k/kernel/process.c
··· 78 78 static void default_idle(void) 79 79 { 80 80 if (!need_resched()) 81 - #if defined(MACH_ATARI_ONLY) && !defined(CONFIG_HADES) 81 + #if defined(MACH_ATARI_ONLY) 82 82 /* block out HSYNC on the atari (falcon) */ 83 83 __asm__("stop #0x2200" : : : "cc"); 84 84 #else
-4
drivers/block/ataflop.c
··· 1882 1882 /* Amiga, Mac, ... don't have Atari-compatible floppy :-) */ 1883 1883 return -ENODEV; 1884 1884 1885 - if (MACH_IS_HADES) 1886 - /* Hades doesn't have Atari-compatible floppy */ 1887 - return -ENODEV; 1888 - 1889 1885 if (register_blkdev(FLOPPY_MAJOR,"fd")) 1890 1886 return -EBUSY; 1891 1887
-8
drivers/scsi/Kconfig
··· 1670 1670 boot process fractionally longer but may assist recovery from errors 1671 1671 that leave the devices with SCSI operations partway completed. 1672 1672 1673 - config TT_DMA_EMUL 1674 - bool "Hades SCSI DMA emulator" 1675 - depends on ATARI_SCSI && HADES 1676 - help 1677 - This option enables code which emulates the TT SCSI DMA chip on the 1678 - Hades. This increases the SCSI transfer rates at least ten times 1679 - compared to PIO transfers. 1680 - 1681 1673 config MAC_SCSI 1682 1674 bool "Macintosh NCR5380 SCSI" 1683 1675 depends on MAC && SCSI=y
-468
drivers/scsi/atari_dma_emul.c
··· 1 - /* 2 - * atari_dma_emul.c -- TT SCSI DMA emulator for the Hades. 3 - * 4 - * Copyright 1997 Wout Klaren <W.Klaren@inter.nl.net> 5 - * 6 - * This file is subject to the terms and conditions of the GNU General Public 7 - * License. See the file COPYING in the main directory of this archive 8 - * for more details. 9 - * 10 - * This code was written using the Hades TOS source code as a 11 - * reference. This source code can be found on the home page 12 - * of Medusa Computer Systems. 13 - * 14 - * Version 0.1, 1997-09-24. 15 - * 16 - * This code should be considered experimental. It has only been 17 - * tested on a Hades with a 68060. It might not work on a Hades 18 - * with a 68040. Make backups of your hard drives before using 19 - * this code. 20 - */ 21 - 22 - #include <linux/compiler.h> 23 - #include <asm/thread_info.h> 24 - #include <asm/uaccess.h> 25 - 26 - #define hades_dma_ctrl (*(unsigned char *) 0xffff8717) 27 - #define hades_psdm_reg (*(unsigned char *) 0xffff8741) 28 - 29 - #define TRANSFER_SIZE 16 30 - 31 - struct m68040_frame { 32 - unsigned long effaddr; /* effective address */ 33 - unsigned short ssw; /* special status word */ 34 - unsigned short wb3s; /* write back 3 status */ 35 - unsigned short wb2s; /* write back 2 status */ 36 - unsigned short wb1s; /* write back 1 status */ 37 - unsigned long faddr; /* fault address */ 38 - unsigned long wb3a; /* write back 3 address */ 39 - unsigned long wb3d; /* write back 3 data */ 40 - unsigned long wb2a; /* write back 2 address */ 41 - unsigned long wb2d; /* write back 2 data */ 42 - unsigned long wb1a; /* write back 1 address */ 43 - unsigned long wb1dpd0; /* write back 1 data/push data 0*/ 44 - unsigned long pd1; /* push data 1*/ 45 - unsigned long pd2; /* push data 2*/ 46 - unsigned long pd3; /* push data 3*/ 47 - }; 48 - 49 - static void writeback (unsigned short wbs, unsigned long wba, 50 - unsigned long wbd, void *old_buserr) 51 - { 52 - mm_segment_t fs = get_fs(); 53 - static void *save_buserr; 54 - 55 - __asm__ __volatile__ ("movec.l %%vbr,%%a0\n\t" 56 - "move.l %0,8(%%a0)\n\t" 57 - : 58 - : "r" (&&bus_error) 59 - : "a0" ); 60 - 61 - save_buserr = old_buserr; 62 - 63 - set_fs (MAKE_MM_SEG(wbs & WBTM_040)); 64 - 65 - switch (wbs & WBSIZ_040) { 66 - case BA_SIZE_BYTE: 67 - put_user (wbd & 0xff, (char *)wba); 68 - break; 69 - case BA_SIZE_WORD: 70 - put_user (wbd & 0xffff, (short *)wba); 71 - break; 72 - case BA_SIZE_LONG: 73 - put_user (wbd, (int *)wba); 74 - break; 75 - } 76 - 77 - set_fs (fs); 78 - return; 79 - 80 - bus_error: 81 - __asm__ __volatile__ ("cmp.l %0,2(%%sp)\n\t" 82 - "bcs.s .jump_old\n\t" 83 - "cmp.l %1,2(%%sp)\n\t" 84 - "bls.s .restore_old\n" 85 - ".jump_old:\n\t" 86 - "move.l %2,-(%%sp)\n\t" 87 - "rts\n" 88 - ".restore_old:\n\t" 89 - "move.l %%a0,-(%%sp)\n\t" 90 - "movec.l %%vbr,%%a0\n\t" 91 - "move.l %2,8(%%a0)\n\t" 92 - "move.l (%%sp)+,%%a0\n\t" 93 - "rte\n\t" 94 - : 95 - : "i" (writeback), "i" (&&bus_error), 96 - "m" (save_buserr) ); 97 - } 98 - 99 - /* 100 - * static inline void set_restdata_reg(unsigned char *cur_addr) 101 - * 102 - * Set the rest data register if necessary. 103 - */ 104 - 105 - static inline void set_restdata_reg(unsigned char *cur_addr) 106 - { 107 - if (((long) cur_addr & ~3) != 0) 108 - tt_scsi_dma.dma_restdata = 109 - *((unsigned long *) ((long) cur_addr & ~3)); 110 - } 111 - 112 - /* 113 - * void hades_dma_emulator(int irq, void *dummy) 114 - * 115 - * This code emulates TT SCSI DMA on the Hades. 116 - * 117 - * Note the following: 118 - * 119 - * 1. When there is no byte available to read from the SCSI bus, or 120 - * when a byte cannot yet bet written to the SCSI bus, a bus 121 - * error occurs when reading or writing the pseudo DMA data 122 - * register (hades_psdm_reg). We have to catch this bus error 123 - * and try again to read or write the byte. If after several tries 124 - * we still get a bus error, the interrupt handler is left. When 125 - * the byte can be read or written, the interrupt handler is 126 - * called again. 127 - * 128 - * 2. The SCSI interrupt must be disabled in this interrupt handler. 129 - * 130 - * 3. If we set the EOP signal, the SCSI controller still expects one 131 - * byte to be read or written. Therefore the last byte is transferred 132 - * separately, after setting the EOP signal. 133 - * 134 - * 4. When this function is left, the address pointer (start_addr) is 135 - * converted to a physical address. Because it points one byte 136 - * further than the last transferred byte, it can point outside the 137 - * current page. If virt_to_phys() is called with this address we 138 - * might get an access error. Therefore virt_to_phys() is called with 139 - * start_addr - 1 if the count has reached zero. The result is 140 - * increased with one. 141 - */ 142 - 143 - static irqreturn_t hades_dma_emulator(int irq, void *dummy) 144 - { 145 - unsigned long dma_base; 146 - register unsigned long dma_cnt asm ("d3"); 147 - static long save_buserr; 148 - register unsigned long save_sp asm ("d4"); 149 - register int tries asm ("d5"); 150 - register unsigned char *start_addr asm ("a3"), *end_addr asm ("a4"); 151 - register unsigned char *eff_addr; 152 - register unsigned char *psdm_reg; 153 - unsigned long rem; 154 - 155 - atari_disable_irq(IRQ_TT_MFP_SCSI); 156 - 157 - /* 158 - * Read the dma address and count registers. 159 - */ 160 - 161 - dma_base = SCSI_DMA_READ_P(dma_addr); 162 - dma_cnt = SCSI_DMA_READ_P(dma_cnt); 163 - 164 - /* 165 - * Check if DMA is still enabled. 166 - */ 167 - 168 - if ((tt_scsi_dma.dma_ctrl & 2) == 0) 169 - { 170 - atari_enable_irq(IRQ_TT_MFP_SCSI); 171 - return IRQ_HANDLED; 172 - } 173 - 174 - if (dma_cnt == 0) 175 - { 176 - printk(KERN_NOTICE "DMA emulation: count is zero.\n"); 177 - tt_scsi_dma.dma_ctrl &= 0xfd; /* DMA ready. */ 178 - atari_enable_irq(IRQ_TT_MFP_SCSI); 179 - return IRQ_HANDLED; 180 - } 181 - 182 - /* 183 - * Install new bus error routine. 184 - */ 185 - 186 - __asm__ __volatile__ ("movec.l %%vbr,%%a0\n\t" 187 - "move.l 8(%%a0),%0\n\t" 188 - "move.l %1,8(%%a0)\n\t" 189 - : "=&r" (save_buserr) 190 - : "r" (&&scsi_bus_error) 191 - : "a0" ); 192 - 193 - hades_dma_ctrl &= 0xfc; /* Bus error and EOP off. */ 194 - 195 - /* 196 - * Save the stack pointer. 197 - */ 198 - 199 - __asm__ __volatile__ ("move.l %%sp,%0\n\t" 200 - : "=&r" (save_sp) ); 201 - 202 - tries = 100; /* Maximum number of bus errors. */ 203 - start_addr = phys_to_virt(dma_base); 204 - end_addr = start_addr + dma_cnt; 205 - 206 - scsi_loop: 207 - dma_cnt--; 208 - rem = dma_cnt & (TRANSFER_SIZE - 1); 209 - dma_cnt &= ~(TRANSFER_SIZE - 1); 210 - psdm_reg = &hades_psdm_reg; 211 - 212 - if (tt_scsi_dma.dma_ctrl & 1) /* Read or write? */ 213 - { 214 - /* 215 - * SCSI write. Abort when count is zero. 216 - */ 217 - 218 - switch (rem) 219 - { 220 - case 0: 221 - while (dma_cnt > 0) 222 - { 223 - dma_cnt -= TRANSFER_SIZE; 224 - 225 - *psdm_reg = *start_addr++; 226 - case 15: 227 - *psdm_reg = *start_addr++; 228 - case 14: 229 - *psdm_reg = *start_addr++; 230 - case 13: 231 - *psdm_reg = *start_addr++; 232 - case 12: 233 - *psdm_reg = *start_addr++; 234 - case 11: 235 - *psdm_reg = *start_addr++; 236 - case 10: 237 - *psdm_reg = *start_addr++; 238 - case 9: 239 - *psdm_reg = *start_addr++; 240 - case 8: 241 - *psdm_reg = *start_addr++; 242 - case 7: 243 - *psdm_reg = *start_addr++; 244 - case 6: 245 - *psdm_reg = *start_addr++; 246 - case 5: 247 - *psdm_reg = *start_addr++; 248 - case 4: 249 - *psdm_reg = *start_addr++; 250 - case 3: 251 - *psdm_reg = *start_addr++; 252 - case 2: 253 - *psdm_reg = *start_addr++; 254 - case 1: 255 - *psdm_reg = *start_addr++; 256 - } 257 - } 258 - 259 - hades_dma_ctrl |= 1; /* Set EOP. */ 260 - udelay(10); 261 - *psdm_reg = *start_addr++; /* Dummy byte. */ 262 - tt_scsi_dma.dma_ctrl &= 0xfd; /* DMA ready. */ 263 - } 264 - else 265 - { 266 - /* 267 - * SCSI read. Abort when count is zero. 268 - */ 269 - 270 - switch (rem) 271 - { 272 - case 0: 273 - while (dma_cnt > 0) 274 - { 275 - dma_cnt -= TRANSFER_SIZE; 276 - 277 - *start_addr++ = *psdm_reg; 278 - case 15: 279 - *start_addr++ = *psdm_reg; 280 - case 14: 281 - *start_addr++ = *psdm_reg; 282 - case 13: 283 - *start_addr++ = *psdm_reg; 284 - case 12: 285 - *start_addr++ = *psdm_reg; 286 - case 11: 287 - *start_addr++ = *psdm_reg; 288 - case 10: 289 - *start_addr++ = *psdm_reg; 290 - case 9: 291 - *start_addr++ = *psdm_reg; 292 - case 8: 293 - *start_addr++ = *psdm_reg; 294 - case 7: 295 - *start_addr++ = *psdm_reg; 296 - case 6: 297 - *start_addr++ = *psdm_reg; 298 - case 5: 299 - *start_addr++ = *psdm_reg; 300 - case 4: 301 - *start_addr++ = *psdm_reg; 302 - case 3: 303 - *start_addr++ = *psdm_reg; 304 - case 2: 305 - *start_addr++ = *psdm_reg; 306 - case 1: 307 - *start_addr++ = *psdm_reg; 308 - } 309 - } 310 - 311 - hades_dma_ctrl |= 1; /* Set EOP. */ 312 - udelay(10); 313 - *start_addr++ = *psdm_reg; 314 - tt_scsi_dma.dma_ctrl &= 0xfd; /* DMA ready. */ 315 - 316 - set_restdata_reg(start_addr); 317 - } 318 - 319 - if (start_addr != end_addr) 320 - printk(KERN_CRIT "DMA emulation: FATAL: Count is not zero at end of transfer.\n"); 321 - 322 - dma_cnt = end_addr - start_addr; 323 - 324 - scsi_end: 325 - dma_base = (dma_cnt == 0) ? virt_to_phys(start_addr - 1) + 1 : 326 - virt_to_phys(start_addr); 327 - 328 - SCSI_DMA_WRITE_P(dma_addr, dma_base); 329 - SCSI_DMA_WRITE_P(dma_cnt, dma_cnt); 330 - 331 - /* 332 - * Restore old bus error routine. 333 - */ 334 - 335 - __asm__ __volatile__ ("movec.l %%vbr,%%a0\n\t" 336 - "move.l %0,8(%%a0)\n\t" 337 - : 338 - : "r" (save_buserr) 339 - : "a0" ); 340 - 341 - atari_enable_irq(IRQ_TT_MFP_SCSI); 342 - 343 - return IRQ_HANDLED; 344 - 345 - scsi_bus_error: 346 - /* 347 - * First check if the bus error is caused by our code. 348 - * If not, call the original handler. 349 - */ 350 - 351 - __asm__ __volatile__ ("cmp.l %0,2(%%sp)\n\t" 352 - "bcs.s .old_vector\n\t" 353 - "cmp.l %1,2(%%sp)\n\t" 354 - "bls.s .scsi_buserr\n" 355 - ".old_vector:\n\t" 356 - "move.l %2,-(%%sp)\n\t" 357 - "rts\n" 358 - ".scsi_buserr:\n\t" 359 - : 360 - : "i" (&&scsi_loop), "i" (&&scsi_end), 361 - "m" (save_buserr) ); 362 - 363 - if (CPU_IS_060) 364 - { 365 - /* 366 - * Get effective address and restore the stack. 367 - */ 368 - 369 - __asm__ __volatile__ ("move.l 8(%%sp),%0\n\t" 370 - "move.l %1,%%sp\n\t" 371 - : "=a&" (eff_addr) 372 - : "r" (save_sp) ); 373 - } 374 - else 375 - { 376 - register struct m68040_frame *frame; 377 - 378 - __asm__ __volatile__ ("lea 8(%%sp),%0\n\t" 379 - : "=a&" (frame) ); 380 - 381 - if (tt_scsi_dma.dma_ctrl & 1) 382 - { 383 - /* 384 - * Bus error while writing. 385 - */ 386 - 387 - if (frame->wb3s & WBV_040) 388 - { 389 - if (frame->wb3a == (long) &hades_psdm_reg) 390 - start_addr--; 391 - else 392 - writeback(frame->wb3s, frame->wb3a, 393 - frame->wb3d, &&scsi_bus_error); 394 - } 395 - 396 - if (frame->wb2s & WBV_040) 397 - { 398 - if (frame->wb2a == (long) &hades_psdm_reg) 399 - start_addr--; 400 - else 401 - writeback(frame->wb2s, frame->wb2a, 402 - frame->wb2d, &&scsi_bus_error); 403 - } 404 - 405 - if (frame->wb1s & WBV_040) 406 - { 407 - if (frame->wb1a == (long) &hades_psdm_reg) 408 - start_addr--; 409 - } 410 - } 411 - else 412 - { 413 - /* 414 - * Bus error while reading. 415 - */ 416 - 417 - if (frame->wb3s & WBV_040) 418 - writeback(frame->wb3s, frame->wb3a, 419 - frame->wb3d, &&scsi_bus_error); 420 - } 421 - 422 - eff_addr = (unsigned char *) frame->faddr; 423 - 424 - __asm__ __volatile__ ("move.l %0,%%sp\n\t" 425 - : 426 - : "r" (save_sp) ); 427 - } 428 - 429 - dma_cnt = end_addr - start_addr; 430 - 431 - if (eff_addr == &hades_psdm_reg) 432 - { 433 - /* 434 - * Bus error occurred while reading the pseudo 435 - * DMA register. Time out. 436 - */ 437 - 438 - tries--; 439 - 440 - if (tries <= 0) 441 - { 442 - if ((tt_scsi_dma.dma_ctrl & 1) == 0) /* Read or write? */ 443 - set_restdata_reg(start_addr); 444 - 445 - if (dma_cnt <= 1) 446 - printk(KERN_CRIT "DMA emulation: Fatal " 447 - "error while %s the last byte.\n", 448 - (tt_scsi_dma.dma_ctrl & 1) 449 - ? "writing" : "reading"); 450 - 451 - goto scsi_end; 452 - } 453 - else 454 - goto scsi_loop; 455 - } 456 - else 457 - { 458 - /* 459 - * Bus error during pseudo DMA transfer. 460 - * Terminate the DMA transfer. 461 - */ 462 - 463 - hades_dma_ctrl |= 3; /* Set EOP and bus error. */ 464 - if ((tt_scsi_dma.dma_ctrl & 1) == 0) /* Read or write? */ 465 - set_restdata_reg(start_addr); 466 - goto scsi_end; 467 - } 468 - }
+3 -24
drivers/scsi/atari_scsi.c
··· 249 249 module_param(setup_hostid, int, 0); 250 250 251 251 252 - #if defined(CONFIG_TT_DMA_EMUL) 253 - #include "atari_dma_emul.c" 254 - #endif 255 - 256 252 #if defined(REAL_DMA) 257 253 258 254 static int scsi_dma_is_ignored_buserr(unsigned char dma_stat) ··· 691 695 #ifdef REAL_DMA 692 696 tt_scsi_dma.dma_ctrl = 0; 693 697 atari_dma_residual = 0; 694 - #ifdef CONFIG_TT_DMA_EMUL 695 - if (MACH_IS_HADES) { 696 - if (request_irq(IRQ_AUTO_2, hades_dma_emulator, 697 - IRQ_TYPE_PRIO, "Hades DMA emulator", 698 - hades_dma_emulator)) { 699 - printk(KERN_ERR "atari_scsi_detect: cannot allocate irq %d, aborting (MACH_IS_HADES)",IRQ_AUTO_2); 700 - free_irq(IRQ_TT_MFP_SCSI, instance); 701 - scsi_unregister(atari_scsi_host); 702 - atari_stram_free(atari_dma_buffer); 703 - atari_dma_buffer = 0; 704 - return 0; 705 - } 706 - } 707 - #endif 708 - if (MACH_IS_MEDUSA || MACH_IS_HADES) { 698 + 699 + if (MACH_IS_MEDUSA) { 709 700 /* While the read overruns (described by Drew Eckhardt in 710 701 * NCR5380.c) never happened on TTs, they do in fact on the Medusa 711 702 * (This was the cause why SCSI didn't work right for so long ··· 990 1007 Scsi_Cmnd *cmd, int write_flag) 991 1008 { 992 1009 unsigned long possible_len, limit; 993 - #ifndef CONFIG_TT_DMA_EMUL 994 - if (MACH_IS_HADES) 995 - /* Hades has no SCSI DMA at all :-( Always force use of PIO */ 996 - return 0; 997 - #endif 1010 + 998 1011 if (IS_A_TT()) 999 1012 /* TT SCSI DMA can transfer arbitrary #bytes */ 1000 1013 return wanted_len;
-1
include/asm-m68k/atarihw.h
··· 39 39 #define MACH_IS_TT ((atari_mch_cookie >> 16) == ATARI_MCH_TT) 40 40 #define MACH_IS_FALCON ((atari_mch_cookie >> 16) == ATARI_MCH_FALCON) 41 41 #define MACH_IS_MEDUSA (atari_mch_type == ATARI_MACH_MEDUSA) 42 - #define MACH_IS_HADES (atari_mch_type == ATARI_MACH_HADES) 43 42 #define MACH_IS_AB40 (atari_mch_type == ATARI_MACH_AB40) 44 43 45 44 /* values for atari_switches */
+1 -1
include/asm-m68k/entry.h
··· 31 31 */ 32 32 33 33 /* the following macro is used when enabling interrupts */ 34 - #if defined(MACH_ATARI_ONLY) && !defined(CONFIG_HADES) 34 + #if defined(MACH_ATARI_ONLY) 35 35 /* block out HSYNC on the atari */ 36 36 #define ALLOWINT (~0x400) 37 37 #define MAX_NOINT_IPL 3
-6
include/asm-m68k/virtconvert.h
··· 40 40 41 41 /* 42 42 * IO bus memory addresses are 1:1 with the physical address, 43 - * except on the PCI bus of the Hades. 44 43 */ 45 - #ifdef CONFIG_HADES 46 - #define virt_to_bus(a) (virt_to_phys(a) + (MACH_IS_HADES ? 0x80000000 : 0)) 47 - #define bus_to_virt(a) (phys_to_virt((a) - (MACH_IS_HADES ? 0x80000000 : 0))) 48 - #else 49 44 #define virt_to_bus virt_to_phys 50 45 #define bus_to_virt phys_to_virt 51 - #endif 52 46 53 47 #endif 54 48 #endif