perf/x86/intel/uncore: Correct num_boxes for IIO and IRP

There are 6 IIO/IRP boxes for CBDMA, PCIe0-2, MCP 0 and MCP 1
separately. Correct the num_boxes.

Signed-off-by: Kan Liang <Kan.liang@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: ak@linux.intel.com
Cc: peterz@infradead.org
Cc: eranian@google.com
Cc: acme@kernel.org
Link: http://lkml.kernel.org/r/1505149816-12580-1-git-send-email-kan.liang@intel.com

authored by

Kan Liang and committed by
Thomas Gleixner
29b46dfb 450a9789

+2 -2
+2 -2
arch/x86/events/intel/uncore_snbep.c
··· 3462 3462 static struct intel_uncore_type skx_uncore_iio = { 3463 3463 .name = "iio", 3464 3464 .num_counters = 4, 3465 - .num_boxes = 5, 3465 + .num_boxes = 6, 3466 3466 .perf_ctr_bits = 48, 3467 3467 .event_ctl = SKX_IIO0_MSR_PMON_CTL0, 3468 3468 .perf_ctr = SKX_IIO0_MSR_PMON_CTR0, ··· 3492 3492 static struct intel_uncore_type skx_uncore_irp = { 3493 3493 .name = "irp", 3494 3494 .num_counters = 2, 3495 - .num_boxes = 5, 3495 + .num_boxes = 6, 3496 3496 .perf_ctr_bits = 48, 3497 3497 .event_ctl = SKX_IRP0_MSR_PMON_CTL0, 3498 3498 .perf_ctr = SKX_IRP0_MSR_PMON_CTR0,