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ARM: at91: Document new TCB bindings
The current binding for the TCB is not flexible enough for some use cases
and prevents proper utilization of all the channels.
Acked-by: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+56
-32
-32
Documentation/devicetree/bindings/arm/atmel-at91.txt
-32
Documentation/devicetree/bindings/arm/atmel-at91.txt
···
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Its subnodes can be:
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- watchdog: compatible should be "atmel,at91rm9200-wdt"
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TC/TCLIB Timer required properties:
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- compatible: Should be "atmel,<chip>-tcb".
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<chip> can be "at91rm9200" or "at91sam9x5"
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- reg: Should contain registers location and length
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- interrupts: Should contain all interrupts for the TC block
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Note that you can specify several interrupt cells if the TC
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block has one interrupt per channel.
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- clock-names: tuple listing input clock names.
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Required elements: "t0_clk", "slow_clk"
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Optional elements: "t1_clk", "t2_clk"
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- clocks: phandles to input clocks.
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Examples:
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One interrupt per TC block:
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tcb0: timer@fff7c000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfff7c000 0x100>;
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interrupts = <18 4>;
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clocks = <&tcb0_clk>;
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clock-names = "t0_clk";
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};
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-
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One interrupt per TC channel in a TC block:
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tcb1: timer@fffdc000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfffdc000 0x100>;
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interrupts = <26 4 27 4 28 4>;
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clocks = <&tcb1_clk>;
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clock-names = "t0_clk";
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};
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-
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RSTC Reset Controller required properties:
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- compatible: Should be "atmel,<chip>-rstc".
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<chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
+56
Documentation/devicetree/bindings/mfd/atmel-tcb.txt
+56
Documentation/devicetree/bindings/mfd/atmel-tcb.txt
···
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* Device tree bindings for Atmel Timer Counter Blocks
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+
- compatible: Should be "atmel,<chip>-tcb", "simple-mfd", "syscon".
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<chip> can be "at91rm9200" or "at91sam9x5"
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- reg: Should contain registers location and length
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- #address-cells: has to be 1
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- #size-cells: has to be 0
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- interrupts: Should contain all interrupts for the TC block
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Note that you can specify several interrupt cells if the TC
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+
block has one interrupt per channel.
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+
- clock-names: tuple listing input clock names.
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+
Required elements: "t0_clk", "slow_clk"
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+
Optional elements: "t1_clk", "t2_clk"
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- clocks: phandles to input clocks.
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+
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The TCB can expose multiple subdevices:
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* a timer
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- compatible: Should be "atmel,tcb-timer"
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- reg: Should contain the TCB channels to be used. If the
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counter width is 16 bits (at91rm9200-tcb), two consecutive
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channels are needed. Else, only one channel will be used.
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+
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Examples:
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One interrupt per TC block:
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tcb0: timer@fff7c000 {
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compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xfff7c000 0x100>;
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interrupts = <18 4>;
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clocks = <&tcb0_clk>, <&clk32k>;
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clock-names = "t0_clk", "slow_clk";
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+
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timer@0 {
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compatible = "atmel,tcb-timer";
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reg = <0>, <1>;
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};
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timer@2 {
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compatible = "atmel,tcb-timer";
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reg = <2>;
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};
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};
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One interrupt per TC channel in a TC block:
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tcb1: timer@fffdc000 {
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compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xfffdc000 0x100>;
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interrupts = <26 4>, <27 4>, <28 4>;
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clocks = <&tcb1_clk>, <&clk32k>;
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clock-names = "t0_clk", "slow_clk";
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};
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