Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

Pull more networking updates from David Miller:
"Ok, everything from here on out will be bug fixes."

1) One final sync of wireless and bluetooth stuff from John Linville.
These changes have all been in his tree for more than a week, and
therefore have had the necessary -next exposure. John was just away
on a trip and didn't have a change to send the pull request until a
day or two ago.

2) Put back some defines in user exposed header file areas that were
removed during the tokenring purge. From Stephen Hemminger and Paul
Gortmaker.

3) A bug fix for UDP hash table allocation got lost in the pile due to
one of those "you got it.. no I've got it.." situations. :-)

From Tim Bird.

4) SKB coalescing in TCP needs to have stricter checks, otherwise we'll
try to coalesce overlapping frags and crash. Fix from Eric Dumazet.

5) RCU routing table lookups can race with free_fib_info(), causing
crashes when we deref the device pointers in the route. Fix by
releasing the net device in the RCU callback. From Yanmin Zhang.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (293 commits)
tcp: take care of overlaps in tcp_try_coalesce()
ipv4: fix the rcu race between free_fib_info and ip_route_output_slow
mm: add a low limit to alloc_large_system_hash
ipx: restore token ring define to include/linux/ipx.h
if: restore token ring ARP type to header
xen: do not disable netfront in dom0
phy/micrel: Fix ID of KSZ9021
mISDN: Add X-Tensions USB ISDN TA XC-525
gianfar:don't add FCB length to hard_header_len
Bluetooth: Report proper error number in disconnection
Bluetooth: Create flags for bt_sk()
Bluetooth: report the right security level in getsockopt
Bluetooth: Lock the L2CAP channel when sending
Bluetooth: Restore locking semantics when looking up L2CAP channels
Bluetooth: Fix a redundant and problematic incoming MTU check
Bluetooth: Add support for Foxconn/Hon Hai AR5BBU22 0489:E03C
Bluetooth: Fix EIR data generation for mgmt_device_found
Bluetooth: Fix Inquiry with RSSI event mask
Bluetooth: improve readability of l2cap_seq_list code
Bluetooth: Fix skb length calculation
...

+6670 -5544
+12
Documentation/feature-removal-schedule.txt
··· 541 541 542 542 ---------------------------- 543 543 544 + What: Removing the pn544 raw driver. 545 + When: 3.6 546 + Why: With the introduction of the NFC HCI and SHDL kernel layers, pn544.c 547 + is being replaced by pn544_hci.c which is accessible through the netlink 548 + and socket NFC APIs. Moreover, pn544.c is outdated and does not seem to 549 + work properly with the latest Android stacks. 550 + Having 2 drivers for the same hardware is confusing and as such we 551 + should only keep the one following the kernel NFC APIs. 552 + Who: Samuel Ortiz <sameo@linux.intel.com> 553 + 554 + ---------------------------- 555 + 544 556 What: setitimer accepts user NULL pointer (value) 545 557 When: 3.6 546 558 Why: setitimer is not returning -EFAULT if user pointer is NULL. This
+35 -10
Documentation/nfc/nfc-hci.txt
··· 22 22 HCI events can also be received from the host controller. They will be handled 23 23 and a translation will be forwarded to NFC Core as needed. 24 24 HCI uses 2 execution contexts: 25 - - one if for executing commands : nfc_hci_msg_tx_work(). Only one command 25 + - one for executing commands : nfc_hci_msg_tx_work(). Only one command 26 26 can be executing at any given moment. 27 - - one if for dispatching received events and responses : nfc_hci_msg_rx_work() 27 + - one for dispatching received events and commands : nfc_hci_msg_rx_work(). 28 28 29 29 HCI Session initialization: 30 30 --------------------------- ··· 52 52 struct nfc_hci_ops { 53 53 int (*open)(struct nfc_hci_dev *hdev); 54 54 void (*close)(struct nfc_hci_dev *hdev); 55 + int (*hci_ready) (struct nfc_hci_dev *hdev); 55 56 int (*xmit)(struct nfc_hci_dev *hdev, struct sk_buff *skb); 56 57 int (*start_poll)(struct nfc_hci_dev *hdev, u32 protocols); 57 58 int (*target_from_gate)(struct nfc_hci_dev *hdev, u8 gate, 58 59 struct nfc_target *target); 60 + int (*complete_target_discovered) (struct nfc_hci_dev *hdev, u8 gate, 61 + struct nfc_target *target); 62 + int (*data_exchange) (struct nfc_hci_dev *hdev, 63 + struct nfc_target *target, 64 + struct sk_buff *skb, struct sk_buff **res_skb); 65 + int (*check_presence)(struct nfc_hci_dev *hdev, 66 + struct nfc_target *target); 59 67 }; 60 68 61 - open() and close() shall turn the hardware on and off. xmit() shall simply 62 - write a frame to the chip. start_poll() is an optional entrypoint that shall 63 - set the hardware in polling mode. This must be implemented only if the hardware 64 - uses proprietary gates or a mechanism slightly different from the HCI standard. 65 - target_from_gate() is another optional entrypoint to return the protocols 69 + - open() and close() shall turn the hardware on and off. 70 + - hci_ready() is an optional entry point that is called right after the hci 71 + session has been set up. The driver can use it to do additional initialization 72 + that must be performed using HCI commands. 73 + - xmit() shall simply write a frame to the chip. 74 + - start_poll() is an optional entrypoint that shall set the hardware in polling 75 + mode. This must be implemented only if the hardware uses proprietary gates or a 76 + mechanism slightly different from the HCI standard. 77 + - target_from_gate() is an optional entrypoint to return the nfc protocols 66 78 corresponding to a proprietary gate. 79 + - complete_target_discovered() is an optional entry point to let the driver 80 + perform additional proprietary processing necessary to auto activate the 81 + discovered target. 82 + - data_exchange() must be implemented by the driver if proprietary HCI commands 83 + are required to send data to the tag. Some tag types will require custom 84 + commands, others can be written to using the standard HCI commands. The driver 85 + can check the tag type and either do proprietary processing, or return 1 to ask 86 + for standard processing. 87 + - check_presence() is an optional entry point that will be called regularly 88 + by the core to check that an activated tag is still in the field. If this is 89 + not implemented, the core will not be able to push tag_lost events to the user 90 + space 67 91 68 92 On the rx path, the driver is responsible to push incoming HCP frames to HCI 69 93 using nfc_hci_recv_frame(). HCI will take care of re-aggregation and handling ··· 123 99 handles shdlc rx & tx queues. Dispatches HCI cmd responses. 124 100 125 101 - HCI Tx Cmd worker (MSGTXWQ) 126 - Serialize execution of HCI commands. Complete execution in case of resp timeout. 102 + Serializes execution of HCI commands. Completes execution in case of response 103 + timeout. 127 104 128 105 - HCI Rx worker (MSGRXWQ) 129 106 Dispatches incoming HCI commands or events. ··· 158 133 SMW context gets scheduled and invokes nfc_shdlc_sm_work(). This function 159 134 handles shdlc framing in and out. It uses the driver xmit to send frames and 160 135 receives incoming frames in an skb queue filled from the driver IRQ handler. 161 - SHDLC I(nformation) frames payload are HCP fragments. They are agregated to 136 + SHDLC I(nformation) frames payload are HCP fragments. They are aggregated to 162 137 form complete HCI frames, which can be a response, command, or event. 163 138 164 139 HCI Responses are dispatched immediately from this context to unblock 165 - waiting command execution. Reponse processing involves invoking the completion 140 + waiting command execution. Response processing involves invoking the completion 166 141 callback that was provided by nfc_hci_msg_tx_work() when it sent the command. 167 142 The completion callback will then wake the syscall context. 168 143
+7 -8
arch/mips/bcm47xx/setup.c
··· 90 90 char prefix[10]; 91 91 92 92 if (bus->bustype == SSB_BUSTYPE_PCI) { 93 + memset(out, 0, sizeof(struct ssb_sprom)); 93 94 snprintf(prefix, sizeof(prefix), "pci/%u/%u/", 94 95 bus->host_pci->bus->number + 1, 95 96 PCI_SLOT(bus->host_pci->devfn)); ··· 110 109 /* Fill boardinfo structure */ 111 110 memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo)); 112 111 113 - if (nvram_getenv("boardvendor", buf, sizeof(buf)) >= 0) 114 - iv->boardinfo.vendor = (u16)simple_strtoul(buf, NULL, 0); 115 - else 116 - iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM; 117 - if (nvram_getenv("boardtype", buf, sizeof(buf)) >= 0) 118 - iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0); 119 - if (nvram_getenv("boardrev", buf, sizeof(buf)) >= 0) 120 - iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0); 112 + bcm47xx_fill_ssb_boardinfo(&iv->boardinfo, NULL); 121 113 114 + memset(&iv->sprom, 0, sizeof(struct ssb_sprom)); 122 115 bcm47xx_fill_sprom(&iv->sprom, NULL); 123 116 124 117 if (nvram_getenv("cardbus", buf, sizeof(buf)) >= 0) ··· 161 166 162 167 switch (bus->hosttype) { 163 168 case BCMA_HOSTTYPE_PCI: 169 + memset(out, 0, sizeof(struct ssb_sprom)); 164 170 snprintf(prefix, sizeof(prefix), "pci/%u/%u/", 165 171 bus->host_pci->bus->number + 1, 166 172 PCI_SLOT(bus->host_pci->devfn)); 167 173 bcm47xx_fill_sprom(out, prefix); 168 174 return 0; 169 175 case BCMA_HOSTTYPE_SOC: 176 + memset(out, 0, sizeof(struct ssb_sprom)); 170 177 bcm47xx_fill_sprom_ethernet(out, NULL); 171 178 core = bcma_find_core(bus, BCMA_CORE_80211); 172 179 if (core) { ··· 194 197 err = bcma_host_soc_register(&bcm47xx_bus.bcma); 195 198 if (err) 196 199 panic("Failed to initialize BCMA bus (err %d)", err); 200 + 201 + bcm47xx_fill_bcma_boardinfo(&bcm47xx_bus.bcma.bus.boardinfo, NULL); 197 202 } 198 203 #endif 199 204
+26 -2
arch/mips/bcm47xx/sprom.c
··· 165 165 const char *prefix) 166 166 { 167 167 nvram_read_u16(prefix, NULL, "boardrev", &sprom->board_rev, 0); 168 + if (!sprom->board_rev) 169 + nvram_read_u16(NULL, NULL, "boardrev", &sprom->board_rev, 0); 168 170 nvram_read_u16(prefix, NULL, "boardnum", &sprom->board_num, 0); 169 171 nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff); 170 172 nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff); ··· 557 555 558 556 void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix) 559 557 { 560 - memset(sprom, 0, sizeof(struct ssb_sprom)); 561 - 562 558 bcm47xx_fill_sprom_ethernet(sprom, prefix); 563 559 564 560 nvram_read_u8(prefix, NULL, "sromrev", &sprom->revision, 0); ··· 618 618 bcm47xx_fill_sprom_r1(sprom, prefix); 619 619 } 620 620 } 621 + 622 + #ifdef CONFIG_BCM47XX_SSB 623 + void bcm47xx_fill_ssb_boardinfo(struct ssb_boardinfo *boardinfo, 624 + const char *prefix) 625 + { 626 + nvram_read_u16(prefix, NULL, "boardvendor", &boardinfo->vendor, 0); 627 + if (!boardinfo->vendor) 628 + boardinfo->vendor = SSB_BOARDVENDOR_BCM; 629 + 630 + nvram_read_u16(prefix, NULL, "boardtype", &boardinfo->type, 0); 631 + } 632 + #endif 633 + 634 + #ifdef CONFIG_BCM47XX_BCMA 635 + void bcm47xx_fill_bcma_boardinfo(struct bcma_boardinfo *boardinfo, 636 + const char *prefix) 637 + { 638 + nvram_read_u16(prefix, NULL, "boardvendor", &boardinfo->vendor, 0); 639 + if (!boardinfo->vendor) 640 + boardinfo->vendor = SSB_BOARDVENDOR_BCM; 641 + 642 + nvram_read_u16(prefix, NULL, "boardtype", &boardinfo->type, 0); 643 + } 644 + #endif
+9
arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
··· 47 47 void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix); 48 48 void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom, const char *prefix); 49 49 50 + #ifdef CONFIG_BCM47XX_SSB 51 + void bcm47xx_fill_ssb_boardinfo(struct ssb_boardinfo *boardinfo, 52 + const char *prefix); 53 + #endif 54 + #ifdef CONFIG_BCM47XX_BCMA 55 + void bcm47xx_fill_bcma_boardinfo(struct bcma_boardinfo *boardinfo, 56 + const char *prefix); 57 + #endif 58 + 50 59 #endif /* __ASM_BCM47XX_H */
+2 -1
drivers/bcma/core.c
··· 30 30 udelay(10); 31 31 32 32 bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET); 33 + bcma_aread32(core, BCMA_RESET_CTL); 33 34 udelay(1); 34 35 } 35 36 EXPORT_SYMBOL_GPL(bcma_core_disable); ··· 78 77 pr_err("HT force timeout\n"); 79 78 break; 80 79 case BCMA_CLKMODE_DYNAMIC: 81 - pr_warn("Dynamic clockmode not supported yet!\n"); 80 + bcma_set32(core, BCMA_CLKCTLST, ~BCMA_CLKCTLST_FORCEHT); 82 81 break; 83 82 } 84 83 }
+51 -2
drivers/bcma/driver_pci.c
··· 24 24 return pcicore_read32(pc, BCMA_CORE_PCI_PCIEIND_DATA); 25 25 } 26 26 27 - #if 0 28 27 static void bcma_pcie_write(struct bcma_drv_pci *pc, u32 address, u32 data) 29 28 { 30 29 pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_ADDR, address); 31 30 pcicore_read32(pc, BCMA_CORE_PCI_PCIEIND_ADDR); 32 31 pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data); 33 32 } 34 - #endif 35 33 36 34 static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy) 37 35 { ··· 168 170 tmp & ~BCMA_CORE_PCI_PLL_CTRL_FREQDET_EN); 169 171 } 170 172 173 + static void bcma_core_pci_fixcfg(struct bcma_drv_pci *pc) 174 + { 175 + struct bcma_device *core = pc->core; 176 + u16 val16, core_index; 177 + uint regoff; 178 + 179 + regoff = BCMA_CORE_PCI_SPROM(BCMA_CORE_PCI_SPROM_PI_OFFSET); 180 + core_index = (u16)core->core_index; 181 + 182 + val16 = pcicore_read16(pc, regoff); 183 + if (((val16 & BCMA_CORE_PCI_SPROM_PI_MASK) >> BCMA_CORE_PCI_SPROM_PI_SHIFT) 184 + != core_index) { 185 + val16 = (core_index << BCMA_CORE_PCI_SPROM_PI_SHIFT) | 186 + (val16 & ~BCMA_CORE_PCI_SPROM_PI_MASK); 187 + pcicore_write16(pc, regoff, val16); 188 + } 189 + } 190 + 191 + /* Fix MISC config to allow coming out of L2/L3-Ready state w/o PRST */ 192 + /* Needs to happen when coming out of 'standby'/'hibernate' */ 193 + static void bcma_core_pci_config_fixup(struct bcma_drv_pci *pc) 194 + { 195 + u16 val16; 196 + uint regoff; 197 + 198 + regoff = BCMA_CORE_PCI_SPROM(BCMA_CORE_PCI_SPROM_MISC_CONFIG); 199 + 200 + val16 = pcicore_read16(pc, regoff); 201 + 202 + if (!(val16 & BCMA_CORE_PCI_SPROM_L23READY_EXIT_NOPERST)) { 203 + val16 |= BCMA_CORE_PCI_SPROM_L23READY_EXIT_NOPERST; 204 + pcicore_write16(pc, regoff, val16); 205 + } 206 + } 207 + 171 208 /************************************************** 172 209 * Init. 173 210 **************************************************/ 174 211 175 212 static void __devinit bcma_core_pci_clientmode_init(struct bcma_drv_pci *pc) 176 213 { 214 + bcma_core_pci_fixcfg(pc); 177 215 bcma_pcicore_serdes_workaround(pc); 216 + bcma_core_pci_config_fixup(pc); 178 217 } 179 218 180 219 void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc) ··· 259 224 return err; 260 225 } 261 226 EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl); 227 + 228 + void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) 229 + { 230 + u32 w; 231 + 232 + w = bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG); 233 + if (extend) 234 + w |= BCMA_CORE_PCI_ASPMTIMER_EXTEND; 235 + else 236 + w &= ~BCMA_CORE_PCI_ASPMTIMER_EXTEND; 237 + bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w); 238 + bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG); 239 + } 240 + EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
+5 -5
drivers/bcma/driver_pci_host.c
··· 119 119 if (unlikely(!addr)) 120 120 goto out; 121 121 err = -ENOMEM; 122 - mmio = ioremap_nocache(addr, len); 122 + mmio = ioremap_nocache(addr, sizeof(val)); 123 123 if (!mmio) 124 124 goto out; 125 125 ··· 171 171 addr = pc->core->addr + BCMA_CORE_PCI_PCICFG0; 172 172 addr |= (func << 8); 173 173 addr |= (off & 0xfc); 174 - mmio = ioremap_nocache(addr, len); 174 + mmio = ioremap_nocache(addr, sizeof(val)); 175 175 if (!mmio) 176 176 goto out; 177 177 } ··· 180 180 if (unlikely(!addr)) 181 181 goto out; 182 182 err = -ENOMEM; 183 - mmio = ioremap_nocache(addr, len); 183 + mmio = ioremap_nocache(addr, sizeof(val)); 184 184 if (!mmio) 185 185 goto out; 186 186 ··· 491 491 /* Ok, ready to run, register it to the system. 492 492 * The following needs change, if we want to port hostmode 493 493 * to non-MIPS platform. */ 494 - io_map_base = (unsigned long)ioremap_nocache(BCMA_SOC_PCI_MEM, 495 - 0x04000000); 494 + io_map_base = (unsigned long)ioremap_nocache(pc_host->mem_resource.start, 495 + resource_size(&pc_host->mem_resource)); 496 496 pc_host->pci_controller.io_map_base = io_map_base; 497 497 set_io_port_base(pc_host->pci_controller.io_map_base); 498 498 /* Give some time to the PCI controller to configure itself with the new
+5 -2
drivers/bcma/host_pci.c
··· 201 201 bus->hosttype = BCMA_HOSTTYPE_PCI; 202 202 bus->ops = &bcma_host_pci_ops; 203 203 204 + bus->boardinfo.vendor = bus->host_pci->subsystem_vendor; 205 + bus->boardinfo.type = bus->host_pci->subsystem_device; 206 + 204 207 /* Register */ 205 208 err = bcma_bus_register(bus); 206 209 if (err) ··· 225 222 return err; 226 223 } 227 224 228 - static void bcma_host_pci_remove(struct pci_dev *dev) 225 + static void __devexit bcma_host_pci_remove(struct pci_dev *dev) 229 226 { 230 227 struct bcma_bus *bus = pci_get_drvdata(dev); 231 228 ··· 280 277 .name = "bcma-pci-bridge", 281 278 .id_table = bcma_pci_bridge_tbl, 282 279 .probe = bcma_host_pci_probe, 283 - .remove = bcma_host_pci_remove, 280 + .remove = __devexit_p(bcma_host_pci_remove), 284 281 .driver.pm = BCMA_PM_OPS, 285 282 }; 286 283
+41 -15
drivers/bcma/scan.c
··· 19 19 u16 id; 20 20 const char *name; 21 21 }; 22 - struct bcma_device_id_name bcma_device_names[] = { 22 + 23 + static const struct bcma_device_id_name bcma_arm_device_names[] = { 24 + { BCMA_CORE_ARM_1176, "ARM 1176" }, 25 + { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" }, 26 + { BCMA_CORE_ARM_CM3, "ARM CM3" }, 27 + }; 28 + 29 + static const struct bcma_device_id_name bcma_bcm_device_names[] = { 23 30 { BCMA_CORE_OOB_ROUTER, "OOB Router" }, 24 31 { BCMA_CORE_INVALID, "Invalid" }, 25 32 { BCMA_CORE_CHIPCOMMON, "ChipCommon" }, ··· 34 27 { BCMA_CORE_SRAM, "SRAM" }, 35 28 { BCMA_CORE_SDRAM, "SDRAM" }, 36 29 { BCMA_CORE_PCI, "PCI" }, 37 - { BCMA_CORE_MIPS, "MIPS" }, 38 30 { BCMA_CORE_ETHERNET, "Fast Ethernet" }, 39 31 { BCMA_CORE_V90, "V90" }, 40 32 { BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" }, ··· 50 44 { BCMA_CORE_PHY_A, "PHY A" }, 51 45 { BCMA_CORE_PHY_B, "PHY B" }, 52 46 { BCMA_CORE_PHY_G, "PHY G" }, 53 - { BCMA_CORE_MIPS_3302, "MIPS 3302" }, 54 47 { BCMA_CORE_USB11_HOST, "USB 1.1 Host" }, 55 48 { BCMA_CORE_USB11_DEV, "USB 1.1 Device" }, 56 49 { BCMA_CORE_USB20_HOST, "USB 2.0 Host" }, ··· 63 58 { BCMA_CORE_PHY_N, "PHY N" }, 64 59 { BCMA_CORE_SRAM_CTL, "SRAM Controller" }, 65 60 { BCMA_CORE_MINI_MACPHY, "Mini MACPHY" }, 66 - { BCMA_CORE_ARM_1176, "ARM 1176" }, 67 - { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" }, 68 61 { BCMA_CORE_PHY_LP, "PHY LP" }, 69 62 { BCMA_CORE_PMU, "PMU" }, 70 63 { BCMA_CORE_PHY_SSN, "PHY SSN" }, 71 64 { BCMA_CORE_SDIO_DEV, "SDIO Device" }, 72 - { BCMA_CORE_ARM_CM3, "ARM CM3" }, 73 65 { BCMA_CORE_PHY_HT, "PHY HT" }, 74 - { BCMA_CORE_MIPS_74K, "MIPS 74K" }, 75 66 { BCMA_CORE_MAC_GBIT, "GBit MAC" }, 76 67 { BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" }, 77 68 { BCMA_CORE_PCIE_RC, "PCIe Root Complex" }, ··· 80 79 { BCMA_CORE_SHIM, "SHIM" }, 81 80 { BCMA_CORE_DEFAULT, "Default" }, 82 81 }; 83 - const char *bcma_device_name(struct bcma_device_id *id) 84 - { 85 - int i; 86 82 87 - if (id->manuf == BCMA_MANUF_BCM) { 88 - for (i = 0; i < ARRAY_SIZE(bcma_device_names); i++) { 89 - if (bcma_device_names[i].id == id->id) 90 - return bcma_device_names[i].name; 91 - } 83 + static const struct bcma_device_id_name bcma_mips_device_names[] = { 84 + { BCMA_CORE_MIPS, "MIPS" }, 85 + { BCMA_CORE_MIPS_3302, "MIPS 3302" }, 86 + { BCMA_CORE_MIPS_74K, "MIPS 74K" }, 87 + }; 88 + 89 + static const char *bcma_device_name(const struct bcma_device_id *id) 90 + { 91 + const struct bcma_device_id_name *names; 92 + int size, i; 93 + 94 + /* search manufacturer specific names */ 95 + switch (id->manuf) { 96 + case BCMA_MANUF_ARM: 97 + names = bcma_arm_device_names; 98 + size = ARRAY_SIZE(bcma_arm_device_names); 99 + break; 100 + case BCMA_MANUF_BCM: 101 + names = bcma_bcm_device_names; 102 + size = ARRAY_SIZE(bcma_bcm_device_names); 103 + break; 104 + case BCMA_MANUF_MIPS: 105 + names = bcma_mips_device_names; 106 + size = ARRAY_SIZE(bcma_mips_device_names); 107 + break; 108 + default: 109 + return "UNKNOWN"; 92 110 } 111 + 112 + for (i = 0; i < size; i++) { 113 + if (names[i].id == id->id) 114 + return names[i].name; 115 + } 116 + 93 117 return "UNKNOWN"; 94 118 } 95 119
+148 -1
drivers/bcma/sprom.c
··· 181 181 #define SPEX(_field, _offset, _mask, _shift) \ 182 182 bus->sprom._field = ((sprom[SPOFF(_offset)] & (_mask)) >> (_shift)) 183 183 184 + #define SPEX32(_field, _offset, _mask, _shift) \ 185 + bus->sprom._field = ((((u32)sprom[SPOFF((_offset)+2)] << 16 | \ 186 + sprom[SPOFF(_offset)]) & (_mask)) >> (_shift)) 187 + 188 + #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ 189 + do { \ 190 + SPEX(_field[0], _offset + 0, _mask, _shift); \ 191 + SPEX(_field[1], _offset + 2, _mask, _shift); \ 192 + SPEX(_field[2], _offset + 4, _mask, _shift); \ 193 + SPEX(_field[3], _offset + 6, _mask, _shift); \ 194 + SPEX(_field[4], _offset + 8, _mask, _shift); \ 195 + SPEX(_field[5], _offset + 10, _mask, _shift); \ 196 + SPEX(_field[6], _offset + 12, _mask, _shift); \ 197 + SPEX(_field[7], _offset + 14, _mask, _shift); \ 198 + } while (0) 199 + 184 200 static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom) 185 201 { 186 202 u16 v, o; ··· 259 243 SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, ~0, 0); 260 244 SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, ~0, 0); 261 245 262 - SPEX(country_code, SSB_SPROM8_CCODE, ~0, 0); 246 + SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8); 247 + SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0); 263 248 264 249 /* Extract cores power info info */ 265 250 for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) { ··· 315 298 SSB_SROM8_FEM_TR_ISO_SHIFT); 316 299 SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_ANTSWLUT, 317 300 SSB_SROM8_FEM_ANTSWLUT_SHIFT); 301 + 302 + SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A, 303 + SSB_SPROM8_ANTAVAIL_A_SHIFT); 304 + SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG, 305 + SSB_SPROM8_ANTAVAIL_BG_SHIFT); 306 + SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0); 307 + SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG, 308 + SSB_SPROM8_ITSSI_BG_SHIFT); 309 + SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0); 310 + SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A, 311 + SSB_SPROM8_ITSSI_A_SHIFT); 312 + SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0); 313 + SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK, 314 + SSB_SPROM8_MAXP_AL_SHIFT); 315 + SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0); 316 + SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1, 317 + SSB_SPROM8_GPIOA_P1_SHIFT); 318 + SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0); 319 + SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3, 320 + SSB_SPROM8_GPIOB_P3_SHIFT); 321 + SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0); 322 + SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G, 323 + SSB_SPROM8_TRI5G_SHIFT); 324 + SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0); 325 + SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH, 326 + SSB_SPROM8_TRI5GH_SHIFT); 327 + SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 328 + SSB_SPROM8_RXPO2G_SHIFT); 329 + SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G, 330 + SSB_SPROM8_RXPO5G_SHIFT); 331 + SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0); 332 + SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G, 333 + SSB_SPROM8_RSSISMC2G_SHIFT); 334 + SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G, 335 + SSB_SPROM8_RSSISAV2G_SHIFT); 336 + SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G, 337 + SSB_SPROM8_BXA2G_SHIFT); 338 + SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0); 339 + SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G, 340 + SSB_SPROM8_RSSISMC5G_SHIFT); 341 + SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G, 342 + SSB_SPROM8_RSSISAV5G_SHIFT); 343 + SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G, 344 + SSB_SPROM8_BXA5G_SHIFT); 345 + 346 + SPEX(pa0b0, SSB_SPROM8_PA0B0, ~0, 0); 347 + SPEX(pa0b1, SSB_SPROM8_PA0B1, ~0, 0); 348 + SPEX(pa0b2, SSB_SPROM8_PA0B2, ~0, 0); 349 + SPEX(pa1b0, SSB_SPROM8_PA1B0, ~0, 0); 350 + SPEX(pa1b1, SSB_SPROM8_PA1B1, ~0, 0); 351 + SPEX(pa1b2, SSB_SPROM8_PA1B2, ~0, 0); 352 + SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, ~0, 0); 353 + SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, ~0, 0); 354 + SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, ~0, 0); 355 + SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, ~0, 0); 356 + SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, ~0, 0); 357 + SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, ~0, 0); 358 + SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, ~0, 0); 359 + SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, ~0, 0); 360 + SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, ~0, 0); 361 + SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, ~0, 0); 362 + SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, ~0, 0); 363 + 364 + /* Extract the antenna gain values. */ 365 + SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01, 366 + SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT); 367 + SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01, 368 + SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT); 369 + SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23, 370 + SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT); 371 + SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23, 372 + SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT); 373 + 374 + SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON, 375 + SSB_SPROM8_LEDDC_ON_SHIFT); 376 + SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF, 377 + SSB_SPROM8_LEDDC_OFF_SHIFT); 378 + 379 + SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN, 380 + SSB_SPROM8_TXRXC_TXCHAIN_SHIFT); 381 + SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN, 382 + SSB_SPROM8_TXRXC_RXCHAIN_SHIFT); 383 + SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH, 384 + SSB_SPROM8_TXRXC_SWITCH_SHIFT); 385 + 386 + SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0); 387 + 388 + SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0); 389 + SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0); 390 + SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0); 391 + SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0); 392 + 393 + SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP, 394 + SSB_SPROM8_RAWTS_RAWTEMP_SHIFT); 395 + SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER, 396 + SSB_SPROM8_RAWTS_MEASPOWER_SHIFT); 397 + SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX, 398 + SSB_SPROM8_OPT_CORRX_TEMP_SLOPE, 399 + SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT); 400 + SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX, 401 + SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT); 402 + SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX, 403 + SSB_SPROM8_OPT_CORRX_TEMP_OPTION, 404 + SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT); 405 + SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP, 406 + SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR, 407 + SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT); 408 + SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP, 409 + SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP, 410 + SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT); 411 + SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL, 412 + SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT); 413 + 414 + SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0); 415 + SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0); 416 + SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0); 417 + SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0); 418 + 419 + SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH, 420 + SSB_SPROM8_THERMAL_TRESH_SHIFT); 421 + SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET, 422 + SSB_SPROM8_THERMAL_OFFSET_SHIFT); 423 + SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA, 424 + SSB_SPROM8_TEMPDELTA_PHYCAL, 425 + SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT); 426 + SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD, 427 + SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT); 428 + SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA, 429 + SSB_SPROM8_TEMPDELTA_HYSTERESIS, 430 + SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT); 318 431 } 319 432 320 433 /*
+6
drivers/bluetooth/ath3k.c
··· 81 81 /* Atheros AR5BBU12 with sflash firmware */ 82 82 { USB_DEVICE(0x0489, 0xE02C) }, 83 83 84 + /* Atheros AR5BBU22 with sflash firmware */ 85 + { USB_DEVICE(0x0489, 0xE03C) }, 86 + 84 87 { } /* Terminating entry */ 85 88 }; 86 89 ··· 101 98 { USB_DEVICE(0x04ca, 0x3005), .driver_info = BTUSB_ATH3012 }, 102 99 { USB_DEVICE(0x13d3, 0x3362), .driver_info = BTUSB_ATH3012 }, 103 100 { USB_DEVICE(0x0cf3, 0xe004), .driver_info = BTUSB_ATH3012 }, 101 + 102 + /* Atheros AR5BBU22 with sflash firmware */ 103 + { USB_DEVICE(0x0489, 0xE03C), .driver_info = BTUSB_ATH3012 }, 104 104 105 105 { } /* Terminating entry */ 106 106 };
+3
drivers/bluetooth/btmrvl_drv.h
··· 67 67 u8 wakeup_tries; 68 68 wait_queue_head_t cmd_wait_q; 69 69 u8 cmd_complete; 70 + bool is_suspended; 70 71 }; 71 72 72 73 struct btmrvl_private { ··· 140 139 int btmrvl_process_event(struct btmrvl_private *priv, struct sk_buff *skb); 141 140 142 141 int btmrvl_send_module_cfg_cmd(struct btmrvl_private *priv, int subcmd); 142 + int btmrvl_send_hscfg_cmd(struct btmrvl_private *priv); 143 143 int btmrvl_enable_ps(struct btmrvl_private *priv); 144 144 int btmrvl_prepare_command(struct btmrvl_private *priv); 145 + int btmrvl_enable_hs(struct btmrvl_private *priv); 145 146 146 147 #ifdef CONFIG_DEBUG_FS 147 148 void btmrvl_debugfs_init(struct hci_dev *hdev);
+33 -23
drivers/bluetooth/btmrvl_main.c
··· 200 200 } 201 201 EXPORT_SYMBOL_GPL(btmrvl_send_module_cfg_cmd); 202 202 203 + int btmrvl_send_hscfg_cmd(struct btmrvl_private *priv) 204 + { 205 + struct sk_buff *skb; 206 + struct btmrvl_cmd *cmd; 207 + 208 + skb = bt_skb_alloc(sizeof(*cmd), GFP_ATOMIC); 209 + if (!skb) { 210 + BT_ERR("No free skb"); 211 + return -ENOMEM; 212 + } 213 + 214 + cmd = (struct btmrvl_cmd *) skb_put(skb, sizeof(*cmd)); 215 + cmd->ocf_ogf = cpu_to_le16(hci_opcode_pack(OGF, 216 + BT_CMD_HOST_SLEEP_CONFIG)); 217 + cmd->length = 2; 218 + cmd->data[0] = (priv->btmrvl_dev.gpio_gap & 0xff00) >> 8; 219 + cmd->data[1] = (u8) (priv->btmrvl_dev.gpio_gap & 0x00ff); 220 + 221 + bt_cb(skb)->pkt_type = MRVL_VENDOR_PKT; 222 + 223 + skb->dev = (void *) priv->btmrvl_dev.hcidev; 224 + skb_queue_head(&priv->adapter->tx_queue, skb); 225 + 226 + BT_DBG("Queue HSCFG Command, gpio=0x%x, gap=0x%x", cmd->data[0], 227 + cmd->data[1]); 228 + 229 + return 0; 230 + } 231 + EXPORT_SYMBOL_GPL(btmrvl_send_hscfg_cmd); 232 + 203 233 int btmrvl_enable_ps(struct btmrvl_private *priv) 204 234 { 205 235 struct sk_buff *skb; ··· 262 232 } 263 233 EXPORT_SYMBOL_GPL(btmrvl_enable_ps); 264 234 265 - static int btmrvl_enable_hs(struct btmrvl_private *priv) 235 + int btmrvl_enable_hs(struct btmrvl_private *priv) 266 236 { 267 237 struct sk_buff *skb; 268 238 struct btmrvl_cmd *cmd; ··· 298 268 299 269 return ret; 300 270 } 271 + EXPORT_SYMBOL_GPL(btmrvl_enable_hs); 301 272 302 273 int btmrvl_prepare_command(struct btmrvl_private *priv) 303 274 { 304 - struct sk_buff *skb = NULL; 305 - struct btmrvl_cmd *cmd; 306 275 int ret = 0; 307 276 308 277 if (priv->btmrvl_dev.hscfgcmd) { 309 278 priv->btmrvl_dev.hscfgcmd = 0; 310 - 311 - skb = bt_skb_alloc(sizeof(*cmd), GFP_ATOMIC); 312 - if (skb == NULL) { 313 - BT_ERR("No free skb"); 314 - return -ENOMEM; 315 - } 316 - 317 - cmd = (struct btmrvl_cmd *) skb_put(skb, sizeof(*cmd)); 318 - cmd->ocf_ogf = cpu_to_le16(hci_opcode_pack(OGF, BT_CMD_HOST_SLEEP_CONFIG)); 319 - cmd->length = 2; 320 - cmd->data[0] = (priv->btmrvl_dev.gpio_gap & 0xff00) >> 8; 321 - cmd->data[1] = (u8) (priv->btmrvl_dev.gpio_gap & 0x00ff); 322 - 323 - bt_cb(skb)->pkt_type = MRVL_VENDOR_PKT; 324 - 325 - skb->dev = (void *) priv->btmrvl_dev.hcidev; 326 - skb_queue_head(&priv->adapter->tx_queue, skb); 327 - 328 - BT_DBG("Queue HSCFG Command, gpio=0x%x, gap=0x%x", 329 - cmd->data[0], cmd->data[1]); 279 + btmrvl_send_hscfg_cmd(priv); 330 280 } 331 281 332 282 if (priv->btmrvl_dev.pscmd) {
+105 -7
drivers/bluetooth/btmrvl_sdio.c
··· 339 339 340 340 done: 341 341 kfree(tmphlprbuf); 342 - if (fw_helper) 343 - release_firmware(fw_helper); 344 - 342 + release_firmware(fw_helper); 345 343 return ret; 346 344 } 347 345 ··· 482 484 483 485 done: 484 486 kfree(tmpfwbuf); 485 - 486 - if (fw_firmware) 487 - release_firmware(fw_firmware); 488 - 487 + release_firmware(fw_firmware); 489 488 return ret; 490 489 } 491 490 ··· 1008 1013 priv->btmrvl_dev.psmode = 1; 1009 1014 btmrvl_enable_ps(priv); 1010 1015 1016 + priv->btmrvl_dev.gpio_gap = 0xffff; 1017 + btmrvl_send_hscfg_cmd(priv); 1018 + 1011 1019 return 0; 1012 1020 1013 1021 disable_host_int: ··· 1046 1048 } 1047 1049 } 1048 1050 1051 + static int btmrvl_sdio_suspend(struct device *dev) 1052 + { 1053 + struct sdio_func *func = dev_to_sdio_func(dev); 1054 + struct btmrvl_sdio_card *card; 1055 + struct btmrvl_private *priv; 1056 + mmc_pm_flag_t pm_flags; 1057 + struct hci_dev *hcidev; 1058 + 1059 + if (func) { 1060 + pm_flags = sdio_get_host_pm_caps(func); 1061 + BT_DBG("%s: suspend: PM flags = 0x%x", sdio_func_id(func), 1062 + pm_flags); 1063 + if (!(pm_flags & MMC_PM_KEEP_POWER)) { 1064 + BT_ERR("%s: cannot remain alive while suspended", 1065 + sdio_func_id(func)); 1066 + return -ENOSYS; 1067 + } 1068 + card = sdio_get_drvdata(func); 1069 + if (!card || !card->priv) { 1070 + BT_ERR("card or priv structure is not valid"); 1071 + return 0; 1072 + } 1073 + } else { 1074 + BT_ERR("sdio_func is not specified"); 1075 + return 0; 1076 + } 1077 + 1078 + priv = card->priv; 1079 + 1080 + if (priv->adapter->hs_state != HS_ACTIVATED) { 1081 + if (btmrvl_enable_hs(priv)) { 1082 + BT_ERR("HS not actived, suspend failed!"); 1083 + return -EBUSY; 1084 + } 1085 + } 1086 + hcidev = priv->btmrvl_dev.hcidev; 1087 + BT_DBG("%s: SDIO suspend", hcidev->name); 1088 + hci_suspend_dev(hcidev); 1089 + skb_queue_purge(&priv->adapter->tx_queue); 1090 + 1091 + priv->adapter->is_suspended = true; 1092 + 1093 + /* We will keep the power when hs enabled successfully */ 1094 + if (priv->adapter->hs_state == HS_ACTIVATED) { 1095 + BT_DBG("suspend with MMC_PM_KEEP_POWER"); 1096 + return sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); 1097 + } else { 1098 + BT_DBG("suspend without MMC_PM_KEEP_POWER"); 1099 + return 0; 1100 + } 1101 + } 1102 + 1103 + static int btmrvl_sdio_resume(struct device *dev) 1104 + { 1105 + struct sdio_func *func = dev_to_sdio_func(dev); 1106 + struct btmrvl_sdio_card *card; 1107 + struct btmrvl_private *priv; 1108 + mmc_pm_flag_t pm_flags; 1109 + struct hci_dev *hcidev; 1110 + 1111 + if (func) { 1112 + pm_flags = sdio_get_host_pm_caps(func); 1113 + BT_DBG("%s: resume: PM flags = 0x%x", sdio_func_id(func), 1114 + pm_flags); 1115 + card = sdio_get_drvdata(func); 1116 + if (!card || !card->priv) { 1117 + BT_ERR("card or priv structure is not valid"); 1118 + return 0; 1119 + } 1120 + } else { 1121 + BT_ERR("sdio_func is not specified"); 1122 + return 0; 1123 + } 1124 + priv = card->priv; 1125 + 1126 + if (!priv->adapter->is_suspended) { 1127 + BT_DBG("device already resumed"); 1128 + return 0; 1129 + } 1130 + 1131 + priv->adapter->is_suspended = false; 1132 + hcidev = priv->btmrvl_dev.hcidev; 1133 + BT_DBG("%s: SDIO resume", hcidev->name); 1134 + hci_resume_dev(hcidev); 1135 + priv->hw_wakeup_firmware(priv); 1136 + priv->adapter->hs_state = HS_DEACTIVATED; 1137 + BT_DBG("%s: HS DEACTIVATED in resume!", hcidev->name); 1138 + 1139 + return 0; 1140 + } 1141 + 1142 + static const struct dev_pm_ops btmrvl_sdio_pm_ops = { 1143 + .suspend = btmrvl_sdio_suspend, 1144 + .resume = btmrvl_sdio_resume, 1145 + }; 1146 + 1049 1147 static struct sdio_driver bt_mrvl_sdio = { 1050 1148 .name = "btmrvl_sdio", 1051 1149 .id_table = btmrvl_sdio_ids, 1052 1150 .probe = btmrvl_sdio_probe, 1053 1151 .remove = btmrvl_sdio_remove, 1152 + .drv = { 1153 + .owner = THIS_MODULE, 1154 + .pm = &btmrvl_sdio_pm_ops, 1155 + } 1054 1156 }; 1055 1157 1056 1158 static int __init btmrvl_sdio_init_module(void)
+14 -2
drivers/bluetooth/btusb.c
··· 143 143 /* Atheros AR5BBU12 with sflash firmware */ 144 144 { USB_DEVICE(0x0489, 0xe02c), .driver_info = BTUSB_IGNORE }, 145 145 146 + /* Atheros AR5BBU12 with sflash firmware */ 147 + { USB_DEVICE(0x0489, 0xe03c), .driver_info = BTUSB_ATH3012 }, 148 + 146 149 /* Broadcom BCM2035 */ 147 150 { USB_DEVICE(0x0a5c, 0x2035), .driver_info = BTUSB_WRONG_SCO_MTU }, 148 151 { USB_DEVICE(0x0a5c, 0x200a), .driver_info = BTUSB_WRONG_SCO_MTU }, ··· 858 855 { 859 856 struct btusb_data *data = container_of(work, struct btusb_data, work); 860 857 struct hci_dev *hdev = data->hdev; 858 + int new_alts; 861 859 int err; 862 860 863 861 if (hdev->conn_hash.sco_num > 0) { ··· 872 868 873 869 set_bit(BTUSB_DID_ISO_RESUME, &data->flags); 874 870 } 875 - if (data->isoc_altsetting != 2) { 871 + 872 + if (hdev->voice_setting & 0x0020) { 873 + static const int alts[3] = { 2, 4, 5 }; 874 + new_alts = alts[hdev->conn_hash.sco_num - 1]; 875 + } else { 876 + new_alts = hdev->conn_hash.sco_num; 877 + } 878 + 879 + if (data->isoc_altsetting != new_alts) { 876 880 clear_bit(BTUSB_ISOC_RUNNING, &data->flags); 877 881 usb_kill_anchored_urbs(&data->isoc_anchor); 878 882 879 - if (__set_isoc_interface(hdev, 2) < 0) 883 + if (__set_isoc_interface(hdev, new_alts) < 0) 880 884 return; 881 885 } 882 886
+1 -1
drivers/bluetooth/hci_ldisc.c
··· 388 388 hdev->close = hci_uart_close; 389 389 hdev->flush = hci_uart_flush; 390 390 hdev->send = hci_uart_send_frame; 391 - hdev->parent = hu->tty->dev; 391 + SET_HCIDEV_DEV(hdev, hu->tty->dev); 392 392 393 393 if (test_bit(HCI_UART_RAW_DEVICE, &hu->hdev_flags)) 394 394 set_bit(HCI_QUIRK_RAW_DEVICE, &hdev->quirks);
+2 -1
drivers/bluetooth/hci_vhci.c
··· 252 252 } 253 253 254 254 file->private_data = data; 255 + nonseekable_open(inode, file); 255 256 256 - return nonseekable_open(inode, file); 257 + return 0; 257 258 } 258 259 259 260 static int vhci_release(struct inode *inode, struct file *file)
+6
drivers/isdn/hardware/mISDN/hfcsusb.h
··· 410 410 {LED_SCHEME1, {0x88, -64, -32, -16}, 411 411 "ZyXEL OMNI.NET USB II"}), 412 412 }, 413 + { 414 + USB_DEVICE(0x1ae7, 0x0525), 415 + .driver_info = (unsigned long) &((struct hfcsusb_vdata) 416 + {LED_SCHEME1, {0x88, -64, -32, -16}, 417 + "X-Tensions USB ISDN TA XC-525"}), 418 + }, 413 419 { } 414 420 }; 415 421
+1 -1
drivers/net/ethernet/freescale/gianfar.c
··· 1082 1082 1083 1083 if (dev->features & NETIF_F_IP_CSUM || 1084 1084 priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER) 1085 - dev->hard_header_len += GMAC_FCB_LEN; 1085 + dev->needed_headroom = GMAC_FCB_LEN; 1086 1086 1087 1087 /* Program the isrg regs only if number of grps > 1 */ 1088 1088 if (priv->num_grps > 1) {
+167 -71
drivers/net/wireless/ath/ath6kl/cfg80211.c
··· 693 693 ie, 2 + vif->ssid_len + beacon_ie_len, 694 694 0, GFP_KERNEL); 695 695 if (bss) 696 - ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "added bss %pM to " 697 - "cfg80211\n", bssid); 696 + ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, 697 + "added bss %pM to cfg80211\n", bssid); 698 698 kfree(ie); 699 699 } else 700 700 ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "cfg80211 already has a bss\n"); ··· 882 882 vif->sme_state = SME_DISCONNECTED; 883 883 } 884 884 885 + static int ath6kl_set_probed_ssids(struct ath6kl *ar, 886 + struct ath6kl_vif *vif, 887 + struct cfg80211_ssid *ssids, int n_ssids) 888 + { 889 + u8 i; 890 + 891 + if (n_ssids > MAX_PROBED_SSID_INDEX) 892 + return -EINVAL; 893 + 894 + for (i = 0; i < n_ssids; i++) { 895 + ath6kl_wmi_probedssid_cmd(ar->wmi, vif->fw_vif_idx, i, 896 + ssids[i].ssid_len ? 897 + SPECIFIC_SSID_FLAG : ANY_SSID_FLAG, 898 + ssids[i].ssid_len, 899 + ssids[i].ssid); 900 + } 901 + 902 + /* Make sure no old entries are left behind */ 903 + for (i = n_ssids; i < MAX_PROBED_SSID_INDEX; i++) { 904 + ath6kl_wmi_probedssid_cmd(ar->wmi, vif->fw_vif_idx, i, 905 + DISABLE_SSID_FLAG, 0, NULL); 906 + } 907 + 908 + return 0; 909 + } 910 + 885 911 static int ath6kl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, 886 912 struct cfg80211_scan_request *request) 887 913 { ··· 925 899 926 900 if (!ar->usr_bss_filter) { 927 901 clear_bit(CLEAR_BSSFILTER_ON_BEACON, &vif->flags); 928 - ret = ath6kl_wmi_bssfilter_cmd( 929 - ar->wmi, vif->fw_vif_idx, 930 - (test_bit(CONNECTED, &vif->flags) ? 931 - ALL_BUT_BSS_FILTER : ALL_BSS_FILTER), 0); 902 + ret = ath6kl_wmi_bssfilter_cmd(ar->wmi, vif->fw_vif_idx, 903 + ALL_BSS_FILTER, 0); 932 904 if (ret) { 933 905 ath6kl_err("couldn't set bss filtering\n"); 934 906 return ret; 935 907 } 936 908 } 937 909 938 - if (request->n_ssids && request->ssids[0].ssid_len) { 939 - u8 i; 940 - 941 - if (request->n_ssids > (MAX_PROBED_SSID_INDEX - 1)) 942 - request->n_ssids = MAX_PROBED_SSID_INDEX - 1; 943 - 944 - for (i = 0; i < request->n_ssids; i++) 945 - ath6kl_wmi_probedssid_cmd(ar->wmi, vif->fw_vif_idx, 946 - i + 1, SPECIFIC_SSID_FLAG, 947 - request->ssids[i].ssid_len, 948 - request->ssids[i].ssid); 949 - } 910 + ret = ath6kl_set_probed_ssids(ar, vif, request->ssids, 911 + request->n_ssids); 912 + if (ret < 0) 913 + return ret; 950 914 951 915 /* this also clears IE in fw if it's not set */ 952 916 ret = ath6kl_wmi_set_appie_cmd(ar->wmi, vif->fw_vif_idx, 953 917 WMI_FRAME_PROBE_REQ, 954 918 request->ie, request->ie_len); 955 919 if (ret) { 956 - ath6kl_err("failed to set Probe Request appie for " 957 - "scan"); 920 + ath6kl_err("failed to set Probe Request appie for scan"); 958 921 return ret; 959 922 } 960 923 ··· 960 945 961 946 channels = kzalloc(n_channels * sizeof(u16), GFP_KERNEL); 962 947 if (channels == NULL) { 963 - ath6kl_warn("failed to set scan channels, " 964 - "scan all channels"); 948 + ath6kl_warn("failed to set scan channels, scan all channels"); 965 949 n_channels = 0; 966 950 } 967 951 ··· 1030 1016 out: 1031 1017 cfg80211_scan_done(vif->scan_req, aborted); 1032 1018 vif->scan_req = NULL; 1019 + } 1020 + 1021 + void ath6kl_cfg80211_ch_switch_notify(struct ath6kl_vif *vif, int freq, 1022 + enum wmi_phy_mode mode) 1023 + { 1024 + enum nl80211_channel_type type; 1025 + 1026 + ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, 1027 + "channel switch notify nw_type %d freq %d mode %d\n", 1028 + vif->nw_type, freq, mode); 1029 + 1030 + type = (mode == WMI_11G_HT20) ? NL80211_CHAN_HT20 : NL80211_CHAN_NO_HT; 1031 + 1032 + cfg80211_ch_switch_notify(vif->ndev, freq, type); 1033 1033 } 1034 1034 1035 1035 static int ath6kl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev, ··· 1139 1111 ar->ap_mode_bkey.key_len = key->key_len; 1140 1112 memcpy(ar->ap_mode_bkey.key, key->key, key->key_len); 1141 1113 if (!test_bit(CONNECTED, &vif->flags)) { 1142 - ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "Delay initial group " 1143 - "key configuration until AP mode has been " 1144 - "started\n"); 1114 + ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, 1115 + "Delay initial group key configuration until AP mode has been started\n"); 1145 1116 /* 1146 1117 * The key will be set in ath6kl_connect_ap_mode() once 1147 1118 * the connected event is received from the target. ··· 1156 1129 * the AP mode has properly started 1157 1130 * (ath6kl_install_statioc_wep_keys). 1158 1131 */ 1159 - ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "Delay WEP key configuration " 1160 - "until AP mode has been started\n"); 1132 + ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, 1133 + "Delay WEP key configuration until AP mode has been started\n"); 1161 1134 vif->wep_key_list[key_index].key_len = key->key_len; 1162 1135 memcpy(vif->wep_key_list[key_index].key, key->key, 1163 1136 key->key_len); ··· 1989 1962 sizeof(discvr_pattern), discvr_offset, 1990 1963 discvr_pattern, discvr_mask); 1991 1964 if (ret) { 1992 - ath6kl_err("failed to add WOW mDNS/SSDP/LLMNR " 1993 - "pattern\n"); 1965 + ath6kl_err("failed to add WOW mDNS/SSDP/LLMNR pattern\n"); 1994 1966 return ret; 1995 1967 } 1996 1968 } ··· 2057 2031 u8 index = 0; 2058 2032 __be32 ips[MAX_IP_ADDRS]; 2059 2033 2034 + /* The FW currently can't support multi-vif WoW properly. */ 2035 + if (ar->num_vif > 1) 2036 + return -EIO; 2037 + 2060 2038 vif = ath6kl_vif_first(ar); 2061 2039 if (!vif) 2062 2040 return -EIO; ··· 2073 2043 2074 2044 if (wow && (wow->n_patterns > WOW_MAX_FILTERS_PER_LIST)) 2075 2045 return -EINVAL; 2046 + 2047 + if (!test_bit(NETDEV_MCAST_ALL_ON, &vif->flags)) { 2048 + ret = ath6kl_wmi_mcast_filter_cmd(vif->ar->wmi, 2049 + vif->fw_vif_idx, false); 2050 + if (ret) 2051 + return ret; 2052 + } 2076 2053 2077 2054 /* Clear existing WOW patterns */ 2078 2055 for (i = 0; i < WOW_MAX_FILTERS_PER_LIST; i++) ··· 2184 2147 ret = ath6kl_wmi_set_host_sleep_mode_cmd(ar->wmi, vif->fw_vif_idx, 2185 2148 ATH6KL_HOST_MODE_AWAKE); 2186 2149 if (ret) { 2187 - ath6kl_warn("Failed to configure host sleep mode for " 2188 - "wow resume: %d\n", ret); 2150 + ath6kl_warn("Failed to configure host sleep mode for wow resume: %d\n", 2151 + ret); 2189 2152 ar->state = ATH6KL_STATE_WOW; 2190 2153 return ret; 2191 2154 } ··· 2209 2172 2210 2173 ar->state = ATH6KL_STATE_ON; 2211 2174 2175 + if (!test_bit(NETDEV_MCAST_ALL_OFF, &vif->flags)) { 2176 + ret = ath6kl_wmi_mcast_filter_cmd(vif->ar->wmi, 2177 + vif->fw_vif_idx, true); 2178 + if (ret) 2179 + return ret; 2180 + } 2181 + 2212 2182 netif_wake_queue(vif->ndev); 2213 2183 2214 2184 return 0; ··· 2230 2186 if (!vif) 2231 2187 return -EIO; 2232 2188 2233 - if (!ath6kl_cfg80211_ready(vif)) 2189 + if (!test_bit(WMI_READY, &ar->flag)) { 2190 + ath6kl_err("deepsleep failed as wmi is not ready\n"); 2234 2191 return -EIO; 2192 + } 2235 2193 2236 2194 ath6kl_cfg80211_stop_all(ar); 2237 2195 ··· 2493 2447 band, htcap); 2494 2448 } 2495 2449 2450 + static int ath6kl_restore_htcap(struct ath6kl_vif *vif) 2451 + { 2452 + struct wiphy *wiphy = vif->ar->wiphy; 2453 + int band, ret = 0; 2454 + 2455 + for (band = 0; band < IEEE80211_NUM_BANDS; band++) { 2456 + if (!wiphy->bands[band]) 2457 + continue; 2458 + 2459 + ret = ath6kl_set_htcap(vif, band, 2460 + wiphy->bands[band]->ht_cap.ht_supported); 2461 + if (ret) 2462 + return ret; 2463 + } 2464 + 2465 + return ret; 2466 + } 2467 + 2496 2468 static bool ath6kl_is_p2p_ie(const u8 *pos) 2497 2469 { 2498 2470 return pos[0] == WLAN_EID_VENDOR_SPECIFIC && pos[1] >= 4 && ··· 2632 2568 /* skip element id and length */ 2633 2569 rsn_ie += 2; 2634 2570 2635 - /* skip version, group cipher */ 2636 - if (rsn_ie_len < 6) 2571 + /* skip version */ 2572 + if (rsn_ie_len < 2) 2637 2573 return -EINVAL; 2638 - rsn_ie += 6; 2639 - rsn_ie_len -= 6; 2574 + rsn_ie += 2; 2575 + rsn_ie_len -= 2; 2576 + 2577 + /* skip group cipher suite */ 2578 + if (rsn_ie_len < 4) 2579 + return 0; 2580 + rsn_ie += 4; 2581 + rsn_ie_len -= 4; 2640 2582 2641 2583 /* skip pairwise cipher suite */ 2642 2584 if (rsn_ie_len < 2) 2643 - return -EINVAL; 2644 - cnt = *((u16 *) rsn_ie); 2585 + return 0; 2586 + cnt = get_unaligned_le16(rsn_ie); 2645 2587 rsn_ie += (2 + cnt * 4); 2646 2588 rsn_ie_len -= (2 + cnt * 4); 2647 2589 2648 2590 /* skip akm suite */ 2649 2591 if (rsn_ie_len < 2) 2650 - return -EINVAL; 2651 - cnt = *((u16 *) rsn_ie); 2592 + return 0; 2593 + cnt = get_unaligned_le16(rsn_ie); 2652 2594 rsn_ie += (2 + cnt * 4); 2653 2595 rsn_ie_len -= (2 + cnt * 4); 2654 2596 2655 2597 if (rsn_ie_len < 2) 2656 - return -EINVAL; 2598 + return 0; 2657 2599 2658 2600 memcpy(rsn_capab, rsn_ie, 2); 2659 2601 ··· 2836 2766 return res; 2837 2767 } 2838 2768 2769 + memcpy(&vif->profile, &p, sizeof(p)); 2839 2770 res = ath6kl_wmi_ap_profile_commit(ar->wmi, vif->fw_vif_idx, &p); 2840 2771 if (res < 0) 2841 2772 return res; ··· 2872 2801 clear_bit(CONNECTED, &vif->flags); 2873 2802 2874 2803 /* Restore ht setting in firmware */ 2875 - if (ath6kl_set_htcap(vif, IEEE80211_BAND_2GHZ, true)) 2876 - return -EIO; 2877 - 2878 - if (ath6kl_set_htcap(vif, IEEE80211_BAND_5GHZ, true)) 2879 - return -EIO; 2880 - 2881 - return 0; 2804 + return ath6kl_restore_htcap(vif); 2882 2805 } 2883 2806 2884 2807 static const u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; ··· 3146 3081 struct ath6kl_vif *vif = netdev_priv(dev); 3147 3082 u16 interval; 3148 3083 int ret; 3149 - u8 i; 3150 3084 3151 3085 if (ar->state != ATH6KL_STATE_ON) 3152 3086 return -EIO; ··· 3153 3089 if (vif->sme_state != SME_DISCONNECTED) 3154 3090 return -EBUSY; 3155 3091 3092 + /* The FW currently can't support multi-vif WoW properly. */ 3093 + if (ar->num_vif > 1) 3094 + return -EIO; 3095 + 3156 3096 ath6kl_cfg80211_scan_complete_event(vif, true); 3157 3097 3158 - for (i = 0; i < ar->wiphy->max_sched_scan_ssids; i++) { 3159 - ath6kl_wmi_probedssid_cmd(ar->wmi, vif->fw_vif_idx, 3160 - i, DISABLE_SSID_FLAG, 3161 - 0, NULL); 3162 - } 3098 + ret = ath6kl_set_probed_ssids(ar, vif, request->ssids, 3099 + request->n_ssids); 3100 + if (ret < 0) 3101 + return ret; 3163 3102 3164 3103 /* fw uses seconds, also make sure that it's >0 */ 3165 3104 interval = max_t(u16, 1, request->interval / 1000); 3166 3105 3167 3106 ath6kl_wmi_scanparams_cmd(ar->wmi, vif->fw_vif_idx, 3168 3107 interval, interval, 3169 - 10, 0, 0, 0, 3, 0, 0, 0); 3170 - 3171 - if (request->n_ssids && request->ssids[0].ssid_len) { 3172 - for (i = 0; i < request->n_ssids; i++) { 3173 - ath6kl_wmi_probedssid_cmd(ar->wmi, vif->fw_vif_idx, 3174 - i, SPECIFIC_SSID_FLAG, 3175 - request->ssids[i].ssid_len, 3176 - request->ssids[i].ssid); 3177 - } 3178 - } 3108 + vif->bg_scan_period, 0, 0, 0, 3, 0, 0, 0); 3179 3109 3180 3110 ret = ath6kl_wmi_set_wow_mode_cmd(ar->wmi, vif->fw_vif_idx, 3181 3111 ATH6KL_WOW_MODE_ENABLE, ··· 3329 3271 ar->wmi->saved_pwr_mode = ar->wmi->pwr_mode; 3330 3272 3331 3273 if (ath6kl_wmi_powermode_cmd(ar->wmi, 0, REC_POWER) != 0) 3332 - ath6kl_warn("ath6kl_deep_sleep_enable: " 3333 - "wmi_powermode_cmd failed\n"); 3274 + ath6kl_warn("ath6kl_deep_sleep_enable: wmi_powermode_cmd failed\n"); 3334 3275 return; 3335 3276 } 3336 3277 ··· 3409 3352 vif->next_mode = nw_type; 3410 3353 vif->listen_intvl_t = ATH6KL_DEFAULT_LISTEN_INTVAL; 3411 3354 vif->bmiss_time_t = ATH6KL_DEFAULT_BMISS_TIME; 3355 + vif->bg_scan_period = 0; 3412 3356 vif->htcap.ht_enable = true; 3413 3357 3414 3358 memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN); ··· 3451 3393 int ath6kl_cfg80211_init(struct ath6kl *ar) 3452 3394 { 3453 3395 struct wiphy *wiphy = ar->wiphy; 3396 + bool band_2gig = false, band_5gig = false, ht = false; 3454 3397 int ret; 3455 3398 3456 3399 wiphy->mgmt_stypes = ath6kl_mgmt_stypes; ··· 3472 3413 /* max num of ssids that can be probed during scanning */ 3473 3414 wiphy->max_scan_ssids = MAX_PROBED_SSID_INDEX; 3474 3415 wiphy->max_scan_ie_len = 1000; /* FIX: what is correct limit? */ 3475 - wiphy->bands[IEEE80211_BAND_2GHZ] = &ath6kl_band_2ghz; 3476 - wiphy->bands[IEEE80211_BAND_5GHZ] = &ath6kl_band_5ghz; 3416 + switch (ar->hw.cap) { 3417 + case WMI_11AN_CAP: 3418 + ht = true; 3419 + case WMI_11A_CAP: 3420 + band_5gig = true; 3421 + break; 3422 + case WMI_11GN_CAP: 3423 + ht = true; 3424 + case WMI_11G_CAP: 3425 + band_2gig = true; 3426 + break; 3427 + case WMI_11AGN_CAP: 3428 + ht = true; 3429 + case WMI_11AG_CAP: 3430 + band_2gig = true; 3431 + band_5gig = true; 3432 + break; 3433 + default: 3434 + ath6kl_err("invalid phy capability!\n"); 3435 + return -EINVAL; 3436 + } 3437 + 3438 + /* 3439 + * Even if the fw has HT support, advertise HT cap only when 3440 + * the firmware has support to override RSN capability, otherwise 3441 + * 4-way handshake would fail. 3442 + */ 3443 + if (!(ht && 3444 + test_bit(ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, 3445 + ar->fw_capabilities))) { 3446 + ath6kl_band_2ghz.ht_cap.cap = 0; 3447 + ath6kl_band_2ghz.ht_cap.ht_supported = false; 3448 + ath6kl_band_5ghz.ht_cap.cap = 0; 3449 + ath6kl_band_5ghz.ht_cap.ht_supported = false; 3450 + } 3451 + if (band_2gig) 3452 + wiphy->bands[IEEE80211_BAND_2GHZ] = &ath6kl_band_2ghz; 3453 + if (band_5gig) 3454 + wiphy->bands[IEEE80211_BAND_5GHZ] = &ath6kl_band_5ghz; 3455 + 3477 3456 wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; 3478 3457 3479 3458 wiphy->cipher_suites = cipher_suites; ··· 3527 3430 wiphy->wowlan.pattern_min_len = 1; 3528 3431 wiphy->wowlan.pattern_max_len = WOW_PATTERN_SIZE; 3529 3432 3530 - wiphy->max_sched_scan_ssids = 10; 3433 + wiphy->max_sched_scan_ssids = MAX_PROBED_SSID_INDEX; 3531 3434 3532 3435 ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM | 3533 3436 WIPHY_FLAG_HAVE_AP_SME | ··· 3544 3447 ar->wiphy->probe_resp_offload = 3545 3448 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS | 3546 3449 NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 | 3547 - NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P | 3548 - NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U; 3450 + NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P; 3549 3451 3550 3452 ret = wiphy_register(wiphy); 3551 3453 if (ret < 0) {
+2
drivers/net/wireless/ath/ath6kl/cfg80211.h
··· 28 28 struct net_device *ath6kl_interface_add(struct ath6kl *ar, char *name, 29 29 enum nl80211_iftype type, 30 30 u8 fw_vif_idx, u8 nw_type); 31 + void ath6kl_cfg80211_ch_switch_notify(struct ath6kl_vif *vif, int freq, 32 + enum wmi_phy_mode mode); 31 33 void ath6kl_cfg80211_scan_complete_event(struct ath6kl_vif *vif, bool aborted); 32 34 33 35 void ath6kl_cfg80211_connect_event(struct ath6kl_vif *vif, u16 channel,
+24 -9
drivers/net/wireless/ath/ath6kl/core.h
··· 126 126 #define AR6003_HW_2_0_FIRMWARE_FILE "athwlan.bin.z77" 127 127 #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "athtcmd_ram.bin" 128 128 #define AR6003_HW_2_0_PATCH_FILE "data.patch.bin" 129 - #define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin" 129 + #define AR6003_HW_2_0_BOARD_DATA_FILE AR6003_HW_2_0_FW_DIR "/bdata.bin" 130 130 #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \ 131 - "ath6k/AR6003/hw2.0/bdata.SD31.bin" 131 + AR6003_HW_2_0_FW_DIR "/bdata.SD31.bin" 132 132 133 133 /* AR6003 3.0 definitions */ 134 134 #define AR6003_HW_2_1_1_VERSION 0x30000582 ··· 139 139 #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE "utf.bin" 140 140 #define AR6003_HW_2_1_1_TESTSCRIPT_FILE "nullTestFlow.bin" 141 141 #define AR6003_HW_2_1_1_PATCH_FILE "data.patch.bin" 142 - #define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin" 142 + #define AR6003_HW_2_1_1_BOARD_DATA_FILE AR6003_HW_2_1_1_FW_DIR "/bdata.bin" 143 143 #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \ 144 - "ath6k/AR6003/hw2.1.1/bdata.SD31.bin" 144 + AR6003_HW_2_1_1_FW_DIR "/bdata.SD31.bin" 145 145 146 146 /* AR6004 1.0 definitions */ 147 147 #define AR6004_HW_1_0_VERSION 0x30000623 148 148 #define AR6004_HW_1_0_FW_DIR "ath6k/AR6004/hw1.0" 149 149 #define AR6004_HW_1_0_FIRMWARE_FILE "fw.ram.bin" 150 - #define AR6004_HW_1_0_BOARD_DATA_FILE "ath6k/AR6004/hw1.0/bdata.bin" 150 + #define AR6004_HW_1_0_BOARD_DATA_FILE AR6004_HW_1_0_FW_DIR "/bdata.bin" 151 151 #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \ 152 - "ath6k/AR6004/hw1.0/bdata.DB132.bin" 152 + AR6004_HW_1_0_FW_DIR "/bdata.DB132.bin" 153 153 154 154 /* AR6004 1.1 definitions */ 155 155 #define AR6004_HW_1_1_VERSION 0x30000001 156 156 #define AR6004_HW_1_1_FW_DIR "ath6k/AR6004/hw1.1" 157 157 #define AR6004_HW_1_1_FIRMWARE_FILE "fw.ram.bin" 158 - #define AR6004_HW_1_1_BOARD_DATA_FILE "ath6k/AR6004/hw1.1/bdata.bin" 158 + #define AR6004_HW_1_1_BOARD_DATA_FILE AR6004_HW_1_1_FW_DIR "/bdata.bin" 159 159 #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \ 160 - "ath6k/AR6004/hw1.1/bdata.DB132.bin" 160 + AR6004_HW_1_1_FW_DIR "/bdata.DB132.bin" 161 + 162 + /* AR6004 1.2 definitions */ 163 + #define AR6004_HW_1_2_VERSION 0x300007e8 164 + #define AR6004_HW_1_2_FW_DIR "ath6k/AR6004/hw1.2" 165 + #define AR6004_HW_1_2_FIRMWARE_FILE "fw.ram.bin" 166 + #define AR6004_HW_1_2_BOARD_DATA_FILE AR6004_HW_1_2_FW_DIR "/bdata.bin" 167 + #define AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE \ 168 + AR6004_HW_1_2_FW_DIR "/bdata.bin" 161 169 162 170 /* Per STA data, used in AP mode */ 163 171 #define STA_PS_AWAKE BIT(0) ··· 510 502 WLAN_ENABLED, 511 503 STATS_UPDATE_PEND, 512 504 HOST_SLEEP_MODE_CMD_PROCESSED, 505 + NETDEV_MCAST_ALL_ON, 506 + NETDEV_MCAST_ALL_OFF, 513 507 }; 514 508 515 509 struct ath6kl_vif { ··· 559 549 u16 assoc_bss_beacon_int; 560 550 u16 listen_intvl_t; 561 551 u16 bmiss_time_t; 552 + u16 bg_scan_period; 562 553 u8 assoc_bss_dtim_period; 563 554 struct net_device_stats net_stats; 564 555 struct target_stats target_stats; 556 + struct wmi_connect_cmd profile; 565 557 566 558 struct list_head mc_filter; 567 559 }; ··· 652 640 u8 sta_list_index; 653 641 struct ath6kl_req_key ap_mode_bkey; 654 642 struct sk_buff_head mcastpsq; 643 + u32 want_ch_switch; 655 644 656 645 /* 657 646 * FIXME: protects access to mcastpsq but is actually useless as ··· 685 672 u32 refclk_hz; 686 673 u32 uarttx_pin; 687 674 u32 testscript_addr; 675 + enum wmi_phy_cap cap; 688 676 689 677 struct ath6kl_hw_fw { 690 678 const char *dir; ··· 819 805 struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 *node_addr); 820 806 struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid); 821 807 822 - void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver); 808 + void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver, 809 + enum wmi_phy_cap cap); 823 810 int ath6kl_control_tx(void *devt, struct sk_buff *skb, 824 811 enum htc_endpoint_id eid); 825 812 void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel,
+11 -1
drivers/net/wireless/ath/ath6kl/debug.c
··· 401 401 402 402 ret = wait_for_completion_interruptible( 403 403 &ar->debug.fwlog_completion); 404 - if (ret == -ERESTARTSYS) 404 + if (ret == -ERESTARTSYS) { 405 + vfree(buf); 405 406 return ret; 407 + } 406 408 407 409 spin_lock(&ar->debug.fwlog_queue.lock); 408 410 } ··· 1572 1570 size_t count, loff_t *ppos) 1573 1571 { 1574 1572 struct ath6kl *ar = file->private_data; 1573 + struct ath6kl_vif *vif; 1575 1574 u16 bgscan_int; 1576 1575 char buf[32]; 1577 1576 ssize_t len; 1577 + 1578 + vif = ath6kl_vif_first(ar); 1579 + if (!vif) 1580 + return -EIO; 1578 1581 1579 1582 len = min(count, sizeof(buf) - 1); 1580 1583 if (copy_from_user(buf, user_buf, len)) ··· 1591 1584 1592 1585 if (bgscan_int == 0) 1593 1586 bgscan_int = 0xffff; 1587 + 1588 + vif->bg_scan_period = bgscan_int; 1594 1589 1595 1590 ath6kl_wmi_scanparams_cmd(ar->wmi, 0, 0, 0, bgscan_int, 0, 0, 0, 3, 1596 1591 0, 0, 0); ··· 1818 1809 void ath6kl_debug_cleanup(struct ath6kl *ar) 1819 1810 { 1820 1811 skb_queue_purge(&ar->debug.fwlog_queue); 1812 + complete(&ar->debug.fwlog_completion); 1821 1813 kfree(ar->debug.roam_tbl); 1822 1814 } 1823 1815
+28 -17
drivers/net/wireless/ath/ath6kl/htc_mbox.c
··· 83 83 * never goes inactive EVER. 84 84 */ 85 85 cur_ep_dist->dist_flags |= HTC_EP_ACTIVE; 86 - } else if (cur_ep_dist->svc_id == WMI_DATA_BK_SVC) 87 - /* this is the lowest priority data endpoint */ 88 - /* FIXME: this looks fishy, check */ 89 - cred_info->lowestpri_ep_dist = cur_ep_dist->list; 86 + } 90 87 91 88 /* 92 89 * Streams have to be created (explicit | implicit) for all ··· 96 99 * as traffic activity demands 97 100 */ 98 101 } 102 + 103 + /* 104 + * For ath6kl_credit_seek function, 105 + * it use list_for_each_entry_reverse to walk around the whole ep list. 106 + * Therefore assign this lowestpri_ep_dist after walk around the ep_list 107 + */ 108 + cred_info->lowestpri_ep_dist = cur_ep_dist->list; 99 109 100 110 WARN_ON(cred_info->cur_free_credits <= 0); 101 111 ··· 762 758 u32 txb_mask; 763 759 u8 ac = WMM_NUM_AC; 764 760 765 - if ((HTC_CTRL_RSVD_SVC != endpoint->svc_id) || 761 + if ((HTC_CTRL_RSVD_SVC != endpoint->svc_id) && 766 762 (WMI_CONTROL_SVC != endpoint->svc_id)) 767 763 ac = target->dev->ar->ep2ac_map[endpoint->eid]; 768 764 ··· 797 793 * itself 798 794 */ 799 795 txb_mask = ((1 << ac) - 1); 800 - /* 801 - * when the scatter request resources drop below a 802 - * certain threshold, disable Tx bundling for all 803 - * AC's with priority lower than the current requesting 804 - * AC. Otherwise re-enable Tx bundling for them 805 - */ 806 - if (scat_req->scat_q_depth < ATH6KL_SCATTER_REQS) 807 - target->tx_bndl_mask &= ~txb_mask; 808 - else 809 - target->tx_bndl_mask |= txb_mask; 796 + 797 + /* 798 + * when the scatter request resources drop below a 799 + * certain threshold, disable Tx bundling for all 800 + * AC's with priority lower than the current requesting 801 + * AC. Otherwise re-enable Tx bundling for them 802 + */ 803 + if (scat_req->scat_q_depth < ATH6KL_SCATTER_REQS) 804 + target->tx_bndl_mask &= ~txb_mask; 805 + else 806 + target->tx_bndl_mask |= txb_mask; 810 807 } 811 808 812 809 ath6kl_dbg(ATH6KL_DBG_HTC, "htc tx pkts to scatter: %d\n", ··· 854 849 int bundle_sent; 855 850 int n_pkts_bundle; 856 851 u8 ac = WMM_NUM_AC; 852 + int status; 857 853 858 854 spin_lock_bh(&target->tx_lock); 859 855 ··· 872 866 */ 873 867 INIT_LIST_HEAD(&txq); 874 868 875 - if ((HTC_CTRL_RSVD_SVC != endpoint->svc_id) || 869 + if ((HTC_CTRL_RSVD_SVC != endpoint->svc_id) && 876 870 (WMI_CONTROL_SVC != endpoint->svc_id)) 877 871 ac = target->dev->ar->ep2ac_map[endpoint->eid]; 878 872 ··· 916 910 917 911 ath6kl_htc_tx_prep_pkt(packet, packet->info.tx.flags, 918 912 0, packet->info.tx.seqno); 919 - ath6kl_htc_tx_issue(target, packet); 913 + status = ath6kl_htc_tx_issue(target, packet); 914 + 915 + if (status) { 916 + packet->status = status; 917 + packet->completion(packet->context, packet); 918 + } 920 919 } 921 920 922 921 spin_lock_bh(&target->tx_lock);
+3 -8
drivers/net/wireless/ath/ath6kl/htc_pipe.c
··· 108 108 109 109 /* get packet at head, but don't remove it */ 110 110 packet = list_first_entry(&ep->txq, struct htc_packet, list); 111 - if (packet == NULL) 112 - break; 113 111 114 112 ath6kl_dbg(ATH6KL_DBG_HTC, 115 113 "%s: got head packet:0x%p , queue depth: %d\n", ··· 801 803 802 804 /* get first packet to find out which ep the packets will go into */ 803 805 packet = list_first_entry(pkt_queue, struct htc_packet, list); 804 - if (packet == NULL) 805 - return -EINVAL; 806 806 807 807 if (packet->endpoint >= ENDPOINT_MAX) { 808 808 WARN_ON_ONCE(1); ··· 1378 1382 /* copy all the callbacks */ 1379 1383 ep->ep_cb = conn_req->ep_cb; 1380 1384 1385 + /* initialize tx_drop_packet_threshold */ 1386 + ep->tx_drop_packet_threshold = MAX_HI_COOKIE_NUM; 1387 + 1381 1388 status = ath6kl_hif_pipe_map_service(ar, ep->svc_id, 1382 1389 &ep->pipe.pipeid_ul, 1383 1390 &ep->pipe.pipeid_dl); ··· 1635 1636 return -EINVAL; 1636 1637 1637 1638 first = list_first_entry(pkt_queue, struct htc_packet, list); 1638 - if (first == NULL) { 1639 - WARN_ON_ONCE(1); 1640 - return -EINVAL; 1641 - } 1642 1639 1643 1640 if (first->endpoint >= ENDPOINT_MAX) { 1644 1641 WARN_ON_ONCE(1);
+24 -5
drivers/net/wireless/ath/ath6kl/init.c
··· 119 119 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE, 120 120 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE, 121 121 }, 122 + { 123 + .id = AR6004_HW_1_2_VERSION, 124 + .name = "ar6004 hw 1.2", 125 + .dataset_patch_addr = 0x436ecc, 126 + .app_load_addr = 0x1234, 127 + .board_ext_data_addr = 0x437000, 128 + .reserved_ram_size = 9216, 129 + .board_addr = 0x435c00, 130 + .refclk_hz = 40000000, 131 + .uarttx_pin = 11, 132 + 133 + .fw = { 134 + .dir = AR6004_HW_1_2_FW_DIR, 135 + .fw = AR6004_HW_1_2_FIRMWARE_FILE, 136 + }, 137 + .fw_board = AR6004_HW_1_2_BOARD_DATA_FILE, 138 + .fw_default_board = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE, 139 + }, 122 140 }; 123 141 124 142 /* ··· 463 445 P2P_FLAG_MACADDR_REQ | 464 446 P2P_FLAG_HMODEL_REQ); 465 447 if (ret) { 466 - ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " 467 - "capabilities (%d) - assuming P2P not " 468 - "supported\n", ret); 448 + ath6kl_dbg(ATH6KL_DBG_TRC, 449 + "failed to request P2P capabilities (%d) - assuming P2P not supported\n", 450 + ret); 469 451 ar->p2p = false; 470 452 } 471 453 } ··· 474 456 /* Enable Probe Request reporting for P2P */ 475 457 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true); 476 458 if (ret) { 477 - ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " 478 - "Request reporting (%d)\n", ret); 459 + ath6kl_dbg(ATH6KL_DBG_TRC, 460 + "failed to enable Probe Request reporting (%d)\n", 461 + ret); 479 462 } 480 463 } 481 464
+88 -16
drivers/net/wireless/ath/ath6kl/main.c
··· 421 421 if (!ik->valid) 422 422 break; 423 423 424 - ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "Delayed addkey for " 425 - "the initial group key for AP mode\n"); 424 + ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, 425 + "Delayed addkey for the initial group key for AP mode\n"); 426 426 memset(key_rsc, 0, sizeof(key_rsc)); 427 427 res = ath6kl_wmi_addkey_cmd( 428 428 ar->wmi, vif->fw_vif_idx, ik->key_index, ik->key_type, ··· 430 430 ik->key, 431 431 KEY_OP_INIT_VAL, NULL, SYNC_BOTH_WMIFLAG); 432 432 if (res) { 433 - ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "Delayed " 434 - "addkey failed: %d\n", res); 433 + ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, 434 + "Delayed addkey failed: %d\n", res); 435 435 } 436 436 break; 437 + } 438 + 439 + if (ar->want_ch_switch & (1 << vif->fw_vif_idx)) { 440 + ar->want_ch_switch &= ~(1 << vif->fw_vif_idx); 441 + /* we actually don't know the phymode, default to HT20 */ 442 + ath6kl_cfg80211_ch_switch_notify(vif, channel, 443 + WMI_11G_HT20); 437 444 } 438 445 439 446 ath6kl_wmi_bssfilter_cmd(ar->wmi, vif->fw_vif_idx, NONE_BSS_FILTER, 0); ··· 548 541 549 542 /* WMI Event handlers */ 550 543 551 - void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver) 544 + void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver, 545 + enum wmi_phy_cap cap) 552 546 { 553 547 struct ath6kl *ar = devt; 554 548 ··· 559 551 560 552 ar->version.wlan_ver = sw_ver; 561 553 ar->version.abi_ver = abi_ver; 554 + ar->hw.cap = cap; 562 555 563 556 snprintf(ar->wiphy->fw_version, 564 557 sizeof(ar->wiphy->fw_version), ··· 593 584 ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "scan complete: %d\n", status); 594 585 } 595 586 587 + static int ath6kl_commit_ch_switch(struct ath6kl_vif *vif, u16 channel) 588 + { 589 + 590 + struct ath6kl *ar = vif->ar; 591 + 592 + vif->next_chan = channel; 593 + vif->profile.ch = cpu_to_le16(channel); 594 + 595 + switch (vif->nw_type) { 596 + case AP_NETWORK: 597 + return ath6kl_wmi_ap_profile_commit(ar->wmi, vif->fw_vif_idx, 598 + &vif->profile); 599 + default: 600 + ath6kl_err("won't switch channels nw_type=%d\n", vif->nw_type); 601 + return -ENOTSUPP; 602 + } 603 + } 604 + 605 + static void ath6kl_check_ch_switch(struct ath6kl *ar, u16 channel) 606 + { 607 + 608 + struct ath6kl_vif *vif; 609 + int res = 0; 610 + 611 + if (!ar->want_ch_switch) 612 + return; 613 + 614 + spin_lock_bh(&ar->list_lock); 615 + list_for_each_entry(vif, &ar->vif_list, list) { 616 + if (ar->want_ch_switch & (1 << vif->fw_vif_idx)) 617 + res = ath6kl_commit_ch_switch(vif, channel); 618 + 619 + if (res) 620 + ath6kl_err("channel switch failed nw_type %d res %d\n", 621 + vif->nw_type, res); 622 + } 623 + spin_unlock_bh(&ar->list_lock); 624 + } 625 + 596 626 void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel, u8 *bssid, 597 627 u16 listen_int, u16 beacon_int, 598 628 enum network_type net_type, u8 beacon_ie_len, ··· 649 601 memcpy(vif->bssid, bssid, sizeof(vif->bssid)); 650 602 vif->bss_ch = channel; 651 603 652 - if ((vif->nw_type == INFRA_NETWORK)) 604 + if ((vif->nw_type == INFRA_NETWORK)) { 653 605 ath6kl_wmi_listeninterval_cmd(ar->wmi, vif->fw_vif_idx, 654 606 vif->listen_intvl_t, 0); 607 + ath6kl_check_ch_switch(ar, channel); 608 + } 655 609 656 610 netif_wake_queue(vif->ndev); 657 611 ··· 976 926 struct ath6kl *ar = vif->ar; 977 927 978 928 if (vif->nw_type == AP_NETWORK) { 929 + /* disconnect due to other STA vif switching channels */ 930 + if (reason == BSS_DISCONNECTED && 931 + prot_reason_status == WMI_AP_REASON_STA_ROAM) 932 + ar->want_ch_switch |= 1 << vif->fw_vif_idx; 933 + 979 934 if (!ath6kl_remove_sta(ar, bssid, prot_reason_status)) 980 935 return; 981 936 ··· 1145 1090 static void ath6kl_set_multicast_list(struct net_device *ndev) 1146 1091 { 1147 1092 struct ath6kl_vif *vif = netdev_priv(ndev); 1148 - bool mc_all_on = false, mc_all_off = false; 1093 + bool mc_all_on = false; 1149 1094 int mc_count = netdev_mc_count(ndev); 1150 1095 struct netdev_hw_addr *ha; 1151 1096 bool found; ··· 1157 1102 !test_bit(WLAN_ENABLED, &vif->flags)) 1158 1103 return; 1159 1104 1105 + /* Enable multicast-all filter. */ 1160 1106 mc_all_on = !!(ndev->flags & IFF_PROMISC) || 1161 1107 !!(ndev->flags & IFF_ALLMULTI) || 1162 1108 !!(mc_count > ATH6K_MAX_MC_FILTERS_PER_LIST); 1163 1109 1164 - mc_all_off = !(ndev->flags & IFF_MULTICAST) || mc_count == 0; 1110 + if (mc_all_on) 1111 + set_bit(NETDEV_MCAST_ALL_ON, &vif->flags); 1112 + else 1113 + clear_bit(NETDEV_MCAST_ALL_ON, &vif->flags); 1165 1114 1166 - if (mc_all_on || mc_all_off) { 1167 - /* Enable/disable all multicast */ 1168 - ath6kl_dbg(ATH6KL_DBG_TRC, "%s multicast filter\n", 1169 - mc_all_on ? "enabling" : "disabling"); 1170 - ret = ath6kl_wmi_mcast_filter_cmd(vif->ar->wmi, vif->fw_vif_idx, 1115 + mc_all_on = mc_all_on || (vif->ar->state == ATH6KL_STATE_ON); 1116 + 1117 + if (!(ndev->flags & IFF_MULTICAST)) { 1118 + mc_all_on = false; 1119 + set_bit(NETDEV_MCAST_ALL_OFF, &vif->flags); 1120 + } else { 1121 + clear_bit(NETDEV_MCAST_ALL_OFF, &vif->flags); 1122 + } 1123 + 1124 + /* Enable/disable "multicast-all" filter*/ 1125 + ath6kl_dbg(ATH6KL_DBG_TRC, "%s multicast-all filter\n", 1126 + mc_all_on ? "enabling" : "disabling"); 1127 + 1128 + ret = ath6kl_wmi_mcast_filter_cmd(vif->ar->wmi, vif->fw_vif_idx, 1171 1129 mc_all_on); 1172 - if (ret) 1173 - ath6kl_warn("Failed to %s multicast receive\n", 1174 - mc_all_on ? "enable" : "disable"); 1130 + if (ret) { 1131 + ath6kl_warn("Failed to %s multicast-all receive\n", 1132 + mc_all_on ? "enable" : "disable"); 1175 1133 return; 1176 1134 } 1177 1135 1136 + if (test_bit(NETDEV_MCAST_ALL_ON, &vif->flags)) 1137 + return; 1138 + 1139 + /* Keep the driver and firmware mcast list in sync. */ 1178 1140 list_for_each_entry_safe(mc_filter, tmp, &vif->mc_filter, list) { 1179 1141 found = false; 1180 1142 netdev_for_each_mc_addr(ha, ndev) {
+11 -6
drivers/net/wireless/ath/ath6kl/sdio.c
··· 552 552 553 553 bus_req = ath6kl_sdio_alloc_busreq(ar_sdio); 554 554 555 - if (!bus_req) 555 + if (WARN_ON_ONCE(!bus_req)) 556 556 return -ENOMEM; 557 557 558 558 bus_req->address = address; ··· 915 915 } 916 916 917 917 cut_pwr: 918 + if (func->card && func->card->host) 919 + func->card->host->pm_flags &= ~MMC_PM_KEEP_POWER; 920 + 918 921 return ath6kl_cfg80211_suspend(ar, ATH6KL_CFG_SUSPEND_CUTPOWER, NULL); 919 922 } 920 923 ··· 988 985 } 989 986 990 987 if (status) { 991 - ath6kl_err("%s: failed to write initial bytes of 0x%x " 992 - "to window reg: 0x%X\n", __func__, 993 - addr, reg_addr); 988 + ath6kl_err("%s: failed to write initial bytes of 0x%x to window reg: 0x%X\n", 989 + __func__, addr, reg_addr); 994 990 return status; 995 991 } 996 992 ··· 1078 1076 (u8 *)&ar->bmi.cmd_credits, 4, 1079 1077 HIF_RD_SYNC_BYTE_INC); 1080 1078 if (ret) { 1081 - ath6kl_err("Unable to decrement the command credit " 1082 - "count register: %d\n", ret); 1079 + ath6kl_err("Unable to decrement the command credit count register: %d\n", 1080 + ret); 1083 1081 return ret; 1084 1082 } 1085 1083 ··· 1459 1457 MODULE_FIRMWARE(AR6004_HW_1_1_FW_DIR "/" AR6004_HW_1_1_FIRMWARE_FILE); 1460 1458 MODULE_FIRMWARE(AR6004_HW_1_1_BOARD_DATA_FILE); 1461 1459 MODULE_FIRMWARE(AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE); 1460 + MODULE_FIRMWARE(AR6004_HW_1_2_FW_DIR "/" AR6004_HW_1_2_FIRMWARE_FILE); 1461 + MODULE_FIRMWARE(AR6004_HW_1_2_BOARD_DATA_FILE); 1462 + MODULE_FIRMWARE(AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE);
+4 -8
drivers/net/wireless/ath/ath6kl/txrx.c
··· 362 362 skb, skb->data, skb->len); 363 363 364 364 /* If target is not associated */ 365 - if (!test_bit(CONNECTED, &vif->flags)) { 366 - dev_kfree_skb(skb); 367 - return 0; 368 - } 365 + if (!test_bit(CONNECTED, &vif->flags)) 366 + goto fail_tx; 369 367 370 - if (WARN_ON_ONCE(ar->state != ATH6KL_STATE_ON)) { 371 - dev_kfree_skb(skb); 372 - return 0; 373 - } 368 + if (WARN_ON_ONCE(ar->state != ATH6KL_STATE_ON)) 369 + goto fail_tx; 374 370 375 371 if (!test_bit(WMI_READY, &ar->flag)) 376 372 goto fail_tx;
+12
drivers/net/wireless/ath/ath6kl/usb.c
··· 1037 1037 hif_stop(ar); 1038 1038 } 1039 1039 1040 + static void ath6kl_usb_cleanup_scatter(struct ath6kl *ar) 1041 + { 1042 + /* 1043 + * USB doesn't support it. Just return. 1044 + */ 1045 + return; 1046 + } 1047 + 1040 1048 static const struct ath6kl_hif_ops ath6kl_usb_ops = { 1041 1049 .diag_read32 = ath6kl_usb_diag_read32, 1042 1050 .diag_write32 = ath6kl_usb_diag_write32, ··· 1057 1049 .pipe_get_default = ath6kl_usb_get_default_pipe, 1058 1050 .pipe_map_service = ath6kl_usb_map_service_pipe, 1059 1051 .pipe_get_free_queue_number = ath6kl_usb_get_free_queue_number, 1052 + .cleanup_scatter = ath6kl_usb_cleanup_scatter, 1060 1053 }; 1061 1054 1062 1055 /* ath6kl usb driver registered functions */ ··· 1217 1208 MODULE_FIRMWARE(AR6004_HW_1_1_FIRMWARE_FILE); 1218 1209 MODULE_FIRMWARE(AR6004_HW_1_1_BOARD_DATA_FILE); 1219 1210 MODULE_FIRMWARE(AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE); 1211 + MODULE_FIRMWARE(AR6004_HW_1_2_FIRMWARE_FILE); 1212 + MODULE_FIRMWARE(AR6004_HW_1_2_BOARD_DATA_FILE); 1213 + MODULE_FIRMWARE(AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE);
+57 -37
drivers/net/wireless/ath/ath6kl/wmi.c
··· 16 16 */ 17 17 18 18 #include <linux/ip.h> 19 + #include <linux/in.h> 19 20 #include "core.h" 20 21 #include "debug.h" 21 22 #include "testmode.h" ··· 290 289 layer2_priority); 291 290 } else 292 291 usr_pri = layer2_priority & 0x7; 292 + 293 + /* 294 + * Queue the EAPOL frames in the same WMM_AC_VO queue 295 + * as that of management frames. 296 + */ 297 + if (skb->protocol == cpu_to_be16(ETH_P_PAE)) 298 + usr_pri = WMI_VOICE_USER_PRIORITY; 293 299 } 294 300 295 301 /* ··· 468 460 freq, dur); 469 461 chan = ieee80211_get_channel(ar->wiphy, freq); 470 462 if (!chan) { 471 - ath6kl_dbg(ATH6KL_DBG_WMI, "remain_on_chnl: Unknown channel " 472 - "(freq=%u)\n", freq); 463 + ath6kl_dbg(ATH6KL_DBG_WMI, 464 + "remain_on_chnl: Unknown channel (freq=%u)\n", 465 + freq); 473 466 return -EINVAL; 474 467 } 475 468 id = vif->last_roc_id; ··· 497 488 ev = (struct wmi_cancel_remain_on_chnl_event *) datap; 498 489 freq = le32_to_cpu(ev->freq); 499 490 dur = le32_to_cpu(ev->duration); 500 - ath6kl_dbg(ATH6KL_DBG_WMI, "cancel_remain_on_chnl: freq=%u dur=%u " 501 - "status=%u\n", freq, dur, ev->status); 491 + ath6kl_dbg(ATH6KL_DBG_WMI, 492 + "cancel_remain_on_chnl: freq=%u dur=%u status=%u\n", 493 + freq, dur, ev->status); 502 494 chan = ieee80211_get_channel(ar->wiphy, freq); 503 495 if (!chan) { 504 - ath6kl_dbg(ATH6KL_DBG_WMI, "cancel_remain_on_chnl: Unknown " 505 - "channel (freq=%u)\n", freq); 496 + ath6kl_dbg(ATH6KL_DBG_WMI, 497 + "cancel_remain_on_chnl: Unknown channel (freq=%u)\n", 498 + freq); 506 499 return -EINVAL; 507 500 } 508 501 if (vif->last_cancel_roc_id && ··· 559 548 freq = le32_to_cpu(ev->freq); 560 549 dlen = le16_to_cpu(ev->len); 561 550 if (datap + len < ev->data + dlen) { 562 - ath6kl_err("invalid wmi_p2p_rx_probe_req_event: " 563 - "len=%d dlen=%u\n", len, dlen); 551 + ath6kl_err("invalid wmi_p2p_rx_probe_req_event: len=%d dlen=%u\n", 552 + len, dlen); 564 553 return -EINVAL; 565 554 } 566 - ath6kl_dbg(ATH6KL_DBG_WMI, "rx_probe_req: len=%u freq=%u " 567 - "probe_req_report=%d\n", 555 + ath6kl_dbg(ATH6KL_DBG_WMI, 556 + "rx_probe_req: len=%u freq=%u probe_req_report=%d\n", 568 557 dlen, freq, vif->probe_req_report); 569 558 570 559 if (vif->probe_req_report || vif->nw_type == AP_NETWORK) ··· 603 592 freq = le32_to_cpu(ev->freq); 604 593 dlen = le16_to_cpu(ev->len); 605 594 if (datap + len < ev->data + dlen) { 606 - ath6kl_err("invalid wmi_rx_action_event: " 607 - "len=%d dlen=%u\n", len, dlen); 595 + ath6kl_err("invalid wmi_rx_action_event: len=%d dlen=%u\n", 596 + len, dlen); 608 597 return -EINVAL; 609 598 } 610 599 ath6kl_dbg(ATH6KL_DBG_WMI, "rx_action: len=%u freq=%u\n", dlen, freq); ··· 698 687 699 688 ath6kl_ready_event(wmi->parent_dev, ev->mac_addr, 700 689 le32_to_cpu(ev->sw_version), 701 - le32_to_cpu(ev->abi_version)); 690 + le32_to_cpu(ev->abi_version), ev->phy_cap); 702 691 703 692 return 0; 704 693 } ··· 788 777 /* AP mode start/STA connected event */ 789 778 struct net_device *dev = vif->ndev; 790 779 if (memcmp(dev->dev_addr, ev->u.ap_bss.bssid, ETH_ALEN) == 0) { 791 - ath6kl_dbg(ATH6KL_DBG_WMI, "%s: freq %d bssid %pM " 792 - "(AP started)\n", 780 + ath6kl_dbg(ATH6KL_DBG_WMI, 781 + "%s: freq %d bssid %pM (AP started)\n", 793 782 __func__, le16_to_cpu(ev->u.ap_bss.ch), 794 783 ev->u.ap_bss.bssid); 795 784 ath6kl_connect_ap_mode_bss( 796 785 vif, le16_to_cpu(ev->u.ap_bss.ch)); 797 786 } else { 798 - ath6kl_dbg(ATH6KL_DBG_WMI, "%s: aid %u mac_addr %pM " 799 - "auth=%u keymgmt=%u cipher=%u apsd_info=%u " 800 - "(STA connected)\n", 787 + ath6kl_dbg(ATH6KL_DBG_WMI, 788 + "%s: aid %u mac_addr %pM auth=%u keymgmt=%u cipher=%u apsd_info=%u (STA connected)\n", 801 789 __func__, ev->u.ap_sta.aid, 802 790 ev->u.ap_sta.mac_addr, 803 791 ev->u.ap_sta.auth, ··· 1239 1229 ev = (struct wmi_neighbor_report_event *) datap; 1240 1230 if (sizeof(*ev) + ev->num_neighbors * sizeof(struct wmi_neighbor_info) 1241 1231 > len) { 1242 - ath6kl_dbg(ATH6KL_DBG_WMI, "truncated neighbor event " 1243 - "(num=%d len=%d)\n", ev->num_neighbors, len); 1232 + ath6kl_dbg(ATH6KL_DBG_WMI, 1233 + "truncated neighbor event (num=%d len=%d)\n", 1234 + ev->num_neighbors, len); 1244 1235 return -EINVAL; 1245 1236 } 1246 1237 for (i = 0; i < ev->num_neighbors; i++) { ··· 1825 1814 u32 home_dwell_time, u32 force_scan_interval, 1826 1815 s8 num_chan, u16 *ch_list, u32 no_cck, u32 *rates) 1827 1816 { 1817 + struct ieee80211_supported_band *sband; 1828 1818 struct sk_buff *skb; 1829 1819 struct wmi_begin_scan_cmd *sc; 1830 - s8 size; 1820 + s8 size, *supp_rates; 1831 1821 int i, band, ret; 1832 1822 struct ath6kl *ar = wmi->parent_dev; 1833 1823 int num_rates; 1824 + u32 ratemask; 1834 1825 1835 1826 size = sizeof(struct wmi_begin_scan_cmd); 1836 1827 ··· 1859 1846 sc->num_ch = num_chan; 1860 1847 1861 1848 for (band = 0; band < IEEE80211_NUM_BANDS; band++) { 1862 - struct ieee80211_supported_band *sband = 1863 - ar->wiphy->bands[band]; 1864 - u32 ratemask = rates[band]; 1865 - u8 *supp_rates = sc->supp_rates[band].rates; 1849 + sband = ar->wiphy->bands[band]; 1850 + 1851 + if (!sband) 1852 + continue; 1853 + 1854 + ratemask = rates[band]; 1855 + supp_rates = sc->supp_rates[band].rates; 1866 1856 num_rates = 0; 1867 1857 1868 1858 for (i = 0; i < sband->n_bitrates; i++) { ··· 2145 2129 struct wmi_add_cipher_key_cmd *cmd; 2146 2130 int ret; 2147 2131 2148 - ath6kl_dbg(ATH6KL_DBG_WMI, "addkey cmd: key_index=%u key_type=%d " 2149 - "key_usage=%d key_len=%d key_op_ctrl=%d\n", 2132 + ath6kl_dbg(ATH6KL_DBG_WMI, 2133 + "addkey cmd: key_index=%u key_type=%d key_usage=%d key_len=%d key_op_ctrl=%d\n", 2150 2134 key_index, key_type, key_usage, key_len, key_op_ctrl); 2151 2135 2152 2136 if ((key_index > WMI_MAX_KEY_INDEX) || (key_len > WMI_MAX_KEY_LEN) || ··· 3063 3047 3064 3048 res = ath6kl_wmi_cmd_send(wmip, if_idx, skb, WMI_AP_CONFIG_COMMIT_CMDID, 3065 3049 NO_SYNC_WMIFLAG); 3066 - ath6kl_dbg(ATH6KL_DBG_WMI, "%s: nw_type=%u auth_mode=%u ch=%u " 3067 - "ctrl_flags=0x%x-> res=%d\n", 3050 + ath6kl_dbg(ATH6KL_DBG_WMI, 3051 + "%s: nw_type=%u auth_mode=%u ch=%u ctrl_flags=0x%x-> res=%d\n", 3068 3052 __func__, p->nw_type, p->auth_mode, le16_to_cpu(p->ch), 3069 3053 le32_to_cpu(p->ctrl_flags), res); 3070 3054 return res; ··· 3224 3208 if (!skb) 3225 3209 return -ENOMEM; 3226 3210 3227 - ath6kl_dbg(ATH6KL_DBG_WMI, "set_appie_cmd: mgmt_frm_type=%u " 3228 - "ie_len=%u\n", mgmt_frm_type, ie_len); 3211 + ath6kl_dbg(ATH6KL_DBG_WMI, 3212 + "set_appie_cmd: mgmt_frm_type=%u ie_len=%u\n", 3213 + mgmt_frm_type, ie_len); 3229 3214 p = (struct wmi_set_appie_cmd *) skb->data; 3230 3215 p->mgmt_frm_type = mgmt_frm_type; 3231 3216 p->ie_len = ie_len; ··· 3327 3310 wmi->last_mgmt_tx_frame = buf; 3328 3311 wmi->last_mgmt_tx_frame_len = data_len; 3329 3312 3330 - ath6kl_dbg(ATH6KL_DBG_WMI, "send_action_cmd: id=%u freq=%u wait=%u " 3331 - "len=%u\n", id, freq, wait, data_len); 3313 + ath6kl_dbg(ATH6KL_DBG_WMI, 3314 + "send_action_cmd: id=%u freq=%u wait=%u len=%u\n", 3315 + id, freq, wait, data_len); 3332 3316 p = (struct wmi_send_action_cmd *) skb->data; 3333 3317 p->id = cpu_to_le32(id); 3334 3318 p->freq = cpu_to_le32(freq); ··· 3366 3348 wmi->last_mgmt_tx_frame = buf; 3367 3349 wmi->last_mgmt_tx_frame_len = data_len; 3368 3350 3369 - ath6kl_dbg(ATH6KL_DBG_WMI, "send_action_cmd: id=%u freq=%u wait=%u " 3370 - "len=%u\n", id, freq, wait, data_len); 3351 + ath6kl_dbg(ATH6KL_DBG_WMI, 3352 + "send_action_cmd: id=%u freq=%u wait=%u len=%u\n", 3353 + id, freq, wait, data_len); 3371 3354 p = (struct wmi_send_mgmt_cmd *) skb->data; 3372 3355 p->id = cpu_to_le32(id); 3373 3356 p->freq = cpu_to_le32(freq); ··· 3421 3402 if (!skb) 3422 3403 return -ENOMEM; 3423 3404 3424 - ath6kl_dbg(ATH6KL_DBG_WMI, "send_probe_response_cmd: freq=%u dst=%pM " 3425 - "len=%u\n", freq, dst, data_len); 3405 + ath6kl_dbg(ATH6KL_DBG_WMI, 3406 + "send_probe_response_cmd: freq=%u dst=%pM len=%u\n", 3407 + freq, dst, data_len); 3426 3408 p = (struct wmi_p2p_probe_response_cmd *) skb->data; 3427 3409 p->freq = cpu_to_le32(freq); 3428 3410 memcpy(p->destination_addr, dst, ETH_ALEN);
+24
drivers/net/wireless/ath/ath6kl/wmi.h
··· 106 106 #define WMM_AC_VI 2 /* video */ 107 107 #define WMM_AC_VO 3 /* voice */ 108 108 109 + #define WMI_VOICE_USER_PRIORITY 0x7 110 + 109 111 struct wmi { 110 112 u16 stream_exist_for_ac[WMM_NUM_AC]; 111 113 u8 fat_pipe_exist; ··· 1153 1151 WMI_11AG_MODE = 0x3, 1154 1152 WMI_11B_MODE = 0x4, 1155 1153 WMI_11GONLY_MODE = 0x5, 1154 + WMI_11G_HT20 = 0x6, 1156 1155 }; 1157 1156 1158 1157 #define WMI_MAX_CHANNELS 32 ··· 1419 1416 u8 phy_cap; 1420 1417 } __packed; 1421 1418 1419 + /* WMI_PHY_CAPABILITY */ 1420 + enum wmi_phy_cap { 1421 + WMI_11A_CAP = 0x01, 1422 + WMI_11G_CAP = 0x02, 1423 + WMI_11AG_CAP = 0x03, 1424 + WMI_11AN_CAP = 0x04, 1425 + WMI_11GN_CAP = 0x05, 1426 + WMI_11AGN_CAP = 0x06, 1427 + }; 1428 + 1422 1429 /* Connect Event */ 1423 1430 struct wmi_connect_event { 1424 1431 union { ··· 1479 1466 PROFILE_MISMATCH = 0x0c, 1480 1467 CONNECTION_EVICTED = 0x0d, 1481 1468 IBSS_MERGE = 0xe, 1469 + }; 1470 + 1471 + /* AP mode disconnect proto_reasons */ 1472 + enum ap_disconnect_reason { 1473 + WMI_AP_REASON_STA_LEFT = 101, 1474 + WMI_AP_REASON_FROM_HOST = 102, 1475 + WMI_AP_REASON_COMM_TIMEOUT = 103, 1476 + WMI_AP_REASON_MAX_STA = 104, 1477 + WMI_AP_REASON_ACL = 105, 1478 + WMI_AP_REASON_STA_ROAM = 106, 1479 + WMI_AP_REASON_DFS_CHANNEL = 107, 1482 1480 }; 1483 1481 1484 1482 #define ATH6KL_COUNTRY_RD_SHIFT 16
+10 -40
drivers/net/wireless/ath/ath9k/ar9003_calib.c
··· 892 892 AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1); 893 893 } 894 894 895 - static bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan) 896 - { 897 - struct ath9k_rtt_hist *hist; 898 - u32 *table; 899 - int i; 900 - bool restore; 901 - 902 - if (!ah->caldata) 903 - return false; 904 - 905 - hist = &ah->caldata->rtt_hist; 906 - if (!hist->num_readings) 907 - return false; 908 - 909 - ar9003_hw_rtt_enable(ah); 910 - ar9003_hw_rtt_set_mask(ah, 0x00); 911 - for (i = 0; i < AR9300_MAX_CHAINS; i++) { 912 - if (!(ah->rxchainmask & (1 << i))) 913 - continue; 914 - table = &hist->table[i][hist->num_readings][0]; 915 - ar9003_hw_rtt_load_hist(ah, i, table); 916 - } 917 - restore = ar9003_hw_rtt_force_restore(ah); 918 - ar9003_hw_rtt_disable(ah); 919 - 920 - return restore; 921 - } 922 - 923 895 static bool ar9003_hw_init_cal(struct ath_hw *ah, 924 896 struct ath9k_channel *chan) 925 897 { ··· 914 942 if (!ar9003_hw_rtt_restore(ah, chan)) 915 943 run_rtt_cal = true; 916 944 917 - ath_dbg(common, CALIBRATE, "RTT restore %s\n", 918 - run_rtt_cal ? "failed" : "succeed"); 945 + if (run_rtt_cal) 946 + ath_dbg(common, CALIBRATE, "RTT calibration to be done\n"); 919 947 } 948 + 920 949 run_agc_cal = run_rtt_cal; 921 950 922 951 if (run_rtt_cal) { ··· 1042 1069 #undef CL_TAB_ENTRY 1043 1070 1044 1071 if (run_rtt_cal && caldata) { 1045 - struct ath9k_rtt_hist *hist = &caldata->rtt_hist; 1046 - if (is_reusable && (hist->num_readings < RTT_HIST_MAX)) { 1047 - u32 *table; 1072 + if (is_reusable) { 1073 + if (!ath9k_hw_rfbus_req(ah)) 1074 + ath_err(ath9k_hw_common(ah), 1075 + "Could not stop baseband\n"); 1076 + else 1077 + ar9003_hw_rtt_fill_hist(ah); 1048 1078 1049 - hist->num_readings++; 1050 - for (i = 0; i < AR9300_MAX_CHAINS; i++) { 1051 - if (!(ah->rxchainmask & (1 << i))) 1052 - continue; 1053 - table = &hist->table[i][hist->num_readings][0]; 1054 - ar9003_hw_rtt_fill_hist(ah, i, table); 1055 - } 1079 + ath9k_hw_rfbus_done(ah); 1056 1080 } 1057 1081 1058 1082 ar9003_hw_rtt_disable(ah);
+1 -1
drivers/net/wireless/ath/ath9k/ar9003_mci.c
··· 756 756 if (caldata) { 757 757 caldata->done_txiqcal_once = false; 758 758 caldata->done_txclcal_once = false; 759 - caldata->rtt_hist.num_readings = 0; 759 + caldata->rtt_done = false; 760 760 } 761 761 762 762 if (!ath9k_hw_init_cal(ah, chan))
+69 -15
drivers/net/wireless/ath/ath9k/ar9003_rtt.c
··· 15 15 */ 16 16 17 17 #include "hw.h" 18 + #include "hw-ops.h" 18 19 #include "ar9003_phy.h" 19 20 #include "ar9003_rtt.h" 20 21 ··· 70 69 } 71 70 72 71 static void ar9003_hw_rtt_load_hist_entry(struct ath_hw *ah, u8 chain, 73 - u32 index, u32 data28) 72 + u32 index, u32 data28) 74 73 { 75 74 u32 val; 76 75 ··· 101 100 RTT_ACCESS_TIMEOUT); 102 101 } 103 102 104 - void ar9003_hw_rtt_load_hist(struct ath_hw *ah, u8 chain, u32 *table) 103 + void ar9003_hw_rtt_load_hist(struct ath_hw *ah) 105 104 { 106 - int i; 105 + int chain, i; 107 106 108 - for (i = 0; i < MAX_RTT_TABLE_ENTRY; i++) 109 - ar9003_hw_rtt_load_hist_entry(ah, chain, i, table[i]); 107 + for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 108 + if (!(ah->rxchainmask & (1 << chain))) 109 + continue; 110 + for (i = 0; i < MAX_RTT_TABLE_ENTRY; i++) { 111 + ar9003_hw_rtt_load_hist_entry(ah, chain, i, 112 + ah->caldata->rtt_table[chain][i]); 113 + ath_dbg(ath9k_hw_common(ah), CALIBRATE, 114 + "Load RTT value at idx %d, chain %d: 0x%x\n", 115 + i, chain, ah->caldata->rtt_table[chain][i]); 116 + } 117 + } 110 118 } 111 119 112 120 static int ar9003_hw_rtt_fill_hist_entry(struct ath_hw *ah, u8 chain, u32 index) ··· 138 128 RTT_ACCESS_TIMEOUT)) 139 129 return RTT_BAD_VALUE; 140 130 141 - val = REG_READ(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain)); 131 + val = MS(REG_READ(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain)), 132 + AR_PHY_RTT_SW_RTT_TABLE_DATA); 133 + 142 134 143 135 return val; 144 136 } 145 137 146 - void ar9003_hw_rtt_fill_hist(struct ath_hw *ah, u8 chain, u32 *table) 138 + void ar9003_hw_rtt_fill_hist(struct ath_hw *ah) 147 139 { 148 - int i; 140 + int chain, i; 149 141 150 - for (i = 0; i < MAX_RTT_TABLE_ENTRY; i++) 151 - table[i] = ar9003_hw_rtt_fill_hist_entry(ah, chain, i); 142 + for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 143 + if (!(ah->rxchainmask & (1 << chain))) 144 + continue; 145 + for (i = 0; i < MAX_RTT_TABLE_ENTRY; i++) { 146 + ah->caldata->rtt_table[chain][i] = 147 + ar9003_hw_rtt_fill_hist_entry(ah, chain, i); 148 + ath_dbg(ath9k_hw_common(ah), CALIBRATE, 149 + "RTT value at idx %d, chain %d is: 0x%x\n", 150 + i, chain, ah->caldata->rtt_table[chain][i]); 151 + } 152 + } 153 + 154 + ah->caldata->rtt_done = true; 152 155 } 153 156 154 157 void ar9003_hw_rtt_clear_hist(struct ath_hw *ah) 155 158 { 156 - int i, j; 159 + int chain, i; 157 160 158 - for (i = 0; i < AR9300_MAX_CHAINS; i++) { 159 - if (!(ah->rxchainmask & (1 << i))) 161 + for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 162 + if (!(ah->rxchainmask & (1 << chain))) 160 163 continue; 161 - for (j = 0; j < MAX_RTT_TABLE_ENTRY; j++) 162 - ar9003_hw_rtt_load_hist_entry(ah, i, j, 0); 164 + for (i = 0; i < MAX_RTT_TABLE_ENTRY; i++) 165 + ar9003_hw_rtt_load_hist_entry(ah, chain, i, 0); 163 166 } 167 + 168 + if (ah->caldata) 169 + ah->caldata->rtt_done = false; 170 + } 171 + 172 + bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan) 173 + { 174 + bool restore; 175 + 176 + if (!ah->caldata) 177 + return false; 178 + 179 + if (!ah->caldata->rtt_done) 180 + return false; 181 + 182 + ar9003_hw_rtt_enable(ah); 183 + ar9003_hw_rtt_set_mask(ah, 0x10); 184 + 185 + if (!ath9k_hw_rfbus_req(ah)) { 186 + ath_err(ath9k_hw_common(ah), "Could not stop baseband\n"); 187 + restore = false; 188 + goto fail; 189 + } 190 + 191 + ar9003_hw_rtt_load_hist(ah); 192 + restore = ar9003_hw_rtt_force_restore(ah); 193 + 194 + fail: 195 + ath9k_hw_rfbus_done(ah); 196 + ar9003_hw_rtt_disable(ah); 197 + return restore; 164 198 }
+3 -2
drivers/net/wireless/ath/ath9k/ar9003_rtt.h
··· 21 21 void ar9003_hw_rtt_disable(struct ath_hw *ah); 22 22 void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask); 23 23 bool ar9003_hw_rtt_force_restore(struct ath_hw *ah); 24 - void ar9003_hw_rtt_load_hist(struct ath_hw *ah, u8 chain, u32 *table); 25 - void ar9003_hw_rtt_fill_hist(struct ath_hw *ah, u8 chain, u32 *table); 24 + void ar9003_hw_rtt_load_hist(struct ath_hw *ah); 25 + void ar9003_hw_rtt_fill_hist(struct ath_hw *ah); 26 26 void ar9003_hw_rtt_clear_hist(struct ath_hw *ah); 27 + bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan); 27 28 28 29 #endif
+4 -5
drivers/net/wireless/ath/ath9k/hw.c
··· 1702 1702 * For AR9462, make sure that calibration data for 1703 1703 * re-using are present. 1704 1704 */ 1705 - if (AR_SREV_9462(ah) && (!ah->caldata || 1706 - !ah->caldata->done_txiqcal_once || 1707 - !ah->caldata->done_txclcal_once || 1708 - !ah->caldata->rtt_hist.num_readings)) 1705 + if (AR_SREV_9462(ah) && (ah->caldata && 1706 + (!ah->caldata->done_txiqcal_once || 1707 + !ah->caldata->done_txclcal_once || 1708 + !ah->caldata->rtt_done))) 1709 1709 goto fail; 1710 1710 1711 1711 ath_dbg(common, RESET, "FastChannelChange for %d -> %d\n", ··· 1941 1941 if (caldata) { 1942 1942 caldata->done_txiqcal_once = false; 1943 1943 caldata->done_txclcal_once = false; 1944 - caldata->rtt_hist.num_readings = 0; 1945 1944 } 1946 1945 if (!ath9k_hw_init_cal(ah, chan)) 1947 1946 return -EIO;
+2 -7
drivers/net/wireless/ath/ath9k/hw.h
··· 348 348 CHANNEL_HT40MINUS) 349 349 350 350 #define MAX_RTT_TABLE_ENTRY 6 351 - #define RTT_HIST_MAX 3 352 - struct ath9k_rtt_hist { 353 - u32 table[AR9300_MAX_CHAINS][RTT_HIST_MAX][MAX_RTT_TABLE_ENTRY]; 354 - u8 num_readings; 355 - }; 356 - 357 351 #define MAX_IQCAL_MEASUREMENT 8 358 352 #define MAX_CL_TAB_ENTRY 16 359 353 ··· 357 363 int32_t CalValid; 358 364 int8_t iCoff; 359 365 int8_t qCoff; 366 + bool rtt_done; 360 367 bool paprd_done; 361 368 bool nfcal_pending; 362 369 bool nfcal_interference; ··· 368 373 u32 num_measures[AR9300_MAX_CHAINS]; 369 374 int tx_corr_coeff[MAX_IQCAL_MEASUREMENT][AR9300_MAX_CHAINS]; 370 375 u32 tx_clcal[AR9300_MAX_CHAINS][MAX_CL_TAB_ENTRY]; 376 + u32 rtt_table[AR9300_MAX_CHAINS][MAX_RTT_TABLE_ENTRY]; 371 377 struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS]; 372 - struct ath9k_rtt_hist rtt_hist; 373 378 }; 374 379 375 380 struct ath9k_channel {
+2 -4
drivers/net/wireless/b43/bus.c
··· 107 107 dev->dma_dev = core->dma_dev; 108 108 dev->irq = core->irq; 109 109 110 - /* 111 110 dev->board_vendor = core->bus->boardinfo.vendor; 112 111 dev->board_type = core->bus->boardinfo.type; 113 - dev->board_rev = core->bus->boardinfo.rev; 114 - */ 112 + dev->board_rev = core->bus->sprom.board_rev; 115 113 116 114 dev->chip_id = core->bus->chipinfo.id; 117 115 dev->chip_rev = core->bus->chipinfo.rev; ··· 208 210 209 211 dev->board_vendor = sdev->bus->boardinfo.vendor; 210 212 dev->board_type = sdev->bus->boardinfo.type; 211 - dev->board_rev = sdev->bus->boardinfo.rev; 213 + dev->board_rev = sdev->bus->sprom.board_rev; 212 214 213 215 dev->chip_id = sdev->bus->chip_id; 214 216 dev->chip_rev = sdev->bus->chip_rev;
+1 -1
drivers/net/wireless/b43/dma.c
··· 1109 1109 #ifdef CONFIG_B43_SSB 1110 1110 if (dev->dev->bus_type == B43_BUS_SSB && 1111 1111 dev->dev->sdev->bus->bustype == SSB_BUSTYPE_PCI && 1112 - !(dev->dev->sdev->bus->host_pci->is_pcie && 1112 + !(pci_is_pcie(dev->dev->sdev->bus->host_pci) && 1113 1113 ssb_read32(dev->dev->sdev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64)) 1114 1114 return 1; 1115 1115 #endif
+2 -2
drivers/net/wireless/b43/main.c
··· 5243 5243 5244 5244 /* boardflags workarounds */ 5245 5245 if (bus->boardinfo.vendor == SSB_BOARDVENDOR_DELL && 5246 - bus->chip_id == 0x4301 && bus->boardinfo.rev == 0x74) 5246 + bus->chip_id == 0x4301 && bus->sprom.board_rev == 0x74) 5247 5247 bus->sprom.boardflags_lo |= B43_BFL_BTCOEXIST; 5248 5248 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE && 5249 - bus->boardinfo.type == 0x4E && bus->boardinfo.rev > 0x40) 5249 + bus->boardinfo.type == 0x4E && bus->sprom.board_rev > 0x40) 5250 5250 bus->sprom.boardflags_lo |= B43_BFL_PACTRL; 5251 5251 if (bus->bustype == SSB_BUSTYPE_PCI) { 5252 5252 pdev = bus->host_pci;
+1 -3
drivers/net/wireless/b43legacy/main.c
··· 1573 1573 const char *filename; 1574 1574 int err; 1575 1575 1576 - /* do dummy read */ 1577 - ssb_read32(dev->dev, SSB_TMSHIGH); 1578 1576 if (!fw->ucode) { 1579 1577 if (rev == 2) 1580 1578 filename = "ucode2"; ··· 3779 3781 /* boardflags workarounds */ 3780 3782 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE && 3781 3783 bus->boardinfo.type == 0x4E && 3782 - bus->boardinfo.rev > 0x40) 3784 + bus->sprom.board_rev > 0x40) 3783 3785 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL; 3784 3786 } 3785 3787
+2 -2
drivers/net/wireless/b43legacy/phy.c
··· 408 408 409 409 if (is_bcm_board_vendor(dev) && 410 410 (dev->dev->bus->boardinfo.type == 0x0416) && 411 - (dev->dev->bus->boardinfo.rev == 0x0017)) 411 + (dev->dev->bus->sprom.board_rev == 0x0017)) 412 412 return; 413 413 414 414 b43legacy_ilt_write(dev, 0x5001, 0x0002); ··· 424 424 425 425 if (is_bcm_board_vendor(dev) && 426 426 (dev->dev->bus->boardinfo.type == 0x0416) && 427 - (dev->dev->bus->boardinfo.rev == 0x0017)) 427 + (dev->dev->bus->sprom.board_rev == 0x0017)) 428 428 return; 429 429 430 430 b43legacy_ilt_write(dev, 0x0401, 0x0002);
+5 -5
drivers/net/wireless/b43legacy/radio.c
··· 1998 1998 if (phy->type == B43legacy_PHYTYPE_G) { 1999 1999 if (is_bcm_board_vendor(dev) && 2000 2000 dev->dev->bus->boardinfo.type == 0x421 && 2001 - dev->dev->bus->boardinfo.rev >= 30) 2001 + dev->dev->bus->sprom.board_rev >= 30) 2002 2002 att = 3; 2003 2003 else if (is_bcm_board_vendor(dev) && 2004 2004 dev->dev->bus->boardinfo.type == 0x416) ··· 2008 2008 } else { 2009 2009 if (is_bcm_board_vendor(dev) && 2010 2010 dev->dev->bus->boardinfo.type == 0x421 && 2011 - dev->dev->bus->boardinfo.rev >= 30) 2011 + dev->dev->bus->sprom.board_rev >= 30) 2012 2012 att = 7; 2013 2013 else 2014 2014 att = 6; ··· 2018 2018 if (phy->type == B43legacy_PHYTYPE_G) { 2019 2019 if (is_bcm_board_vendor(dev) && 2020 2020 dev->dev->bus->boardinfo.type == 0x421 && 2021 - dev->dev->bus->boardinfo.rev >= 30) 2021 + dev->dev->bus->sprom.board_rev >= 30) 2022 2022 att = 3; 2023 2023 else if (is_bcm_board_vendor(dev) && 2024 2024 dev->dev->bus->boardinfo.type == ··· 2052 2052 } 2053 2053 if (is_bcm_board_vendor(dev) && 2054 2054 dev->dev->bus->boardinfo.type == 0x421) { 2055 - if (dev->dev->bus->boardinfo.rev < 0x43) 2055 + if (dev->dev->bus->sprom.board_rev < 0x43) 2056 2056 att = 2; 2057 - else if (dev->dev->bus->boardinfo.rev < 0x51) 2057 + else if (dev->dev->bus->sprom.board_rev < 0x51) 2058 2058 att = 3; 2059 2059 } 2060 2060 if (att == 0xFFFF)
+129 -139
drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c
··· 85 85 sdiodev->irq_wake = true; 86 86 87 87 /* must configure SDIO_CCCR_IENx to enable irq */ 88 - data = brcmf_sdcard_cfg_read(sdiodev, SDIO_FUNC_0, 89 - SDIO_CCCR_IENx, &ret); 88 + data = brcmf_sdio_regrb(sdiodev, SDIO_CCCR_IENx, &ret); 90 89 data |= 1 << SDIO_FUNC_1 | 1 << SDIO_FUNC_2 | 1; 91 - brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_0, SDIO_CCCR_IENx, 92 - data, &ret); 90 + brcmf_sdio_regwb(sdiodev, SDIO_CCCR_IENx, data, &ret); 93 91 94 92 /* redirect, configure ane enable io for interrupt signal */ 95 93 data = SDIO_SEPINT_MASK | SDIO_SEPINT_OE; 96 94 if (sdiodev->irq_flags | IRQF_TRIGGER_HIGH) 97 95 data |= SDIO_SEPINT_ACT_HI; 98 - brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_0, SDIO_CCCR_BRCM_SEPINT, 99 - data, &ret); 96 + brcmf_sdio_regwb(sdiodev, SDIO_CCCR_BRCM_SEPINT, data, &ret); 100 97 101 98 return 0; 102 99 } ··· 102 105 { 103 106 brcmf_dbg(TRACE, "Entering\n"); 104 107 105 - brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_0, SDIO_CCCR_BRCM_SEPINT, 106 - 0, NULL); 107 - brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_0, SDIO_CCCR_IENx, 0, NULL); 108 + brcmf_sdio_regwb(sdiodev, SDIO_CCCR_BRCM_SEPINT, 0, NULL); 109 + brcmf_sdio_regwb(sdiodev, SDIO_CCCR_IENx, 0, NULL); 108 110 109 111 if (sdiodev->irq_wake) { 110 112 disable_irq_wake(sdiodev->irq); ··· 154 158 } 155 159 #endif /* CONFIG_BRCMFMAC_SDIO_OOB */ 156 160 157 - u8 brcmf_sdcard_cfg_read(struct brcmf_sdio_dev *sdiodev, uint fnc_num, u32 addr, 158 - int *err) 159 - { 160 - int status; 161 - s32 retry = 0; 162 - u8 data = 0; 163 - 164 - do { 165 - if (retry) /* wait for 1 ms till bus get settled down */ 166 - udelay(1000); 167 - status = brcmf_sdioh_request_byte(sdiodev, SDIOH_READ, fnc_num, 168 - addr, (u8 *) &data); 169 - } while (status != 0 170 - && (retry++ < SDIOH_API_ACCESS_RETRY_LIMIT)); 171 - if (err) 172 - *err = status; 173 - 174 - brcmf_dbg(INFO, "fun = %d, addr = 0x%x, u8data = 0x%x\n", 175 - fnc_num, addr, data); 176 - 177 - return data; 178 - } 179 - 180 - void 181 - brcmf_sdcard_cfg_write(struct brcmf_sdio_dev *sdiodev, uint fnc_num, u32 addr, 182 - u8 data, int *err) 183 - { 184 - int status; 185 - s32 retry = 0; 186 - 187 - do { 188 - if (retry) /* wait for 1 ms till bus get settled down */ 189 - udelay(1000); 190 - status = brcmf_sdioh_request_byte(sdiodev, SDIOH_WRITE, fnc_num, 191 - addr, (u8 *) &data); 192 - } while (status != 0 193 - && (retry++ < SDIOH_API_ACCESS_RETRY_LIMIT)); 194 - if (err) 195 - *err = status; 196 - 197 - brcmf_dbg(INFO, "fun = %d, addr = 0x%x, u8data = 0x%x\n", 198 - fnc_num, addr, data); 199 - } 200 - 201 161 int 202 162 brcmf_sdcard_set_sbaddr_window(struct brcmf_sdio_dev *sdiodev, u32 address) 203 163 { 204 - int err = 0; 205 - brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW, 206 - (address >> 8) & SBSDIO_SBADDRLOW_MASK, &err); 207 - if (!err) 208 - brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1, 209 - SBSDIO_FUNC1_SBADDRMID, 210 - (address >> 16) & SBSDIO_SBADDRMID_MASK, 211 - &err); 212 - if (!err) 213 - brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1, 214 - SBSDIO_FUNC1_SBADDRHIGH, 215 - (address >> 24) & SBSDIO_SBADDRHIGH_MASK, 216 - &err); 164 + int err = 0, i; 165 + u8 addr[3]; 166 + s32 retry; 167 + 168 + addr[0] = (address >> 8) & SBSDIO_SBADDRLOW_MASK; 169 + addr[1] = (address >> 16) & SBSDIO_SBADDRMID_MASK; 170 + addr[2] = (address >> 24) & SBSDIO_SBADDRHIGH_MASK; 171 + 172 + for (i = 0; i < 3; i++) { 173 + retry = 0; 174 + do { 175 + if (retry) 176 + usleep_range(1000, 2000); 177 + err = brcmf_sdioh_request_byte(sdiodev, SDIOH_WRITE, 178 + SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW + i, 179 + &addr[i]); 180 + } while (err != 0 && retry++ < SDIOH_API_ACCESS_RETRY_LIMIT); 181 + 182 + if (err) { 183 + brcmf_dbg(ERROR, "failed at addr:0x%0x\n", 184 + SBSDIO_FUNC1_SBADDRLOW + i); 185 + break; 186 + } 187 + } 217 188 218 189 return err; 219 190 } 220 191 221 - u32 brcmf_sdcard_reg_read(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size) 192 + static int 193 + brcmf_sdio_regrw_helper(struct brcmf_sdio_dev *sdiodev, u32 addr, 194 + void *data, bool write) 222 195 { 223 - int status; 224 - u32 word = 0; 225 - uint bar0 = addr & ~SBSDIO_SB_OFT_ADDR_MASK; 196 + u8 func_num, reg_size; 197 + u32 bar; 198 + s32 retry = 0; 199 + int ret; 226 200 227 - brcmf_dbg(INFO, "fun = 1, addr = 0x%x\n", addr); 201 + /* 202 + * figure out how to read the register based on address range 203 + * 0x00 ~ 0x7FF: function 0 CCCR and FBR 204 + * 0x10000 ~ 0x1FFFF: function 1 miscellaneous registers 205 + * The rest: function 1 silicon backplane core registers 206 + */ 207 + if ((addr & ~REG_F0_REG_MASK) == 0) { 208 + func_num = SDIO_FUNC_0; 209 + reg_size = 1; 210 + } else if ((addr & ~REG_F1_MISC_MASK) == 0) { 211 + func_num = SDIO_FUNC_1; 212 + reg_size = 1; 213 + } else { 214 + func_num = SDIO_FUNC_1; 215 + reg_size = 4; 228 216 229 - if (bar0 != sdiodev->sbwad) { 230 - if (brcmf_sdcard_set_sbaddr_window(sdiodev, bar0)) 231 - return 0xFFFFFFFF; 232 - 233 - sdiodev->sbwad = bar0; 234 - } 235 - 236 - addr &= SBSDIO_SB_OFT_ADDR_MASK; 237 - if (size == 4) 238 - addr |= SBSDIO_SB_ACCESS_2_4B_FLAG; 239 - 240 - status = brcmf_sdioh_request_word(sdiodev, SDIOH_READ, SDIO_FUNC_1, 241 - addr, &word, size); 242 - 243 - sdiodev->regfail = (status != 0); 244 - 245 - brcmf_dbg(INFO, "u32data = 0x%x\n", word); 246 - 247 - /* if ok, return appropriately masked word */ 248 - if (status == 0) { 249 - switch (size) { 250 - case sizeof(u8): 251 - return word & 0xff; 252 - case sizeof(u16): 253 - return word & 0xffff; 254 - case sizeof(u32): 255 - return word; 256 - default: 257 - sdiodev->regfail = true; 258 - 217 + /* Set the window for SB core register */ 218 + bar = addr & ~SBSDIO_SB_OFT_ADDR_MASK; 219 + if (bar != sdiodev->sbwad) { 220 + ret = brcmf_sdcard_set_sbaddr_window(sdiodev, bar); 221 + if (ret != 0) { 222 + memset(data, 0xFF, reg_size); 223 + return ret; 224 + } 225 + sdiodev->sbwad = bar; 259 226 } 260 - } 261 - 262 - /* otherwise, bad sdio access or invalid size */ 263 - brcmf_dbg(ERROR, "error reading addr 0x%04x size %d\n", addr, size); 264 - return 0xFFFFFFFF; 265 - } 266 - 267 - u32 brcmf_sdcard_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size, 268 - u32 data) 269 - { 270 - int status; 271 - uint bar0 = addr & ~SBSDIO_SB_OFT_ADDR_MASK; 272 - int err = 0; 273 - 274 - brcmf_dbg(INFO, "fun = 1, addr = 0x%x, uint%ddata = 0x%x\n", 275 - addr, size * 8, data); 276 - 277 - if (bar0 != sdiodev->sbwad) { 278 - err = brcmf_sdcard_set_sbaddr_window(sdiodev, bar0); 279 - if (err) 280 - return err; 281 - 282 - sdiodev->sbwad = bar0; 283 - } 284 - 285 - addr &= SBSDIO_SB_OFT_ADDR_MASK; 286 - if (size == 4) 227 + addr &= SBSDIO_SB_OFT_ADDR_MASK; 287 228 addr |= SBSDIO_SB_ACCESS_2_4B_FLAG; 288 - status = 289 - brcmf_sdioh_request_word(sdiodev, SDIOH_WRITE, SDIO_FUNC_1, 290 - addr, &data, size); 291 - sdiodev->regfail = (status != 0); 229 + } 292 230 293 - if (status == 0) 294 - return 0; 231 + do { 232 + if (!write) 233 + memset(data, 0, reg_size); 234 + if (retry) /* wait for 1 ms till bus get settled down */ 235 + usleep_range(1000, 2000); 236 + if (reg_size == 1) 237 + ret = brcmf_sdioh_request_byte(sdiodev, write, 238 + func_num, addr, data); 239 + else 240 + ret = brcmf_sdioh_request_word(sdiodev, write, 241 + func_num, addr, data, 4); 242 + } while (ret != 0 && retry++ < SDIOH_API_ACCESS_RETRY_LIMIT); 295 243 296 - brcmf_dbg(ERROR, "error writing 0x%08x to addr 0x%04x size %d\n", 297 - data, addr, size); 298 - return 0xFFFFFFFF; 244 + if (ret != 0) 245 + brcmf_dbg(ERROR, "failed with %d\n", ret); 246 + 247 + return ret; 299 248 } 300 249 301 - bool brcmf_sdcard_regfail(struct brcmf_sdio_dev *sdiodev) 250 + u8 brcmf_sdio_regrb(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret) 302 251 { 303 - return sdiodev->regfail; 252 + u8 data; 253 + int retval; 254 + 255 + brcmf_dbg(INFO, "addr:0x%08x\n", addr); 256 + retval = brcmf_sdio_regrw_helper(sdiodev, addr, &data, false); 257 + brcmf_dbg(INFO, "data:0x%02x\n", data); 258 + 259 + if (ret) 260 + *ret = retval; 261 + 262 + return data; 263 + } 264 + 265 + u32 brcmf_sdio_regrl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret) 266 + { 267 + u32 data; 268 + int retval; 269 + 270 + brcmf_dbg(INFO, "addr:0x%08x\n", addr); 271 + retval = brcmf_sdio_regrw_helper(sdiodev, addr, &data, false); 272 + brcmf_dbg(INFO, "data:0x%08x\n", data); 273 + 274 + if (ret) 275 + *ret = retval; 276 + 277 + return data; 278 + } 279 + 280 + void brcmf_sdio_regwb(struct brcmf_sdio_dev *sdiodev, u32 addr, 281 + u8 data, int *ret) 282 + { 283 + int retval; 284 + 285 + brcmf_dbg(INFO, "addr:0x%08x, data:0x%02x\n", addr, data); 286 + retval = brcmf_sdio_regrw_helper(sdiodev, addr, &data, true); 287 + 288 + if (ret) 289 + *ret = retval; 290 + } 291 + 292 + void brcmf_sdio_regwl(struct brcmf_sdio_dev *sdiodev, u32 addr, 293 + u32 data, int *ret) 294 + { 295 + int retval; 296 + 297 + brcmf_dbg(INFO, "addr:0x%08x, data:0x%08x\n", addr, data); 298 + retval = brcmf_sdio_regrw_helper(sdiodev, addr, &data, true); 299 + 300 + if (ret) 301 + *ret = retval; 304 302 } 305 303 306 304 static int brcmf_sdcard_recv_prepare(struct brcmf_sdio_dev *sdiodev, uint fn,
+3 -29
drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c
··· 346 346 return status; 347 347 } 348 348 349 - /* Read client card reg */ 350 - static int 351 - brcmf_sdioh_card_regread(struct brcmf_sdio_dev *sdiodev, int func, u32 regaddr, 352 - int regsize, u32 *data) 353 - { 354 - 355 - if ((func == 0) || (regsize == 1)) { 356 - u8 temp = 0; 357 - 358 - brcmf_sdioh_request_byte(sdiodev, SDIOH_READ, func, regaddr, 359 - &temp); 360 - *data = temp; 361 - *data &= 0xff; 362 - brcmf_dbg(DATA, "byte read data=0x%02x\n", *data); 363 - } else { 364 - brcmf_sdioh_request_word(sdiodev, SDIOH_READ, func, regaddr, 365 - data, regsize); 366 - if (regsize == 2) 367 - *data &= 0xffff; 368 - 369 - brcmf_dbg(DATA, "word read data=0x%08x\n", *data); 370 - } 371 - 372 - return SUCCESS; 373 - } 374 - 375 349 static int brcmf_sdioh_get_cisaddr(struct brcmf_sdio_dev *sdiodev, u32 regaddr) 376 350 { 377 351 /* read 24 bits and return valid 17 bit addr */ 378 - int i; 352 + int i, ret; 379 353 u32 scratch, regdata; 380 354 __le32 scratch_le; 381 355 u8 *ptr = (u8 *)&scratch_le; 382 356 383 357 for (i = 0; i < 3; i++) { 384 - if ((brcmf_sdioh_card_regread(sdiodev, 0, regaddr, 1, 385 - &regdata)) != SUCCESS) 358 + regdata = brcmf_sdio_regrl(sdiodev, regaddr, &ret); 359 + if (ret != 0) 386 360 brcmf_dbg(ERROR, "Can't read!\n"); 387 361 388 362 *ptr++ = (u8) regdata;
+146 -202
drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c
··· 629 629 * Reads a register in the SDIO hardware block. This block occupies a series of 630 630 * adresses on the 32 bit backplane bus. 631 631 */ 632 - static void 633 - r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 reg_offset, u32 *retryvar) 632 + static int 633 + r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset) 634 634 { 635 635 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV); 636 - *retryvar = 0; 637 - do { 638 - *regvar = brcmf_sdcard_reg_read(bus->sdiodev, 639 - bus->ci->c_inf[idx].base + reg_offset, 640 - sizeof(u32)); 641 - } while (brcmf_sdcard_regfail(bus->sdiodev) && 642 - (++(*retryvar) <= retry_limit)); 643 - if (*retryvar) { 644 - bus->regfails += (*retryvar-1); 645 - if (*retryvar > retry_limit) { 646 - brcmf_dbg(ERROR, "FAILED READ %Xh\n", reg_offset); 647 - *regvar = 0; 648 - } 649 - } 636 + int ret; 637 + 638 + *regvar = brcmf_sdio_regrl(bus->sdiodev, 639 + bus->ci->c_inf[idx].base + offset, &ret); 640 + 641 + return ret; 650 642 } 651 643 652 - static void 653 - w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset, u32 *retryvar) 644 + static int 645 + w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset) 654 646 { 655 647 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV); 656 - *retryvar = 0; 657 - do { 658 - brcmf_sdcard_reg_write(bus->sdiodev, 659 - bus->ci->c_inf[idx].base + reg_offset, 660 - sizeof(u32), regval); 661 - } while (brcmf_sdcard_regfail(bus->sdiodev) && 662 - (++(*retryvar) <= retry_limit)); 663 - if (*retryvar) { 664 - bus->regfails += (*retryvar-1); 665 - if (*retryvar > retry_limit) 666 - brcmf_dbg(ERROR, "FAILED REGISTER WRITE %Xh\n", 667 - reg_offset); 668 - } 648 + int ret; 649 + 650 + brcmf_sdio_regwl(bus->sdiodev, 651 + bus->ci->c_inf[idx].base + reg_offset, 652 + regval, &ret); 653 + 654 + return ret; 669 655 } 670 656 671 657 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND) ··· 683 697 clkreq = 684 698 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ; 685 699 686 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 687 - SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err); 700 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 701 + clkreq, &err); 688 702 if (err) { 689 703 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err); 690 704 return -EBADE; 691 705 } 692 706 693 707 /* Check current status */ 694 - clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, 695 - SBSDIO_FUNC1_CHIPCLKCSR, &err); 708 + clkctl = brcmf_sdio_regrb(bus->sdiodev, 709 + SBSDIO_FUNC1_CHIPCLKCSR, &err); 696 710 if (err) { 697 711 brcmf_dbg(ERROR, "HT Avail read error: %d\n", err); 698 712 return -EBADE; ··· 701 715 /* Go to pending and await interrupt if appropriate */ 702 716 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) { 703 717 /* Allow only clock-available interrupt */ 704 - devctl = brcmf_sdcard_cfg_read(bus->sdiodev, 705 - SDIO_FUNC_1, 706 - SBSDIO_DEVICE_CTL, &err); 718 + devctl = brcmf_sdio_regrb(bus->sdiodev, 719 + SBSDIO_DEVICE_CTL, &err); 707 720 if (err) { 708 721 brcmf_dbg(ERROR, "Devctl error setting CA: %d\n", 709 722 err); ··· 710 725 } 711 726 712 727 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY; 713 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 714 - SBSDIO_DEVICE_CTL, devctl, &err); 728 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL, 729 + devctl, &err); 715 730 brcmf_dbg(INFO, "CLKCTL: set PENDING\n"); 716 731 bus->clkstate = CLK_PENDING; 717 732 718 733 return 0; 719 734 } else if (bus->clkstate == CLK_PENDING) { 720 735 /* Cancel CA-only interrupt filter */ 721 - devctl = 722 - brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, 736 + devctl = brcmf_sdio_regrb(bus->sdiodev, 723 737 SBSDIO_DEVICE_CTL, &err); 724 738 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY; 725 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 726 - SBSDIO_DEVICE_CTL, devctl, &err); 739 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL, 740 + devctl, &err); 727 741 } 728 742 729 743 /* Otherwise, wait here (polling) for HT Avail */ 730 744 timeout = jiffies + 731 745 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000); 732 746 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) { 733 - clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, 734 - SDIO_FUNC_1, 735 - SBSDIO_FUNC1_CHIPCLKCSR, 736 - &err); 747 + clkctl = brcmf_sdio_regrb(bus->sdiodev, 748 + SBSDIO_FUNC1_CHIPCLKCSR, 749 + &err); 737 750 if (time_after(jiffies, timeout)) 738 751 break; 739 752 else ··· 764 781 765 782 if (bus->clkstate == CLK_PENDING) { 766 783 /* Cancel CA-only interrupt filter */ 767 - devctl = brcmf_sdcard_cfg_read(bus->sdiodev, 768 - SDIO_FUNC_1, 769 - SBSDIO_DEVICE_CTL, &err); 784 + devctl = brcmf_sdio_regrb(bus->sdiodev, 785 + SBSDIO_DEVICE_CTL, &err); 770 786 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY; 771 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 772 - SBSDIO_DEVICE_CTL, devctl, &err); 787 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL, 788 + devctl, &err); 773 789 } 774 790 775 791 bus->clkstate = CLK_SDONLY; 776 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 777 - SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err); 792 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 793 + clkreq, &err); 778 794 brcmf_dbg(INFO, "CLKCTL: turned OFF\n"); 779 795 if (err) { 780 796 brcmf_dbg(ERROR, "Failed access turning clock off: %d\n", ··· 856 874 857 875 static int brcmf_sdbrcm_bussleep(struct brcmf_sdio *bus, bool sleep) 858 876 { 859 - uint retries = 0; 877 + int ret; 860 878 861 879 brcmf_dbg(INFO, "request %s (currently %s)\n", 862 880 sleep ? "SLEEP" : "WAKE", ··· 876 894 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); 877 895 878 896 /* Tell device to start using OOB wakeup */ 879 - w_sdreg32(bus, SMB_USE_OOB, 880 - offsetof(struct sdpcmd_regs, tosbmailbox), &retries); 881 - if (retries > retry_limit) 897 + ret = w_sdreg32(bus, SMB_USE_OOB, 898 + offsetof(struct sdpcmd_regs, tosbmailbox)); 899 + if (ret != 0) 882 900 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n"); 883 901 884 902 /* Turn off our contribution to the HT clock request */ 885 903 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false); 886 904 887 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 888 - SBSDIO_FUNC1_CHIPCLKCSR, 889 - SBSDIO_FORCE_HW_CLKREQ_OFF, NULL); 905 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 906 + SBSDIO_FORCE_HW_CLKREQ_OFF, NULL); 890 907 891 908 /* Isolate the bus */ 892 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 893 - SBSDIO_DEVICE_CTL, 894 - SBSDIO_DEVCTL_PADS_ISO, NULL); 909 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL, 910 + SBSDIO_DEVCTL_PADS_ISO, NULL); 895 911 896 912 /* Change state */ 897 913 bus->sleeping = true; ··· 897 917 } else { 898 918 /* Waking up: bus power up is ok, set local state */ 899 919 900 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 901 - SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL); 920 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 921 + 0, NULL); 902 922 903 923 /* Make sure the controller has the bus up */ 904 924 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); 905 925 906 926 /* Send misc interrupt to indicate OOB not needed */ 907 - w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata), 908 - &retries); 909 - if (retries <= retry_limit) 910 - w_sdreg32(bus, SMB_DEV_INT, 911 - offsetof(struct sdpcmd_regs, tosbmailbox), 912 - &retries); 927 + ret = w_sdreg32(bus, 0, 928 + offsetof(struct sdpcmd_regs, tosbmailboxdata)); 929 + if (ret == 0) 930 + ret = w_sdreg32(bus, SMB_DEV_INT, 931 + offsetof(struct sdpcmd_regs, tosbmailbox)); 913 932 914 - if (retries > retry_limit) 933 + if (ret != 0) 915 934 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP TO CLEAR OOB!!\n"); 916 935 917 936 /* Make sure we have SD bus access */ ··· 934 955 u32 intstatus = 0; 935 956 u32 hmb_data; 936 957 u8 fcbits; 937 - uint retries = 0; 958 + int ret; 938 959 939 960 brcmf_dbg(TRACE, "Enter\n"); 940 961 941 962 /* Read mailbox data and ack that we did so */ 942 - r_sdreg32(bus, &hmb_data, 943 - offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries); 963 + ret = r_sdreg32(bus, &hmb_data, 964 + offsetof(struct sdpcmd_regs, tohostmailboxdata)); 944 965 945 - if (retries <= retry_limit) 966 + if (ret == 0) 946 967 w_sdreg32(bus, SMB_INT_ACK, 947 - offsetof(struct sdpcmd_regs, tosbmailbox), &retries); 968 + offsetof(struct sdpcmd_regs, tosbmailbox)); 948 969 bus->f1regdata += 2; 949 970 950 971 /* Dongle recomposed rx frames, accept them again */ ··· 1019 1040 if (abort) 1020 1041 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2); 1021 1042 1022 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 1023 - SBSDIO_FUNC1_FRAMECTRL, 1024 - SFC_RF_TERM, &err); 1043 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, 1044 + SFC_RF_TERM, &err); 1025 1045 bus->f1regdata++; 1026 1046 1027 1047 /* Wait until the packet has been flushed (device/FIFO stable) */ 1028 1048 for (lastrbc = retries = 0xffff; retries > 0; retries--) { 1029 - hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, 1030 - SBSDIO_FUNC1_RFRAMEBCHI, NULL); 1031 - lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, 1032 - SBSDIO_FUNC1_RFRAMEBCLO, NULL); 1049 + hi = brcmf_sdio_regrb(bus->sdiodev, 1050 + SBSDIO_FUNC1_RFRAMEBCHI, &err); 1051 + lo = brcmf_sdio_regrb(bus->sdiodev, 1052 + SBSDIO_FUNC1_RFRAMEBCLO, &err); 1033 1053 bus->f1regdata += 2; 1034 1054 1035 1055 if ((hi == 0) && (lo == 0)) ··· 1048 1070 1049 1071 if (rtx) { 1050 1072 bus->rxrtx++; 1051 - w_sdreg32(bus, SMB_NAK, 1052 - offsetof(struct sdpcmd_regs, tosbmailbox), &retries); 1073 + err = w_sdreg32(bus, SMB_NAK, 1074 + offsetof(struct sdpcmd_regs, tosbmailbox)); 1053 1075 1054 1076 bus->f1regdata++; 1055 - if (retries <= retry_limit) 1077 + if (err == 0) 1056 1078 bus->rxskip = true; 1057 1079 } 1058 1080 ··· 1060 1082 bus->nextlen = 0; 1061 1083 1062 1084 /* If we can't reach the device, signal failure */ 1063 - if (err || brcmf_sdcard_regfail(bus->sdiodev)) 1085 + if (err) 1064 1086 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; 1065 1087 } 1066 1088 ··· 2156 2178 bus->tx_sderrs++; 2157 2179 2158 2180 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2); 2159 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 2160 - SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, 2161 - NULL); 2181 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, 2182 + SFC_WF_TERM, NULL); 2162 2183 bus->f1regdata++; 2163 2184 2164 2185 for (i = 0; i < 3; i++) { 2165 2186 u8 hi, lo; 2166 - hi = brcmf_sdcard_cfg_read(bus->sdiodev, 2167 - SDIO_FUNC_1, 2168 - SBSDIO_FUNC1_WFRAMEBCHI, 2169 - NULL); 2170 - lo = brcmf_sdcard_cfg_read(bus->sdiodev, 2171 - SDIO_FUNC_1, 2172 - SBSDIO_FUNC1_WFRAMEBCLO, 2173 - NULL); 2187 + hi = brcmf_sdio_regrb(bus->sdiodev, 2188 + SBSDIO_FUNC1_WFRAMEBCHI, NULL); 2189 + lo = brcmf_sdio_regrb(bus->sdiodev, 2190 + SBSDIO_FUNC1_WFRAMEBCLO, NULL); 2174 2191 bus->f1regdata += 2; 2175 2192 if ((hi == 0) && (lo == 0)) 2176 2193 break; ··· 2192 2219 { 2193 2220 struct sk_buff *pkt; 2194 2221 u32 intstatus = 0; 2195 - uint retries = 0; 2196 2222 int ret = 0, prec_out; 2197 2223 uint cnt = 0; 2198 2224 uint datalen; ··· 2221 2249 /* In poll mode, need to check for other events */ 2222 2250 if (!bus->intr && cnt) { 2223 2251 /* Check device status, signal pending interrupt */ 2224 - r_sdreg32(bus, &intstatus, 2225 - offsetof(struct sdpcmd_regs, intstatus), 2226 - &retries); 2252 + ret = r_sdreg32(bus, &intstatus, 2253 + offsetof(struct sdpcmd_regs, 2254 + intstatus)); 2227 2255 bus->f2txdata++; 2228 - if (brcmf_sdcard_regfail(bus->sdiodev)) 2256 + if (ret != 0) 2229 2257 break; 2230 2258 if (intstatus & bus->hostintmask) 2231 2259 bus->ipend = true; ··· 2247 2275 { 2248 2276 u32 local_hostintmask; 2249 2277 u8 saveclk; 2250 - uint retries; 2251 2278 int err; 2252 2279 struct brcmf_bus *bus_if = dev_get_drvdata(dev); 2253 2280 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio; ··· 2274 2303 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); 2275 2304 2276 2305 /* Disable and clear interrupts at the chip level also */ 2277 - w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries); 2306 + w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask)); 2278 2307 local_hostintmask = bus->hostintmask; 2279 2308 bus->hostintmask = 0; 2280 2309 ··· 2282 2311 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; 2283 2312 2284 2313 /* Force clocks on backplane to be sure F2 interrupt propagates */ 2285 - saveclk = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, 2286 - SBSDIO_FUNC1_CHIPCLKCSR, &err); 2314 + saveclk = brcmf_sdio_regrb(bus->sdiodev, 2315 + SBSDIO_FUNC1_CHIPCLKCSR, &err); 2287 2316 if (!err) { 2288 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 2289 - SBSDIO_FUNC1_CHIPCLKCSR, 2290 - (saveclk | SBSDIO_FORCE_HT), &err); 2317 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 2318 + (saveclk | SBSDIO_FORCE_HT), &err); 2291 2319 } 2292 2320 if (err) 2293 2321 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err); 2294 2322 2295 2323 /* Turn off the bus (F2), free any pending packets */ 2296 2324 brcmf_dbg(INTR, "disable SDIO interrupts\n"); 2297 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx, 2298 - SDIO_FUNC_ENABLE_1, NULL); 2325 + brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1, 2326 + NULL); 2299 2327 2300 2328 /* Clear any pending interrupts now that F2 is disabled */ 2301 2329 w_sdreg32(bus, local_hostintmask, 2302 - offsetof(struct sdpcmd_regs, intstatus), &retries); 2330 + offsetof(struct sdpcmd_regs, intstatus)); 2303 2331 2304 2332 /* Turn off the backplane clock (only) */ 2305 2333 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false); ··· 2343 2373 static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus) 2344 2374 { 2345 2375 u32 intstatus, newstatus = 0; 2346 - uint retries = 0; 2347 2376 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */ 2348 2377 uint txlimit = bus->txbound; /* Tx frames to send before resched */ 2349 2378 uint framecnt = 0; /* Temporary counter of tx/rx frames */ 2350 2379 bool rxdone = true; /* Flag for no more read data */ 2351 2380 bool resched = false; /* Flag indicating resched wanted */ 2381 + int err; 2352 2382 2353 2383 brcmf_dbg(TRACE, "Enter\n"); 2354 2384 ··· 2359 2389 2360 2390 /* If waiting for HTAVAIL, check status */ 2361 2391 if (bus->clkstate == CLK_PENDING) { 2362 - int err; 2363 2392 u8 clkctl, devctl = 0; 2364 2393 2365 2394 #ifdef DEBUG 2366 2395 /* Check for inconsistent device control */ 2367 - devctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, 2368 - SBSDIO_DEVICE_CTL, &err); 2396 + devctl = brcmf_sdio_regrb(bus->sdiodev, 2397 + SBSDIO_DEVICE_CTL, &err); 2369 2398 if (err) { 2370 2399 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err); 2371 2400 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; ··· 2372 2403 #endif /* DEBUG */ 2373 2404 2374 2405 /* Read CSR, if clock on switch to AVAIL, else ignore */ 2375 - clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, 2376 - SBSDIO_FUNC1_CHIPCLKCSR, &err); 2406 + clkctl = brcmf_sdio_regrb(bus->sdiodev, 2407 + SBSDIO_FUNC1_CHIPCLKCSR, &err); 2377 2408 if (err) { 2378 2409 brcmf_dbg(ERROR, "error reading CSR: %d\n", 2379 2410 err); ··· 2384 2415 devctl, clkctl); 2385 2416 2386 2417 if (SBSDIO_HTAV(clkctl)) { 2387 - devctl = brcmf_sdcard_cfg_read(bus->sdiodev, 2388 - SDIO_FUNC_1, 2389 - SBSDIO_DEVICE_CTL, &err); 2418 + devctl = brcmf_sdio_regrb(bus->sdiodev, 2419 + SBSDIO_DEVICE_CTL, &err); 2390 2420 if (err) { 2391 2421 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", 2392 2422 err); 2393 2423 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; 2394 2424 } 2395 2425 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY; 2396 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 2397 - SBSDIO_DEVICE_CTL, devctl, &err); 2426 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL, 2427 + devctl, &err); 2398 2428 if (err) { 2399 2429 brcmf_dbg(ERROR, "error writing DEVCTL: %d\n", 2400 2430 err); ··· 2415 2447 /* Pending interrupt indicates new device status */ 2416 2448 if (bus->ipend) { 2417 2449 bus->ipend = false; 2418 - r_sdreg32(bus, &newstatus, 2419 - offsetof(struct sdpcmd_regs, intstatus), &retries); 2450 + err = r_sdreg32(bus, &newstatus, 2451 + offsetof(struct sdpcmd_regs, intstatus)); 2420 2452 bus->f1regdata++; 2421 - if (brcmf_sdcard_regfail(bus->sdiodev)) 2453 + if (err != 0) 2422 2454 newstatus = 0; 2423 2455 newstatus &= bus->hostintmask; 2424 2456 bus->fcstate = !!(newstatus & I_HMB_FC_STATE); 2425 2457 if (newstatus) { 2426 - w_sdreg32(bus, newstatus, 2427 - offsetof(struct sdpcmd_regs, intstatus), 2428 - &retries); 2458 + err = w_sdreg32(bus, newstatus, 2459 + offsetof(struct sdpcmd_regs, 2460 + intstatus)); 2429 2461 bus->f1regdata++; 2430 2462 } 2431 2463 } ··· 2440 2472 */ 2441 2473 if (intstatus & I_HMB_FC_CHANGE) { 2442 2474 intstatus &= ~I_HMB_FC_CHANGE; 2443 - w_sdreg32(bus, I_HMB_FC_CHANGE, 2444 - offsetof(struct sdpcmd_regs, intstatus), &retries); 2475 + err = w_sdreg32(bus, I_HMB_FC_CHANGE, 2476 + offsetof(struct sdpcmd_regs, intstatus)); 2445 2477 2446 - r_sdreg32(bus, &newstatus, 2447 - offsetof(struct sdpcmd_regs, intstatus), &retries); 2478 + err = r_sdreg32(bus, &newstatus, 2479 + offsetof(struct sdpcmd_regs, intstatus)); 2448 2480 bus->f1regdata += 2; 2449 2481 bus->fcstate = 2450 2482 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)); ··· 2514 2546 2515 2547 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2); 2516 2548 2517 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 2518 - SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, 2519 - NULL); 2549 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, 2550 + SFC_WF_TERM, &err); 2520 2551 bus->f1regdata++; 2521 2552 2522 2553 for (i = 0; i < 3; i++) { 2523 2554 u8 hi, lo; 2524 - hi = brcmf_sdcard_cfg_read(bus->sdiodev, 2525 - SDIO_FUNC_1, 2526 - SBSDIO_FUNC1_WFRAMEBCHI, 2527 - NULL); 2528 - lo = brcmf_sdcard_cfg_read(bus->sdiodev, 2529 - SDIO_FUNC_1, 2530 - SBSDIO_FUNC1_WFRAMEBCLO, 2531 - NULL); 2555 + hi = brcmf_sdio_regrb(bus->sdiodev, 2556 + SBSDIO_FUNC1_WFRAMEBCHI, 2557 + &err); 2558 + lo = brcmf_sdio_regrb(bus->sdiodev, 2559 + SBSDIO_FUNC1_WFRAMEBCLO, 2560 + &err); 2532 2561 bus->f1regdata += 2; 2533 2562 if ((hi == 0) && (lo == 0)) 2534 2563 break; ··· 2552 2587 else await next interrupt */ 2553 2588 /* On failed register access, all bets are off: 2554 2589 no resched or interrupts */ 2555 - if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || 2556 - brcmf_sdcard_regfail(bus->sdiodev)) { 2557 - brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation %d\n", 2558 - brcmf_sdcard_regfail(bus->sdiodev)); 2590 + if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) { 2591 + brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation\n"); 2559 2592 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; 2560 2593 bus->intstatus = 0; 2561 2594 } else if (bus->clkstate == CLK_PENDING) { ··· 2849 2886 2850 2887 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2); 2851 2888 2852 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 2853 - SBSDIO_FUNC1_FRAMECTRL, 2854 - SFC_WF_TERM, NULL); 2889 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, 2890 + SFC_WF_TERM, NULL); 2855 2891 bus->f1regdata++; 2856 2892 2857 2893 for (i = 0; i < 3; i++) { 2858 2894 u8 hi, lo; 2859 - hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, 2860 - SBSDIO_FUNC1_WFRAMEBCHI, 2861 - NULL); 2862 - lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, 2863 - SBSDIO_FUNC1_WFRAMEBCLO, 2864 - NULL); 2895 + hi = brcmf_sdio_regrb(bus->sdiodev, 2896 + SBSDIO_FUNC1_WFRAMEBCHI, NULL); 2897 + lo = brcmf_sdio_regrb(bus->sdiodev, 2898 + SBSDIO_FUNC1_WFRAMEBCLO, NULL); 2865 2899 bus->f1regdata += 2; 2866 2900 if (hi == 0 && lo == 0) 2867 2901 break; ··· 3148 3188 3149 3189 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter) 3150 3190 { 3151 - uint retries; 3152 3191 int bcmerror = 0; 3153 3192 struct chip_info *ci = bus->ci; 3154 3193 ··· 3181 3222 } 3182 3223 3183 3224 w_sdreg32(bus, 0xFFFFFFFF, 3184 - offsetof(struct sdpcmd_regs, intstatus), &retries); 3225 + offsetof(struct sdpcmd_regs, intstatus)); 3185 3226 3186 3227 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3); 3187 3228 ··· 3403 3444 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio; 3404 3445 struct brcmf_sdio *bus = sdiodev->bus; 3405 3446 unsigned long timeout; 3406 - uint retries = 0; 3407 3447 u8 ready, enable; 3408 3448 int err, ret = 0; 3409 3449 u8 saveclk; ··· 3430 3472 goto exit; 3431 3473 3432 3474 /* Force clocks on backplane to be sure F2 interrupt propagates */ 3433 - saveclk = 3434 - brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, 3435 - SBSDIO_FUNC1_CHIPCLKCSR, &err); 3475 + saveclk = brcmf_sdio_regrb(bus->sdiodev, 3476 + SBSDIO_FUNC1_CHIPCLKCSR, &err); 3436 3477 if (!err) { 3437 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 3438 - SBSDIO_FUNC1_CHIPCLKCSR, 3439 - (saveclk | SBSDIO_FORCE_HT), &err); 3478 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 3479 + (saveclk | SBSDIO_FORCE_HT), &err); 3440 3480 } 3441 3481 if (err) { 3442 3482 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err); ··· 3443 3487 3444 3488 /* Enable function 2 (frame transfers) */ 3445 3489 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT, 3446 - offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries); 3490 + offsetof(struct sdpcmd_regs, tosbmailboxdata)); 3447 3491 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2); 3448 3492 3449 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx, 3450 - enable, NULL); 3493 + brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL); 3451 3494 3452 3495 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY); 3453 3496 ready = 0; 3454 3497 while (enable != ready) { 3455 - ready = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_0, 3456 - SDIO_CCCR_IORx, NULL); 3498 + ready = brcmf_sdio_regrb(bus->sdiodev, 3499 + SDIO_CCCR_IORx, NULL); 3457 3500 if (time_after(jiffies, timeout)) 3458 3501 break; 3459 3502 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50)) ··· 3467 3512 /* Set up the interrupt mask and enable interrupts */ 3468 3513 bus->hostintmask = HOSTINTMASK; 3469 3514 w_sdreg32(bus, bus->hostintmask, 3470 - offsetof(struct sdpcmd_regs, hostintmask), &retries); 3515 + offsetof(struct sdpcmd_regs, hostintmask)); 3471 3516 3472 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 3473 - SBSDIO_WATERMARK, 8, &err); 3517 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err); 3474 3518 } else { 3475 3519 /* Disable F2 again */ 3476 3520 enable = SDIO_FUNC_ENABLE_1; 3477 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, 3478 - SDIO_CCCR_IOEx, enable, NULL); 3521 + brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL); 3479 3522 ret = -ENODEV; 3480 3523 } 3481 3524 3482 3525 /* Restore previous clock setting */ 3483 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 3484 - SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err); 3526 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err); 3485 3527 3486 3528 if (ret == 0) { 3487 3529 ret = brcmf_sdio_intr_register(bus->sdiodev); ··· 3558 3606 3559 3607 if (!bus->dpc_sched) { 3560 3608 u8 devpend; 3561 - devpend = brcmf_sdcard_cfg_read(bus->sdiodev, 3562 - SDIO_FUNC_0, SDIO_CCCR_INTx, 3563 - NULL); 3609 + devpend = brcmf_sdio_regrb(bus->sdiodev, 3610 + SDIO_CCCR_INTx, 3611 + NULL); 3564 3612 intstatus = 3565 3613 devpend & (INTR_STATUS_FUNC1 | 3566 3614 INTR_STATUS_FUNC2); ··· 3684 3732 3685 3733 bus->alp_only = true; 3686 3734 3687 - /* Return the window to backplane enumeration space for core access */ 3688 - if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, SI_ENUM_BASE)) 3689 - brcmf_dbg(ERROR, "FAILED to return to SI_ENUM_BASE\n"); 3690 - 3691 3735 pr_debug("F1 signature read @0x18000000=0x%4x\n", 3692 - brcmf_sdcard_reg_read(bus->sdiodev, SI_ENUM_BASE, 4)); 3736 + brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL)); 3693 3737 3694 3738 /* 3695 3739 * Force PLL off until brcmf_sdio_chip_attach() 3696 3740 * programs PLL control regs 3697 3741 */ 3698 3742 3699 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 3700 - SBSDIO_FUNC1_CHIPCLKCSR, 3701 - BRCMF_INIT_CLKCTL1, &err); 3743 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 3744 + BRCMF_INIT_CLKCTL1, &err); 3702 3745 if (!err) 3703 - clkctl = 3704 - brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1, 3746 + clkctl = brcmf_sdio_regrb(bus->sdiodev, 3705 3747 SBSDIO_FUNC1_CHIPCLKCSR, &err); 3706 3748 3707 3749 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) { ··· 3728 3782 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV); 3729 3783 reg_addr = bus->ci->c_inf[idx].base + 3730 3784 offsetof(struct sdpcmd_regs, corecontrol); 3731 - reg_val = brcmf_sdcard_reg_read(bus->sdiodev, reg_addr, sizeof(u32)); 3732 - brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, sizeof(u32), 3733 - reg_val | CC_BPRESEN); 3785 + reg_val = brcmf_sdio_regrl(bus->sdiodev, reg_addr, NULL); 3786 + brcmf_sdio_regwl(bus->sdiodev, reg_addr, reg_val | CC_BPRESEN, NULL); 3734 3787 3735 3788 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN); 3736 3789 ··· 3754 3809 brcmf_dbg(TRACE, "Enter\n"); 3755 3810 3756 3811 /* Disable F2 to clear any intermediate frame state on the dongle */ 3757 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx, 3758 - SDIO_FUNC_ENABLE_1, NULL); 3812 + brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, 3813 + SDIO_FUNC_ENABLE_1, NULL); 3759 3814 3760 3815 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN; 3761 3816 bus->sleeping = false; 3762 3817 bus->rxflow = false; 3763 3818 3764 3819 /* Done with backplane-dependent accesses, can drop clock... */ 3765 - brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1, 3766 - SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL); 3820 + brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL); 3767 3821 3768 3822 /* ...and initialize clock/power states */ 3769 3823 bus->clkstate = CLK_SDONLY;
+137 -126
drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c
··· 93 93 94 94 idx = brcmf_sdio_chip_getinfidx(ci, coreid); 95 95 96 - regdata = brcmf_sdcard_reg_read(sdiodev, 97 - CORE_SB(ci->c_inf[idx].base, sbidhigh), 4); 96 + regdata = brcmf_sdio_regrl(sdiodev, 97 + CORE_SB(ci->c_inf[idx].base, sbidhigh), 98 + NULL); 98 99 return SBCOREREV(regdata); 99 100 } 100 101 ··· 119 118 120 119 idx = brcmf_sdio_chip_getinfidx(ci, coreid); 121 120 122 - regdata = brcmf_sdcard_reg_read(sdiodev, 123 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4); 121 + regdata = brcmf_sdio_regrl(sdiodev, 122 + CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 123 + NULL); 124 124 regdata &= (SSB_TMSLOW_RESET | SSB_TMSLOW_REJECT | 125 125 SSB_IMSTATE_REJECT | SSB_TMSLOW_CLOCK); 126 126 return (SSB_TMSLOW_CLOCK == regdata); ··· 137 135 138 136 idx = brcmf_sdio_chip_getinfidx(ci, coreid); 139 137 140 - regdata = brcmf_sdcard_reg_read(sdiodev, 141 - ci->c_inf[idx].wrapbase+BCMA_IOCTL, 4); 138 + regdata = brcmf_sdio_regrl(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL, 139 + NULL); 142 140 ret = (regdata & (BCMA_IOCTL_FGC | BCMA_IOCTL_CLK)) == BCMA_IOCTL_CLK; 143 141 144 - regdata = brcmf_sdcard_reg_read(sdiodev, 145 - ci->c_inf[idx].wrapbase+BCMA_RESET_CTL, 146 - 4); 142 + regdata = brcmf_sdio_regrl(sdiodev, 143 + ci->c_inf[idx].wrapbase+BCMA_RESET_CTL, 144 + NULL); 147 145 ret = ret && ((regdata & BCMA_RESET_CTL_RESET) == 0); 148 146 149 147 return ret; ··· 153 151 brcmf_sdio_sb_coredisable(struct brcmf_sdio_dev *sdiodev, 154 152 struct chip_info *ci, u16 coreid) 155 153 { 156 - u32 regdata; 154 + u32 regdata, base; 157 155 u8 idx; 158 156 159 157 idx = brcmf_sdio_chip_getinfidx(ci, coreid); 158 + base = ci->c_inf[idx].base; 160 159 161 - regdata = brcmf_sdcard_reg_read(sdiodev, 162 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4); 160 + regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbtmstatelow), NULL); 163 161 if (regdata & SSB_TMSLOW_RESET) 164 162 return; 165 163 166 - regdata = brcmf_sdcard_reg_read(sdiodev, 167 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4); 164 + regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbtmstatelow), NULL); 168 165 if ((regdata & SSB_TMSLOW_CLOCK) != 0) { 169 166 /* 170 167 * set target reject and spin until busy is clear 171 168 * (preserve core-specific bits) 172 169 */ 173 - regdata = brcmf_sdcard_reg_read(sdiodev, 174 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4); 175 - brcmf_sdcard_reg_write(sdiodev, 176 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 177 - 4, regdata | SSB_TMSLOW_REJECT); 170 + regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbtmstatelow), 171 + NULL); 172 + brcmf_sdio_regwl(sdiodev, CORE_SB(base, sbtmstatelow), 173 + regdata | SSB_TMSLOW_REJECT, NULL); 178 174 179 - regdata = brcmf_sdcard_reg_read(sdiodev, 180 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4); 175 + regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbtmstatelow), 176 + NULL); 181 177 udelay(1); 182 - SPINWAIT((brcmf_sdcard_reg_read(sdiodev, 183 - CORE_SB(ci->c_inf[idx].base, sbtmstatehigh), 4) & 178 + SPINWAIT((brcmf_sdio_regrl(sdiodev, 179 + CORE_SB(base, sbtmstatehigh), 180 + NULL) & 184 181 SSB_TMSHIGH_BUSY), 100000); 185 182 186 - regdata = brcmf_sdcard_reg_read(sdiodev, 187 - CORE_SB(ci->c_inf[idx].base, sbtmstatehigh), 4); 183 + regdata = brcmf_sdio_regrl(sdiodev, 184 + CORE_SB(base, sbtmstatehigh), 185 + NULL); 188 186 if (regdata & SSB_TMSHIGH_BUSY) 189 187 brcmf_dbg(ERROR, "core state still busy\n"); 190 188 191 - regdata = brcmf_sdcard_reg_read(sdiodev, 192 - CORE_SB(ci->c_inf[idx].base, sbidlow), 4); 189 + regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbidlow), 190 + NULL); 193 191 if (regdata & SSB_IDLOW_INITIATOR) { 194 - regdata = brcmf_sdcard_reg_read(sdiodev, 195 - CORE_SB(ci->c_inf[idx].base, sbimstate), 4) | 196 - SSB_IMSTATE_REJECT; 197 - brcmf_sdcard_reg_write(sdiodev, 198 - CORE_SB(ci->c_inf[idx].base, sbimstate), 4, 199 - regdata); 200 - regdata = brcmf_sdcard_reg_read(sdiodev, 201 - CORE_SB(ci->c_inf[idx].base, sbimstate), 4); 192 + regdata = brcmf_sdio_regrl(sdiodev, 193 + CORE_SB(base, sbimstate), 194 + NULL); 195 + regdata |= SSB_IMSTATE_REJECT; 196 + brcmf_sdio_regwl(sdiodev, CORE_SB(base, sbimstate), 197 + regdata, NULL); 198 + regdata = brcmf_sdio_regrl(sdiodev, 199 + CORE_SB(base, sbimstate), 200 + NULL); 202 201 udelay(1); 203 - SPINWAIT((brcmf_sdcard_reg_read(sdiodev, 204 - CORE_SB(ci->c_inf[idx].base, sbimstate), 4) & 202 + SPINWAIT((brcmf_sdio_regrl(sdiodev, 203 + CORE_SB(base, sbimstate), 204 + NULL) & 205 205 SSB_IMSTATE_BUSY), 100000); 206 206 } 207 207 208 208 /* set reset and reject while enabling the clocks */ 209 - brcmf_sdcard_reg_write(sdiodev, 210 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4, 211 - (SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | 212 - SSB_TMSLOW_REJECT | SSB_TMSLOW_RESET)); 213 - regdata = brcmf_sdcard_reg_read(sdiodev, 214 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4); 209 + regdata = SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | 210 + SSB_TMSLOW_REJECT | SSB_TMSLOW_RESET; 211 + brcmf_sdio_regwl(sdiodev, CORE_SB(base, sbtmstatelow), 212 + regdata, NULL); 213 + regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbtmstatelow), 214 + NULL); 215 215 udelay(10); 216 216 217 217 /* clear the initiator reject bit */ 218 - regdata = brcmf_sdcard_reg_read(sdiodev, 219 - CORE_SB(ci->c_inf[idx].base, sbidlow), 4); 218 + regdata = brcmf_sdio_regrl(sdiodev, CORE_SB(base, sbidlow), 219 + NULL); 220 220 if (regdata & SSB_IDLOW_INITIATOR) { 221 - regdata = brcmf_sdcard_reg_read(sdiodev, 222 - CORE_SB(ci->c_inf[idx].base, sbimstate), 4) & 223 - ~SSB_IMSTATE_REJECT; 224 - brcmf_sdcard_reg_write(sdiodev, 225 - CORE_SB(ci->c_inf[idx].base, sbimstate), 4, 226 - regdata); 221 + regdata = brcmf_sdio_regrl(sdiodev, 222 + CORE_SB(base, sbimstate), 223 + NULL); 224 + regdata &= ~SSB_IMSTATE_REJECT; 225 + brcmf_sdio_regwl(sdiodev, CORE_SB(base, sbimstate), 226 + regdata, NULL); 227 227 } 228 228 } 229 229 230 230 /* leave reset and reject asserted */ 231 - brcmf_sdcard_reg_write(sdiodev, 232 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4, 233 - (SSB_TMSLOW_REJECT | SSB_TMSLOW_RESET)); 231 + brcmf_sdio_regwl(sdiodev, CORE_SB(base, sbtmstatelow), 232 + (SSB_TMSLOW_REJECT | SSB_TMSLOW_RESET), NULL); 234 233 udelay(1); 235 234 } 236 235 ··· 245 242 idx = brcmf_sdio_chip_getinfidx(ci, coreid); 246 243 247 244 /* if core is already in reset, just return */ 248 - regdata = brcmf_sdcard_reg_read(sdiodev, 249 - ci->c_inf[idx].wrapbase+BCMA_RESET_CTL, 250 - 4); 245 + regdata = brcmf_sdio_regrl(sdiodev, 246 + ci->c_inf[idx].wrapbase+BCMA_RESET_CTL, 247 + NULL); 251 248 if ((regdata & BCMA_RESET_CTL_RESET) != 0) 252 249 return; 253 250 254 - brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL, 255 - 4, 0); 256 - regdata = brcmf_sdcard_reg_read(sdiodev, 257 - ci->c_inf[idx].wrapbase+BCMA_IOCTL, 4); 251 + brcmf_sdio_regwl(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL, 0, NULL); 252 + regdata = brcmf_sdio_regrl(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL, 253 + NULL); 258 254 udelay(10); 259 255 260 - brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_RESET_CTL, 261 - 4, BCMA_RESET_CTL_RESET); 256 + brcmf_sdio_regwl(sdiodev, ci->c_inf[idx].wrapbase+BCMA_RESET_CTL, 257 + BCMA_RESET_CTL_RESET, NULL); 262 258 udelay(1); 263 259 } 264 260 ··· 281 279 * set reset while enabling the clock and 282 280 * forcing them on throughout the core 283 281 */ 284 - brcmf_sdcard_reg_write(sdiodev, 285 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4, 286 - SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET); 287 - regdata = brcmf_sdcard_reg_read(sdiodev, 288 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4); 282 + brcmf_sdio_regwl(sdiodev, 283 + CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 284 + SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET, 285 + NULL); 286 + regdata = brcmf_sdio_regrl(sdiodev, 287 + CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 288 + NULL); 289 289 udelay(1); 290 290 291 291 /* clear any serror */ 292 - regdata = brcmf_sdcard_reg_read(sdiodev, 293 - CORE_SB(ci->c_inf[idx].base, sbtmstatehigh), 4); 292 + regdata = brcmf_sdio_regrl(sdiodev, 293 + CORE_SB(ci->c_inf[idx].base, sbtmstatehigh), 294 + NULL); 294 295 if (regdata & SSB_TMSHIGH_SERR) 295 - brcmf_sdcard_reg_write(sdiodev, 296 - CORE_SB(ci->c_inf[idx].base, sbtmstatehigh), 4, 0); 296 + brcmf_sdio_regwl(sdiodev, 297 + CORE_SB(ci->c_inf[idx].base, sbtmstatehigh), 298 + 0, NULL); 297 299 298 - regdata = brcmf_sdcard_reg_read(sdiodev, 299 - CORE_SB(ci->c_inf[idx].base, sbimstate), 4); 300 + regdata = brcmf_sdio_regrl(sdiodev, 301 + CORE_SB(ci->c_inf[idx].base, sbimstate), 302 + NULL); 300 303 if (regdata & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) 301 - brcmf_sdcard_reg_write(sdiodev, 302 - CORE_SB(ci->c_inf[idx].base, sbimstate), 4, 303 - regdata & ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO)); 304 + brcmf_sdio_regwl(sdiodev, 305 + CORE_SB(ci->c_inf[idx].base, sbimstate), 306 + regdata & ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO), 307 + NULL); 304 308 305 309 /* clear reset and allow it to propagate throughout the core */ 306 - brcmf_sdcard_reg_write(sdiodev, 307 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4, 308 - SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK); 309 - regdata = brcmf_sdcard_reg_read(sdiodev, 310 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4); 310 + brcmf_sdio_regwl(sdiodev, CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 311 + SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK, NULL); 312 + regdata = brcmf_sdio_regrl(sdiodev, 313 + CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 314 + NULL); 311 315 udelay(1); 312 316 313 317 /* leave clock enabled */ 314 - brcmf_sdcard_reg_write(sdiodev, 315 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 316 - 4, SSB_TMSLOW_CLOCK); 317 - regdata = brcmf_sdcard_reg_read(sdiodev, 318 - CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4); 318 + brcmf_sdio_regwl(sdiodev, CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 319 + SSB_TMSLOW_CLOCK, NULL); 320 + regdata = brcmf_sdio_regrl(sdiodev, 321 + CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 322 + NULL); 319 323 udelay(1); 320 324 } 321 325 ··· 338 330 brcmf_sdio_ai_coredisable(sdiodev, ci, coreid); 339 331 340 332 /* now do initialization sequence */ 341 - brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL, 342 - 4, BCMA_IOCTL_FGC | BCMA_IOCTL_CLK); 343 - regdata = brcmf_sdcard_reg_read(sdiodev, 344 - ci->c_inf[idx].wrapbase+BCMA_IOCTL, 4); 345 - brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_RESET_CTL, 346 - 4, 0); 333 + brcmf_sdio_regwl(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL, 334 + BCMA_IOCTL_FGC | BCMA_IOCTL_CLK, NULL); 335 + regdata = brcmf_sdio_regrl(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL, 336 + NULL); 337 + brcmf_sdio_regwl(sdiodev, ci->c_inf[idx].wrapbase+BCMA_RESET_CTL, 338 + 0, NULL); 347 339 udelay(1); 348 340 349 - brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL, 350 - 4, BCMA_IOCTL_CLK); 351 - regdata = brcmf_sdcard_reg_read(sdiodev, 352 - ci->c_inf[idx].wrapbase+BCMA_IOCTL, 4); 341 + brcmf_sdio_regwl(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL, 342 + BCMA_IOCTL_CLK, NULL); 343 + regdata = brcmf_sdio_regrl(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL, 344 + NULL); 353 345 udelay(1); 354 346 } 355 347 ··· 366 358 */ 367 359 ci->c_inf[0].id = BCMA_CORE_CHIPCOMMON; 368 360 ci->c_inf[0].base = regs; 369 - regdata = brcmf_sdcard_reg_read(sdiodev, 370 - CORE_CC_REG(ci->c_inf[0].base, chipid), 4); 361 + regdata = brcmf_sdio_regrl(sdiodev, 362 + CORE_CC_REG(ci->c_inf[0].base, chipid), 363 + NULL); 371 364 ci->chip = regdata & CID_ID_MASK; 372 365 ci->chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT; 373 366 ci->socitype = (regdata & CID_TYPE_MASK) >> CID_TYPE_SHIFT; ··· 437 428 438 429 /* Try forcing SDIO core to do ALPAvail request only */ 439 430 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ; 440 - brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1, 441 - SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err); 431 + brcmf_sdio_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err); 442 432 if (err) { 443 433 brcmf_dbg(ERROR, "error writing for HT off\n"); 444 434 return err; ··· 445 437 446 438 /* If register supported, wait for ALPAvail and then force ALP */ 447 439 /* This may take up to 15 milliseconds */ 448 - clkval = brcmf_sdcard_cfg_read(sdiodev, SDIO_FUNC_1, 449 - SBSDIO_FUNC1_CHIPCLKCSR, NULL); 440 + clkval = brcmf_sdio_regrb(sdiodev, 441 + SBSDIO_FUNC1_CHIPCLKCSR, NULL); 450 442 451 443 if ((clkval & ~SBSDIO_AVBITS) != clkset) { 452 444 brcmf_dbg(ERROR, "ChipClkCSR access: wrote 0x%02x read 0x%02x\n", ··· 454 446 return -EACCES; 455 447 } 456 448 457 - SPINWAIT(((clkval = brcmf_sdcard_cfg_read(sdiodev, SDIO_FUNC_1, 458 - SBSDIO_FUNC1_CHIPCLKCSR, NULL)), 449 + SPINWAIT(((clkval = brcmf_sdio_regrb(sdiodev, 450 + SBSDIO_FUNC1_CHIPCLKCSR, NULL)), 459 451 !SBSDIO_ALPAV(clkval)), 460 452 PMU_MAX_TRANSITION_DLY); 461 453 if (!SBSDIO_ALPAV(clkval)) { ··· 465 457 } 466 458 467 459 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP; 468 - brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1, 469 - SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err); 460 + brcmf_sdio_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err); 470 461 udelay(65); 471 462 472 463 /* Also, disable the extra SDIO pull-ups */ 473 - brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1, 474 - SBSDIO_FUNC1_SDIOPULLUP, 0, NULL); 464 + brcmf_sdio_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL); 475 465 476 466 return 0; 477 467 } ··· 478 472 brcmf_sdio_chip_buscoresetup(struct brcmf_sdio_dev *sdiodev, 479 473 struct chip_info *ci) 480 474 { 475 + u32 base = ci->c_inf[0].base; 476 + 481 477 /* get chipcommon rev */ 482 478 ci->c_inf[0].rev = ci->corerev(sdiodev, ci, ci->c_inf[0].id); 483 479 484 480 /* get chipcommon capabilites */ 485 - ci->c_inf[0].caps = 486 - brcmf_sdcard_reg_read(sdiodev, 487 - CORE_CC_REG(ci->c_inf[0].base, capabilities), 4); 481 + ci->c_inf[0].caps = brcmf_sdio_regrl(sdiodev, 482 + CORE_CC_REG(base, capabilities), 483 + NULL); 488 484 489 485 /* get pmu caps & rev */ 490 486 if (ci->c_inf[0].caps & CC_CAP_PMU) { 491 - ci->pmucaps = brcmf_sdcard_reg_read(sdiodev, 492 - CORE_CC_REG(ci->c_inf[0].base, pmucapabilities), 4); 487 + ci->pmucaps = 488 + brcmf_sdio_regrl(sdiodev, 489 + CORE_CC_REG(base, pmucapabilities), 490 + NULL); 493 491 ci->pmurev = ci->pmucaps & PCAP_REV_MASK; 494 492 } 495 493 ··· 533 523 534 524 brcmf_sdio_chip_buscoresetup(sdiodev, ci); 535 525 536 - brcmf_sdcard_reg_write(sdiodev, 537 - CORE_CC_REG(ci->c_inf[0].base, gpiopullup), 4, 0); 538 - brcmf_sdcard_reg_write(sdiodev, 539 - CORE_CC_REG(ci->c_inf[0].base, gpiopulldown), 4, 0); 526 + brcmf_sdio_regwl(sdiodev, CORE_CC_REG(ci->c_inf[0].base, gpiopullup), 527 + 0, NULL); 528 + brcmf_sdio_regwl(sdiodev, CORE_CC_REG(ci->c_inf[0].base, gpiopulldown), 529 + 0, NULL); 540 530 541 531 *ci_ptr = ci; 542 532 return 0; ··· 572 562 u32 str_mask = 0; 573 563 u32 str_shift = 0; 574 564 char chn[8]; 565 + u32 base = ci->c_inf[0].base; 575 566 576 567 if (!(ci->c_inf[0].caps & CC_CAP_PMU)) 577 568 return; ··· 602 591 } 603 592 } 604 593 605 - brcmf_sdcard_reg_write(sdiodev, 606 - CORE_CC_REG(ci->c_inf[0].base, chipcontrol_addr), 607 - 4, 1); 608 - cc_data_temp = brcmf_sdcard_reg_read(sdiodev, 609 - CORE_CC_REG(ci->c_inf[0].base, chipcontrol_addr), 4); 594 + brcmf_sdio_regwl(sdiodev, CORE_CC_REG(base, chipcontrol_addr), 595 + 1, NULL); 596 + cc_data_temp = 597 + brcmf_sdio_regrl(sdiodev, 598 + CORE_CC_REG(base, chipcontrol_addr), 599 + NULL); 610 600 cc_data_temp &= ~str_mask; 611 601 drivestrength_sel <<= str_shift; 612 602 cc_data_temp |= drivestrength_sel; 613 - brcmf_sdcard_reg_write(sdiodev, 614 - CORE_CC_REG(ci->c_inf[0].base, chipcontrol_addr), 615 - 4, cc_data_temp); 603 + brcmf_sdio_regwl(sdiodev, CORE_CC_REG(base, chipcontrol_addr), 604 + cc_data_temp, NULL); 616 605 617 606 brcmf_dbg(INFO, "SDIO: %dmA drive strength selected, set to 0x%08x\n", 618 607 drivestrength, cc_data_temp);
+11 -26
drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h
··· 40 40 /* Maximum number of I/O funcs */ 41 41 #define SDIOD_MAX_IOFUNCS 7 42 42 43 + /* mask of register map */ 44 + #define REG_F0_REG_MASK 0x7FF 45 + #define REG_F1_MISC_MASK 0x1FFFF 46 + 43 47 /* as of sdiod rev 0, supports 3 functions */ 44 48 #define SBSDIO_NUM_FUNCTION 3 45 49 ··· 146 142 u8 num_funcs; /* Supported funcs on client */ 147 143 u32 func_cis_ptr[SDIOD_MAX_IOFUNCS]; 148 144 u32 sbwad; /* Save backplane window address */ 149 - bool regfail; /* status of last reg_r/w call */ 150 145 void *bus; 151 146 atomic_t suspend; /* suspend flag */ 152 147 wait_queue_head_t request_byte_wait; ··· 167 164 extern int brcmf_sdio_intr_register(struct brcmf_sdio_dev *sdiodev); 168 165 extern int brcmf_sdio_intr_unregister(struct brcmf_sdio_dev *sdiodev); 169 166 170 - /* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface). 171 - * fn: function number 172 - * addr: unmodified SDIO-space address 173 - * data: data byte to write 174 - * err: pointer to error code (or NULL) 175 - */ 176 - extern u8 brcmf_sdcard_cfg_read(struct brcmf_sdio_dev *sdiodev, uint func, 177 - u32 addr, int *err); 178 - extern void brcmf_sdcard_cfg_write(struct brcmf_sdio_dev *sdiodev, uint func, 179 - u32 addr, u8 data, int *err); 180 - 181 - /* Synchronous access to device (client) core registers via CMD53 to F1. 182 - * addr: backplane address (i.e. >= regsva from attach) 183 - * size: register width in bytes (2 or 4) 184 - * data: data for register write 185 - */ 186 - extern u32 187 - brcmf_sdcard_reg_read(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size); 188 - 189 - extern u32 190 - brcmf_sdcard_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size, 191 - u32 data); 192 - 193 - /* Indicate if last reg read/write failed */ 194 - extern bool brcmf_sdcard_regfail(struct brcmf_sdio_dev *sdiodev); 167 + /* sdio device register access interface */ 168 + extern u8 brcmf_sdio_regrb(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret); 169 + extern u32 brcmf_sdio_regrl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret); 170 + extern void brcmf_sdio_regwb(struct brcmf_sdio_dev *sdiodev, u32 addr, 171 + u8 data, int *ret); 172 + extern void brcmf_sdio_regwl(struct brcmf_sdio_dev *sdiodev, u32 addr, 173 + u32 data, int *ret); 195 174 196 175 /* Buffer transfer to/from device (client) core via cmd53. 197 176 * fn: function number
-3
drivers/net/wireless/brcm80211/brcmsmac/Makefile
··· 39 39 phy/phytbl_lcn.o \ 40 40 phy/phytbl_n.o \ 41 41 phy/phy_qmath.o \ 42 - otp.o \ 43 - srom.o \ 44 42 dma.o \ 45 - nicpci.o \ 46 43 brcms_trace_events.o 47 44 48 45 MODULEPFX := brcmsmac
+39 -440
drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
··· 19 19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 20 20 21 21 #include <linux/delay.h> 22 - #include <linux/pci.h> 23 22 24 23 #include <defs.h> 25 24 #include <chipcommon.h> ··· 28 29 #include "types.h" 29 30 #include "pub.h" 30 31 #include "pmu.h" 31 - #include "srom.h" 32 - #include "nicpci.h" 33 32 #include "aiutils.h" 34 33 35 34 /* slow_clk_ctl */ ··· 318 321 #define IS_SIM(chippkg) \ 319 322 ((chippkg == HDLSIM_PKG_ID) || (chippkg == HWSIM_PKG_ID)) 320 323 321 - #define PCI(sih) (ai_get_buscoretype(sih) == PCI_CORE_ID) 322 324 #define PCIE(sih) (ai_get_buscoretype(sih) == PCIE_CORE_ID) 323 325 324 326 #define PCI_FORCEHT(sih) (PCIE(sih) && (ai_get_chip_id(sih) == BCM4716_CHIP_ID)) ··· 450 454 u32 componentid3; /* 0xffc */ 451 455 }; 452 456 453 - /* return true if PCIE capability exists in the pci config space */ 454 - static bool ai_ispcie(struct si_info *sii) 455 - { 456 - u8 cap_ptr; 457 - 458 - cap_ptr = 459 - pcicore_find_pci_capability(sii->pcibus, PCI_CAP_ID_EXP, NULL, 460 - NULL); 461 - if (!cap_ptr) 462 - return false; 463 - 464 - return true; 465 - } 466 - 467 - static bool ai_buscore_prep(struct si_info *sii) 468 - { 469 - /* kludge to enable the clock on the 4306 which lacks a slowclock */ 470 - if (!ai_ispcie(sii)) 471 - ai_clkctl_xtal(&sii->pub, XTAL | PLL, ON); 472 - return true; 473 - } 474 - 475 457 static bool 476 458 ai_buscore_setup(struct si_info *sii, struct bcma_device *cc) 477 459 { 478 - struct bcma_device *pci = NULL; 479 - struct bcma_device *pcie = NULL; 480 - struct bcma_device *core; 481 - 482 - 483 460 /* no cores found, bail out */ 484 461 if (cc->bus->nr_cores == 0) 485 462 return false; ··· 461 492 sii->pub.ccrev = cc->id.rev; 462 493 463 494 /* get chipcommon chipstatus */ 464 - if (ai_get_ccrev(&sii->pub) >= 11) 465 - sii->chipst = bcma_read32(cc, CHIPCREGOFFS(chipstatus)); 495 + sii->chipst = bcma_read32(cc, CHIPCREGOFFS(chipstatus)); 466 496 467 497 /* get chipcommon capabilites */ 468 498 sii->pub.cccaps = bcma_read32(cc, CHIPCREGOFFS(capabilities)); ··· 474 506 } 475 507 476 508 /* figure out buscore */ 477 - list_for_each_entry(core, &cc->bus->cores, list) { 478 - uint cid, crev; 479 - 480 - cid = core->id.id; 481 - crev = core->id.rev; 482 - 483 - if (cid == PCI_CORE_ID) { 484 - pci = core; 485 - } else if (cid == PCIE_CORE_ID) { 486 - pcie = core; 487 - } 488 - } 489 - 490 - if (pci && pcie) { 491 - if (ai_ispcie(sii)) 492 - pci = NULL; 493 - else 494 - pcie = NULL; 495 - } 496 - if (pci) { 497 - sii->buscore = pci; 498 - } else if (pcie) { 499 - sii->buscore = pcie; 500 - } 501 - 502 - /* fixup necessary chip/core configurations */ 503 - if (!sii->pch) { 504 - sii->pch = pcicore_init(&sii->pub, sii->icbus->drv_pci.core); 505 - if (sii->pch == NULL) 506 - return false; 507 - } 508 - if (ai_pci_fixcfg(&sii->pub)) 509 - return false; 509 + sii->buscore = ai_findcore(&sii->pub, PCIE_CORE_ID, 0); 510 510 511 511 return true; 512 - } 513 - 514 - /* 515 - * get boardtype and boardrev 516 - */ 517 - static __used void ai_nvram_process(struct si_info *sii) 518 - { 519 - uint w = 0; 520 - 521 - /* do a pci config read to get subsystem id and subvendor id */ 522 - pci_read_config_dword(sii->pcibus, PCI_SUBSYSTEM_VENDOR_ID, &w); 523 - 524 - sii->pub.boardvendor = w & 0xffff; 525 - sii->pub.boardtype = (w >> 16) & 0xffff; 526 512 } 527 513 528 514 static struct si_info *ai_doattach(struct si_info *sii, ··· 485 563 struct si_pub *sih = &sii->pub; 486 564 u32 w, savewin; 487 565 struct bcma_device *cc; 488 - uint socitype; 566 + struct ssb_sprom *sprom = &pbus->sprom; 489 567 490 568 savewin = 0; 491 569 ··· 495 573 /* switch to Chipcommon core */ 496 574 cc = pbus->drv_cc.core; 497 575 498 - /* bus/core/clk setup for register access */ 499 - if (!ai_buscore_prep(sii)) 500 - return NULL; 576 + sih->chip = pbus->chipinfo.id; 577 + sih->chiprev = pbus->chipinfo.rev; 578 + sih->chippkg = pbus->chipinfo.pkg; 579 + sih->boardvendor = pbus->boardinfo.vendor; 580 + sih->boardtype = pbus->boardinfo.type; 501 581 502 - /* 503 - * ChipID recognition. 504 - * We assume we can read chipid at offset 0 from the regs arg. 505 - * If we add other chiptypes (or if we need to support old sdio 506 - * hosts w/o chipcommon), some way of recognizing them needs to 507 - * be added here. 508 - */ 509 - w = bcma_read32(cc, CHIPCREGOFFS(chipid)); 510 - socitype = (w & CID_TYPE_MASK) >> CID_TYPE_SHIFT; 511 - /* Might as wll fill in chip id rev & pkg */ 512 - sih->chip = w & CID_ID_MASK; 513 - sih->chiprev = (w & CID_REV_MASK) >> CID_REV_SHIFT; 514 - sih->chippkg = (w & CID_PKG_MASK) >> CID_PKG_SHIFT; 515 - 516 - /* scan for cores */ 517 - if (socitype != SOCI_AI) 518 - return NULL; 519 - 520 - SI_MSG("Found chip type AI (0x%08x)\n", w); 521 582 if (!ai_buscore_setup(sii, cc)) 522 583 goto exit; 523 - 524 - /* Init nvram from sprom/otp if they exist */ 525 - if (srom_var_init(&sii->pub)) 526 - goto exit; 527 - 528 - ai_nvram_process(sii); 529 584 530 585 /* === NVRAM, clock is ready === */ 531 586 bcma_write32(cc, CHIPCREGOFFS(gpiopullup), 0); ··· 516 617 } 517 618 518 619 /* setup the GPIO based LED powersave register */ 519 - w = getintvar(sih, BRCMS_SROM_LEDDC); 620 + w = (sprom->leddc_on_time << BCMA_CC_GPIOTIMER_ONTIME_SHIFT) | 621 + (sprom->leddc_off_time << BCMA_CC_GPIOTIMER_OFFTIME_SHIFT); 520 622 if (w == 0) 521 623 w = DEFAULT_GPIOTIMERVAL; 522 624 ai_cc_reg(sih, offsetof(struct chipcregs, gpiotimerval), 523 625 ~0, w); 524 - 525 - if (PCIE(sih)) 526 - pcicore_attach(sii->pch, SI_DOATTACH); 527 626 528 627 if (ai_get_chip_id(sih) == BCM43224_CHIP_ID) { 529 628 /* ··· 556 659 return sii; 557 660 558 661 exit: 559 - if (sii->pch) 560 - pcicore_deinit(sii->pch); 561 - sii->pch = NULL; 562 662 563 663 return NULL; 564 664 } ··· 594 700 if (sii == NULL) 595 701 return; 596 702 597 - if (sii->pch) 598 - pcicore_deinit(sii->pch); 599 - sii->pch = NULL; 600 - 601 - srom_free_vars(sih); 602 703 kfree(sii); 603 704 } 604 705 ··· 644 755 /* return the slow clock source - LPO, XTAL, or PCI */ 645 756 static uint ai_slowclk_src(struct si_pub *sih, struct bcma_device *cc) 646 757 { 647 - struct si_info *sii; 648 - u32 val; 649 - 650 - sii = (struct si_info *)sih; 651 - if (ai_get_ccrev(&sii->pub) < 6) { 652 - pci_read_config_dword(sii->pcibus, PCI_GPIO_OUT, 653 - &val); 654 - if (val & PCI_CFG_GPIO_SCS) 655 - return SCC_SS_PCI; 656 - return SCC_SS_XTAL; 657 - } else if (ai_get_ccrev(&sii->pub) < 10) { 658 - return bcma_read32(cc, CHIPCREGOFFS(slow_clk_ctl)) & 659 - SCC_SS_MASK; 660 - } else /* Insta-clock */ 661 - return SCC_SS_XTAL; 758 + return SCC_SS_XTAL; 662 759 } 663 760 664 761 /* ··· 654 779 static uint ai_slowclk_freq(struct si_pub *sih, bool max_freq, 655 780 struct bcma_device *cc) 656 781 { 657 - u32 slowclk; 658 782 uint div; 659 783 660 - slowclk = ai_slowclk_src(sih, cc); 661 - if (ai_get_ccrev(sih) < 6) { 662 - if (slowclk == SCC_SS_PCI) 663 - return max_freq ? (PCIMAXFREQ / 64) 664 - : (PCIMINFREQ / 64); 665 - else 666 - return max_freq ? (XTALMAXFREQ / 32) 667 - : (XTALMINFREQ / 32); 668 - } else if (ai_get_ccrev(sih) < 10) { 669 - div = 4 * 670 - (((bcma_read32(cc, CHIPCREGOFFS(slow_clk_ctl)) & 671 - SCC_CD_MASK) >> SCC_CD_SHIFT) + 1); 672 - if (slowclk == SCC_SS_LPO) 673 - return max_freq ? LPOMAXFREQ : LPOMINFREQ; 674 - else if (slowclk == SCC_SS_XTAL) 675 - return max_freq ? (XTALMAXFREQ / div) 676 - : (XTALMINFREQ / div); 677 - else if (slowclk == SCC_SS_PCI) 678 - return max_freq ? (PCIMAXFREQ / div) 679 - : (PCIMINFREQ / div); 680 - } else { 681 - /* Chipc rev 10 is InstaClock */ 682 - div = bcma_read32(cc, CHIPCREGOFFS(system_clk_ctl)); 683 - div = 4 * ((div >> SYCC_CD_SHIFT) + 1); 684 - return max_freq ? XTALMAXFREQ : (XTALMINFREQ / div); 685 - } 686 - return 0; 784 + /* Chipc rev 10 is InstaClock */ 785 + div = bcma_read32(cc, CHIPCREGOFFS(system_clk_ctl)); 786 + div = 4 * ((div >> SYCC_CD_SHIFT) + 1); 787 + return max_freq ? XTALMAXFREQ : (XTALMINFREQ / div); 687 788 } 688 789 689 790 static void ··· 682 831 683 832 /* Starting with 4318 it is ILP that is used for the delays */ 684 833 slowmaxfreq = 685 - ai_slowclk_freq(sih, 686 - (ai_get_ccrev(sih) >= 10) ? false : true, cc); 834 + ai_slowclk_freq(sih, false, cc); 687 835 688 836 pll_on_delay = ((slowmaxfreq * pll_delay) + 999999) / 1000000; 689 837 fref_sel_delay = ((slowmaxfreq * FREF_DELAY) + 999999) / 1000000; ··· 704 854 return; 705 855 706 856 /* set all Instaclk chip ILP to 1 MHz */ 707 - if (ai_get_ccrev(sih) >= 10) 708 - bcma_maskset32(cc, CHIPCREGOFFS(system_clk_ctl), SYCC_CD_MASK, 709 - (ILP_DIV_1MHZ << SYCC_CD_SHIFT)); 857 + bcma_maskset32(cc, CHIPCREGOFFS(system_clk_ctl), SYCC_CD_MASK, 858 + (ILP_DIV_1MHZ << SYCC_CD_SHIFT)); 710 859 711 860 ai_clkctl_setdelay(sih, cc); 712 861 } ··· 740 891 return fpdelay; 741 892 } 742 893 743 - /* turn primary xtal and/or pll off/on */ 744 - int ai_clkctl_xtal(struct si_pub *sih, uint what, bool on) 745 - { 746 - struct si_info *sii; 747 - u32 in, out, outen; 748 - 749 - sii = (struct si_info *)sih; 750 - 751 - /* pcie core doesn't have any mapping to control the xtal pu */ 752 - if (PCIE(sih)) 753 - return -1; 754 - 755 - pci_read_config_dword(sii->pcibus, PCI_GPIO_IN, &in); 756 - pci_read_config_dword(sii->pcibus, PCI_GPIO_OUT, &out); 757 - pci_read_config_dword(sii->pcibus, PCI_GPIO_OUTEN, &outen); 758 - 759 - /* 760 - * Avoid glitching the clock if GPRS is already using it. 761 - * We can't actually read the state of the PLLPD so we infer it 762 - * by the value of XTAL_PU which *is* readable via gpioin. 763 - */ 764 - if (on && (in & PCI_CFG_GPIO_XTAL)) 765 - return 0; 766 - 767 - if (what & XTAL) 768 - outen |= PCI_CFG_GPIO_XTAL; 769 - if (what & PLL) 770 - outen |= PCI_CFG_GPIO_PLL; 771 - 772 - if (on) { 773 - /* turn primary xtal on */ 774 - if (what & XTAL) { 775 - out |= PCI_CFG_GPIO_XTAL; 776 - if (what & PLL) 777 - out |= PCI_CFG_GPIO_PLL; 778 - pci_write_config_dword(sii->pcibus, 779 - PCI_GPIO_OUT, out); 780 - pci_write_config_dword(sii->pcibus, 781 - PCI_GPIO_OUTEN, outen); 782 - udelay(XTAL_ON_DELAY); 783 - } 784 - 785 - /* turn pll on */ 786 - if (what & PLL) { 787 - out &= ~PCI_CFG_GPIO_PLL; 788 - pci_write_config_dword(sii->pcibus, 789 - PCI_GPIO_OUT, out); 790 - mdelay(2); 791 - } 792 - } else { 793 - if (what & XTAL) 794 - out &= ~PCI_CFG_GPIO_XTAL; 795 - if (what & PLL) 796 - out |= PCI_CFG_GPIO_PLL; 797 - pci_write_config_dword(sii->pcibus, 798 - PCI_GPIO_OUT, out); 799 - pci_write_config_dword(sii->pcibus, 800 - PCI_GPIO_OUTEN, outen); 801 - } 802 - 803 - return 0; 804 - } 805 - 806 - /* clk control mechanism through chipcommon, no policy checking */ 807 - static bool _ai_clkctl_cc(struct si_info *sii, uint mode) 808 - { 809 - struct bcma_device *cc; 810 - u32 scc; 811 - 812 - /* chipcommon cores prior to rev6 don't support dynamic clock control */ 813 - if (ai_get_ccrev(&sii->pub) < 6) 814 - return false; 815 - 816 - cc = ai_findcore(&sii->pub, BCMA_CORE_CHIPCOMMON, 0); 817 - 818 - if (!(ai_get_cccaps(&sii->pub) & CC_CAP_PWR_CTL) && 819 - (ai_get_ccrev(&sii->pub) < 20)) 820 - return mode == CLK_FAST; 821 - 822 - switch (mode) { 823 - case CLK_FAST: /* FORCEHT, fast (pll) clock */ 824 - if (ai_get_ccrev(&sii->pub) < 10) { 825 - /* 826 - * don't forget to force xtal back 827 - * on before we clear SCC_DYN_XTAL.. 828 - */ 829 - ai_clkctl_xtal(&sii->pub, XTAL, ON); 830 - bcma_maskset32(cc, CHIPCREGOFFS(slow_clk_ctl), 831 - (SCC_XC | SCC_FS | SCC_IP), SCC_IP); 832 - } else if (ai_get_ccrev(&sii->pub) < 20) { 833 - bcma_set32(cc, CHIPCREGOFFS(system_clk_ctl), SYCC_HR); 834 - } else { 835 - bcma_set32(cc, CHIPCREGOFFS(clk_ctl_st), CCS_FORCEHT); 836 - } 837 - 838 - /* wait for the PLL */ 839 - if (ai_get_cccaps(&sii->pub) & CC_CAP_PMU) { 840 - u32 htavail = CCS_HTAVAIL; 841 - SPINWAIT(((bcma_read32(cc, CHIPCREGOFFS(clk_ctl_st)) & 842 - htavail) == 0), PMU_MAX_TRANSITION_DLY); 843 - } else { 844 - udelay(PLL_DELAY); 845 - } 846 - break; 847 - 848 - case CLK_DYNAMIC: /* enable dynamic clock control */ 849 - if (ai_get_ccrev(&sii->pub) < 10) { 850 - scc = bcma_read32(cc, CHIPCREGOFFS(slow_clk_ctl)); 851 - scc &= ~(SCC_FS | SCC_IP | SCC_XC); 852 - if ((scc & SCC_SS_MASK) != SCC_SS_XTAL) 853 - scc |= SCC_XC; 854 - bcma_write32(cc, CHIPCREGOFFS(slow_clk_ctl), scc); 855 - 856 - /* 857 - * for dynamic control, we have to 858 - * release our xtal_pu "force on" 859 - */ 860 - if (scc & SCC_XC) 861 - ai_clkctl_xtal(&sii->pub, XTAL, OFF); 862 - } else if (ai_get_ccrev(&sii->pub) < 20) { 863 - /* Instaclock */ 864 - bcma_mask32(cc, CHIPCREGOFFS(system_clk_ctl), ~SYCC_HR); 865 - } else { 866 - bcma_mask32(cc, CHIPCREGOFFS(clk_ctl_st), ~CCS_FORCEHT); 867 - } 868 - break; 869 - 870 - default: 871 - break; 872 - } 873 - 874 - return mode == CLK_FAST; 875 - } 876 - 877 894 /* 878 895 * clock control policy function throught chipcommon 879 896 * ··· 748 1033 * this is a wrapper over the next internal function 749 1034 * to allow flexible policy settings for outside caller 750 1035 */ 751 - bool ai_clkctl_cc(struct si_pub *sih, uint mode) 1036 + bool ai_clkctl_cc(struct si_pub *sih, enum bcma_clkmode mode) 752 1037 { 753 1038 struct si_info *sii; 1039 + struct bcma_device *cc; 754 1040 755 1041 sii = (struct si_info *)sih; 756 1042 757 - /* chipcommon cores prior to rev6 don't support dynamic clock control */ 758 - if (ai_get_ccrev(sih) < 6) 759 - return false; 760 - 761 1043 if (PCI_FORCEHT(sih)) 762 - return mode == CLK_FAST; 1044 + return mode == BCMA_CLKMODE_FAST; 763 1045 764 - return _ai_clkctl_cc(sii, mode); 1046 + cc = ai_findcore(&sii->pub, BCMA_CORE_CHIPCOMMON, 0); 1047 + bcma_core_set_clockmode(cc, mode); 1048 + return mode == BCMA_CLKMODE_FAST; 765 1049 } 766 1050 767 1051 void ai_pci_up(struct si_pub *sih) 768 1052 { 769 1053 struct si_info *sii; 1054 + struct bcma_device *cc; 770 1055 771 1056 sii = (struct si_info *)sih; 772 1057 773 - if (PCI_FORCEHT(sih)) 774 - _ai_clkctl_cc(sii, CLK_FAST); 1058 + if (PCI_FORCEHT(sih)) { 1059 + cc = ai_findcore(&sii->pub, BCMA_CORE_CHIPCOMMON, 0); 1060 + bcma_core_set_clockmode(cc, BCMA_CLKMODE_FAST); 1061 + } 775 1062 776 1063 if (PCIE(sih)) 777 - pcicore_up(sii->pch, SI_PCIUP); 778 - 779 - } 780 - 781 - /* Unconfigure and/or apply various WARs when system is going to sleep mode */ 782 - void ai_pci_sleep(struct si_pub *sih) 783 - { 784 - struct si_info *sii; 785 - 786 - sii = (struct si_info *)sih; 787 - 788 - pcicore_sleep(sii->pch); 1064 + bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci, true); 789 1065 } 790 1066 791 1067 /* Unconfigure and/or apply various WARs when going down */ 792 1068 void ai_pci_down(struct si_pub *sih) 793 1069 { 794 1070 struct si_info *sii; 1071 + struct bcma_device *cc; 795 1072 796 1073 sii = (struct si_info *)sih; 797 1074 798 1075 /* release FORCEHT since chip is going to "down" state */ 799 - if (PCI_FORCEHT(sih)) 800 - _ai_clkctl_cc(sii, CLK_DYNAMIC); 801 - 802 - pcicore_down(sii->pch, SI_PCIDOWN); 803 - } 804 - 805 - /* 806 - * Configure the pci core for pci client (NIC) action 807 - * coremask is the bitvec of cores by index to be enabled. 808 - */ 809 - void ai_pci_setup(struct si_pub *sih, uint coremask) 810 - { 811 - struct si_info *sii; 812 - u32 w; 813 - 814 - sii = (struct si_info *)sih; 815 - 816 - /* 817 - * Enable sb->pci interrupts. Assume 818 - * PCI rev 2.3 support was added in pci core rev 6 and things changed.. 819 - */ 820 - if (PCIE(sih) || (PCI(sih) && (ai_get_buscorerev(sih) >= 6))) { 821 - /* pci config write to set this core bit in PCIIntMask */ 822 - pci_read_config_dword(sii->pcibus, PCI_INT_MASK, &w); 823 - w |= (coremask << PCI_SBIM_SHIFT); 824 - pci_write_config_dword(sii->pcibus, PCI_INT_MASK, w); 1076 + if (PCI_FORCEHT(sih)) { 1077 + cc = ai_findcore(&sii->pub, BCMA_CORE_CHIPCOMMON, 0); 1078 + bcma_core_set_clockmode(cc, BCMA_CLKMODE_DYNAMIC); 825 1079 } 826 1080 827 - if (PCI(sih)) { 828 - pcicore_pci_setup(sii->pch); 829 - } 830 - } 831 - 832 - /* 833 - * Fixup SROMless PCI device's configuration. 834 - * The current core may be changed upon return. 835 - */ 836 - int ai_pci_fixcfg(struct si_pub *sih) 837 - { 838 - struct si_info *sii = (struct si_info *)sih; 839 - 840 - /* Fixup PI in SROM shadow area to enable the correct PCI core access */ 841 - /* check 'pi' is correct and fix it if not */ 842 - pcicore_fixcfg(sii->pch); 843 - pcicore_hwup(sii->pch); 844 - return 0; 845 - } 846 - 847 - /* mask&set gpiocontrol bits */ 848 - u32 ai_gpiocontrol(struct si_pub *sih, u32 mask, u32 val, u8 priority) 849 - { 850 - uint regoff; 851 - 852 - regoff = offsetof(struct chipcregs, gpiocontrol); 853 - return ai_cc_reg(sih, regoff, mask, val); 854 - } 855 - 856 - void ai_chipcontrl_epa4331(struct si_pub *sih, bool on) 857 - { 858 - struct bcma_device *cc; 859 - u32 val; 860 - 861 - cc = ai_findcore(sih, CC_CORE_ID, 0); 862 - 863 - if (on) { 864 - if (ai_get_chippkg(sih) == 9 || ai_get_chippkg(sih) == 0xb) 865 - /* Ext PA Controls for 4331 12x9 Package */ 866 - bcma_set32(cc, CHIPCREGOFFS(chipcontrol), 867 - CCTRL4331_EXTPA_EN | 868 - CCTRL4331_EXTPA_ON_GPIO2_5); 869 - else 870 - /* Ext PA Controls for 4331 12x12 Package */ 871 - bcma_set32(cc, CHIPCREGOFFS(chipcontrol), 872 - CCTRL4331_EXTPA_EN); 873 - } else { 874 - val &= ~(CCTRL4331_EXTPA_EN | CCTRL4331_EXTPA_ON_GPIO2_5); 875 - bcma_mask32(cc, CHIPCREGOFFS(chipcontrol), 876 - ~(CCTRL4331_EXTPA_EN | CCTRL4331_EXTPA_ON_GPIO2_5)); 877 - } 1081 + if (PCIE(sih)) 1082 + bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci, false); 878 1083 } 879 1084 880 1085 /* Enable BT-COEX & Ex-PA for 4313 */ ··· 816 1181 817 1182 sii = (struct si_info *)sih; 818 1183 1184 + if (sii->icbus->hosttype != BCMA_HOSTTYPE_PCI) 1185 + return false; 1186 + 819 1187 pci_read_config_dword(sii->pcibus, PCI_VENDOR_ID, &w); 820 1188 if ((w & 0xFFFF) != PCI_VENDOR_ID_BROADCOM) 821 1189 return true; 822 1190 823 1191 return false; 824 - } 825 - 826 - bool ai_is_sprom_available(struct si_pub *sih) 827 - { 828 - struct si_info *sii = (struct si_info *)sih; 829 - 830 - if (ai_get_ccrev(sih) >= 31) { 831 - struct bcma_device *cc; 832 - u32 sromctrl; 833 - 834 - if ((ai_get_cccaps(sih) & CC_CAP_SROM) == 0) 835 - return false; 836 - 837 - cc = ai_findcore(sih, BCMA_CORE_CHIPCOMMON, 0); 838 - sromctrl = bcma_read32(cc, CHIPCREGOFFS(sromcontrol)); 839 - return sromctrl & SRC_PRESENT; 840 - } 841 - 842 - switch (ai_get_chip_id(sih)) { 843 - case BCM4313_CHIP_ID: 844 - return (sii->chipst & CST4313_SPROM_PRESENT) != 0; 845 - default: 846 - return true; 847 - } 848 - } 849 - 850 - bool ai_is_otp_disabled(struct si_pub *sih) 851 - { 852 - struct si_info *sii = (struct si_info *)sih; 853 - 854 - switch (ai_get_chip_id(sih)) { 855 - case BCM4313_CHIP_ID: 856 - return (sii->chipst & CST4313_OTP_PRESENT) == 0; 857 - /* These chips always have their OTP on */ 858 - case BCM43224_CHIP_ID: 859 - case BCM43225_CHIP_ID: 860 - default: 861 - return false; 862 - } 863 1192 } 864 1193 865 1194 uint ai_get_buscoretype(struct si_pub *sih)
-24
drivers/net/wireless/brcm80211/brcmsmac/aiutils.h
··· 113 113 #define XTAL 0x1 /* primary crystal oscillator (2050) */ 114 114 #define PLL 0x2 /* main chip pll */ 115 115 116 - /* clkctl clk mode */ 117 - #define CLK_FAST 0 /* force fast (pll) clock */ 118 - #define CLK_DYNAMIC 2 /* enable dynamic clock control */ 119 - 120 116 /* GPIO usage priorities */ 121 117 #define GPIO_DRV_PRIORITY 0 /* Driver */ 122 118 #define GPIO_APP_PRIORITY 1 /* Application */ ··· 168 172 struct si_pub pub; /* back plane public state (must be first) */ 169 173 struct bcma_bus *icbus; /* handle to soc interconnect bus */ 170 174 struct pci_dev *pcibus; /* handle to pci bus */ 171 - struct pcicore_info *pch; /* PCI/E core handle */ 172 175 struct bcma_device *buscore; 173 - struct list_head var_list; /* list of srom variables */ 174 176 175 177 u32 chipst; /* chip status */ 176 178 }; ··· 191 197 extern struct si_pub *ai_attach(struct bcma_bus *pbus); 192 198 extern void ai_detach(struct si_pub *sih); 193 199 extern uint ai_cc_reg(struct si_pub *sih, uint regoff, u32 mask, u32 val); 194 - extern void ai_pci_setup(struct si_pub *sih, uint coremask); 195 200 extern void ai_clkctl_init(struct si_pub *sih); 196 201 extern u16 ai_clkctl_fast_pwrup_delay(struct si_pub *sih); 197 202 extern bool ai_clkctl_cc(struct si_pub *sih, uint mode); 198 - extern int ai_clkctl_xtal(struct si_pub *sih, uint what, bool on); 199 203 extern bool ai_deviceremoved(struct si_pub *sih); 200 - extern u32 ai_gpiocontrol(struct si_pub *sih, u32 mask, u32 val, 201 - u8 priority); 202 204 203 - /* OTP status */ 204 - extern bool ai_is_otp_disabled(struct si_pub *sih); 205 - 206 - /* SPROM availability */ 207 - extern bool ai_is_sprom_available(struct si_pub *sih); 208 - 209 - extern void ai_pci_sleep(struct si_pub *sih); 210 205 extern void ai_pci_down(struct si_pub *sih); 211 206 extern void ai_pci_up(struct si_pub *sih); 212 - extern int ai_pci_fixcfg(struct si_pub *sih); 213 207 214 - extern void ai_chipcontrl_epa4331(struct si_pub *sih, bool on); 215 208 /* Enable Ex-PA for 4313 */ 216 209 extern void ai_epa_4313war(struct si_pub *sih); 217 210 218 211 extern uint ai_get_buscoretype(struct si_pub *sih); 219 212 extern uint ai_get_buscorerev(struct si_pub *sih); 220 - 221 - static inline int ai_get_ccrev(struct si_pub *sih) 222 - { 223 - return sih->ccrev; 224 - } 225 213 226 214 static inline u32 ai_get_cccaps(struct si_pub *sih) 227 215 {
+8 -8
drivers/net/wireless/brcm80211/brcmsmac/antsel.c
··· 108 108 struct antsel_info *brcms_c_antsel_attach(struct brcms_c_info *wlc) 109 109 { 110 110 struct antsel_info *asi; 111 - struct si_pub *sih = wlc->hw->sih; 111 + struct ssb_sprom *sprom = &wlc->hw->d11core->bus->sprom; 112 112 113 113 asi = kzalloc(sizeof(struct antsel_info), GFP_ATOMIC); 114 114 if (!asi) ··· 118 118 asi->pub = wlc->pub; 119 119 asi->antsel_type = ANTSEL_NA; 120 120 asi->antsel_avail = false; 121 - asi->antsel_antswitch = (u8) getintvar(sih, BRCMS_SROM_ANTSWITCH); 121 + asi->antsel_antswitch = sprom->antswitch; 122 122 123 123 if ((asi->pub->sromrev >= 4) && (asi->antsel_antswitch != 0)) { 124 124 switch (asi->antsel_antswitch) { ··· 128 128 /* 4321/2 board with 2x3 switch logic */ 129 129 asi->antsel_type = ANTSEL_2x3; 130 130 /* Antenna selection availability */ 131 - if (((u16) getintvar(sih, BRCMS_SROM_AA2G) == 7) || 132 - ((u16) getintvar(sih, BRCMS_SROM_AA5G) == 7)) { 131 + if ((sprom->ant_available_bg == 7) || 132 + (sprom->ant_available_a == 7)) { 133 133 asi->antsel_avail = true; 134 134 } else if ( 135 - (u16) getintvar(sih, BRCMS_SROM_AA2G) == 3 || 136 - (u16) getintvar(sih, BRCMS_SROM_AA5G) == 3) { 135 + sprom->ant_available_bg == 3 || 136 + sprom->ant_available_a == 3) { 137 137 asi->antsel_avail = false; 138 138 } else { 139 139 asi->antsel_avail = false; ··· 146 146 break; 147 147 } 148 148 } else if ((asi->pub->sromrev == 4) && 149 - ((u16) getintvar(sih, BRCMS_SROM_AA2G) == 7) && 150 - ((u16) getintvar(sih, BRCMS_SROM_AA5G) == 0)) { 149 + (sprom->ant_available_bg == 7) && 150 + (sprom->ant_available_a == 0)) { 151 151 /* hack to match old 4321CB2 cards with 2of3 antenna switch */ 152 152 asi->antsel_type = ANTSEL_2x3; 153 153 asi->antsel_avail = true;
+3 -4
drivers/net/wireless/brcm80211/brcmsmac/channel.c
··· 1110 1110 char country_abbrev[BRCM_CNTRY_BUF_SZ]; 1111 1111 const struct country_info *country; 1112 1112 struct brcms_pub *pub = wlc->pub; 1113 - char *ccode; 1113 + struct ssb_sprom *sprom = &wlc->hw->d11core->bus->sprom; 1114 1114 1115 1115 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); 1116 1116 ··· 1122 1122 wlc->cmi = wlc_cm; 1123 1123 1124 1124 /* store the country code for passing up as a regulatory hint */ 1125 - ccode = getvar(wlc->hw->sih, BRCMS_SROM_CCODE); 1126 - if (ccode && brcms_c_country_valid(ccode)) 1127 - strncpy(wlc->pub->srom_ccode, ccode, BRCM_CNTRY_BUF_SZ - 1); 1125 + if (sprom->alpha2 && brcms_c_country_valid(sprom->alpha2)) 1126 + strncpy(wlc->pub->srom_ccode, sprom->alpha2, sizeof(sprom->alpha2)); 1128 1127 1129 1128 /* 1130 1129 * internal country information which must match
+5 -6
drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
··· 25 25 #include <linux/bcma/bcma.h> 26 26 #include <net/mac80211.h> 27 27 #include <defs.h> 28 - #include "nicpci.h" 29 28 #include "phy/phy_int.h" 30 29 #include "d11.h" 31 30 #include "channel.h" ··· 769 770 * Precondition: Since this function is called in brcms_pci_probe() context, 770 771 * no locking is required. 771 772 */ 772 - static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev) 773 + static int brcms_request_fw(struct brcms_info *wl, struct bcma_device *pdev) 773 774 { 774 775 int status; 775 776 struct device *device = &pdev->dev; ··· 1021 1022 spin_lock_init(&wl->isr_lock); 1022 1023 1023 1024 /* prepare ucode */ 1024 - if (brcms_request_fw(wl, pdev->bus->host_pci) < 0) { 1025 + if (brcms_request_fw(wl, pdev) < 0) { 1025 1026 wiphy_err(wl->wiphy, "%s: Failed to find firmware usually in " 1026 1027 "%s\n", KBUILD_MODNAME, "/lib/firmware/brcm"); 1027 1028 brcms_release_fw(wl); ··· 1042 1043 wl->pub->ieee_hw = hw; 1043 1044 1044 1045 /* register our interrupt handler */ 1045 - if (request_irq(pdev->bus->host_pci->irq, brcms_isr, 1046 + if (request_irq(pdev->irq, brcms_isr, 1046 1047 IRQF_SHARED, KBUILD_MODNAME, wl)) { 1047 1048 wiphy_err(wl->wiphy, "wl%d: request_irq() failed\n", unit); 1048 1049 goto fail; 1049 1050 } 1050 - wl->irq = pdev->bus->host_pci->irq; 1051 + wl->irq = pdev->irq; 1051 1052 1052 1053 /* register module */ 1053 1054 brcms_c_module_register(wl->pub, "linux", wl, NULL); ··· 1097 1098 1098 1099 dev_info(&pdev->dev, "mfg %x core %x rev %d class %d irq %d\n", 1099 1100 pdev->id.manuf, pdev->id.id, pdev->id.rev, pdev->id.class, 1100 - pdev->bus->host_pci->irq); 1101 + pdev->irq); 1101 1102 1102 1103 if ((pdev->id.manuf != BCMA_MANUF_BCM) || 1103 1104 (pdev->id.id != BCMA_CORE_80211))
+60 -82
drivers/net/wireless/brcm80211/brcmsmac/main.c
··· 1219 1219 } 1220 1220 1221 1221 /* control chip clock to save power, enable dynamic clock or force fast clock */ 1222 - static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode) 1222 + static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, enum bcma_clkmode mode) 1223 1223 { 1224 1224 if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU) { 1225 1225 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock ··· 1229 1229 */ 1230 1230 1231 1231 if (wlc_hw->clk) { 1232 - if (mode == CLK_FAST) { 1232 + if (mode == BCMA_CLKMODE_FAST) { 1233 1233 bcma_set32(wlc_hw->d11core, 1234 1234 D11REGOFFS(clk_ctl_st), 1235 1235 CCS_FORCEHT); ··· 1260 1260 ~CCS_FORCEHT); 1261 1261 } 1262 1262 } 1263 - wlc_hw->forcefastclk = (mode == CLK_FAST); 1263 + wlc_hw->forcefastclk = (mode == BCMA_CLKMODE_FAST); 1264 1264 } else { 1265 1265 1266 1266 /* old chips w/o PMU, force HT through cc, ··· 1567 1567 /* request FAST clock if not on */ 1568 1568 fastclk = wlc_hw->forcefastclk; 1569 1569 if (!fastclk) 1570 - brcms_b_clkctl_clk(wlc_hw, CLK_FAST); 1570 + brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST); 1571 1571 1572 1572 wlc_phy_bw_state_set(wlc_hw->band->pi, bw); 1573 1573 ··· 1576 1576 1577 1577 /* restore the clk */ 1578 1578 if (!fastclk) 1579 - brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); 1579 + brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC); 1580 1580 } 1581 1581 1582 1582 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw) ··· 1882 1882 return true; 1883 1883 } 1884 1884 1885 - static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw) 1885 + static void brcms_c_get_macaddr(struct brcms_hardware *wlc_hw, u8 etheraddr[ETH_ALEN]) 1886 1886 { 1887 - enum brcms_srom_id var_id = BRCMS_SROM_MACADDR; 1888 - char *macaddr; 1887 + struct ssb_sprom *sprom = &wlc_hw->d11core->bus->sprom; 1889 1888 1890 1889 /* If macaddr exists, use it (Sromrev4, CIS, ...). */ 1891 - macaddr = getvar(wlc_hw->sih, var_id); 1892 - if (macaddr != NULL) 1893 - return macaddr; 1890 + if (!is_zero_ether_addr(sprom->il0mac)) { 1891 + memcpy(etheraddr, sprom->il0mac, 6); 1892 + return; 1893 + } 1894 1894 1895 1895 if (wlc_hw->_nbands > 1) 1896 - var_id = BRCMS_SROM_ET1MACADDR; 1896 + memcpy(etheraddr, sprom->et1mac, 6); 1897 1897 else 1898 - var_id = BRCMS_SROM_IL0MACADDR; 1899 - 1900 - macaddr = getvar(wlc_hw->sih, var_id); 1901 - if (macaddr == NULL) 1902 - wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr " 1903 - "getvar(%d) not found\n", wlc_hw->unit, var_id); 1904 - 1905 - return macaddr; 1898 + memcpy(etheraddr, sprom->il0mac, 6); 1906 1899 } 1907 1900 1908 1901 /* power both the pll and external oscillator on/off */ ··· 1909 1916 */ 1910 1917 if (!want && wlc_hw->pllreq) 1911 1918 return; 1912 - 1913 - if (wlc_hw->sih) 1914 - ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want); 1915 1919 1916 1920 wlc_hw->sbclk = want; 1917 1921 if (!wlc_hw->sbclk) { ··· 1994 2004 /* request FAST clock if not on */ 1995 2005 fastclk = wlc_hw->forcefastclk; 1996 2006 if (!fastclk) 1997 - brcms_b_clkctl_clk(wlc_hw, CLK_FAST); 2007 + brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST); 1998 2008 1999 2009 /* reset the dma engines except first time thru */ 2000 2010 if (bcma_core_is_enabled(wlc_hw->d11core)) { ··· 2043 2053 brcms_c_mctrl_reset(wlc_hw); 2044 2054 2045 2055 if (ai_get_cccaps(wlc_hw->sih) & CC_CAP_PMU) 2046 - brcms_b_clkctl_clk(wlc_hw, CLK_FAST); 2056 + brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST); 2047 2057 2048 2058 brcms_b_phy_reset(wlc_hw); 2049 2059 ··· 2055 2065 2056 2066 /* restore the clk setting */ 2057 2067 if (!fastclk) 2058 - brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); 2068 + brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC); 2059 2069 } 2060 2070 2061 2071 /* txfifo sizes needs to be modified(increased) since the newer cores ··· 2208 2218 gm |= gc |= BOARD_GPIO_PACTRL; 2209 2219 2210 2220 /* apply to gpiocontrol register */ 2211 - ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY); 2221 + bcma_chipco_gpio_control(&wlc_hw->d11core->bus->drv_cc, gm, gc); 2212 2222 } 2213 2223 2214 2224 static void brcms_ucode_write(struct brcms_hardware *wlc_hw, ··· 3361 3371 /* request FAST clock if not on */ 3362 3372 fastclk = wlc_hw->forcefastclk; 3363 3373 if (!fastclk) 3364 - brcms_b_clkctl_clk(wlc_hw, CLK_FAST); 3374 + brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST); 3365 3375 3366 3376 /* disable interrupts */ 3367 3377 macintmask = brcms_intrsoff(wlc->wl); ··· 3395 3405 3396 3406 /* restore the clk */ 3397 3407 if (!fastclk) 3398 - brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); 3408 + brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC); 3399 3409 } 3400 3410 3401 3411 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc, ··· 4426 4436 uint unit, bool piomode) 4427 4437 { 4428 4438 struct brcms_hardware *wlc_hw; 4429 - char *macaddr = NULL; 4430 4439 uint err = 0; 4431 4440 uint j; 4432 4441 bool wme = false; 4433 4442 struct shared_phy_params sha_params; 4434 4443 struct wiphy *wiphy = wlc->wiphy; 4435 4444 struct pci_dev *pcidev = core->bus->host_pci; 4445 + struct ssb_sprom *sprom = &core->bus->sprom; 4436 4446 4437 - BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, 4438 - pcidev->vendor, 4439 - pcidev->device); 4447 + if (core->bus->hosttype == BCMA_HOSTTYPE_PCI) 4448 + BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, 4449 + pcidev->vendor, 4450 + pcidev->device); 4451 + else 4452 + BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, 4453 + core->bus->boardinfo.vendor, 4454 + core->bus->boardinfo.type); 4440 4455 4441 4456 wme = true; 4442 4457 ··· 4467 4472 } 4468 4473 4469 4474 /* verify again the device is supported */ 4470 - if (!brcms_c_chipmatch(pcidev->vendor, pcidev->device)) { 4475 + if (core->bus->hosttype == BCMA_HOSTTYPE_PCI && 4476 + !brcms_c_chipmatch(pcidev->vendor, pcidev->device)) { 4471 4477 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported " 4472 4478 "vendor/device (0x%x/0x%x)\n", 4473 4479 unit, pcidev->vendor, pcidev->device); ··· 4476 4480 goto fail; 4477 4481 } 4478 4482 4479 - wlc_hw->vendorid = pcidev->vendor; 4480 - wlc_hw->deviceid = pcidev->device; 4483 + if (core->bus->hosttype == BCMA_HOSTTYPE_PCI) { 4484 + wlc_hw->vendorid = pcidev->vendor; 4485 + wlc_hw->deviceid = pcidev->device; 4486 + } else { 4487 + wlc_hw->vendorid = core->bus->boardinfo.vendor; 4488 + wlc_hw->deviceid = core->bus->boardinfo.type; 4489 + } 4481 4490 4482 4491 wlc_hw->d11core = core; 4483 4492 wlc_hw->corerev = core->id.rev; ··· 4502 4501 * is still false; But it will be called again inside wlc_corereset, 4503 4502 * after d11 is out of reset. 4504 4503 */ 4505 - brcms_b_clkctl_clk(wlc_hw, CLK_FAST); 4504 + brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST); 4506 4505 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS); 4507 4506 4508 4507 if (!brcms_b_validate_chip_access(wlc_hw)) { ··· 4513 4512 } 4514 4513 4515 4514 /* get the board rev, used just below */ 4516 - j = getintvar(wlc_hw->sih, BRCMS_SROM_BOARDREV); 4515 + j = sprom->board_rev; 4517 4516 /* promote srom boardrev of 0xFF to 1 */ 4518 4517 if (j == BOARDREV_PROMOTABLE) 4519 4518 j = BOARDREV_PROMOTED; ··· 4526 4525 err = 15; 4527 4526 goto fail; 4528 4527 } 4529 - wlc_hw->sromrev = (u8) getintvar(wlc_hw->sih, BRCMS_SROM_REV); 4530 - wlc_hw->boardflags = (u32) getintvar(wlc_hw->sih, 4531 - BRCMS_SROM_BOARDFLAGS); 4532 - wlc_hw->boardflags2 = (u32) getintvar(wlc_hw->sih, 4533 - BRCMS_SROM_BOARDFLAGS2); 4528 + wlc_hw->sromrev = sprom->revision; 4529 + wlc_hw->boardflags = sprom->boardflags_lo + (sprom->boardflags_hi << 16); 4530 + wlc_hw->boardflags2 = sprom->boardflags2_lo + (sprom->boardflags2_hi << 16); 4534 4531 4535 4532 if (wlc_hw->boardflags & BFL_NOPLLDOWN) 4536 4533 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED); ··· 4701 4702 */ 4702 4703 4703 4704 /* init etheraddr state variables */ 4704 - macaddr = brcms_c_get_macaddr(wlc_hw); 4705 - if (macaddr == NULL) { 4706 - wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n", 4707 - unit); 4708 - err = 21; 4709 - goto fail; 4710 - } 4711 - if (!mac_pton(macaddr, wlc_hw->etheraddr) || 4712 - is_broadcast_ether_addr(wlc_hw->etheraddr) || 4705 + brcms_c_get_macaddr(wlc_hw, wlc_hw->etheraddr); 4706 + 4707 + if (is_broadcast_ether_addr(wlc_hw->etheraddr) || 4713 4708 is_zero_ether_addr(wlc_hw->etheraddr)) { 4714 - wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n", 4715 - unit, macaddr); 4709 + wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr\n", 4710 + unit); 4716 4711 err = 22; 4717 4712 goto fail; 4718 4713 } 4719 4714 4720 - BCMMSG(wlc->wiphy, "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n", 4721 - wlc_hw->deviceid, wlc_hw->_nbands, ai_get_boardtype(wlc_hw->sih), 4722 - macaddr); 4715 + BCMMSG(wlc->wiphy, "deviceid 0x%x nbands %d board 0x%x\n", 4716 + wlc_hw->deviceid, wlc_hw->_nbands, ai_get_boardtype(wlc_hw->sih)); 4723 4717 4724 4718 return err; 4725 4719 ··· 4762 4770 int aa; 4763 4771 uint unit; 4764 4772 int bandtype; 4765 - struct si_pub *sih = wlc->hw->sih; 4773 + struct ssb_sprom *sprom = &wlc->hw->d11core->bus->sprom; 4766 4774 4767 4775 unit = wlc->pub->unit; 4768 4776 bandtype = wlc->band->bandtype; 4769 4777 4770 4778 /* get antennas available */ 4771 4779 if (bandtype == BRCM_BAND_5G) 4772 - aa = (s8) getintvar(sih, BRCMS_SROM_AA5G); 4780 + aa = sprom->ant_available_a; 4773 4781 else 4774 - aa = (s8) getintvar(sih, BRCMS_SROM_AA2G); 4782 + aa = sprom->ant_available_bg; 4775 4783 4776 4784 if ((aa < 1) || (aa > 15)) { 4777 4785 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in" ··· 4791 4799 4792 4800 /* Compute Antenna Gain */ 4793 4801 if (bandtype == BRCM_BAND_5G) 4794 - wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG1); 4802 + wlc->band->antgain = sprom->antenna_gain.a1; 4795 4803 else 4796 - wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG0); 4804 + wlc->band->antgain = sprom->antenna_gain.a0; 4797 4805 4798 4806 brcms_c_attach_antgain_init(wlc); 4799 4807 ··· 4944 4952 4945 4953 callbacks = 0; 4946 4954 4947 - if (wlc_hw->sih) { 4948 - /* 4949 - * detach interrupt sync mechanism since interrupt is disabled 4950 - * and per-port interrupt object may has been freed. this must 4951 - * be done before sb core switch 4952 - */ 4953 - ai_pci_sleep(wlc_hw->sih); 4954 - } 4955 - 4956 4955 brcms_b_detach_dmapio(wlc_hw); 4957 4956 4958 4957 band = wlc_hw->band; ··· 5030 5047 */ 5031 5048 brcms_b_xtal(wlc_hw, ON); 5032 5049 ai_clkctl_init(wlc_hw->sih); 5033 - brcms_b_clkctl_clk(wlc_hw, CLK_FAST); 5034 - 5035 - ai_pci_fixcfg(wlc_hw->sih); 5050 + brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST); 5036 5051 5037 5052 /* 5038 5053 * TODO: test suspend/resume ··· 5059 5078 5060 5079 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw) 5061 5080 { 5062 - uint coremask; 5063 - 5064 5081 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); 5065 5082 5066 5083 /* ··· 5067 5088 */ 5068 5089 brcms_b_xtal(wlc_hw, ON); 5069 5090 ai_clkctl_init(wlc_hw->sih); 5070 - brcms_b_clkctl_clk(wlc_hw, CLK_FAST); 5091 + brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST); 5071 5092 5072 5093 /* 5073 5094 * Configure pci/pcmcia here instead of in brcms_c_attach() 5074 5095 * to allow mfg hotswap: down, hotswap (chip power cycle), up. 5075 5096 */ 5076 - coremask = (1 << wlc_hw->wlc->core->coreidx); 5077 - 5078 - ai_pci_setup(wlc_hw->sih, coremask); 5097 + bcma_core_pci_irq_ctl(&wlc_hw->d11core->bus->drv_pci, wlc_hw->d11core, 5098 + true); 5079 5099 5080 5100 /* 5081 5101 * Need to read the hwradio status here to cover the case where the ··· 5104 5126 wlc_phy_hw_state_upd(wlc_hw->band->pi, true); 5105 5127 5106 5128 /* FULLY enable dynamic power control and d11 core interrupt */ 5107 - brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); 5129 + brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_DYNAMIC); 5108 5130 brcms_intrson(wlc_hw->wlc->wl); 5109 5131 return 0; 5110 5132 } ··· 5245 5267 brcms_intrsoff(wlc_hw->wlc->wl); 5246 5268 5247 5269 /* ensure we're running on the pll clock again */ 5248 - brcms_b_clkctl_clk(wlc_hw, CLK_FAST); 5270 + brcms_b_clkctl_clk(wlc_hw, BCMA_CLKMODE_FAST); 5249 5271 } 5250 5272 /* down phy at the last of this stage */ 5251 5273 callbacks += wlc_phy_down(wlc_hw->band->pi);
-826
drivers/net/wireless/brcm80211/brcmsmac/nicpci.c
··· 1 - /* 2 - * Copyright (c) 2010 Broadcom Corporation 3 - * 4 - * Permission to use, copy, modify, and/or distribute this software for any 5 - * purpose with or without fee is hereby granted, provided that the above 6 - * copyright notice and this permission notice appear in all copies. 7 - * 8 - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 - */ 16 - 17 - #include <linux/slab.h> 18 - #include <linux/delay.h> 19 - #include <linux/pci.h> 20 - 21 - #include <defs.h> 22 - #include <soc.h> 23 - #include <chipcommon.h> 24 - #include "aiutils.h" 25 - #include "pub.h" 26 - #include "nicpci.h" 27 - 28 - /* SPROM offsets */ 29 - #define SRSH_ASPM_OFFSET 4 /* word 4 */ 30 - #define SRSH_ASPM_ENB 0x18 /* bit 3, 4 */ 31 - #define SRSH_ASPM_L1_ENB 0x10 /* bit 4 */ 32 - #define SRSH_ASPM_L0s_ENB 0x8 /* bit 3 */ 33 - 34 - #define SRSH_PCIE_MISC_CONFIG 5 /* word 5 */ 35 - #define SRSH_L23READY_EXIT_NOPERST 0x8000 /* bit 15 */ 36 - #define SRSH_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */ 37 - #define SRSH_CLKREQ_ENB 0x0800 /* bit 11 */ 38 - #define SRSH_BD_OFFSET 6 /* word 6 */ 39 - 40 - /* chipcontrol */ 41 - #define CHIPCTRL_4321_PLL_DOWN 0x800000/* serdes PLL down override */ 42 - 43 - /* MDIO control */ 44 - #define MDIOCTL_DIVISOR_MASK 0x7f /* clock to be used on MDIO */ 45 - #define MDIOCTL_DIVISOR_VAL 0x2 46 - #define MDIOCTL_PREAM_EN 0x80 /* Enable preamble sequnce */ 47 - #define MDIOCTL_ACCESS_DONE 0x100 /* Transaction complete */ 48 - 49 - /* MDIO Data */ 50 - #define MDIODATA_MASK 0x0000ffff /* data 2 bytes */ 51 - #define MDIODATA_TA 0x00020000 /* Turnaround */ 52 - 53 - #define MDIODATA_REGADDR_SHF 18 /* Regaddr shift */ 54 - #define MDIODATA_REGADDR_MASK 0x007c0000 /* Regaddr Mask */ 55 - #define MDIODATA_DEVADDR_SHF 23 /* Physmedia devaddr shift */ 56 - #define MDIODATA_DEVADDR_MASK 0x0f800000 57 - /* Physmedia devaddr Mask */ 58 - 59 - /* MDIO Data for older revisions < 10 */ 60 - #define MDIODATA_REGADDR_SHF_OLD 18 /* Regaddr shift */ 61 - #define MDIODATA_REGADDR_MASK_OLD 0x003c0000 62 - /* Regaddr Mask */ 63 - #define MDIODATA_DEVADDR_SHF_OLD 22 /* Physmedia devaddr shift */ 64 - #define MDIODATA_DEVADDR_MASK_OLD 0x0fc00000 65 - /* Physmedia devaddr Mask */ 66 - 67 - /* Transactions flags */ 68 - #define MDIODATA_WRITE 0x10000000 69 - #define MDIODATA_READ 0x20000000 70 - #define MDIODATA_START 0x40000000 71 - 72 - #define MDIODATA_DEV_ADDR 0x0 /* dev address for serdes */ 73 - #define MDIODATA_BLK_ADDR 0x1F /* blk address for serdes */ 74 - 75 - /* serdes regs (rev < 10) */ 76 - #define MDIODATA_DEV_PLL 0x1d /* SERDES PLL Dev */ 77 - #define MDIODATA_DEV_TX 0x1e /* SERDES TX Dev */ 78 - #define MDIODATA_DEV_RX 0x1f /* SERDES RX Dev */ 79 - 80 - /* SERDES RX registers */ 81 - #define SERDES_RX_CTRL 1 /* Rx cntrl */ 82 - #define SERDES_RX_TIMER1 2 /* Rx Timer1 */ 83 - #define SERDES_RX_CDR 6 /* CDR */ 84 - #define SERDES_RX_CDRBW 7 /* CDR BW */ 85 - /* SERDES RX control register */ 86 - #define SERDES_RX_CTRL_FORCE 0x80 /* rxpolarity_force */ 87 - #define SERDES_RX_CTRL_POLARITY 0x40 /* rxpolarity_value */ 88 - 89 - /* SERDES PLL registers */ 90 - #define SERDES_PLL_CTRL 1 /* PLL control reg */ 91 - #define PLL_CTRL_FREQDET_EN 0x4000 /* bit 14 is FREQDET on */ 92 - 93 - /* Linkcontrol reg offset in PCIE Cap */ 94 - #define PCIE_CAP_LINKCTRL_OFFSET 16 /* offset in pcie cap */ 95 - #define PCIE_CAP_LCREG_ASPML0s 0x01 /* ASPM L0s in linkctrl */ 96 - #define PCIE_CAP_LCREG_ASPML1 0x02 /* ASPM L1 in linkctrl */ 97 - #define PCIE_CLKREQ_ENAB 0x100 /* CLKREQ Enab in linkctrl */ 98 - 99 - #define PCIE_ASPM_ENAB 3 /* ASPM L0s & L1 in linkctrl */ 100 - #define PCIE_ASPM_L1_ENAB 2 /* ASPM L0s & L1 in linkctrl */ 101 - #define PCIE_ASPM_L0s_ENAB 1 /* ASPM L0s & L1 in linkctrl */ 102 - #define PCIE_ASPM_DISAB 0 /* ASPM L0s & L1 in linkctrl */ 103 - 104 - /* Power management threshold */ 105 - #define PCIE_L1THRESHOLDTIME_MASK 0xFF00 /* bits 8 - 15 */ 106 - #define PCIE_L1THRESHOLDTIME_SHIFT 8 /* PCIE_L1THRESHOLDTIME_SHIFT */ 107 - #define PCIE_L1THRESHOLD_WARVAL 0x72 /* WAR value */ 108 - #define PCIE_ASPMTIMER_EXTEND 0x01000000 109 - /* > rev7: 110 - * enable extend ASPM timer 111 - */ 112 - 113 - /* different register spaces to access thru pcie indirect access */ 114 - #define PCIE_CONFIGREGS 1 /* Access to config space */ 115 - #define PCIE_PCIEREGS 2 /* Access to pcie registers */ 116 - 117 - /* PCIE protocol PHY diagnostic registers */ 118 - #define PCIE_PLP_STATUSREG 0x204 /* Status */ 119 - 120 - /* Status reg PCIE_PLP_STATUSREG */ 121 - #define PCIE_PLP_POLARITYINV_STAT 0x10 122 - 123 - /* PCIE protocol DLLP diagnostic registers */ 124 - #define PCIE_DLLP_LCREG 0x100 /* Link Control */ 125 - #define PCIE_DLLP_PMTHRESHREG 0x128 /* Power Management Threshold */ 126 - 127 - /* PCIE protocol TLP diagnostic registers */ 128 - #define PCIE_TLP_WORKAROUNDSREG 0x004 /* TLP Workarounds */ 129 - 130 - /* Sonics to PCI translation types */ 131 - #define SBTOPCI_PREF 0x4 /* prefetch enable */ 132 - #define SBTOPCI_BURST 0x8 /* burst enable */ 133 - #define SBTOPCI_RC_READMULTI 0x20 /* memory read multiple */ 134 - 135 - #define PCI_CLKRUN_DSBL 0x8000 /* Bit 15 forceClkrun */ 136 - 137 - /* PCI core index in SROM shadow area */ 138 - #define SRSH_PI_OFFSET 0 /* first word */ 139 - #define SRSH_PI_MASK 0xf000 /* bit 15:12 */ 140 - #define SRSH_PI_SHIFT 12 /* bit 15:12 */ 141 - 142 - #define PCIREGOFFS(field) offsetof(struct sbpciregs, field) 143 - #define PCIEREGOFFS(field) offsetof(struct sbpcieregs, field) 144 - 145 - /* Sonics side: PCI core and host control registers */ 146 - struct sbpciregs { 147 - u32 control; /* PCI control */ 148 - u32 PAD[3]; 149 - u32 arbcontrol; /* PCI arbiter control */ 150 - u32 clkrun; /* Clkrun Control (>=rev11) */ 151 - u32 PAD[2]; 152 - u32 intstatus; /* Interrupt status */ 153 - u32 intmask; /* Interrupt mask */ 154 - u32 sbtopcimailbox; /* Sonics to PCI mailbox */ 155 - u32 PAD[9]; 156 - u32 bcastaddr; /* Sonics broadcast address */ 157 - u32 bcastdata; /* Sonics broadcast data */ 158 - u32 PAD[2]; 159 - u32 gpioin; /* ro: gpio input (>=rev2) */ 160 - u32 gpioout; /* rw: gpio output (>=rev2) */ 161 - u32 gpioouten; /* rw: gpio output enable (>= rev2) */ 162 - u32 gpiocontrol; /* rw: gpio control (>= rev2) */ 163 - u32 PAD[36]; 164 - u32 sbtopci0; /* Sonics to PCI translation 0 */ 165 - u32 sbtopci1; /* Sonics to PCI translation 1 */ 166 - u32 sbtopci2; /* Sonics to PCI translation 2 */ 167 - u32 PAD[189]; 168 - u32 pcicfg[4][64]; /* 0x400 - 0x7FF, PCI Cfg Space (>=rev8) */ 169 - u16 sprom[36]; /* SPROM shadow Area */ 170 - u32 PAD[46]; 171 - }; 172 - 173 - /* SB side: PCIE core and host control registers */ 174 - struct sbpcieregs { 175 - u32 control; /* host mode only */ 176 - u32 PAD[2]; 177 - u32 biststatus; /* bist Status: 0x00C */ 178 - u32 gpiosel; /* PCIE gpio sel: 0x010 */ 179 - u32 gpioouten; /* PCIE gpio outen: 0x14 */ 180 - u32 PAD[2]; 181 - u32 intstatus; /* Interrupt status: 0x20 */ 182 - u32 intmask; /* Interrupt mask: 0x24 */ 183 - u32 sbtopcimailbox; /* sb to pcie mailbox: 0x028 */ 184 - u32 PAD[53]; 185 - u32 sbtopcie0; /* sb to pcie translation 0: 0x100 */ 186 - u32 sbtopcie1; /* sb to pcie translation 1: 0x104 */ 187 - u32 sbtopcie2; /* sb to pcie translation 2: 0x108 */ 188 - u32 PAD[5]; 189 - 190 - /* pcie core supports in direct access to config space */ 191 - u32 configaddr; /* pcie config space access: Address field: 0x120 */ 192 - u32 configdata; /* pcie config space access: Data field: 0x124 */ 193 - 194 - /* mdio access to serdes */ 195 - u32 mdiocontrol; /* controls the mdio access: 0x128 */ 196 - u32 mdiodata; /* Data to the mdio access: 0x12c */ 197 - 198 - /* pcie protocol phy/dllp/tlp register indirect access mechanism */ 199 - u32 pcieindaddr; /* indirect access to 200 - * the internal register: 0x130 201 - */ 202 - u32 pcieinddata; /* Data to/from the internal regsiter: 0x134 */ 203 - 204 - u32 clkreqenctrl; /* >= rev 6, Clkreq rdma control : 0x138 */ 205 - u32 PAD[177]; 206 - u32 pciecfg[4][64]; /* 0x400 - 0x7FF, PCIE Cfg Space */ 207 - u16 sprom[64]; /* SPROM shadow Area */ 208 - }; 209 - 210 - struct pcicore_info { 211 - struct bcma_device *core; 212 - struct si_pub *sih; /* System interconnect handle */ 213 - struct pci_dev *dev; 214 - u8 pciecap_lcreg_offset;/* PCIE capability LCreg offset 215 - * in the config space 216 - */ 217 - bool pcie_pr42767; 218 - u8 pcie_polarity; 219 - u8 pcie_war_aspm_ovr; /* Override ASPM/Clkreq settings */ 220 - 221 - u8 pmecap_offset; /* PM Capability offset in the config space */ 222 - bool pmecap; /* Capable of generating PME */ 223 - }; 224 - 225 - #define PCIE_ASPM(sih) \ 226 - ((ai_get_buscoretype(sih) == PCIE_CORE_ID) && \ 227 - ((ai_get_buscorerev(sih) >= 3) && \ 228 - (ai_get_buscorerev(sih) <= 5))) 229 - 230 - 231 - /* delay needed between the mdio control/ mdiodata register data access */ 232 - static void pr28829_delay(void) 233 - { 234 - udelay(10); 235 - } 236 - 237 - /* Initialize the PCI core. 238 - * It's caller's responsibility to make sure that this is done only once 239 - */ 240 - struct pcicore_info *pcicore_init(struct si_pub *sih, struct bcma_device *core) 241 - { 242 - struct pcicore_info *pi; 243 - 244 - /* alloc struct pcicore_info */ 245 - pi = kzalloc(sizeof(struct pcicore_info), GFP_ATOMIC); 246 - if (pi == NULL) 247 - return NULL; 248 - 249 - pi->sih = sih; 250 - pi->dev = core->bus->host_pci; 251 - pi->core = core; 252 - 253 - if (core->id.id == PCIE_CORE_ID) { 254 - u8 cap_ptr; 255 - cap_ptr = pcicore_find_pci_capability(pi->dev, PCI_CAP_ID_EXP, 256 - NULL, NULL); 257 - pi->pciecap_lcreg_offset = cap_ptr + PCIE_CAP_LINKCTRL_OFFSET; 258 - } 259 - return pi; 260 - } 261 - 262 - void pcicore_deinit(struct pcicore_info *pch) 263 - { 264 - kfree(pch); 265 - } 266 - 267 - /* return cap_offset if requested capability exists in the PCI config space */ 268 - /* Note that it's caller's responsibility to make sure it's a pci bus */ 269 - u8 270 - pcicore_find_pci_capability(struct pci_dev *dev, u8 req_cap_id, 271 - unsigned char *buf, u32 *buflen) 272 - { 273 - u8 cap_id; 274 - u8 cap_ptr = 0; 275 - u32 bufsize; 276 - u8 byte_val; 277 - 278 - /* check for Header type 0 */ 279 - pci_read_config_byte(dev, PCI_HEADER_TYPE, &byte_val); 280 - if ((byte_val & 0x7f) != PCI_HEADER_TYPE_NORMAL) 281 - goto end; 282 - 283 - /* check if the capability pointer field exists */ 284 - pci_read_config_byte(dev, PCI_STATUS, &byte_val); 285 - if (!(byte_val & PCI_STATUS_CAP_LIST)) 286 - goto end; 287 - 288 - pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &cap_ptr); 289 - /* check if the capability pointer is 0x00 */ 290 - if (cap_ptr == 0x00) 291 - goto end; 292 - 293 - /* loop thru the capability list 294 - * and see if the pcie capability exists 295 - */ 296 - 297 - pci_read_config_byte(dev, cap_ptr, &cap_id); 298 - 299 - while (cap_id != req_cap_id) { 300 - pci_read_config_byte(dev, cap_ptr + 1, &cap_ptr); 301 - if (cap_ptr == 0x00) 302 - break; 303 - pci_read_config_byte(dev, cap_ptr, &cap_id); 304 - } 305 - if (cap_id != req_cap_id) 306 - goto end; 307 - 308 - /* found the caller requested capability */ 309 - if (buf != NULL && buflen != NULL) { 310 - u8 cap_data; 311 - 312 - bufsize = *buflen; 313 - if (!bufsize) 314 - goto end; 315 - *buflen = 0; 316 - /* copy the capability data excluding cap ID and next ptr */ 317 - cap_data = cap_ptr + 2; 318 - if ((bufsize + cap_data) > PCI_SZPCR) 319 - bufsize = PCI_SZPCR - cap_data; 320 - *buflen = bufsize; 321 - while (bufsize--) { 322 - pci_read_config_byte(dev, cap_data, buf); 323 - cap_data++; 324 - buf++; 325 - } 326 - } 327 - end: 328 - return cap_ptr; 329 - } 330 - 331 - /* ***** Register Access API */ 332 - static uint 333 - pcie_readreg(struct bcma_device *core, uint addrtype, uint offset) 334 - { 335 - uint retval = 0xFFFFFFFF; 336 - 337 - switch (addrtype) { 338 - case PCIE_CONFIGREGS: 339 - bcma_write32(core, PCIEREGOFFS(configaddr), offset); 340 - (void)bcma_read32(core, PCIEREGOFFS(configaddr)); 341 - retval = bcma_read32(core, PCIEREGOFFS(configdata)); 342 - break; 343 - case PCIE_PCIEREGS: 344 - bcma_write32(core, PCIEREGOFFS(pcieindaddr), offset); 345 - (void)bcma_read32(core, PCIEREGOFFS(pcieindaddr)); 346 - retval = bcma_read32(core, PCIEREGOFFS(pcieinddata)); 347 - break; 348 - } 349 - 350 - return retval; 351 - } 352 - 353 - static uint pcie_writereg(struct bcma_device *core, uint addrtype, 354 - uint offset, uint val) 355 - { 356 - switch (addrtype) { 357 - case PCIE_CONFIGREGS: 358 - bcma_write32(core, PCIEREGOFFS(configaddr), offset); 359 - bcma_write32(core, PCIEREGOFFS(configdata), val); 360 - break; 361 - case PCIE_PCIEREGS: 362 - bcma_write32(core, PCIEREGOFFS(pcieindaddr), offset); 363 - bcma_write32(core, PCIEREGOFFS(pcieinddata), val); 364 - break; 365 - default: 366 - break; 367 - } 368 - return 0; 369 - } 370 - 371 - static bool pcie_mdiosetblock(struct pcicore_info *pi, uint blk) 372 - { 373 - uint mdiodata, i = 0; 374 - uint pcie_serdes_spinwait = 200; 375 - 376 - mdiodata = (MDIODATA_START | MDIODATA_WRITE | MDIODATA_TA | 377 - (MDIODATA_DEV_ADDR << MDIODATA_DEVADDR_SHF) | 378 - (MDIODATA_BLK_ADDR << MDIODATA_REGADDR_SHF) | 379 - (blk << 4)); 380 - bcma_write32(pi->core, PCIEREGOFFS(mdiodata), mdiodata); 381 - 382 - pr28829_delay(); 383 - /* retry till the transaction is complete */ 384 - while (i < pcie_serdes_spinwait) { 385 - if (bcma_read32(pi->core, PCIEREGOFFS(mdiocontrol)) & 386 - MDIOCTL_ACCESS_DONE) 387 - break; 388 - 389 - udelay(1000); 390 - i++; 391 - } 392 - 393 - if (i >= pcie_serdes_spinwait) 394 - return false; 395 - 396 - return true; 397 - } 398 - 399 - static int 400 - pcie_mdioop(struct pcicore_info *pi, uint physmedia, uint regaddr, bool write, 401 - uint *val) 402 - { 403 - uint mdiodata; 404 - uint i = 0; 405 - uint pcie_serdes_spinwait = 10; 406 - 407 - /* enable mdio access to SERDES */ 408 - bcma_write32(pi->core, PCIEREGOFFS(mdiocontrol), 409 - MDIOCTL_PREAM_EN | MDIOCTL_DIVISOR_VAL); 410 - 411 - if (ai_get_buscorerev(pi->sih) >= 10) { 412 - /* new serdes is slower in rw, 413 - * using two layers of reg address mapping 414 - */ 415 - if (!pcie_mdiosetblock(pi, physmedia)) 416 - return 1; 417 - mdiodata = ((MDIODATA_DEV_ADDR << MDIODATA_DEVADDR_SHF) | 418 - (regaddr << MDIODATA_REGADDR_SHF)); 419 - pcie_serdes_spinwait *= 20; 420 - } else { 421 - mdiodata = ((physmedia << MDIODATA_DEVADDR_SHF_OLD) | 422 - (regaddr << MDIODATA_REGADDR_SHF_OLD)); 423 - } 424 - 425 - if (!write) 426 - mdiodata |= (MDIODATA_START | MDIODATA_READ | MDIODATA_TA); 427 - else 428 - mdiodata |= (MDIODATA_START | MDIODATA_WRITE | MDIODATA_TA | 429 - *val); 430 - 431 - bcma_write32(pi->core, PCIEREGOFFS(mdiodata), mdiodata); 432 - 433 - pr28829_delay(); 434 - 435 - /* retry till the transaction is complete */ 436 - while (i < pcie_serdes_spinwait) { 437 - if (bcma_read32(pi->core, PCIEREGOFFS(mdiocontrol)) & 438 - MDIOCTL_ACCESS_DONE) { 439 - if (!write) { 440 - pr28829_delay(); 441 - *val = (bcma_read32(pi->core, 442 - PCIEREGOFFS(mdiodata)) & 443 - MDIODATA_MASK); 444 - } 445 - /* Disable mdio access to SERDES */ 446 - bcma_write32(pi->core, PCIEREGOFFS(mdiocontrol), 0); 447 - return 0; 448 - } 449 - udelay(1000); 450 - i++; 451 - } 452 - 453 - /* Timed out. Disable mdio access to SERDES. */ 454 - bcma_write32(pi->core, PCIEREGOFFS(mdiocontrol), 0); 455 - return 1; 456 - } 457 - 458 - /* use the mdio interface to read from mdio slaves */ 459 - static int 460 - pcie_mdioread(struct pcicore_info *pi, uint physmedia, uint regaddr, 461 - uint *regval) 462 - { 463 - return pcie_mdioop(pi, physmedia, regaddr, false, regval); 464 - } 465 - 466 - /* use the mdio interface to write to mdio slaves */ 467 - static int 468 - pcie_mdiowrite(struct pcicore_info *pi, uint physmedia, uint regaddr, uint val) 469 - { 470 - return pcie_mdioop(pi, physmedia, regaddr, true, &val); 471 - } 472 - 473 - /* ***** Support functions ***** */ 474 - static u8 pcie_clkreq(struct pcicore_info *pi, u32 mask, u32 val) 475 - { 476 - u32 reg_val; 477 - u8 offset; 478 - 479 - offset = pi->pciecap_lcreg_offset; 480 - if (!offset) 481 - return 0; 482 - 483 - pci_read_config_dword(pi->dev, offset, &reg_val); 484 - /* set operation */ 485 - if (mask) { 486 - if (val) 487 - reg_val |= PCIE_CLKREQ_ENAB; 488 - else 489 - reg_val &= ~PCIE_CLKREQ_ENAB; 490 - pci_write_config_dword(pi->dev, offset, reg_val); 491 - pci_read_config_dword(pi->dev, offset, &reg_val); 492 - } 493 - if (reg_val & PCIE_CLKREQ_ENAB) 494 - return 1; 495 - else 496 - return 0; 497 - } 498 - 499 - static void pcie_extendL1timer(struct pcicore_info *pi, bool extend) 500 - { 501 - u32 w; 502 - struct si_pub *sih = pi->sih; 503 - 504 - if (ai_get_buscoretype(sih) != PCIE_CORE_ID || 505 - ai_get_buscorerev(sih) < 7) 506 - return; 507 - 508 - w = pcie_readreg(pi->core, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG); 509 - if (extend) 510 - w |= PCIE_ASPMTIMER_EXTEND; 511 - else 512 - w &= ~PCIE_ASPMTIMER_EXTEND; 513 - pcie_writereg(pi->core, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG, w); 514 - w = pcie_readreg(pi->core, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG); 515 - } 516 - 517 - /* centralized clkreq control policy */ 518 - static void pcie_clkreq_upd(struct pcicore_info *pi, uint state) 519 - { 520 - struct si_pub *sih = pi->sih; 521 - 522 - switch (state) { 523 - case SI_DOATTACH: 524 - if (PCIE_ASPM(sih)) 525 - pcie_clkreq(pi, 1, 0); 526 - break; 527 - case SI_PCIDOWN: 528 - /* turn on serdes PLL down */ 529 - if (ai_get_buscorerev(sih) == 6) { 530 - ai_cc_reg(sih, 531 - offsetof(struct chipcregs, chipcontrol_addr), 532 - ~0, 0); 533 - ai_cc_reg(sih, 534 - offsetof(struct chipcregs, chipcontrol_data), 535 - ~0x40, 0); 536 - } else if (pi->pcie_pr42767) { 537 - pcie_clkreq(pi, 1, 1); 538 - } 539 - break; 540 - case SI_PCIUP: 541 - /* turn off serdes PLL down */ 542 - if (ai_get_buscorerev(sih) == 6) { 543 - ai_cc_reg(sih, 544 - offsetof(struct chipcregs, chipcontrol_addr), 545 - ~0, 0); 546 - ai_cc_reg(sih, 547 - offsetof(struct chipcregs, chipcontrol_data), 548 - ~0x40, 0x40); 549 - } else if (PCIE_ASPM(sih)) { /* disable clkreq */ 550 - pcie_clkreq(pi, 1, 0); 551 - } 552 - break; 553 - } 554 - } 555 - 556 - /* ***** PCI core WARs ***** */ 557 - /* Done only once at attach time */ 558 - static void pcie_war_polarity(struct pcicore_info *pi) 559 - { 560 - u32 w; 561 - 562 - if (pi->pcie_polarity != 0) 563 - return; 564 - 565 - w = pcie_readreg(pi->core, PCIE_PCIEREGS, PCIE_PLP_STATUSREG); 566 - 567 - /* Detect the current polarity at attach and force that polarity and 568 - * disable changing the polarity 569 - */ 570 - if ((w & PCIE_PLP_POLARITYINV_STAT) == 0) 571 - pi->pcie_polarity = SERDES_RX_CTRL_FORCE; 572 - else 573 - pi->pcie_polarity = (SERDES_RX_CTRL_FORCE | 574 - SERDES_RX_CTRL_POLARITY); 575 - } 576 - 577 - /* enable ASPM and CLKREQ if srom doesn't have it */ 578 - /* Needs to happen when update to shadow SROM is needed 579 - * : Coming out of 'standby'/'hibernate' 580 - * : If pcie_war_aspm_ovr state changed 581 - */ 582 - static void pcie_war_aspm_clkreq(struct pcicore_info *pi) 583 - { 584 - struct si_pub *sih = pi->sih; 585 - u16 val16; 586 - u32 w; 587 - 588 - if (!PCIE_ASPM(sih)) 589 - return; 590 - 591 - /* bypass this on QT or VSIM */ 592 - val16 = bcma_read16(pi->core, PCIEREGOFFS(sprom[SRSH_ASPM_OFFSET])); 593 - 594 - val16 &= ~SRSH_ASPM_ENB; 595 - if (pi->pcie_war_aspm_ovr == PCIE_ASPM_ENAB) 596 - val16 |= SRSH_ASPM_ENB; 597 - else if (pi->pcie_war_aspm_ovr == PCIE_ASPM_L1_ENAB) 598 - val16 |= SRSH_ASPM_L1_ENB; 599 - else if (pi->pcie_war_aspm_ovr == PCIE_ASPM_L0s_ENAB) 600 - val16 |= SRSH_ASPM_L0s_ENB; 601 - 602 - bcma_write16(pi->core, PCIEREGOFFS(sprom[SRSH_ASPM_OFFSET]), val16); 603 - 604 - pci_read_config_dword(pi->dev, pi->pciecap_lcreg_offset, &w); 605 - w &= ~PCIE_ASPM_ENAB; 606 - w |= pi->pcie_war_aspm_ovr; 607 - pci_write_config_dword(pi->dev, pi->pciecap_lcreg_offset, w); 608 - 609 - val16 = bcma_read16(pi->core, 610 - PCIEREGOFFS(sprom[SRSH_CLKREQ_OFFSET_REV5])); 611 - 612 - if (pi->pcie_war_aspm_ovr != PCIE_ASPM_DISAB) { 613 - val16 |= SRSH_CLKREQ_ENB; 614 - pi->pcie_pr42767 = true; 615 - } else 616 - val16 &= ~SRSH_CLKREQ_ENB; 617 - 618 - bcma_write16(pi->core, PCIEREGOFFS(sprom[SRSH_CLKREQ_OFFSET_REV5]), 619 - val16); 620 - } 621 - 622 - /* Apply the polarity determined at the start */ 623 - /* Needs to happen when coming out of 'standby'/'hibernate' */ 624 - static void pcie_war_serdes(struct pcicore_info *pi) 625 - { 626 - u32 w = 0; 627 - 628 - if (pi->pcie_polarity != 0) 629 - pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_CTRL, 630 - pi->pcie_polarity); 631 - 632 - pcie_mdioread(pi, MDIODATA_DEV_PLL, SERDES_PLL_CTRL, &w); 633 - if (w & PLL_CTRL_FREQDET_EN) { 634 - w &= ~PLL_CTRL_FREQDET_EN; 635 - pcie_mdiowrite(pi, MDIODATA_DEV_PLL, SERDES_PLL_CTRL, w); 636 - } 637 - } 638 - 639 - /* Fix MISC config to allow coming out of L2/L3-Ready state w/o PRST */ 640 - /* Needs to happen when coming out of 'standby'/'hibernate' */ 641 - static void pcie_misc_config_fixup(struct pcicore_info *pi) 642 - { 643 - u16 val16; 644 - 645 - val16 = bcma_read16(pi->core, 646 - PCIEREGOFFS(sprom[SRSH_PCIE_MISC_CONFIG])); 647 - 648 - if ((val16 & SRSH_L23READY_EXIT_NOPERST) == 0) { 649 - val16 |= SRSH_L23READY_EXIT_NOPERST; 650 - bcma_write16(pi->core, 651 - PCIEREGOFFS(sprom[SRSH_PCIE_MISC_CONFIG]), val16); 652 - } 653 - } 654 - 655 - /* quick hack for testing */ 656 - /* Needs to happen when coming out of 'standby'/'hibernate' */ 657 - static void pcie_war_noplldown(struct pcicore_info *pi) 658 - { 659 - /* turn off serdes PLL down */ 660 - ai_cc_reg(pi->sih, offsetof(struct chipcregs, chipcontrol), 661 - CHIPCTRL_4321_PLL_DOWN, CHIPCTRL_4321_PLL_DOWN); 662 - 663 - /* clear srom shadow backdoor */ 664 - bcma_write16(pi->core, PCIEREGOFFS(sprom[SRSH_BD_OFFSET]), 0); 665 - } 666 - 667 - /* Needs to happen when coming out of 'standby'/'hibernate' */ 668 - static void pcie_war_pci_setup(struct pcicore_info *pi) 669 - { 670 - struct si_pub *sih = pi->sih; 671 - u32 w; 672 - 673 - if (ai_get_buscorerev(sih) == 0 || ai_get_buscorerev(sih) == 1) { 674 - w = pcie_readreg(pi->core, PCIE_PCIEREGS, 675 - PCIE_TLP_WORKAROUNDSREG); 676 - w |= 0x8; 677 - pcie_writereg(pi->core, PCIE_PCIEREGS, 678 - PCIE_TLP_WORKAROUNDSREG, w); 679 - } 680 - 681 - if (ai_get_buscorerev(sih) == 1) { 682 - w = pcie_readreg(pi->core, PCIE_PCIEREGS, PCIE_DLLP_LCREG); 683 - w |= 0x40; 684 - pcie_writereg(pi->core, PCIE_PCIEREGS, PCIE_DLLP_LCREG, w); 685 - } 686 - 687 - if (ai_get_buscorerev(sih) == 0) { 688 - pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_TIMER1, 0x8128); 689 - pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_CDR, 0x0100); 690 - pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_CDRBW, 0x1466); 691 - } else if (PCIE_ASPM(sih)) { 692 - /* Change the L1 threshold for better performance */ 693 - w = pcie_readreg(pi->core, PCIE_PCIEREGS, 694 - PCIE_DLLP_PMTHRESHREG); 695 - w &= ~PCIE_L1THRESHOLDTIME_MASK; 696 - w |= PCIE_L1THRESHOLD_WARVAL << PCIE_L1THRESHOLDTIME_SHIFT; 697 - pcie_writereg(pi->core, PCIE_PCIEREGS, 698 - PCIE_DLLP_PMTHRESHREG, w); 699 - 700 - pcie_war_serdes(pi); 701 - 702 - pcie_war_aspm_clkreq(pi); 703 - } else if (ai_get_buscorerev(pi->sih) == 7) 704 - pcie_war_noplldown(pi); 705 - 706 - /* Note that the fix is actually in the SROM, 707 - * that's why this is open-ended 708 - */ 709 - if (ai_get_buscorerev(pi->sih) >= 6) 710 - pcie_misc_config_fixup(pi); 711 - } 712 - 713 - /* ***** Functions called during driver state changes ***** */ 714 - void pcicore_attach(struct pcicore_info *pi, int state) 715 - { 716 - struct si_pub *sih = pi->sih; 717 - u32 bfl2 = (u32)getintvar(sih, BRCMS_SROM_BOARDFLAGS2); 718 - 719 - /* Determine if this board needs override */ 720 - if (PCIE_ASPM(sih)) { 721 - if (bfl2 & BFL2_PCIEWAR_OVR) 722 - pi->pcie_war_aspm_ovr = PCIE_ASPM_DISAB; 723 - else 724 - pi->pcie_war_aspm_ovr = PCIE_ASPM_ENAB; 725 - } 726 - 727 - /* These need to happen in this order only */ 728 - pcie_war_polarity(pi); 729 - 730 - pcie_war_serdes(pi); 731 - 732 - pcie_war_aspm_clkreq(pi); 733 - 734 - pcie_clkreq_upd(pi, state); 735 - 736 - } 737 - 738 - void pcicore_hwup(struct pcicore_info *pi) 739 - { 740 - if (!pi || ai_get_buscoretype(pi->sih) != PCIE_CORE_ID) 741 - return; 742 - 743 - pcie_war_pci_setup(pi); 744 - } 745 - 746 - void pcicore_up(struct pcicore_info *pi, int state) 747 - { 748 - if (!pi || ai_get_buscoretype(pi->sih) != PCIE_CORE_ID) 749 - return; 750 - 751 - /* Restore L1 timer for better performance */ 752 - pcie_extendL1timer(pi, true); 753 - 754 - pcie_clkreq_upd(pi, state); 755 - } 756 - 757 - /* When the device is going to enter D3 state 758 - * (or the system is going to enter S3/S4 states) 759 - */ 760 - void pcicore_sleep(struct pcicore_info *pi) 761 - { 762 - u32 w; 763 - 764 - if (!pi || !PCIE_ASPM(pi->sih)) 765 - return; 766 - 767 - pci_read_config_dword(pi->dev, pi->pciecap_lcreg_offset, &w); 768 - w &= ~PCIE_CAP_LCREG_ASPML1; 769 - pci_write_config_dword(pi->dev, pi->pciecap_lcreg_offset, w); 770 - 771 - pi->pcie_pr42767 = false; 772 - } 773 - 774 - void pcicore_down(struct pcicore_info *pi, int state) 775 - { 776 - if (!pi || ai_get_buscoretype(pi->sih) != PCIE_CORE_ID) 777 - return; 778 - 779 - pcie_clkreq_upd(pi, state); 780 - 781 - /* Reduce L1 timer for better power savings */ 782 - pcie_extendL1timer(pi, false); 783 - } 784 - 785 - void pcicore_fixcfg(struct pcicore_info *pi) 786 - { 787 - struct bcma_device *core = pi->core; 788 - u16 val16; 789 - uint regoff; 790 - 791 - switch (pi->core->id.id) { 792 - case BCMA_CORE_PCI: 793 - regoff = PCIREGOFFS(sprom[SRSH_PI_OFFSET]); 794 - break; 795 - 796 - case BCMA_CORE_PCIE: 797 - regoff = PCIEREGOFFS(sprom[SRSH_PI_OFFSET]); 798 - break; 799 - 800 - default: 801 - return; 802 - } 803 - 804 - val16 = bcma_read16(pi->core, regoff); 805 - if (((val16 & SRSH_PI_MASK) >> SRSH_PI_SHIFT) != 806 - (u16)core->core_index) { 807 - val16 = ((u16)core->core_index << SRSH_PI_SHIFT) | 808 - (val16 & ~SRSH_PI_MASK); 809 - bcma_write16(pi->core, regoff, val16); 810 - } 811 - } 812 - 813 - /* precondition: current core is pci core */ 814 - void 815 - pcicore_pci_setup(struct pcicore_info *pi) 816 - { 817 - bcma_set32(pi->core, PCIREGOFFS(sbtopci2), 818 - SBTOPCI_PREF | SBTOPCI_BURST); 819 - 820 - if (pi->core->id.rev >= 11) { 821 - bcma_set32(pi->core, PCIREGOFFS(sbtopci2), 822 - SBTOPCI_RC_READMULTI); 823 - bcma_set32(pi->core, PCIREGOFFS(clkrun), PCI_CLKRUN_DSBL); 824 - (void)bcma_read32(pi->core, PCIREGOFFS(clkrun)); 825 - } 826 - }
-77
drivers/net/wireless/brcm80211/brcmsmac/nicpci.h
··· 1 - /* 2 - * Copyright (c) 2010 Broadcom Corporation 3 - * 4 - * Permission to use, copy, modify, and/or distribute this software for any 5 - * purpose with or without fee is hereby granted, provided that the above 6 - * copyright notice and this permission notice appear in all copies. 7 - * 8 - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 - */ 16 - 17 - #ifndef _BRCM_NICPCI_H_ 18 - #define _BRCM_NICPCI_H_ 19 - 20 - #include "types.h" 21 - 22 - /* PCI configuration address space size */ 23 - #define PCI_SZPCR 256 24 - 25 - /* Brcm PCI configuration registers */ 26 - /* backplane address space accessed by BAR0 */ 27 - #define PCI_BAR0_WIN 0x80 28 - /* sprom property control */ 29 - #define PCI_SPROM_CONTROL 0x88 30 - /* mask of PCI and other cores interrupts */ 31 - #define PCI_INT_MASK 0x94 32 - /* backplane core interrupt mask bits offset */ 33 - #define PCI_SBIM_SHIFT 8 34 - /* backplane address space accessed by second 4KB of BAR0 */ 35 - #define PCI_BAR0_WIN2 0xac 36 - /* pci config space gpio input (>=rev3) */ 37 - #define PCI_GPIO_IN 0xb0 38 - /* pci config space gpio output (>=rev3) */ 39 - #define PCI_GPIO_OUT 0xb4 40 - /* pci config space gpio output enable (>=rev3) */ 41 - #define PCI_GPIO_OUTEN 0xb8 42 - 43 - /* bar0 + 4K accesses external sprom */ 44 - #define PCI_BAR0_SPROM_OFFSET (4 * 1024) 45 - /* bar0 + 6K accesses pci core registers */ 46 - #define PCI_BAR0_PCIREGS_OFFSET (6 * 1024) 47 - /* 48 - * pci core SB registers are at the end of the 49 - * 8KB window, so their address is the "regular" 50 - * address plus 4K 51 - */ 52 - #define PCI_BAR0_PCISBR_OFFSET (4 * 1024) 53 - /* bar0 window size Match with corerev 13 */ 54 - #define PCI_BAR0_WINSZ (16 * 1024) 55 - /* On pci corerev >= 13 and all pcie, the bar0 is now 16KB and it maps: */ 56 - /* bar0 + 8K accesses pci/pcie core registers */ 57 - #define PCI_16KB0_PCIREGS_OFFSET (8 * 1024) 58 - /* bar0 + 12K accesses chipc core registers */ 59 - #define PCI_16KB0_CCREGS_OFFSET (12 * 1024) 60 - 61 - struct sbpciregs; 62 - struct sbpcieregs; 63 - 64 - extern struct pcicore_info *pcicore_init(struct si_pub *sih, 65 - struct bcma_device *core); 66 - extern void pcicore_deinit(struct pcicore_info *pch); 67 - extern void pcicore_attach(struct pcicore_info *pch, int state); 68 - extern void pcicore_hwup(struct pcicore_info *pch); 69 - extern void pcicore_up(struct pcicore_info *pch, int state); 70 - extern void pcicore_sleep(struct pcicore_info *pch); 71 - extern void pcicore_down(struct pcicore_info *pch, int state); 72 - extern u8 pcicore_find_pci_capability(struct pci_dev *dev, u8 req_cap_id, 73 - unsigned char *buf, u32 *buflen); 74 - extern void pcicore_fixcfg(struct pcicore_info *pch); 75 - extern void pcicore_pci_setup(struct pcicore_info *pch); 76 - 77 - #endif /* _BRCM_NICPCI_H_ */
-410
drivers/net/wireless/brcm80211/brcmsmac/otp.c
··· 1 - /* 2 - * Copyright (c) 2010 Broadcom Corporation 3 - * 4 - * Permission to use, copy, modify, and/or distribute this software for any 5 - * purpose with or without fee is hereby granted, provided that the above 6 - * copyright notice and this permission notice appear in all copies. 7 - * 8 - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 - */ 16 - 17 - #include <linux/io.h> 18 - #include <linux/errno.h> 19 - #include <linux/string.h> 20 - 21 - #include <brcm_hw_ids.h> 22 - #include <chipcommon.h> 23 - #include "aiutils.h" 24 - #include "otp.h" 25 - 26 - #define OTPS_GUP_MASK 0x00000f00 27 - #define OTPS_GUP_SHIFT 8 28 - /* h/w subregion is programmed */ 29 - #define OTPS_GUP_HW 0x00000100 30 - /* s/w subregion is programmed */ 31 - #define OTPS_GUP_SW 0x00000200 32 - /* chipid/pkgopt subregion is programmed */ 33 - #define OTPS_GUP_CI 0x00000400 34 - /* fuse subregion is programmed */ 35 - #define OTPS_GUP_FUSE 0x00000800 36 - 37 - /* Fields in otpprog in rev >= 21 */ 38 - #define OTPP_COL_MASK 0x000000ff 39 - #define OTPP_COL_SHIFT 0 40 - #define OTPP_ROW_MASK 0x0000ff00 41 - #define OTPP_ROW_SHIFT 8 42 - #define OTPP_OC_MASK 0x0f000000 43 - #define OTPP_OC_SHIFT 24 44 - #define OTPP_READERR 0x10000000 45 - #define OTPP_VALUE_MASK 0x20000000 46 - #define OTPP_VALUE_SHIFT 29 47 - #define OTPP_START_BUSY 0x80000000 48 - #define OTPP_READ 0x40000000 49 - 50 - /* Opcodes for OTPP_OC field */ 51 - #define OTPPOC_READ 0 52 - #define OTPPOC_BIT_PROG 1 53 - #define OTPPOC_VERIFY 3 54 - #define OTPPOC_INIT 4 55 - #define OTPPOC_SET 5 56 - #define OTPPOC_RESET 6 57 - #define OTPPOC_OCST 7 58 - #define OTPPOC_ROW_LOCK 8 59 - #define OTPPOC_PRESCN_TEST 9 60 - 61 - #define OTPTYPE_IPX(ccrev) ((ccrev) == 21 || (ccrev) >= 23) 62 - 63 - #define OTPP_TRIES 10000000 /* # of tries for OTPP */ 64 - 65 - #define MAXNUMRDES 9 /* Maximum OTP redundancy entries */ 66 - 67 - /* Fixed size subregions sizes in words */ 68 - #define OTPGU_CI_SZ 2 69 - 70 - struct otpinfo; 71 - 72 - /* OTP function struct */ 73 - struct otp_fn_s { 74 - int (*init)(struct si_pub *sih, struct otpinfo *oi); 75 - int (*read_region)(struct otpinfo *oi, int region, u16 *data, 76 - uint *wlen); 77 - }; 78 - 79 - struct otpinfo { 80 - struct bcma_device *core; /* chipc core */ 81 - const struct otp_fn_s *fn; /* OTP functions */ 82 - struct si_pub *sih; /* Saved sb handle */ 83 - 84 - /* IPX OTP section */ 85 - u16 wsize; /* Size of otp in words */ 86 - u16 rows; /* Geometry */ 87 - u16 cols; /* Geometry */ 88 - u32 status; /* Flag bits (lock/prog/rv). 89 - * (Reflected only when OTP is power cycled) 90 - */ 91 - u16 hwbase; /* hardware subregion offset */ 92 - u16 hwlim; /* hardware subregion boundary */ 93 - u16 swbase; /* software subregion offset */ 94 - u16 swlim; /* software subregion boundary */ 95 - u16 fbase; /* fuse subregion offset */ 96 - u16 flim; /* fuse subregion boundary */ 97 - int otpgu_base; /* offset to General Use Region */ 98 - }; 99 - 100 - /* OTP layout */ 101 - /* CC revs 21, 24 and 27 OTP General Use Region word offset */ 102 - #define REVA4_OTPGU_BASE 12 103 - 104 - /* CC revs 23, 25, 26, 28 and above OTP General Use Region word offset */ 105 - #define REVB8_OTPGU_BASE 20 106 - 107 - /* CC rev 36 OTP General Use Region word offset */ 108 - #define REV36_OTPGU_BASE 12 109 - 110 - /* Subregion word offsets in General Use region */ 111 - #define OTPGU_HSB_OFF 0 112 - #define OTPGU_SFB_OFF 1 113 - #define OTPGU_CI_OFF 2 114 - #define OTPGU_P_OFF 3 115 - #define OTPGU_SROM_OFF 4 116 - 117 - /* Flag bit offsets in General Use region */ 118 - #define OTPGU_HWP_OFF 60 119 - #define OTPGU_SWP_OFF 61 120 - #define OTPGU_CIP_OFF 62 121 - #define OTPGU_FUSEP_OFF 63 122 - #define OTPGU_CIP_MSK 0x4000 123 - #define OTPGU_P_MSK 0xf000 124 - #define OTPGU_P_SHIFT (OTPGU_HWP_OFF % 16) 125 - 126 - /* OTP Size */ 127 - #define OTP_SZ_FU_324 ((roundup(324, 8))/8) /* 324 bits */ 128 - #define OTP_SZ_FU_288 (288/8) /* 288 bits */ 129 - #define OTP_SZ_FU_216 (216/8) /* 216 bits */ 130 - #define OTP_SZ_FU_72 (72/8) /* 72 bits */ 131 - #define OTP_SZ_CHECKSUM (16/8) /* 16 bits */ 132 - #define OTP4315_SWREG_SZ 178 /* 178 bytes */ 133 - #define OTP_SZ_FU_144 (144/8) /* 144 bits */ 134 - 135 - static u16 136 - ipxotp_otpr(struct otpinfo *oi, uint wn) 137 - { 138 - return bcma_read16(oi->core, 139 - CHIPCREGOFFS(sromotp[wn])); 140 - } 141 - 142 - /* 143 - * Calculate max HW/SW region byte size by subtracting fuse region 144 - * and checksum size, osizew is oi->wsize (OTP size - GU size) in words 145 - */ 146 - static int ipxotp_max_rgnsz(struct si_pub *sih, int osizew) 147 - { 148 - int ret = 0; 149 - 150 - switch (ai_get_chip_id(sih)) { 151 - case BCM43224_CHIP_ID: 152 - case BCM43225_CHIP_ID: 153 - ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM; 154 - break; 155 - case BCM4313_CHIP_ID: 156 - ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM; 157 - break; 158 - default: 159 - break; /* Don't know about this chip */ 160 - } 161 - 162 - return ret; 163 - } 164 - 165 - static void _ipxotp_init(struct otpinfo *oi) 166 - { 167 - uint k; 168 - u32 otpp, st; 169 - int ccrev = ai_get_ccrev(oi->sih); 170 - 171 - 172 - /* 173 - * record word offset of General Use Region 174 - * for various chipcommon revs 175 - */ 176 - if (ccrev == 21 || ccrev == 24 177 - || ccrev == 27) { 178 - oi->otpgu_base = REVA4_OTPGU_BASE; 179 - } else if (ccrev == 36) { 180 - /* 181 - * OTP size greater than equal to 2KB (128 words), 182 - * otpgu_base is similar to rev23 183 - */ 184 - if (oi->wsize >= 128) 185 - oi->otpgu_base = REVB8_OTPGU_BASE; 186 - else 187 - oi->otpgu_base = REV36_OTPGU_BASE; 188 - } else if (ccrev == 23 || ccrev >= 25) { 189 - oi->otpgu_base = REVB8_OTPGU_BASE; 190 - } 191 - 192 - /* First issue an init command so the status is up to date */ 193 - otpp = 194 - OTPP_START_BUSY | ((OTPPOC_INIT << OTPP_OC_SHIFT) & OTPP_OC_MASK); 195 - 196 - bcma_write32(oi->core, CHIPCREGOFFS(otpprog), otpp); 197 - st = bcma_read32(oi->core, CHIPCREGOFFS(otpprog)); 198 - for (k = 0; (st & OTPP_START_BUSY) && (k < OTPP_TRIES); k++) 199 - st = bcma_read32(oi->core, CHIPCREGOFFS(otpprog)); 200 - if (k >= OTPP_TRIES) 201 - return; 202 - 203 - /* Read OTP lock bits and subregion programmed indication bits */ 204 - oi->status = bcma_read32(oi->core, CHIPCREGOFFS(otpstatus)); 205 - 206 - if ((ai_get_chip_id(oi->sih) == BCM43224_CHIP_ID) 207 - || (ai_get_chip_id(oi->sih) == BCM43225_CHIP_ID)) { 208 - u32 p_bits; 209 - p_bits = (ipxotp_otpr(oi, oi->otpgu_base + OTPGU_P_OFF) & 210 - OTPGU_P_MSK) >> OTPGU_P_SHIFT; 211 - oi->status |= (p_bits << OTPS_GUP_SHIFT); 212 - } 213 - 214 - /* 215 - * h/w region base and fuse region limit are fixed to 216 - * the top and the bottom of the general use region. 217 - * Everything else can be flexible. 218 - */ 219 - oi->hwbase = oi->otpgu_base + OTPGU_SROM_OFF; 220 - oi->hwlim = oi->wsize; 221 - if (oi->status & OTPS_GUP_HW) { 222 - oi->hwlim = 223 - ipxotp_otpr(oi, oi->otpgu_base + OTPGU_HSB_OFF) / 16; 224 - oi->swbase = oi->hwlim; 225 - } else 226 - oi->swbase = oi->hwbase; 227 - 228 - /* subtract fuse and checksum from beginning */ 229 - oi->swlim = ipxotp_max_rgnsz(oi->sih, oi->wsize) / 2; 230 - 231 - if (oi->status & OTPS_GUP_SW) { 232 - oi->swlim = 233 - ipxotp_otpr(oi, oi->otpgu_base + OTPGU_SFB_OFF) / 16; 234 - oi->fbase = oi->swlim; 235 - } else 236 - oi->fbase = oi->swbase; 237 - 238 - oi->flim = oi->wsize; 239 - } 240 - 241 - static int ipxotp_init(struct si_pub *sih, struct otpinfo *oi) 242 - { 243 - /* Make sure we're running IPX OTP */ 244 - if (!OTPTYPE_IPX(ai_get_ccrev(sih))) 245 - return -EBADE; 246 - 247 - /* Make sure OTP is not disabled */ 248 - if (ai_is_otp_disabled(sih)) 249 - return -EBADE; 250 - 251 - /* Check for otp size */ 252 - switch ((ai_get_cccaps(sih) & CC_CAP_OTPSIZE) >> CC_CAP_OTPSIZE_SHIFT) { 253 - case 0: 254 - /* Nothing there */ 255 - return -EBADE; 256 - case 1: /* 32x64 */ 257 - oi->rows = 32; 258 - oi->cols = 64; 259 - oi->wsize = 128; 260 - break; 261 - case 2: /* 64x64 */ 262 - oi->rows = 64; 263 - oi->cols = 64; 264 - oi->wsize = 256; 265 - break; 266 - case 5: /* 96x64 */ 267 - oi->rows = 96; 268 - oi->cols = 64; 269 - oi->wsize = 384; 270 - break; 271 - case 7: /* 16x64 *//* 1024 bits */ 272 - oi->rows = 16; 273 - oi->cols = 64; 274 - oi->wsize = 64; 275 - break; 276 - default: 277 - /* Don't know the geometry */ 278 - return -EBADE; 279 - } 280 - 281 - /* Retrieve OTP region info */ 282 - _ipxotp_init(oi); 283 - return 0; 284 - } 285 - 286 - static int 287 - ipxotp_read_region(struct otpinfo *oi, int region, u16 *data, uint *wlen) 288 - { 289 - uint base, i, sz; 290 - 291 - /* Validate region selection */ 292 - switch (region) { 293 - case OTP_HW_RGN: 294 - sz = (uint) oi->hwlim - oi->hwbase; 295 - if (!(oi->status & OTPS_GUP_HW)) { 296 - *wlen = sz; 297 - return -ENODATA; 298 - } 299 - if (*wlen < sz) { 300 - *wlen = sz; 301 - return -EOVERFLOW; 302 - } 303 - base = oi->hwbase; 304 - break; 305 - case OTP_SW_RGN: 306 - sz = ((uint) oi->swlim - oi->swbase); 307 - if (!(oi->status & OTPS_GUP_SW)) { 308 - *wlen = sz; 309 - return -ENODATA; 310 - } 311 - if (*wlen < sz) { 312 - *wlen = sz; 313 - return -EOVERFLOW; 314 - } 315 - base = oi->swbase; 316 - break; 317 - case OTP_CI_RGN: 318 - sz = OTPGU_CI_SZ; 319 - if (!(oi->status & OTPS_GUP_CI)) { 320 - *wlen = sz; 321 - return -ENODATA; 322 - } 323 - if (*wlen < sz) { 324 - *wlen = sz; 325 - return -EOVERFLOW; 326 - } 327 - base = oi->otpgu_base + OTPGU_CI_OFF; 328 - break; 329 - case OTP_FUSE_RGN: 330 - sz = (uint) oi->flim - oi->fbase; 331 - if (!(oi->status & OTPS_GUP_FUSE)) { 332 - *wlen = sz; 333 - return -ENODATA; 334 - } 335 - if (*wlen < sz) { 336 - *wlen = sz; 337 - return -EOVERFLOW; 338 - } 339 - base = oi->fbase; 340 - break; 341 - case OTP_ALL_RGN: 342 - sz = ((uint) oi->flim - oi->hwbase); 343 - if (!(oi->status & (OTPS_GUP_HW | OTPS_GUP_SW))) { 344 - *wlen = sz; 345 - return -ENODATA; 346 - } 347 - if (*wlen < sz) { 348 - *wlen = sz; 349 - return -EOVERFLOW; 350 - } 351 - base = oi->hwbase; 352 - break; 353 - default: 354 - return -EINVAL; 355 - } 356 - 357 - /* Read the data */ 358 - for (i = 0; i < sz; i++) 359 - data[i] = ipxotp_otpr(oi, base + i); 360 - 361 - *wlen = sz; 362 - return 0; 363 - } 364 - 365 - static const struct otp_fn_s ipxotp_fn = { 366 - (int (*)(struct si_pub *, struct otpinfo *)) ipxotp_init, 367 - (int (*)(struct otpinfo *, int, u16 *, uint *)) ipxotp_read_region, 368 - }; 369 - 370 - static int otp_init(struct si_pub *sih, struct otpinfo *oi) 371 - { 372 - int ret; 373 - 374 - memset(oi, 0, sizeof(struct otpinfo)); 375 - 376 - oi->core = ai_findcore(sih, BCMA_CORE_CHIPCOMMON, 0); 377 - 378 - if (OTPTYPE_IPX(ai_get_ccrev(sih))) 379 - oi->fn = &ipxotp_fn; 380 - 381 - if (oi->fn == NULL) 382 - return -EBADE; 383 - 384 - oi->sih = sih; 385 - 386 - ret = (oi->fn->init)(sih, oi); 387 - 388 - return ret; 389 - } 390 - 391 - int 392 - otp_read_region(struct si_pub *sih, int region, u16 *data, uint *wlen) { 393 - struct otpinfo otpinfo; 394 - struct otpinfo *oi = &otpinfo; 395 - int err = 0; 396 - 397 - if (ai_is_otp_disabled(sih)) { 398 - err = -EPERM; 399 - goto out; 400 - } 401 - 402 - err = otp_init(sih, oi); 403 - if (err) 404 - goto out; 405 - 406 - err = ((oi)->fn->read_region)(oi, region, data, wlen); 407 - 408 - out: 409 - return err; 410 - }
-36
drivers/net/wireless/brcm80211/brcmsmac/otp.h
··· 1 - /* 2 - * Copyright (c) 2010 Broadcom Corporation 3 - * 4 - * Permission to use, copy, modify, and/or distribute this software for any 5 - * purpose with or without fee is hereby granted, provided that the above 6 - * copyright notice and this permission notice appear in all copies. 7 - * 8 - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 - */ 16 - 17 - #ifndef _BRCM_OTP_H_ 18 - #define _BRCM_OTP_H_ 19 - 20 - #include "types.h" 21 - 22 - /* OTP regions */ 23 - #define OTP_HW_RGN 1 24 - #define OTP_SW_RGN 2 25 - #define OTP_CI_RGN 4 26 - #define OTP_FUSE_RGN 8 27 - /* From h/w region to end of OTP including checksum */ 28 - #define OTP_ALL_RGN 0xf 29 - 30 - /* OTP Size */ 31 - #define OTP_SZ_MAX (6144/8) /* maximum bytes in one CIS */ 32 - 33 - extern int otp_read_region(struct si_pub *sih, int region, u16 *data, 34 - uint *wlen); 35 - 36 - #endif /* _BRCM_OTP_H_ */
+25 -42
drivers/net/wireless/brcm80211/brcmsmac/phy/phy_lcn.c
··· 4817 4817 s8 txpwr = 0; 4818 4818 int i; 4819 4819 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; 4820 - struct phy_shim_info *shim = pi->sh->physhim; 4820 + struct ssb_sprom *sprom = &pi->d11core->bus->sprom; 4821 4821 4822 4822 if (CHSPEC_IS2G(pi->radio_chanspec)) { 4823 4823 u16 cckpo = 0; 4824 4824 u32 offset_ofdm, offset_mcs; 4825 4825 4826 - pi_lcn->lcnphy_tr_isolation_mid = 4827 - (u8)wlapi_getintvar(shim, BRCMS_SROM_TRISO2G); 4826 + pi_lcn->lcnphy_tr_isolation_mid = sprom->fem.ghz2.tr_iso; 4828 4827 4829 - pi_lcn->lcnphy_rx_power_offset = 4830 - (u8)wlapi_getintvar(shim, BRCMS_SROM_RXPO2G); 4828 + pi_lcn->lcnphy_rx_power_offset = sprom->rxpo2g; 4831 4829 4832 - pi->txpa_2g[0] = (s16)wlapi_getintvar(shim, BRCMS_SROM_PA0B0); 4833 - pi->txpa_2g[1] = (s16)wlapi_getintvar(shim, BRCMS_SROM_PA0B1); 4834 - pi->txpa_2g[2] = (s16)wlapi_getintvar(shim, BRCMS_SROM_PA0B2); 4830 + pi->txpa_2g[0] = sprom->pa0b0; 4831 + pi->txpa_2g[1] = sprom->pa0b1; 4832 + pi->txpa_2g[2] = sprom->pa0b2; 4835 4833 4836 - pi_lcn->lcnphy_rssi_vf = 4837 - (u8)wlapi_getintvar(shim, BRCMS_SROM_RSSISMF2G); 4838 - pi_lcn->lcnphy_rssi_vc = 4839 - (u8)wlapi_getintvar(shim, BRCMS_SROM_RSSISMC2G); 4840 - pi_lcn->lcnphy_rssi_gs = 4841 - (u8)wlapi_getintvar(shim, BRCMS_SROM_RSSISAV2G); 4834 + pi_lcn->lcnphy_rssi_vf = sprom->rssismf2g; 4835 + pi_lcn->lcnphy_rssi_vc = sprom->rssismc2g; 4836 + pi_lcn->lcnphy_rssi_gs = sprom->rssisav2g; 4842 4837 4843 4838 pi_lcn->lcnphy_rssi_vf_lowtemp = pi_lcn->lcnphy_rssi_vf; 4844 4839 pi_lcn->lcnphy_rssi_vc_lowtemp = pi_lcn->lcnphy_rssi_vc; ··· 4843 4848 pi_lcn->lcnphy_rssi_vc_hightemp = pi_lcn->lcnphy_rssi_vc; 4844 4849 pi_lcn->lcnphy_rssi_gs_hightemp = pi_lcn->lcnphy_rssi_gs; 4845 4850 4846 - txpwr = (s8)wlapi_getintvar(shim, BRCMS_SROM_MAXP2GA0); 4851 + txpwr = sprom->core_pwr_info[0].maxpwr_2g; 4847 4852 pi->tx_srom_max_2g = txpwr; 4848 4853 4849 4854 for (i = 0; i < PWRTBL_NUM_COEFF; i++) { ··· 4851 4856 pi->txpa_2g_high_temp[i] = pi->txpa_2g[i]; 4852 4857 } 4853 4858 4854 - cckpo = (u16)wlapi_getintvar(shim, BRCMS_SROM_CCK2GPO); 4855 - offset_ofdm = (u32)wlapi_getintvar(shim, BRCMS_SROM_OFDM2GPO); 4859 + cckpo = sprom->cck2gpo; 4860 + offset_ofdm = sprom->ofdm2gpo; 4856 4861 if (cckpo) { 4857 4862 uint max_pwr_chan = txpwr; 4858 4863 ··· 4871 4876 } else { 4872 4877 u8 opo = 0; 4873 4878 4874 - opo = (u8)wlapi_getintvar(shim, BRCMS_SROM_OPO); 4879 + opo = sprom->opo; 4875 4880 4876 4881 for (i = TXP_FIRST_CCK; i <= TXP_LAST_CCK; i++) 4877 4882 pi->tx_srom_max_rate_2g[i] = txpwr; ··· 4881 4886 ((offset_ofdm & 0xf) * 2); 4882 4887 offset_ofdm >>= 4; 4883 4888 } 4884 - offset_mcs = 4885 - wlapi_getintvar(shim, 4886 - BRCMS_SROM_MCS2GPO1) << 16; 4887 - offset_mcs |= 4888 - (u16) wlapi_getintvar(shim, 4889 - BRCMS_SROM_MCS2GPO0); 4889 + offset_mcs = sprom->mcs2gpo[1] << 16; 4890 + offset_mcs |= sprom->mcs2gpo[0]; 4890 4891 pi_lcn->lcnphy_mcs20_po = offset_mcs; 4891 4892 for (i = TXP_FIRST_SISO_MCS_20; 4892 4893 i <= TXP_LAST_SISO_MCS_20; i++) { ··· 4892 4901 } 4893 4902 } 4894 4903 4895 - pi_lcn->lcnphy_rawtempsense = 4896 - (u16)wlapi_getintvar(shim, BRCMS_SROM_RAWTEMPSENSE); 4897 - pi_lcn->lcnphy_measPower = 4898 - (u8)wlapi_getintvar(shim, BRCMS_SROM_MEASPOWER); 4899 - pi_lcn->lcnphy_tempsense_slope = 4900 - (u8)wlapi_getintvar(shim, BRCMS_SROM_TEMPSENSE_SLOPE); 4901 - pi_lcn->lcnphy_hw_iqcal_en = 4902 - (bool)wlapi_getintvar(shim, BRCMS_SROM_HW_IQCAL_EN); 4903 - pi_lcn->lcnphy_iqcal_swp_dis = 4904 - (bool)wlapi_getintvar(shim, BRCMS_SROM_IQCAL_SWP_DIS); 4905 - pi_lcn->lcnphy_tempcorrx = 4906 - (u8)wlapi_getintvar(shim, BRCMS_SROM_TEMPCORRX); 4907 - pi_lcn->lcnphy_tempsense_option = 4908 - (u8)wlapi_getintvar(shim, BRCMS_SROM_TEMPSENSE_OPTION); 4909 - pi_lcn->lcnphy_freqoffset_corr = 4910 - (u8)wlapi_getintvar(shim, BRCMS_SROM_FREQOFFSET_CORR); 4911 - if ((u8)wlapi_getintvar(shim, BRCMS_SROM_AA2G) > 1) 4904 + pi_lcn->lcnphy_rawtempsense = sprom->rawtempsense; 4905 + pi_lcn->lcnphy_measPower = sprom->measpower; 4906 + pi_lcn->lcnphy_tempsense_slope = sprom->tempsense_slope; 4907 + pi_lcn->lcnphy_hw_iqcal_en = sprom->hw_iqcal_en; 4908 + pi_lcn->lcnphy_iqcal_swp_dis = sprom->iqcal_swp_dis; 4909 + pi_lcn->lcnphy_tempcorrx = sprom->tempcorrx; 4910 + pi_lcn->lcnphy_tempsense_option = sprom->tempsense_option; 4911 + pi_lcn->lcnphy_freqoffset_corr = sprom->freqoffset_corr; 4912 + if (sprom->ant_available_bg > 1) 4912 4913 wlc_phy_ant_rxdiv_set((struct brcms_phy_pub *) pi, 4913 - (u8) wlapi_getintvar(shim, BRCMS_SROM_AA2G)); 4914 + sprom->ant_available_bg); 4914 4915 } 4915 4916 pi_lcn->lcnphy_cck_dig_filt_type = -1; 4916 4917
+98 -215
drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c
··· 14386 14386 { 14387 14387 u16 bw40po, cddpo, stbcpo, bwduppo; 14388 14388 uint band_num; 14389 - struct phy_shim_info *shim = pi->sh->physhim; 14389 + struct ssb_sprom *sprom = &pi->d11core->bus->sprom; 14390 14390 14391 14391 if (pi->sh->sromrev >= 9) 14392 14392 return; 14393 14393 14394 - bw40po = (u16) wlapi_getintvar(shim, BRCMS_SROM_BW40PO); 14394 + bw40po = sprom->bw40po; 14395 14395 pi->bw402gpo = bw40po & 0xf; 14396 14396 pi->bw405gpo = (bw40po & 0xf0) >> 4; 14397 14397 pi->bw405glpo = (bw40po & 0xf00) >> 8; 14398 14398 pi->bw405ghpo = (bw40po & 0xf000) >> 12; 14399 14399 14400 - cddpo = (u16) wlapi_getintvar(shim, BRCMS_SROM_CDDPO); 14400 + cddpo = sprom->cddpo; 14401 14401 pi->cdd2gpo = cddpo & 0xf; 14402 14402 pi->cdd5gpo = (cddpo & 0xf0) >> 4; 14403 14403 pi->cdd5glpo = (cddpo & 0xf00) >> 8; 14404 14404 pi->cdd5ghpo = (cddpo & 0xf000) >> 12; 14405 14405 14406 - stbcpo = (u16) wlapi_getintvar(shim, BRCMS_SROM_STBCPO); 14406 + stbcpo = sprom->stbcpo; 14407 14407 pi->stbc2gpo = stbcpo & 0xf; 14408 14408 pi->stbc5gpo = (stbcpo & 0xf0) >> 4; 14409 14409 pi->stbc5glpo = (stbcpo & 0xf00) >> 8; 14410 14410 pi->stbc5ghpo = (stbcpo & 0xf000) >> 12; 14411 14411 14412 - bwduppo = (u16) wlapi_getintvar(shim, BRCMS_SROM_BWDUPPO); 14412 + bwduppo = sprom->bwduppo; 14413 14413 pi->bwdup2gpo = bwduppo & 0xf; 14414 14414 pi->bwdup5gpo = (bwduppo & 0xf0) >> 4; 14415 14415 pi->bwdup5glpo = (bwduppo & 0xf00) >> 8; ··· 14419 14419 band_num++) { 14420 14420 switch (band_num) { 14421 14421 case 0: 14422 - 14423 14422 pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_2g = 14424 - (s8) wlapi_getintvar(shim, 14425 - BRCMS_SROM_MAXP2GA0); 14423 + sprom->core_pwr_info[0].maxpwr_2g; 14426 14424 pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_2g = 14427 - (s8) wlapi_getintvar(shim, 14428 - BRCMS_SROM_MAXP2GA1); 14425 + sprom->core_pwr_info[1].maxpwr_2g; 14429 14426 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_a1 = 14430 - (s16) wlapi_getintvar(shim, 14431 - BRCMS_SROM_PA2GW0A0); 14427 + sprom->core_pwr_info[0].pa_2g[0]; 14432 14428 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_a1 = 14433 - (s16) wlapi_getintvar(shim, 14434 - BRCMS_SROM_PA2GW0A1); 14429 + sprom->core_pwr_info[1].pa_2g[0]; 14435 14430 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b0 = 14436 - (s16) wlapi_getintvar(shim, 14437 - BRCMS_SROM_PA2GW1A0); 14431 + sprom->core_pwr_info[0].pa_2g[1]; 14438 14432 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b0 = 14439 - (s16) wlapi_getintvar(shim, 14440 - BRCMS_SROM_PA2GW1A1); 14433 + sprom->core_pwr_info[1].pa_2g[1]; 14441 14434 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b1 = 14442 - (s16) wlapi_getintvar(shim, 14443 - BRCMS_SROM_PA2GW2A0); 14435 + sprom->core_pwr_info[0].pa_2g[2]; 14444 14436 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b1 = 14445 - (s16) wlapi_getintvar(shim, 14446 - BRCMS_SROM_PA2GW2A1); 14437 + sprom->core_pwr_info[1].pa_2g[2]; 14447 14438 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_2g = 14448 - (s8) wlapi_getintvar(shim, BRCMS_SROM_ITT2GA0); 14439 + sprom->core_pwr_info[0].itssi_2g; 14449 14440 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_2g = 14450 - (s8) wlapi_getintvar(shim, BRCMS_SROM_ITT2GA1); 14441 + sprom->core_pwr_info[1].itssi_2g; 14451 14442 14452 - pi->cck2gpo = (u16) wlapi_getintvar(shim, 14453 - BRCMS_SROM_CCK2GPO); 14443 + pi->cck2gpo = sprom->cck2gpo; 14454 14444 14455 - pi->ofdm2gpo = 14456 - (u32) wlapi_getintvar(shim, 14457 - BRCMS_SROM_OFDM2GPO); 14445 + pi->ofdm2gpo = sprom->ofdm2gpo; 14458 14446 14459 - pi->mcs2gpo[0] = 14460 - (u16) wlapi_getintvar(shim, 14461 - BRCMS_SROM_MCS2GPO0); 14462 - pi->mcs2gpo[1] = 14463 - (u16) wlapi_getintvar(shim, 14464 - BRCMS_SROM_MCS2GPO1); 14465 - pi->mcs2gpo[2] = 14466 - (u16) wlapi_getintvar(shim, 14467 - BRCMS_SROM_MCS2GPO2); 14468 - pi->mcs2gpo[3] = 14469 - (u16) wlapi_getintvar(shim, 14470 - BRCMS_SROM_MCS2GPO3); 14471 - pi->mcs2gpo[4] = 14472 - (u16) wlapi_getintvar(shim, 14473 - BRCMS_SROM_MCS2GPO4); 14474 - pi->mcs2gpo[5] = 14475 - (u16) wlapi_getintvar(shim, 14476 - BRCMS_SROM_MCS2GPO5); 14477 - pi->mcs2gpo[6] = 14478 - (u16) wlapi_getintvar(shim, 14479 - BRCMS_SROM_MCS2GPO6); 14480 - pi->mcs2gpo[7] = 14481 - (u16) wlapi_getintvar(shim, 14482 - BRCMS_SROM_MCS2GPO7); 14447 + pi->mcs2gpo[0] = sprom->mcs2gpo[0]; 14448 + pi->mcs2gpo[1] = sprom->mcs2gpo[1]; 14449 + pi->mcs2gpo[2] = sprom->mcs2gpo[2]; 14450 + pi->mcs2gpo[3] = sprom->mcs2gpo[3]; 14451 + pi->mcs2gpo[4] = sprom->mcs2gpo[4]; 14452 + pi->mcs2gpo[5] = sprom->mcs2gpo[5]; 14453 + pi->mcs2gpo[6] = sprom->mcs2gpo[6]; 14454 + pi->mcs2gpo[7] = sprom->mcs2gpo[7]; 14483 14455 break; 14484 14456 case 1: 14485 14457 14486 14458 pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_5gm = 14487 - (s8) wlapi_getintvar(shim, BRCMS_SROM_MAXP5GA0); 14459 + sprom->core_pwr_info[0].maxpwr_5g; 14488 14460 pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_5gm = 14489 - (s8) wlapi_getintvar(shim, 14490 - BRCMS_SROM_MAXP5GA1); 14461 + sprom->core_pwr_info[1].maxpwr_5g; 14491 14462 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_a1 = 14492 - (s16) wlapi_getintvar(shim, 14493 - BRCMS_SROM_PA5GW0A0); 14463 + sprom->core_pwr_info[0].pa_5g[0]; 14494 14464 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_a1 = 14495 - (s16) wlapi_getintvar(shim, 14496 - BRCMS_SROM_PA5GW0A1); 14465 + sprom->core_pwr_info[1].pa_5g[0]; 14497 14466 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b0 = 14498 - (s16) wlapi_getintvar(shim, 14499 - BRCMS_SROM_PA5GW1A0); 14467 + sprom->core_pwr_info[0].pa_5g[1]; 14500 14468 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b0 = 14501 - (s16) wlapi_getintvar(shim, 14502 - BRCMS_SROM_PA5GW1A1); 14469 + sprom->core_pwr_info[1].pa_5g[1]; 14503 14470 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b1 = 14504 - (s16) wlapi_getintvar(shim, 14505 - BRCMS_SROM_PA5GW2A0); 14471 + sprom->core_pwr_info[0].pa_5g[2]; 14506 14472 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b1 = 14507 - (s16) wlapi_getintvar(shim, 14508 - BRCMS_SROM_PA5GW2A1); 14473 + sprom->core_pwr_info[1].pa_5g[2]; 14509 14474 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_5gm = 14510 - (s8) wlapi_getintvar(shim, BRCMS_SROM_ITT5GA0); 14475 + sprom->core_pwr_info[0].itssi_5g; 14511 14476 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_5gm = 14512 - (s8) wlapi_getintvar(shim, BRCMS_SROM_ITT5GA1); 14477 + sprom->core_pwr_info[1].itssi_5g; 14513 14478 14514 - pi->ofdm5gpo = 14515 - (u32) wlapi_getintvar(shim, 14516 - BRCMS_SROM_OFDM5GPO); 14479 + pi->ofdm5gpo = sprom->ofdm5gpo; 14517 14480 14518 - pi->mcs5gpo[0] = 14519 - (u16) wlapi_getintvar(shim, 14520 - BRCMS_SROM_MCS5GPO0); 14521 - pi->mcs5gpo[1] = 14522 - (u16) wlapi_getintvar(shim, 14523 - BRCMS_SROM_MCS5GPO1); 14524 - pi->mcs5gpo[2] = 14525 - (u16) wlapi_getintvar(shim, 14526 - BRCMS_SROM_MCS5GPO2); 14527 - pi->mcs5gpo[3] = 14528 - (u16) wlapi_getintvar(shim, 14529 - BRCMS_SROM_MCS5GPO3); 14530 - pi->mcs5gpo[4] = 14531 - (u16) wlapi_getintvar(shim, 14532 - BRCMS_SROM_MCS5GPO4); 14533 - pi->mcs5gpo[5] = 14534 - (u16) wlapi_getintvar(shim, 14535 - BRCMS_SROM_MCS5GPO5); 14536 - pi->mcs5gpo[6] = 14537 - (u16) wlapi_getintvar(shim, 14538 - BRCMS_SROM_MCS5GPO6); 14539 - pi->mcs5gpo[7] = 14540 - (u16) wlapi_getintvar(shim, 14541 - BRCMS_SROM_MCS5GPO7); 14481 + pi->mcs5gpo[0] = sprom->mcs5gpo[0]; 14482 + pi->mcs5gpo[1] = sprom->mcs5gpo[1]; 14483 + pi->mcs5gpo[2] = sprom->mcs5gpo[2]; 14484 + pi->mcs5gpo[3] = sprom->mcs5gpo[3]; 14485 + pi->mcs5gpo[4] = sprom->mcs5gpo[4]; 14486 + pi->mcs5gpo[5] = sprom->mcs5gpo[5]; 14487 + pi->mcs5gpo[6] = sprom->mcs5gpo[6]; 14488 + pi->mcs5gpo[7] = sprom->mcs5gpo[7]; 14542 14489 break; 14543 14490 case 2: 14544 14491 14545 14492 pi->nphy_pwrctrl_info[0].max_pwr_5gl = 14546 - (s8) wlapi_getintvar(shim, 14547 - BRCMS_SROM_MAXP5GLA0); 14493 + sprom->core_pwr_info[0].maxpwr_5gl; 14548 14494 pi->nphy_pwrctrl_info[1].max_pwr_5gl = 14549 - (s8) wlapi_getintvar(shim, 14550 - BRCMS_SROM_MAXP5GLA1); 14495 + sprom->core_pwr_info[1].maxpwr_5gl; 14551 14496 pi->nphy_pwrctrl_info[0].pwrdet_5gl_a1 = 14552 - (s16) wlapi_getintvar(shim, 14553 - BRCMS_SROM_PA5GLW0A0); 14497 + sprom->core_pwr_info[0].pa_5gl[0]; 14554 14498 pi->nphy_pwrctrl_info[1].pwrdet_5gl_a1 = 14555 - (s16) wlapi_getintvar(shim, 14556 - BRCMS_SROM_PA5GLW0A1); 14499 + sprom->core_pwr_info[1].pa_5gl[0]; 14557 14500 pi->nphy_pwrctrl_info[0].pwrdet_5gl_b0 = 14558 - (s16) wlapi_getintvar(shim, 14559 - BRCMS_SROM_PA5GLW1A0); 14501 + sprom->core_pwr_info[0].pa_5gl[1]; 14560 14502 pi->nphy_pwrctrl_info[1].pwrdet_5gl_b0 = 14561 - (s16) wlapi_getintvar(shim, 14562 - BRCMS_SROM_PA5GLW1A1); 14503 + sprom->core_pwr_info[1].pa_5gl[1]; 14563 14504 pi->nphy_pwrctrl_info[0].pwrdet_5gl_b1 = 14564 - (s16) wlapi_getintvar(shim, 14565 - BRCMS_SROM_PA5GLW2A0); 14505 + sprom->core_pwr_info[0].pa_5gl[2]; 14566 14506 pi->nphy_pwrctrl_info[1].pwrdet_5gl_b1 = 14567 - (s16) wlapi_getintvar(shim, 14568 - BRCMS_SROM_PA5GLW2A1); 14507 + sprom->core_pwr_info[1].pa_5gl[2]; 14569 14508 pi->nphy_pwrctrl_info[0].idle_targ_5gl = 0; 14570 14509 pi->nphy_pwrctrl_info[1].idle_targ_5gl = 0; 14571 14510 14572 - pi->ofdm5glpo = 14573 - (u32) wlapi_getintvar(shim, 14574 - BRCMS_SROM_OFDM5GLPO); 14511 + pi->ofdm5glpo = sprom->ofdm5glpo; 14575 14512 14576 - pi->mcs5glpo[0] = 14577 - (u16) wlapi_getintvar(shim, 14578 - BRCMS_SROM_MCS5GLPO0); 14579 - pi->mcs5glpo[1] = 14580 - (u16) wlapi_getintvar(shim, 14581 - BRCMS_SROM_MCS5GLPO1); 14582 - pi->mcs5glpo[2] = 14583 - (u16) wlapi_getintvar(shim, 14584 - BRCMS_SROM_MCS5GLPO2); 14585 - pi->mcs5glpo[3] = 14586 - (u16) wlapi_getintvar(shim, 14587 - BRCMS_SROM_MCS5GLPO3); 14588 - pi->mcs5glpo[4] = 14589 - (u16) wlapi_getintvar(shim, 14590 - BRCMS_SROM_MCS5GLPO4); 14591 - pi->mcs5glpo[5] = 14592 - (u16) wlapi_getintvar(shim, 14593 - BRCMS_SROM_MCS5GLPO5); 14594 - pi->mcs5glpo[6] = 14595 - (u16) wlapi_getintvar(shim, 14596 - BRCMS_SROM_MCS5GLPO6); 14597 - pi->mcs5glpo[7] = 14598 - (u16) wlapi_getintvar(shim, 14599 - BRCMS_SROM_MCS5GLPO7); 14513 + pi->mcs5glpo[0] = sprom->mcs5glpo[0]; 14514 + pi->mcs5glpo[1] = sprom->mcs5glpo[1]; 14515 + pi->mcs5glpo[2] = sprom->mcs5glpo[2]; 14516 + pi->mcs5glpo[3] = sprom->mcs5glpo[3]; 14517 + pi->mcs5glpo[4] = sprom->mcs5glpo[4]; 14518 + pi->mcs5glpo[5] = sprom->mcs5glpo[5]; 14519 + pi->mcs5glpo[6] = sprom->mcs5glpo[6]; 14520 + pi->mcs5glpo[7] = sprom->mcs5glpo[7]; 14600 14521 break; 14601 14522 case 3: 14602 14523 14603 14524 pi->nphy_pwrctrl_info[0].max_pwr_5gh = 14604 - (s8) wlapi_getintvar(shim, 14605 - BRCMS_SROM_MAXP5GHA0); 14525 + sprom->core_pwr_info[0].maxpwr_5gh; 14606 14526 pi->nphy_pwrctrl_info[1].max_pwr_5gh = 14607 - (s8) wlapi_getintvar(shim, 14608 - BRCMS_SROM_MAXP5GHA1); 14527 + sprom->core_pwr_info[1].maxpwr_5gh; 14609 14528 pi->nphy_pwrctrl_info[0].pwrdet_5gh_a1 = 14610 - (s16) wlapi_getintvar(shim, 14611 - BRCMS_SROM_PA5GHW0A0); 14529 + sprom->core_pwr_info[0].pa_5gh[0]; 14612 14530 pi->nphy_pwrctrl_info[1].pwrdet_5gh_a1 = 14613 - (s16) wlapi_getintvar(shim, 14614 - BRCMS_SROM_PA5GHW0A1); 14531 + sprom->core_pwr_info[1].pa_5gh[0]; 14615 14532 pi->nphy_pwrctrl_info[0].pwrdet_5gh_b0 = 14616 - (s16) wlapi_getintvar(shim, 14617 - BRCMS_SROM_PA5GHW1A0); 14533 + sprom->core_pwr_info[0].pa_5gh[1]; 14618 14534 pi->nphy_pwrctrl_info[1].pwrdet_5gh_b0 = 14619 - (s16) wlapi_getintvar(shim, 14620 - BRCMS_SROM_PA5GHW1A1); 14535 + sprom->core_pwr_info[1].pa_5gh[1]; 14621 14536 pi->nphy_pwrctrl_info[0].pwrdet_5gh_b1 = 14622 - (s16) wlapi_getintvar(shim, 14623 - BRCMS_SROM_PA5GHW2A0); 14537 + sprom->core_pwr_info[0].pa_5gh[2]; 14624 14538 pi->nphy_pwrctrl_info[1].pwrdet_5gh_b1 = 14625 - (s16) wlapi_getintvar(shim, 14626 - BRCMS_SROM_PA5GHW2A1); 14539 + sprom->core_pwr_info[1].pa_5gh[2]; 14627 14540 pi->nphy_pwrctrl_info[0].idle_targ_5gh = 0; 14628 14541 pi->nphy_pwrctrl_info[1].idle_targ_5gh = 0; 14629 14542 14630 - pi->ofdm5ghpo = 14631 - (u32) wlapi_getintvar(shim, 14632 - BRCMS_SROM_OFDM5GHPO); 14543 + pi->ofdm5ghpo = sprom->ofdm5ghpo; 14633 14544 14634 - pi->mcs5ghpo[0] = 14635 - (u16) wlapi_getintvar(shim, 14636 - BRCMS_SROM_MCS5GHPO0); 14637 - pi->mcs5ghpo[1] = 14638 - (u16) wlapi_getintvar(shim, 14639 - BRCMS_SROM_MCS5GHPO1); 14640 - pi->mcs5ghpo[2] = 14641 - (u16) wlapi_getintvar(shim, 14642 - BRCMS_SROM_MCS5GHPO2); 14643 - pi->mcs5ghpo[3] = 14644 - (u16) wlapi_getintvar(shim, 14645 - BRCMS_SROM_MCS5GHPO3); 14646 - pi->mcs5ghpo[4] = 14647 - (u16) wlapi_getintvar(shim, 14648 - BRCMS_SROM_MCS5GHPO4); 14649 - pi->mcs5ghpo[5] = 14650 - (u16) wlapi_getintvar(shim, 14651 - BRCMS_SROM_MCS5GHPO5); 14652 - pi->mcs5ghpo[6] = 14653 - (u16) wlapi_getintvar(shim, 14654 - BRCMS_SROM_MCS5GHPO6); 14655 - pi->mcs5ghpo[7] = 14656 - (u16) wlapi_getintvar(shim, 14657 - BRCMS_SROM_MCS5GHPO7); 14545 + pi->mcs5ghpo[0] = sprom->mcs5ghpo[0]; 14546 + pi->mcs5ghpo[1] = sprom->mcs5ghpo[1]; 14547 + pi->mcs5ghpo[2] = sprom->mcs5ghpo[2]; 14548 + pi->mcs5ghpo[3] = sprom->mcs5ghpo[3]; 14549 + pi->mcs5ghpo[4] = sprom->mcs5ghpo[4]; 14550 + pi->mcs5ghpo[5] = sprom->mcs5ghpo[5]; 14551 + pi->mcs5ghpo[6] = sprom->mcs5ghpo[6]; 14552 + pi->mcs5ghpo[7] = sprom->mcs5ghpo[7]; 14658 14553 break; 14659 14554 } 14660 14555 } ··· 14559 14664 14560 14665 static bool wlc_phy_txpwr_srom_read_nphy(struct brcms_phy *pi) 14561 14666 { 14562 - struct phy_shim_info *shim = pi->sh->physhim; 14667 + struct ssb_sprom *sprom = &pi->d11core->bus->sprom; 14563 14668 14564 - pi->antswitch = (u8) wlapi_getintvar(shim, BRCMS_SROM_ANTSWITCH); 14565 - pi->aa2g = (u8) wlapi_getintvar(shim, BRCMS_SROM_AA2G); 14566 - pi->aa5g = (u8) wlapi_getintvar(shim, BRCMS_SROM_AA5G); 14669 + pi->antswitch = sprom->antswitch; 14670 + pi->aa2g = sprom->ant_available_bg; 14671 + pi->aa5g = sprom->ant_available_a; 14567 14672 14568 - pi->srom_fem2g.tssipos = (u8) wlapi_getintvar(shim, 14569 - BRCMS_SROM_TSSIPOS2G); 14570 - pi->srom_fem2g.extpagain = (u8) wlapi_getintvar(shim, 14571 - BRCMS_SROM_EXTPAGAIN2G); 14572 - pi->srom_fem2g.pdetrange = (u8) wlapi_getintvar(shim, 14573 - BRCMS_SROM_PDETRANGE2G); 14574 - pi->srom_fem2g.triso = (u8) wlapi_getintvar(shim, BRCMS_SROM_TRISO2G); 14575 - pi->srom_fem2g.antswctrllut = 14576 - (u8) wlapi_getintvar(shim, BRCMS_SROM_ANTSWCTL2G); 14673 + pi->srom_fem2g.tssipos = sprom->fem.ghz2.tssipos; 14674 + pi->srom_fem2g.extpagain = sprom->fem.ghz2.extpa_gain; 14675 + pi->srom_fem2g.pdetrange = sprom->fem.ghz2.pdet_range; 14676 + pi->srom_fem2g.triso = sprom->fem.ghz2.tr_iso; 14677 + pi->srom_fem2g.antswctrllut = sprom->fem.ghz2.antswlut; 14577 14678 14578 - pi->srom_fem5g.tssipos = (u8) wlapi_getintvar(shim, 14579 - BRCMS_SROM_TSSIPOS5G); 14580 - pi->srom_fem5g.extpagain = (u8) wlapi_getintvar(shim, 14581 - BRCMS_SROM_EXTPAGAIN5G); 14582 - pi->srom_fem5g.pdetrange = (u8) wlapi_getintvar(shim, 14583 - BRCMS_SROM_PDETRANGE5G); 14584 - pi->srom_fem5g.triso = (u8) wlapi_getintvar(shim, BRCMS_SROM_TRISO5G); 14585 - if (wlapi_getvar(shim, BRCMS_SROM_ANTSWCTL5G)) 14586 - pi->srom_fem5g.antswctrllut = 14587 - (u8) wlapi_getintvar(shim, BRCMS_SROM_ANTSWCTL5G); 14679 + pi->srom_fem5g.tssipos = sprom->fem.ghz5.tssipos; 14680 + pi->srom_fem5g.extpagain = sprom->fem.ghz5.extpa_gain; 14681 + pi->srom_fem5g.pdetrange = sprom->fem.ghz5.pdet_range; 14682 + pi->srom_fem5g.triso = sprom->fem.ghz5.tr_iso; 14683 + if (sprom->fem.ghz5.antswlut) 14684 + pi->srom_fem5g.antswctrllut = sprom->fem.ghz5.antswlut; 14588 14685 else 14589 - pi->srom_fem5g.antswctrllut = 14590 - (u8) wlapi_getintvar(shim, BRCMS_SROM_ANTSWCTL2G); 14686 + pi->srom_fem5g.antswctrllut = sprom->fem.ghz2.antswlut; 14591 14687 14592 14688 wlc_phy_txpower_ipa_upd(pi); 14593 14689 14594 - pi->phy_txcore_disable_temp = 14595 - (s16) wlapi_getintvar(shim, BRCMS_SROM_TEMPTHRESH); 14690 + pi->phy_txcore_disable_temp = sprom->tempthresh; 14596 14691 if (pi->phy_txcore_disable_temp == 0) 14597 14692 pi->phy_txcore_disable_temp = PHY_CHAIN_TX_DISABLE_TEMP; 14598 14693 14599 - pi->phy_tempsense_offset = (s8) wlapi_getintvar(shim, 14600 - BRCMS_SROM_TEMPOFFSET); 14694 + pi->phy_tempsense_offset = sprom->tempoffset; 14601 14695 if (pi->phy_tempsense_offset != 0) { 14602 14696 if (pi->phy_tempsense_offset > 14603 14697 (NPHY_SROM_TEMPSHIFT + NPHY_SROM_MAXTEMPOFFSET)) ··· 14601 14717 pi->phy_txcore_enable_temp = 14602 14718 pi->phy_txcore_disable_temp - PHY_HYSTERESIS_DELTATEMP; 14603 14719 14604 - pi->phycal_tempdelta = 14605 - (u8) wlapi_getintvar(shim, BRCMS_SROM_PHYCAL_TEMPDELTA); 14720 + pi->phycal_tempdelta = sprom->phycal_tempdelta; 14606 14721 if (pi->phycal_tempdelta > NPHY_CAL_MAXTEMPDELTA) 14607 14722 pi->phycal_tempdelta = 0; 14608 14723 ··· 21343 21460 write_phy_reg(pi, 0xc8, 0x0); 21344 21461 write_phy_reg(pi, 0xc9, 0x0); 21345 21462 21346 - ai_gpiocontrol(pi->sh->sih, mask, mask, GPIO_DRV_PRIORITY); 21463 + bcma_chipco_gpio_control(&pi->d11core->bus->drv_cc, mask, mask); 21347 21464 21348 21465 mc = bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 21349 21466 mc &= ~MCTL_GPOUT_SEL_MASK;
-9
drivers/net/wireless/brcm80211/brcmsmac/phy_shim.c
··· 214 214 { 215 215 brcms_b_copyto_objmem(physhim->wlc_hw, offset, buf, l, sel); 216 216 } 217 - 218 - char *wlapi_getvar(struct phy_shim_info *physhim, enum brcms_srom_id id) 219 - { 220 - return getvar(physhim->wlc_hw->sih, id); 221 - } 222 - int wlapi_getintvar(struct phy_shim_info *physhim, enum brcms_srom_id id) 223 - { 224 - return getintvar(physhim->wlc_hw->sih, id); 225 - }
-3
drivers/net/wireless/brcm80211/brcmsmac/phy_shim.h
··· 175 175 extern void wlapi_high_update_phy_mode(struct phy_shim_info *physhim, 176 176 u32 phy_mode); 177 177 extern u16 wlapi_bmac_get_txant(struct phy_shim_info *physhim); 178 - extern char *wlapi_getvar(struct phy_shim_info *physhim, enum brcms_srom_id id); 179 - extern int wlapi_getintvar(struct phy_shim_info *physhim, 180 - enum brcms_srom_id id); 181 178 182 179 #endif /* _BRCM_PHY_SHIM_H_ */
-228
drivers/net/wireless/brcm80211/brcmsmac/pub.h
··· 22 22 #include "types.h" 23 23 #include "defs.h" 24 24 25 - enum brcms_srom_id { 26 - BRCMS_SROM_NULL, 27 - BRCMS_SROM_CONT, 28 - BRCMS_SROM_AA2G, 29 - BRCMS_SROM_AA5G, 30 - BRCMS_SROM_AG0, 31 - BRCMS_SROM_AG1, 32 - BRCMS_SROM_AG2, 33 - BRCMS_SROM_AG3, 34 - BRCMS_SROM_ANTSWCTL2G, 35 - BRCMS_SROM_ANTSWCTL5G, 36 - BRCMS_SROM_ANTSWITCH, 37 - BRCMS_SROM_BOARDFLAGS2, 38 - BRCMS_SROM_BOARDFLAGS, 39 - BRCMS_SROM_BOARDNUM, 40 - BRCMS_SROM_BOARDREV, 41 - BRCMS_SROM_BOARDTYPE, 42 - BRCMS_SROM_BW40PO, 43 - BRCMS_SROM_BWDUPPO, 44 - BRCMS_SROM_BXA2G, 45 - BRCMS_SROM_BXA5G, 46 - BRCMS_SROM_CC, 47 - BRCMS_SROM_CCK2GPO, 48 - BRCMS_SROM_CCKBW202GPO, 49 - BRCMS_SROM_CCKBW20UL2GPO, 50 - BRCMS_SROM_CCODE, 51 - BRCMS_SROM_CDDPO, 52 - BRCMS_SROM_DEVID, 53 - BRCMS_SROM_ET1MACADDR, 54 - BRCMS_SROM_EXTPAGAIN2G, 55 - BRCMS_SROM_EXTPAGAIN5G, 56 - BRCMS_SROM_FREQOFFSET_CORR, 57 - BRCMS_SROM_HW_IQCAL_EN, 58 - BRCMS_SROM_IL0MACADDR, 59 - BRCMS_SROM_IQCAL_SWP_DIS, 60 - BRCMS_SROM_LEDBH0, 61 - BRCMS_SROM_LEDBH1, 62 - BRCMS_SROM_LEDBH2, 63 - BRCMS_SROM_LEDBH3, 64 - BRCMS_SROM_LEDDC, 65 - BRCMS_SROM_LEGOFDM40DUPPO, 66 - BRCMS_SROM_LEGOFDMBW202GPO, 67 - BRCMS_SROM_LEGOFDMBW205GHPO, 68 - BRCMS_SROM_LEGOFDMBW205GLPO, 69 - BRCMS_SROM_LEGOFDMBW205GMPO, 70 - BRCMS_SROM_LEGOFDMBW20UL2GPO, 71 - BRCMS_SROM_LEGOFDMBW20UL5GHPO, 72 - BRCMS_SROM_LEGOFDMBW20UL5GLPO, 73 - BRCMS_SROM_LEGOFDMBW20UL5GMPO, 74 - BRCMS_SROM_MACADDR, 75 - BRCMS_SROM_MCS2GPO0, 76 - BRCMS_SROM_MCS2GPO1, 77 - BRCMS_SROM_MCS2GPO2, 78 - BRCMS_SROM_MCS2GPO3, 79 - BRCMS_SROM_MCS2GPO4, 80 - BRCMS_SROM_MCS2GPO5, 81 - BRCMS_SROM_MCS2GPO6, 82 - BRCMS_SROM_MCS2GPO7, 83 - BRCMS_SROM_MCS32PO, 84 - BRCMS_SROM_MCS5GHPO0, 85 - BRCMS_SROM_MCS5GHPO1, 86 - BRCMS_SROM_MCS5GHPO2, 87 - BRCMS_SROM_MCS5GHPO3, 88 - BRCMS_SROM_MCS5GHPO4, 89 - BRCMS_SROM_MCS5GHPO5, 90 - BRCMS_SROM_MCS5GHPO6, 91 - BRCMS_SROM_MCS5GHPO7, 92 - BRCMS_SROM_MCS5GLPO0, 93 - BRCMS_SROM_MCS5GLPO1, 94 - BRCMS_SROM_MCS5GLPO2, 95 - BRCMS_SROM_MCS5GLPO3, 96 - BRCMS_SROM_MCS5GLPO4, 97 - BRCMS_SROM_MCS5GLPO5, 98 - BRCMS_SROM_MCS5GLPO6, 99 - BRCMS_SROM_MCS5GLPO7, 100 - BRCMS_SROM_MCS5GPO0, 101 - BRCMS_SROM_MCS5GPO1, 102 - BRCMS_SROM_MCS5GPO2, 103 - BRCMS_SROM_MCS5GPO3, 104 - BRCMS_SROM_MCS5GPO4, 105 - BRCMS_SROM_MCS5GPO5, 106 - BRCMS_SROM_MCS5GPO6, 107 - BRCMS_SROM_MCS5GPO7, 108 - BRCMS_SROM_MCSBW202GPO, 109 - BRCMS_SROM_MCSBW205GHPO, 110 - BRCMS_SROM_MCSBW205GLPO, 111 - BRCMS_SROM_MCSBW205GMPO, 112 - BRCMS_SROM_MCSBW20UL2GPO, 113 - BRCMS_SROM_MCSBW20UL5GHPO, 114 - BRCMS_SROM_MCSBW20UL5GLPO, 115 - BRCMS_SROM_MCSBW20UL5GMPO, 116 - BRCMS_SROM_MCSBW402GPO, 117 - BRCMS_SROM_MCSBW405GHPO, 118 - BRCMS_SROM_MCSBW405GLPO, 119 - BRCMS_SROM_MCSBW405GMPO, 120 - BRCMS_SROM_MEASPOWER, 121 - BRCMS_SROM_OFDM2GPO, 122 - BRCMS_SROM_OFDM5GHPO, 123 - BRCMS_SROM_OFDM5GLPO, 124 - BRCMS_SROM_OFDM5GPO, 125 - BRCMS_SROM_OPO, 126 - BRCMS_SROM_PA0B0, 127 - BRCMS_SROM_PA0B1, 128 - BRCMS_SROM_PA0B2, 129 - BRCMS_SROM_PA0ITSSIT, 130 - BRCMS_SROM_PA0MAXPWR, 131 - BRCMS_SROM_PA1B0, 132 - BRCMS_SROM_PA1B1, 133 - BRCMS_SROM_PA1B2, 134 - BRCMS_SROM_PA1HIB0, 135 - BRCMS_SROM_PA1HIB1, 136 - BRCMS_SROM_PA1HIB2, 137 - BRCMS_SROM_PA1HIMAXPWR, 138 - BRCMS_SROM_PA1ITSSIT, 139 - BRCMS_SROM_PA1LOB0, 140 - BRCMS_SROM_PA1LOB1, 141 - BRCMS_SROM_PA1LOB2, 142 - BRCMS_SROM_PA1LOMAXPWR, 143 - BRCMS_SROM_PA1MAXPWR, 144 - BRCMS_SROM_PDETRANGE2G, 145 - BRCMS_SROM_PDETRANGE5G, 146 - BRCMS_SROM_PHYCAL_TEMPDELTA, 147 - BRCMS_SROM_RAWTEMPSENSE, 148 - BRCMS_SROM_REGREV, 149 - BRCMS_SROM_REV, 150 - BRCMS_SROM_RSSISAV2G, 151 - BRCMS_SROM_RSSISAV5G, 152 - BRCMS_SROM_RSSISMC2G, 153 - BRCMS_SROM_RSSISMC5G, 154 - BRCMS_SROM_RSSISMF2G, 155 - BRCMS_SROM_RSSISMF5G, 156 - BRCMS_SROM_RXCHAIN, 157 - BRCMS_SROM_RXPO2G, 158 - BRCMS_SROM_RXPO5G, 159 - BRCMS_SROM_STBCPO, 160 - BRCMS_SROM_TEMPCORRX, 161 - BRCMS_SROM_TEMPOFFSET, 162 - BRCMS_SROM_TEMPSENSE_OPTION, 163 - BRCMS_SROM_TEMPSENSE_SLOPE, 164 - BRCMS_SROM_TEMPTHRESH, 165 - BRCMS_SROM_TRI2G, 166 - BRCMS_SROM_TRI5GH, 167 - BRCMS_SROM_TRI5GL, 168 - BRCMS_SROM_TRI5G, 169 - BRCMS_SROM_TRISO2G, 170 - BRCMS_SROM_TRISO5G, 171 - BRCMS_SROM_TSSIPOS2G, 172 - BRCMS_SROM_TSSIPOS5G, 173 - BRCMS_SROM_TXCHAIN, 174 - /* 175 - * per-path identifiers (see srom.c) 176 - */ 177 - BRCMS_SROM_ITT2GA0, 178 - BRCMS_SROM_ITT2GA1, 179 - BRCMS_SROM_ITT2GA2, 180 - BRCMS_SROM_ITT2GA3, 181 - BRCMS_SROM_ITT5GA0, 182 - BRCMS_SROM_ITT5GA1, 183 - BRCMS_SROM_ITT5GA2, 184 - BRCMS_SROM_ITT5GA3, 185 - BRCMS_SROM_MAXP2GA0, 186 - BRCMS_SROM_MAXP2GA1, 187 - BRCMS_SROM_MAXP2GA2, 188 - BRCMS_SROM_MAXP2GA3, 189 - BRCMS_SROM_MAXP5GA0, 190 - BRCMS_SROM_MAXP5GA1, 191 - BRCMS_SROM_MAXP5GA2, 192 - BRCMS_SROM_MAXP5GA3, 193 - BRCMS_SROM_MAXP5GHA0, 194 - BRCMS_SROM_MAXP5GHA1, 195 - BRCMS_SROM_MAXP5GHA2, 196 - BRCMS_SROM_MAXP5GHA3, 197 - BRCMS_SROM_MAXP5GLA0, 198 - BRCMS_SROM_MAXP5GLA1, 199 - BRCMS_SROM_MAXP5GLA2, 200 - BRCMS_SROM_MAXP5GLA3, 201 - BRCMS_SROM_PA2GW0A0, 202 - BRCMS_SROM_PA2GW0A1, 203 - BRCMS_SROM_PA2GW0A2, 204 - BRCMS_SROM_PA2GW0A3, 205 - BRCMS_SROM_PA2GW1A0, 206 - BRCMS_SROM_PA2GW1A1, 207 - BRCMS_SROM_PA2GW1A2, 208 - BRCMS_SROM_PA2GW1A3, 209 - BRCMS_SROM_PA2GW2A0, 210 - BRCMS_SROM_PA2GW2A1, 211 - BRCMS_SROM_PA2GW2A2, 212 - BRCMS_SROM_PA2GW2A3, 213 - BRCMS_SROM_PA5GHW0A0, 214 - BRCMS_SROM_PA5GHW0A1, 215 - BRCMS_SROM_PA5GHW0A2, 216 - BRCMS_SROM_PA5GHW0A3, 217 - BRCMS_SROM_PA5GHW1A0, 218 - BRCMS_SROM_PA5GHW1A1, 219 - BRCMS_SROM_PA5GHW1A2, 220 - BRCMS_SROM_PA5GHW1A3, 221 - BRCMS_SROM_PA5GHW2A0, 222 - BRCMS_SROM_PA5GHW2A1, 223 - BRCMS_SROM_PA5GHW2A2, 224 - BRCMS_SROM_PA5GHW2A3, 225 - BRCMS_SROM_PA5GLW0A0, 226 - BRCMS_SROM_PA5GLW0A1, 227 - BRCMS_SROM_PA5GLW0A2, 228 - BRCMS_SROM_PA5GLW0A3, 229 - BRCMS_SROM_PA5GLW1A0, 230 - BRCMS_SROM_PA5GLW1A1, 231 - BRCMS_SROM_PA5GLW1A2, 232 - BRCMS_SROM_PA5GLW1A3, 233 - BRCMS_SROM_PA5GLW2A0, 234 - BRCMS_SROM_PA5GLW2A1, 235 - BRCMS_SROM_PA5GLW2A2, 236 - BRCMS_SROM_PA5GLW2A3, 237 - BRCMS_SROM_PA5GW0A0, 238 - BRCMS_SROM_PA5GW0A1, 239 - BRCMS_SROM_PA5GW0A2, 240 - BRCMS_SROM_PA5GW0A3, 241 - BRCMS_SROM_PA5GW1A0, 242 - BRCMS_SROM_PA5GW1A1, 243 - BRCMS_SROM_PA5GW1A2, 244 - BRCMS_SROM_PA5GW1A3, 245 - BRCMS_SROM_PA5GW2A0, 246 - BRCMS_SROM_PA5GW2A1, 247 - BRCMS_SROM_PA5GW2A2, 248 - BRCMS_SROM_PA5GW2A3, 249 - }; 250 - 251 25 #define BRCMS_NUMRATES 16 /* max # of rates in a rateset */ 252 26 253 27 /* phy types */ ··· 339 565 struct ieee80211_sta *sta, u16 tid); 340 566 extern void brcms_c_ampdu_tx_operational(struct brcms_c_info *wlc, u8 tid, 341 567 u8 ba_wsize, uint max_rx_ampdu_bytes); 342 - extern char *getvar(struct si_pub *sih, enum brcms_srom_id id); 343 - extern int getintvar(struct si_pub *sih, enum brcms_srom_id id); 344 568 extern int brcms_c_module_register(struct brcms_pub *pub, 345 569 const char *name, struct brcms_info *hdl, 346 570 int (*down_fn)(void *handle));
-980
drivers/net/wireless/brcm80211/brcmsmac/srom.c
··· 1 - /* 2 - * Copyright (c) 2010 Broadcom Corporation 3 - * 4 - * Permission to use, copy, modify, and/or distribute this software for any 5 - * purpose with or without fee is hereby granted, provided that the above 6 - * copyright notice and this permission notice appear in all copies. 7 - * 8 - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 - */ 16 - 17 - #include <linux/kernel.h> 18 - #include <linux/string.h> 19 - #include <linux/io.h> 20 - #include <linux/etherdevice.h> 21 - #include <linux/crc8.h> 22 - #include <stdarg.h> 23 - 24 - #include <chipcommon.h> 25 - #include <brcmu_utils.h> 26 - #include "pub.h" 27 - #include "nicpci.h" 28 - #include "aiutils.h" 29 - #include "otp.h" 30 - #include "srom.h" 31 - #include "soc.h" 32 - 33 - /* 34 - * SROM CRC8 polynomial value: 35 - * 36 - * x^8 + x^7 +x^6 + x^4 + x^2 + 1 37 - */ 38 - #define SROM_CRC8_POLY 0xAB 39 - 40 - /* Maximum srom: 6 Kilobits == 768 bytes */ 41 - #define SROM_MAX 768 42 - 43 - /* PCI fields */ 44 - #define PCI_F0DEVID 48 45 - 46 - #define SROM_WORDS 64 47 - 48 - #define SROM_SSID 2 49 - 50 - #define SROM_WL1LHMAXP 29 51 - 52 - #define SROM_WL1LPAB0 30 53 - #define SROM_WL1LPAB1 31 54 - #define SROM_WL1LPAB2 32 55 - 56 - #define SROM_WL1HPAB0 33 57 - #define SROM_WL1HPAB1 34 58 - #define SROM_WL1HPAB2 35 59 - 60 - #define SROM_MACHI_IL0 36 61 - #define SROM_MACMID_IL0 37 62 - #define SROM_MACLO_IL0 38 63 - #define SROM_MACHI_ET1 42 64 - #define SROM_MACMID_ET1 43 65 - #define SROM_MACLO_ET1 44 66 - 67 - #define SROM_BXARSSI2G 40 68 - #define SROM_BXARSSI5G 41 69 - 70 - #define SROM_TRI52G 42 71 - #define SROM_TRI5GHL 43 72 - 73 - #define SROM_RXPO52G 45 74 - 75 - #define SROM_AABREV 46 76 - /* Fields in AABREV */ 77 - #define SROM_BR_MASK 0x00ff 78 - #define SROM_CC_MASK 0x0f00 79 - #define SROM_CC_SHIFT 8 80 - #define SROM_AA0_MASK 0x3000 81 - #define SROM_AA0_SHIFT 12 82 - #define SROM_AA1_MASK 0xc000 83 - #define SROM_AA1_SHIFT 14 84 - 85 - #define SROM_WL0PAB0 47 86 - #define SROM_WL0PAB1 48 87 - #define SROM_WL0PAB2 49 88 - 89 - #define SROM_LEDBH10 50 90 - #define SROM_LEDBH32 51 91 - 92 - #define SROM_WL10MAXP 52 93 - 94 - #define SROM_WL1PAB0 53 95 - #define SROM_WL1PAB1 54 96 - #define SROM_WL1PAB2 55 97 - 98 - #define SROM_ITT 56 99 - 100 - #define SROM_BFL 57 101 - #define SROM_BFL2 28 102 - 103 - #define SROM_AG10 58 104 - 105 - #define SROM_CCODE 59 106 - 107 - #define SROM_OPO 60 108 - 109 - #define SROM_CRCREV 63 110 - 111 - #define SROM4_WORDS 220 112 - 113 - #define SROM4_TXCHAIN_MASK 0x000f 114 - #define SROM4_RXCHAIN_MASK 0x00f0 115 - #define SROM4_SWITCH_MASK 0xff00 116 - 117 - /* Per-path fields */ 118 - #define MAX_PATH_SROM 4 119 - 120 - #define SROM4_CRCREV 219 121 - 122 - /* SROM Rev 8: Make space for a 48word hardware header for PCIe rev >= 6. 123 - * This is acombined srom for both MIMO and SISO boards, usable in 124 - * the .130 4Kilobit OTP with hardware redundancy. 125 - */ 126 - #define SROM8_BREV 65 127 - 128 - #define SROM8_BFL0 66 129 - #define SROM8_BFL1 67 130 - #define SROM8_BFL2 68 131 - #define SROM8_BFL3 69 132 - 133 - #define SROM8_MACHI 70 134 - #define SROM8_MACMID 71 135 - #define SROM8_MACLO 72 136 - 137 - #define SROM8_CCODE 73 138 - #define SROM8_REGREV 74 139 - 140 - #define SROM8_LEDBH10 75 141 - #define SROM8_LEDBH32 76 142 - 143 - #define SROM8_LEDDC 77 144 - 145 - #define SROM8_AA 78 146 - 147 - #define SROM8_AG10 79 148 - #define SROM8_AG32 80 149 - 150 - #define SROM8_TXRXC 81 151 - 152 - #define SROM8_BXARSSI2G 82 153 - #define SROM8_BXARSSI5G 83 154 - #define SROM8_TRI52G 84 155 - #define SROM8_TRI5GHL 85 156 - #define SROM8_RXPO52G 86 157 - 158 - #define SROM8_FEM2G 87 159 - #define SROM8_FEM5G 88 160 - #define SROM8_FEM_ANTSWLUT_MASK 0xf800 161 - #define SROM8_FEM_ANTSWLUT_SHIFT 11 162 - #define SROM8_FEM_TR_ISO_MASK 0x0700 163 - #define SROM8_FEM_TR_ISO_SHIFT 8 164 - #define SROM8_FEM_PDET_RANGE_MASK 0x00f8 165 - #define SROM8_FEM_PDET_RANGE_SHIFT 3 166 - #define SROM8_FEM_EXTPA_GAIN_MASK 0x0006 167 - #define SROM8_FEM_EXTPA_GAIN_SHIFT 1 168 - #define SROM8_FEM_TSSIPOS_MASK 0x0001 169 - #define SROM8_FEM_TSSIPOS_SHIFT 0 170 - 171 - #define SROM8_THERMAL 89 172 - 173 - /* Temp sense related entries */ 174 - #define SROM8_MPWR_RAWTS 90 175 - #define SROM8_TS_SLP_OPT_CORRX 91 176 - /* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, 177 - * IQSWP: IQ CAL swap disable */ 178 - #define SROM8_FOC_HWIQ_IQSWP 92 179 - 180 - /* Temperature delta for PHY calibration */ 181 - #define SROM8_PHYCAL_TEMPDELTA 93 182 - 183 - /* Per-path offsets & fields */ 184 - #define SROM8_PATH0 96 185 - #define SROM8_PATH1 112 186 - #define SROM8_PATH2 128 187 - #define SROM8_PATH3 144 188 - 189 - #define SROM8_2G_ITT_MAXP 0 190 - #define SROM8_2G_PA 1 191 - #define SROM8_5G_ITT_MAXP 4 192 - #define SROM8_5GLH_MAXP 5 193 - #define SROM8_5G_PA 6 194 - #define SROM8_5GL_PA 9 195 - #define SROM8_5GH_PA 12 196 - 197 - /* All the miriad power offsets */ 198 - #define SROM8_2G_CCKPO 160 199 - 200 - #define SROM8_2G_OFDMPO 161 201 - #define SROM8_5G_OFDMPO 163 202 - #define SROM8_5GL_OFDMPO 165 203 - #define SROM8_5GH_OFDMPO 167 204 - 205 - #define SROM8_2G_MCSPO 169 206 - #define SROM8_5G_MCSPO 177 207 - #define SROM8_5GL_MCSPO 185 208 - #define SROM8_5GH_MCSPO 193 209 - 210 - #define SROM8_CDDPO 201 211 - #define SROM8_STBCPO 202 212 - #define SROM8_BW40PO 203 213 - #define SROM8_BWDUPPO 204 214 - 215 - /* SISO PA parameters are in the path0 spaces */ 216 - #define SROM8_SISO 96 217 - 218 - /* Legacy names for SISO PA paramters */ 219 - #define SROM8_W0_ITTMAXP (SROM8_SISO + SROM8_2G_ITT_MAXP) 220 - #define SROM8_W0_PAB0 (SROM8_SISO + SROM8_2G_PA) 221 - #define SROM8_W0_PAB1 (SROM8_SISO + SROM8_2G_PA + 1) 222 - #define SROM8_W0_PAB2 (SROM8_SISO + SROM8_2G_PA + 2) 223 - #define SROM8_W1_ITTMAXP (SROM8_SISO + SROM8_5G_ITT_MAXP) 224 - #define SROM8_W1_MAXP_LCHC (SROM8_SISO + SROM8_5GLH_MAXP) 225 - #define SROM8_W1_PAB0 (SROM8_SISO + SROM8_5G_PA) 226 - #define SROM8_W1_PAB1 (SROM8_SISO + SROM8_5G_PA + 1) 227 - #define SROM8_W1_PAB2 (SROM8_SISO + SROM8_5G_PA + 2) 228 - #define SROM8_W1_PAB0_LC (SROM8_SISO + SROM8_5GL_PA) 229 - #define SROM8_W1_PAB1_LC (SROM8_SISO + SROM8_5GL_PA + 1) 230 - #define SROM8_W1_PAB2_LC (SROM8_SISO + SROM8_5GL_PA + 2) 231 - #define SROM8_W1_PAB0_HC (SROM8_SISO + SROM8_5GH_PA) 232 - #define SROM8_W1_PAB1_HC (SROM8_SISO + SROM8_5GH_PA + 1) 233 - #define SROM8_W1_PAB2_HC (SROM8_SISO + SROM8_5GH_PA + 2) 234 - 235 - /* SROM REV 9 */ 236 - #define SROM9_2GPO_CCKBW20 160 237 - #define SROM9_2GPO_CCKBW20UL 161 238 - #define SROM9_2GPO_LOFDMBW20 162 239 - #define SROM9_2GPO_LOFDMBW20UL 164 240 - 241 - #define SROM9_5GLPO_LOFDMBW20 166 242 - #define SROM9_5GLPO_LOFDMBW20UL 168 243 - #define SROM9_5GMPO_LOFDMBW20 170 244 - #define SROM9_5GMPO_LOFDMBW20UL 172 245 - #define SROM9_5GHPO_LOFDMBW20 174 246 - #define SROM9_5GHPO_LOFDMBW20UL 176 247 - 248 - #define SROM9_2GPO_MCSBW20 178 249 - #define SROM9_2GPO_MCSBW20UL 180 250 - #define SROM9_2GPO_MCSBW40 182 251 - 252 - #define SROM9_5GLPO_MCSBW20 184 253 - #define SROM9_5GLPO_MCSBW20UL 186 254 - #define SROM9_5GLPO_MCSBW40 188 255 - #define SROM9_5GMPO_MCSBW20 190 256 - #define SROM9_5GMPO_MCSBW20UL 192 257 - #define SROM9_5GMPO_MCSBW40 194 258 - #define SROM9_5GHPO_MCSBW20 196 259 - #define SROM9_5GHPO_MCSBW20UL 198 260 - #define SROM9_5GHPO_MCSBW40 200 261 - 262 - #define SROM9_PO_MCS32 202 263 - #define SROM9_PO_LOFDM40DUP 203 264 - 265 - /* SROM flags (see sromvar_t) */ 266 - 267 - /* value continues as described by the next entry */ 268 - #define SRFL_MORE 1 269 - #define SRFL_NOFFS 2 /* value bits can't be all one's */ 270 - #define SRFL_PRHEX 4 /* value is in hexdecimal format */ 271 - #define SRFL_PRSIGN 8 /* value is in signed decimal format */ 272 - #define SRFL_CCODE 0x10 /* value is in country code format */ 273 - #define SRFL_ETHADDR 0x20 /* value is an Ethernet address */ 274 - #define SRFL_LEDDC 0x40 /* value is an LED duty cycle */ 275 - /* do not generate a nvram param, entry is for mfgc */ 276 - #define SRFL_NOVAR 0x80 277 - 278 - /* Max. nvram variable table size */ 279 - #define MAXSZ_NVRAM_VARS 4096 280 - 281 - /* 282 - * indicates type of value. 283 - */ 284 - enum brcms_srom_var_type { 285 - BRCMS_SROM_STRING, 286 - BRCMS_SROM_SNUMBER, 287 - BRCMS_SROM_UNUMBER 288 - }; 289 - 290 - /* 291 - * storage type for srom variable. 292 - * 293 - * var_list: for linked list operations. 294 - * varid: identifier of the variable. 295 - * var_type: type of variable. 296 - * buf: variable value when var_type == BRCMS_SROM_STRING. 297 - * uval: unsigned variable value when var_type == BRCMS_SROM_UNUMBER. 298 - * sval: signed variable value when var_type == BRCMS_SROM_SNUMBER. 299 - */ 300 - struct brcms_srom_list_head { 301 - struct list_head var_list; 302 - enum brcms_srom_id varid; 303 - enum brcms_srom_var_type var_type; 304 - union { 305 - char buf[0]; 306 - u32 uval; 307 - s32 sval; 308 - }; 309 - }; 310 - 311 - struct brcms_sromvar { 312 - enum brcms_srom_id varid; 313 - u32 revmask; 314 - u32 flags; 315 - u16 off; 316 - u16 mask; 317 - }; 318 - 319 - struct brcms_varbuf { 320 - char *base; /* pointer to buffer base */ 321 - char *buf; /* pointer to current position */ 322 - unsigned int size; /* current (residual) size in bytes */ 323 - }; 324 - 325 - /* 326 - * Assumptions: 327 - * - Ethernet address spans across 3 consecutive words 328 - * 329 - * Table rules: 330 - * - Add multiple entries next to each other if a value spans across multiple 331 - * words (even multiple fields in the same word) with each entry except the 332 - * last having it's SRFL_MORE bit set. 333 - * - Ethernet address entry does not follow above rule and must not have 334 - * SRFL_MORE bit set. Its SRFL_ETHADDR bit implies it takes multiple words. 335 - * - The last entry's name field must be NULL to indicate the end of the table. 336 - * Other entries must have non-NULL name. 337 - */ 338 - static const struct brcms_sromvar pci_sromvars[] = { 339 - {BRCMS_SROM_DEVID, 0xffffff00, SRFL_PRHEX | SRFL_NOVAR, PCI_F0DEVID, 340 - 0xffff}, 341 - {BRCMS_SROM_BOARDREV, 0xffffff00, SRFL_PRHEX, SROM8_BREV, 0xffff}, 342 - {BRCMS_SROM_BOARDFLAGS, 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL0, 343 - 0xffff}, 344 - {BRCMS_SROM_CONT, 0, 0, SROM8_BFL1, 0xffff}, 345 - {BRCMS_SROM_BOARDFLAGS2, 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL2, 346 - 0xffff}, 347 - {BRCMS_SROM_CONT, 0, 0, SROM8_BFL3, 0xffff}, 348 - {BRCMS_SROM_BOARDTYPE, 0xfffffffc, SRFL_PRHEX, SROM_SSID, 0xffff}, 349 - {BRCMS_SROM_BOARDNUM, 0xffffff00, 0, SROM8_MACLO, 0xffff}, 350 - {BRCMS_SROM_REGREV, 0xffffff00, 0, SROM8_REGREV, 0x00ff}, 351 - {BRCMS_SROM_LEDBH0, 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0x00ff}, 352 - {BRCMS_SROM_LEDBH1, 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0xff00}, 353 - {BRCMS_SROM_LEDBH2, 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0x00ff}, 354 - {BRCMS_SROM_LEDBH3, 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0xff00}, 355 - {BRCMS_SROM_PA0B0, 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB0, 0xffff}, 356 - {BRCMS_SROM_PA0B1, 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB1, 0xffff}, 357 - {BRCMS_SROM_PA0B2, 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB2, 0xffff}, 358 - {BRCMS_SROM_PA0ITSSIT, 0xffffff00, 0, SROM8_W0_ITTMAXP, 0xff00}, 359 - {BRCMS_SROM_PA0MAXPWR, 0xffffff00, 0, SROM8_W0_ITTMAXP, 0x00ff}, 360 - {BRCMS_SROM_OPO, 0xffffff00, 0, SROM8_2G_OFDMPO, 0x00ff}, 361 - {BRCMS_SROM_AA2G, 0xffffff00, 0, SROM8_AA, 0x00ff}, 362 - {BRCMS_SROM_AA5G, 0xffffff00, 0, SROM8_AA, 0xff00}, 363 - {BRCMS_SROM_AG0, 0xffffff00, 0, SROM8_AG10, 0x00ff}, 364 - {BRCMS_SROM_AG1, 0xffffff00, 0, SROM8_AG10, 0xff00}, 365 - {BRCMS_SROM_AG2, 0xffffff00, 0, SROM8_AG32, 0x00ff}, 366 - {BRCMS_SROM_AG3, 0xffffff00, 0, SROM8_AG32, 0xff00}, 367 - {BRCMS_SROM_PA1B0, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0, 0xffff}, 368 - {BRCMS_SROM_PA1B1, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1, 0xffff}, 369 - {BRCMS_SROM_PA1B2, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2, 0xffff}, 370 - {BRCMS_SROM_PA1LOB0, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_LC, 0xffff}, 371 - {BRCMS_SROM_PA1LOB1, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_LC, 0xffff}, 372 - {BRCMS_SROM_PA1LOB2, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_LC, 0xffff}, 373 - {BRCMS_SROM_PA1HIB0, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_HC, 0xffff}, 374 - {BRCMS_SROM_PA1HIB1, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_HC, 0xffff}, 375 - {BRCMS_SROM_PA1HIB2, 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_HC, 0xffff}, 376 - {BRCMS_SROM_PA1ITSSIT, 0xffffff00, 0, SROM8_W1_ITTMAXP, 0xff00}, 377 - {BRCMS_SROM_PA1MAXPWR, 0xffffff00, 0, SROM8_W1_ITTMAXP, 0x00ff}, 378 - {BRCMS_SROM_PA1LOMAXPWR, 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0xff00}, 379 - {BRCMS_SROM_PA1HIMAXPWR, 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0x00ff}, 380 - {BRCMS_SROM_BXA2G, 0xffffff00, 0, SROM8_BXARSSI2G, 0x1800}, 381 - {BRCMS_SROM_RSSISAV2G, 0xffffff00, 0, SROM8_BXARSSI2G, 0x0700}, 382 - {BRCMS_SROM_RSSISMC2G, 0xffffff00, 0, SROM8_BXARSSI2G, 0x00f0}, 383 - {BRCMS_SROM_RSSISMF2G, 0xffffff00, 0, SROM8_BXARSSI2G, 0x000f}, 384 - {BRCMS_SROM_BXA5G, 0xffffff00, 0, SROM8_BXARSSI5G, 0x1800}, 385 - {BRCMS_SROM_RSSISAV5G, 0xffffff00, 0, SROM8_BXARSSI5G, 0x0700}, 386 - {BRCMS_SROM_RSSISMC5G, 0xffffff00, 0, SROM8_BXARSSI5G, 0x00f0}, 387 - {BRCMS_SROM_RSSISMF5G, 0xffffff00, 0, SROM8_BXARSSI5G, 0x000f}, 388 - {BRCMS_SROM_TRI2G, 0xffffff00, 0, SROM8_TRI52G, 0x00ff}, 389 - {BRCMS_SROM_TRI5G, 0xffffff00, 0, SROM8_TRI52G, 0xff00}, 390 - {BRCMS_SROM_TRI5GL, 0xffffff00, 0, SROM8_TRI5GHL, 0x00ff}, 391 - {BRCMS_SROM_TRI5GH, 0xffffff00, 0, SROM8_TRI5GHL, 0xff00}, 392 - {BRCMS_SROM_RXPO2G, 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0x00ff}, 393 - {BRCMS_SROM_RXPO5G, 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0xff00}, 394 - {BRCMS_SROM_TXCHAIN, 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, 395 - SROM4_TXCHAIN_MASK}, 396 - {BRCMS_SROM_RXCHAIN, 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, 397 - SROM4_RXCHAIN_MASK}, 398 - {BRCMS_SROM_ANTSWITCH, 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, 399 - SROM4_SWITCH_MASK}, 400 - {BRCMS_SROM_TSSIPOS2G, 0xffffff00, 0, SROM8_FEM2G, 401 - SROM8_FEM_TSSIPOS_MASK}, 402 - {BRCMS_SROM_EXTPAGAIN2G, 0xffffff00, 0, SROM8_FEM2G, 403 - SROM8_FEM_EXTPA_GAIN_MASK}, 404 - {BRCMS_SROM_PDETRANGE2G, 0xffffff00, 0, SROM8_FEM2G, 405 - SROM8_FEM_PDET_RANGE_MASK}, 406 - {BRCMS_SROM_TRISO2G, 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_TR_ISO_MASK}, 407 - {BRCMS_SROM_ANTSWCTL2G, 0xffffff00, 0, SROM8_FEM2G, 408 - SROM8_FEM_ANTSWLUT_MASK}, 409 - {BRCMS_SROM_TSSIPOS5G, 0xffffff00, 0, SROM8_FEM5G, 410 - SROM8_FEM_TSSIPOS_MASK}, 411 - {BRCMS_SROM_EXTPAGAIN5G, 0xffffff00, 0, SROM8_FEM5G, 412 - SROM8_FEM_EXTPA_GAIN_MASK}, 413 - {BRCMS_SROM_PDETRANGE5G, 0xffffff00, 0, SROM8_FEM5G, 414 - SROM8_FEM_PDET_RANGE_MASK}, 415 - {BRCMS_SROM_TRISO5G, 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_TR_ISO_MASK}, 416 - {BRCMS_SROM_ANTSWCTL5G, 0xffffff00, 0, SROM8_FEM5G, 417 - SROM8_FEM_ANTSWLUT_MASK}, 418 - {BRCMS_SROM_TEMPTHRESH, 0xffffff00, 0, SROM8_THERMAL, 0xff00}, 419 - {BRCMS_SROM_TEMPOFFSET, 0xffffff00, 0, SROM8_THERMAL, 0x00ff}, 420 - 421 - {BRCMS_SROM_CCODE, 0xffffff00, SRFL_CCODE, SROM8_CCODE, 0xffff}, 422 - {BRCMS_SROM_MACADDR, 0xffffff00, SRFL_ETHADDR, SROM8_MACHI, 0xffff}, 423 - {BRCMS_SROM_LEDDC, 0xffffff00, SRFL_NOFFS | SRFL_LEDDC, SROM8_LEDDC, 424 - 0xffff}, 425 - {BRCMS_SROM_RAWTEMPSENSE, 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS, 426 - 0x01ff}, 427 - {BRCMS_SROM_MEASPOWER, 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS, 428 - 0xfe00}, 429 - {BRCMS_SROM_TEMPSENSE_SLOPE, 0xffffff00, SRFL_PRHEX, 430 - SROM8_TS_SLP_OPT_CORRX, 0x00ff}, 431 - {BRCMS_SROM_TEMPCORRX, 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, 432 - 0xfc00}, 433 - {BRCMS_SROM_TEMPSENSE_OPTION, 0xffffff00, SRFL_PRHEX, 434 - SROM8_TS_SLP_OPT_CORRX, 0x0300}, 435 - {BRCMS_SROM_FREQOFFSET_CORR, 0xffffff00, SRFL_PRHEX, 436 - SROM8_FOC_HWIQ_IQSWP, 0x000f}, 437 - {BRCMS_SROM_IQCAL_SWP_DIS, 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 438 - 0x0010}, 439 - {BRCMS_SROM_HW_IQCAL_EN, 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 440 - 0x0020}, 441 - {BRCMS_SROM_PHYCAL_TEMPDELTA, 0xffffff00, 0, SROM8_PHYCAL_TEMPDELTA, 442 - 0x00ff}, 443 - 444 - {BRCMS_SROM_CCK2GPO, 0x00000100, 0, SROM8_2G_CCKPO, 0xffff}, 445 - {BRCMS_SROM_OFDM2GPO, 0x00000100, SRFL_MORE, SROM8_2G_OFDMPO, 0xffff}, 446 - {BRCMS_SROM_CONT, 0, 0, SROM8_2G_OFDMPO + 1, 0xffff}, 447 - {BRCMS_SROM_OFDM5GPO, 0x00000100, SRFL_MORE, SROM8_5G_OFDMPO, 0xffff}, 448 - {BRCMS_SROM_CONT, 0, 0, SROM8_5G_OFDMPO + 1, 0xffff}, 449 - {BRCMS_SROM_OFDM5GLPO, 0x00000100, SRFL_MORE, SROM8_5GL_OFDMPO, 0xffff}, 450 - {BRCMS_SROM_CONT, 0, 0, SROM8_5GL_OFDMPO + 1, 0xffff}, 451 - {BRCMS_SROM_OFDM5GHPO, 0x00000100, SRFL_MORE, SROM8_5GH_OFDMPO, 0xffff}, 452 - {BRCMS_SROM_CONT, 0, 0, SROM8_5GH_OFDMPO + 1, 0xffff}, 453 - {BRCMS_SROM_MCS2GPO0, 0x00000100, 0, SROM8_2G_MCSPO, 0xffff}, 454 - {BRCMS_SROM_MCS2GPO1, 0x00000100, 0, SROM8_2G_MCSPO + 1, 0xffff}, 455 - {BRCMS_SROM_MCS2GPO2, 0x00000100, 0, SROM8_2G_MCSPO + 2, 0xffff}, 456 - {BRCMS_SROM_MCS2GPO3, 0x00000100, 0, SROM8_2G_MCSPO + 3, 0xffff}, 457 - {BRCMS_SROM_MCS2GPO4, 0x00000100, 0, SROM8_2G_MCSPO + 4, 0xffff}, 458 - {BRCMS_SROM_MCS2GPO5, 0x00000100, 0, SROM8_2G_MCSPO + 5, 0xffff}, 459 - {BRCMS_SROM_MCS2GPO6, 0x00000100, 0, SROM8_2G_MCSPO + 6, 0xffff}, 460 - {BRCMS_SROM_MCS2GPO7, 0x00000100, 0, SROM8_2G_MCSPO + 7, 0xffff}, 461 - {BRCMS_SROM_MCS5GPO0, 0x00000100, 0, SROM8_5G_MCSPO, 0xffff}, 462 - {BRCMS_SROM_MCS5GPO1, 0x00000100, 0, SROM8_5G_MCSPO + 1, 0xffff}, 463 - {BRCMS_SROM_MCS5GPO2, 0x00000100, 0, SROM8_5G_MCSPO + 2, 0xffff}, 464 - {BRCMS_SROM_MCS5GPO3, 0x00000100, 0, SROM8_5G_MCSPO + 3, 0xffff}, 465 - {BRCMS_SROM_MCS5GPO4, 0x00000100, 0, SROM8_5G_MCSPO + 4, 0xffff}, 466 - {BRCMS_SROM_MCS5GPO5, 0x00000100, 0, SROM8_5G_MCSPO + 5, 0xffff}, 467 - {BRCMS_SROM_MCS5GPO6, 0x00000100, 0, SROM8_5G_MCSPO + 6, 0xffff}, 468 - {BRCMS_SROM_MCS5GPO7, 0x00000100, 0, SROM8_5G_MCSPO + 7, 0xffff}, 469 - {BRCMS_SROM_MCS5GLPO0, 0x00000100, 0, SROM8_5GL_MCSPO, 0xffff}, 470 - {BRCMS_SROM_MCS5GLPO1, 0x00000100, 0, SROM8_5GL_MCSPO + 1, 0xffff}, 471 - {BRCMS_SROM_MCS5GLPO2, 0x00000100, 0, SROM8_5GL_MCSPO + 2, 0xffff}, 472 - {BRCMS_SROM_MCS5GLPO3, 0x00000100, 0, SROM8_5GL_MCSPO + 3, 0xffff}, 473 - {BRCMS_SROM_MCS5GLPO4, 0x00000100, 0, SROM8_5GL_MCSPO + 4, 0xffff}, 474 - {BRCMS_SROM_MCS5GLPO5, 0x00000100, 0, SROM8_5GL_MCSPO + 5, 0xffff}, 475 - {BRCMS_SROM_MCS5GLPO6, 0x00000100, 0, SROM8_5GL_MCSPO + 6, 0xffff}, 476 - {BRCMS_SROM_MCS5GLPO7, 0x00000100, 0, SROM8_5GL_MCSPO + 7, 0xffff}, 477 - {BRCMS_SROM_MCS5GHPO0, 0x00000100, 0, SROM8_5GH_MCSPO, 0xffff}, 478 - {BRCMS_SROM_MCS5GHPO1, 0x00000100, 0, SROM8_5GH_MCSPO + 1, 0xffff}, 479 - {BRCMS_SROM_MCS5GHPO2, 0x00000100, 0, SROM8_5GH_MCSPO + 2, 0xffff}, 480 - {BRCMS_SROM_MCS5GHPO3, 0x00000100, 0, SROM8_5GH_MCSPO + 3, 0xffff}, 481 - {BRCMS_SROM_MCS5GHPO4, 0x00000100, 0, SROM8_5GH_MCSPO + 4, 0xffff}, 482 - {BRCMS_SROM_MCS5GHPO5, 0x00000100, 0, SROM8_5GH_MCSPO + 5, 0xffff}, 483 - {BRCMS_SROM_MCS5GHPO6, 0x00000100, 0, SROM8_5GH_MCSPO + 6, 0xffff}, 484 - {BRCMS_SROM_MCS5GHPO7, 0x00000100, 0, SROM8_5GH_MCSPO + 7, 0xffff}, 485 - {BRCMS_SROM_CDDPO, 0x00000100, 0, SROM8_CDDPO, 0xffff}, 486 - {BRCMS_SROM_STBCPO, 0x00000100, 0, SROM8_STBCPO, 0xffff}, 487 - {BRCMS_SROM_BW40PO, 0x00000100, 0, SROM8_BW40PO, 0xffff}, 488 - {BRCMS_SROM_BWDUPPO, 0x00000100, 0, SROM8_BWDUPPO, 0xffff}, 489 - 490 - /* power per rate from sromrev 9 */ 491 - {BRCMS_SROM_CCKBW202GPO, 0xfffffe00, 0, SROM9_2GPO_CCKBW20, 0xffff}, 492 - {BRCMS_SROM_CCKBW20UL2GPO, 0xfffffe00, 0, SROM9_2GPO_CCKBW20UL, 0xffff}, 493 - {BRCMS_SROM_LEGOFDMBW202GPO, 0xfffffe00, SRFL_MORE, 494 - SROM9_2GPO_LOFDMBW20, 0xffff}, 495 - {BRCMS_SROM_CONT, 0, 0, SROM9_2GPO_LOFDMBW20 + 1, 0xffff}, 496 - {BRCMS_SROM_LEGOFDMBW20UL2GPO, 0xfffffe00, SRFL_MORE, 497 - SROM9_2GPO_LOFDMBW20UL, 0xffff}, 498 - {BRCMS_SROM_CONT, 0, 0, SROM9_2GPO_LOFDMBW20UL + 1, 0xffff}, 499 - {BRCMS_SROM_LEGOFDMBW205GLPO, 0xfffffe00, SRFL_MORE, 500 - SROM9_5GLPO_LOFDMBW20, 0xffff}, 501 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GLPO_LOFDMBW20 + 1, 0xffff}, 502 - {BRCMS_SROM_LEGOFDMBW20UL5GLPO, 0xfffffe00, SRFL_MORE, 503 - SROM9_5GLPO_LOFDMBW20UL, 0xffff}, 504 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GLPO_LOFDMBW20UL + 1, 0xffff}, 505 - {BRCMS_SROM_LEGOFDMBW205GMPO, 0xfffffe00, SRFL_MORE, 506 - SROM9_5GMPO_LOFDMBW20, 0xffff}, 507 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GMPO_LOFDMBW20 + 1, 0xffff}, 508 - {BRCMS_SROM_LEGOFDMBW20UL5GMPO, 0xfffffe00, SRFL_MORE, 509 - SROM9_5GMPO_LOFDMBW20UL, 0xffff}, 510 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GMPO_LOFDMBW20UL + 1, 0xffff}, 511 - {BRCMS_SROM_LEGOFDMBW205GHPO, 0xfffffe00, SRFL_MORE, 512 - SROM9_5GHPO_LOFDMBW20, 0xffff}, 513 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GHPO_LOFDMBW20 + 1, 0xffff}, 514 - {BRCMS_SROM_LEGOFDMBW20UL5GHPO, 0xfffffe00, SRFL_MORE, 515 - SROM9_5GHPO_LOFDMBW20UL, 0xffff}, 516 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GHPO_LOFDMBW20UL + 1, 0xffff}, 517 - {BRCMS_SROM_MCSBW202GPO, 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20, 518 - 0xffff}, 519 - {BRCMS_SROM_CONT, 0, 0, SROM9_2GPO_MCSBW20 + 1, 0xffff}, 520 - {BRCMS_SROM_MCSBW20UL2GPO, 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20UL, 521 - 0xffff}, 522 - {BRCMS_SROM_CONT, 0, 0, SROM9_2GPO_MCSBW20UL + 1, 0xffff}, 523 - {BRCMS_SROM_MCSBW402GPO, 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW40, 524 - 0xffff}, 525 - {BRCMS_SROM_CONT, 0, 0, SROM9_2GPO_MCSBW40 + 1, 0xffff}, 526 - {BRCMS_SROM_MCSBW205GLPO, 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW20, 527 - 0xffff}, 528 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GLPO_MCSBW20 + 1, 0xffff}, 529 - {BRCMS_SROM_MCSBW20UL5GLPO, 0xfffffe00, SRFL_MORE, 530 - SROM9_5GLPO_MCSBW20UL, 0xffff}, 531 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GLPO_MCSBW20UL + 1, 0xffff}, 532 - {BRCMS_SROM_MCSBW405GLPO, 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW40, 533 - 0xffff}, 534 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GLPO_MCSBW40 + 1, 0xffff}, 535 - {BRCMS_SROM_MCSBW205GMPO, 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW20, 536 - 0xffff}, 537 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GMPO_MCSBW20 + 1, 0xffff}, 538 - {BRCMS_SROM_MCSBW20UL5GMPO, 0xfffffe00, SRFL_MORE, 539 - SROM9_5GMPO_MCSBW20UL, 0xffff}, 540 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GMPO_MCSBW20UL + 1, 0xffff}, 541 - {BRCMS_SROM_MCSBW405GMPO, 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW40, 542 - 0xffff}, 543 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GMPO_MCSBW40 + 1, 0xffff}, 544 - {BRCMS_SROM_MCSBW205GHPO, 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW20, 545 - 0xffff}, 546 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GHPO_MCSBW20 + 1, 0xffff}, 547 - {BRCMS_SROM_MCSBW20UL5GHPO, 0xfffffe00, SRFL_MORE, 548 - SROM9_5GHPO_MCSBW20UL, 0xffff}, 549 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GHPO_MCSBW20UL + 1, 0xffff}, 550 - {BRCMS_SROM_MCSBW405GHPO, 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW40, 551 - 0xffff}, 552 - {BRCMS_SROM_CONT, 0, 0, SROM9_5GHPO_MCSBW40 + 1, 0xffff}, 553 - {BRCMS_SROM_MCS32PO, 0xfffffe00, 0, SROM9_PO_MCS32, 0xffff}, 554 - {BRCMS_SROM_LEGOFDM40DUPPO, 0xfffffe00, 0, SROM9_PO_LOFDM40DUP, 0xffff}, 555 - 556 - {BRCMS_SROM_NULL, 0, 0, 0, 0} 557 - }; 558 - 559 - static const struct brcms_sromvar perpath_pci_sromvars[] = { 560 - {BRCMS_SROM_MAXP2GA0, 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0x00ff}, 561 - {BRCMS_SROM_ITT2GA0, 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0xff00}, 562 - {BRCMS_SROM_ITT5GA0, 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0xff00}, 563 - {BRCMS_SROM_PA2GW0A0, 0xffffff00, SRFL_PRHEX, SROM8_2G_PA, 0xffff}, 564 - {BRCMS_SROM_PA2GW1A0, 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 1, 0xffff}, 565 - {BRCMS_SROM_PA2GW2A0, 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 2, 0xffff}, 566 - {BRCMS_SROM_MAXP5GA0, 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0x00ff}, 567 - {BRCMS_SROM_MAXP5GHA0, 0xffffff00, 0, SROM8_5GLH_MAXP, 0x00ff}, 568 - {BRCMS_SROM_MAXP5GLA0, 0xffffff00, 0, SROM8_5GLH_MAXP, 0xff00}, 569 - {BRCMS_SROM_PA5GW0A0, 0xffffff00, SRFL_PRHEX, SROM8_5G_PA, 0xffff}, 570 - {BRCMS_SROM_PA5GW1A0, 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 1, 0xffff}, 571 - {BRCMS_SROM_PA5GW2A0, 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 2, 0xffff}, 572 - {BRCMS_SROM_PA5GLW0A0, 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA, 0xffff}, 573 - {BRCMS_SROM_PA5GLW1A0, 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 1, 574 - 0xffff}, 575 - {BRCMS_SROM_PA5GLW2A0, 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 2, 576 - 0xffff}, 577 - {BRCMS_SROM_PA5GHW0A0, 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA, 0xffff}, 578 - {BRCMS_SROM_PA5GHW1A0, 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 1, 579 - 0xffff}, 580 - {BRCMS_SROM_PA5GHW2A0, 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 2, 581 - 0xffff}, 582 - {BRCMS_SROM_NULL, 0, 0, 0, 0} 583 - }; 584 - 585 - /* crc table has the same contents for every device instance, so it can be 586 - * shared between devices. */ 587 - static u8 brcms_srom_crc8_table[CRC8_TABLE_SIZE]; 588 - 589 - static uint mask_shift(u16 mask) 590 - { 591 - uint i; 592 - for (i = 0; i < (sizeof(mask) << 3); i++) { 593 - if (mask & (1 << i)) 594 - return i; 595 - } 596 - return 0; 597 - } 598 - 599 - static uint mask_width(u16 mask) 600 - { 601 - int i; 602 - for (i = (sizeof(mask) << 3) - 1; i >= 0; i--) { 603 - if (mask & (1 << i)) 604 - return (uint) (i - mask_shift(mask) + 1); 605 - } 606 - return 0; 607 - } 608 - 609 - static inline void le16_to_cpu_buf(u16 *buf, uint nwords) 610 - { 611 - while (nwords--) 612 - *(buf + nwords) = le16_to_cpu(*(__le16 *)(buf + nwords)); 613 - } 614 - 615 - static inline void cpu_to_le16_buf(u16 *buf, uint nwords) 616 - { 617 - while (nwords--) 618 - *(__le16 *)(buf + nwords) = cpu_to_le16(*(buf + nwords)); 619 - } 620 - 621 - /* 622 - * convert binary srom data into linked list of srom variable items. 623 - */ 624 - static int 625 - _initvars_srom_pci(u8 sromrev, u16 *srom, struct list_head *var_list) 626 - { 627 - struct brcms_srom_list_head *entry; 628 - enum brcms_srom_id id; 629 - u16 w; 630 - u32 val = 0; 631 - const struct brcms_sromvar *srv; 632 - uint width; 633 - uint flags; 634 - u32 sr = (1 << sromrev); 635 - uint p; 636 - uint pb = SROM8_PATH0; 637 - const uint psz = SROM8_PATH1 - SROM8_PATH0; 638 - 639 - /* first store the srom revision */ 640 - entry = kzalloc(sizeof(struct brcms_srom_list_head), GFP_KERNEL); 641 - if (!entry) 642 - return -ENOMEM; 643 - 644 - entry->varid = BRCMS_SROM_REV; 645 - entry->var_type = BRCMS_SROM_UNUMBER; 646 - entry->uval = sromrev; 647 - list_add(&entry->var_list, var_list); 648 - 649 - for (srv = pci_sromvars; srv->varid != BRCMS_SROM_NULL; srv++) { 650 - enum brcms_srom_var_type type; 651 - u8 ea[ETH_ALEN]; 652 - u8 extra_space = 0; 653 - 654 - if ((srv->revmask & sr) == 0) 655 - continue; 656 - 657 - flags = srv->flags; 658 - id = srv->varid; 659 - 660 - /* This entry is for mfgc only. Don't generate param for it, */ 661 - if (flags & SRFL_NOVAR) 662 - continue; 663 - 664 - if (flags & SRFL_ETHADDR) { 665 - /* 666 - * stored in string format XX:XX:XX:XX:XX:XX (17 chars) 667 - */ 668 - ea[0] = (srom[srv->off] >> 8) & 0xff; 669 - ea[1] = srom[srv->off] & 0xff; 670 - ea[2] = (srom[srv->off + 1] >> 8) & 0xff; 671 - ea[3] = srom[srv->off + 1] & 0xff; 672 - ea[4] = (srom[srv->off + 2] >> 8) & 0xff; 673 - ea[5] = srom[srv->off + 2] & 0xff; 674 - /* 17 characters + string terminator - union size */ 675 - extra_space = 18 - sizeof(s32); 676 - type = BRCMS_SROM_STRING; 677 - } else { 678 - w = srom[srv->off]; 679 - val = (w & srv->mask) >> mask_shift(srv->mask); 680 - width = mask_width(srv->mask); 681 - 682 - while (srv->flags & SRFL_MORE) { 683 - srv++; 684 - if (srv->off == 0) 685 - continue; 686 - 687 - w = srom[srv->off]; 688 - val += 689 - ((w & srv->mask) >> mask_shift(srv-> 690 - mask)) << 691 - width; 692 - width += mask_width(srv->mask); 693 - } 694 - 695 - if ((flags & SRFL_NOFFS) 696 - && ((int)val == (1 << width) - 1)) 697 - continue; 698 - 699 - if (flags & SRFL_CCODE) { 700 - type = BRCMS_SROM_STRING; 701 - } else if (flags & SRFL_LEDDC) { 702 - /* LED Powersave duty cycle has to be scaled: 703 - *(oncount >> 24) (offcount >> 8) 704 - */ 705 - u32 w32 = /* oncount */ 706 - (((val >> 8) & 0xff) << 24) | 707 - /* offcount */ 708 - (((val & 0xff)) << 8); 709 - type = BRCMS_SROM_UNUMBER; 710 - val = w32; 711 - } else if ((flags & SRFL_PRSIGN) 712 - && (val & (1 << (width - 1)))) { 713 - type = BRCMS_SROM_SNUMBER; 714 - val |= ~0 << width; 715 - } else 716 - type = BRCMS_SROM_UNUMBER; 717 - } 718 - 719 - entry = kzalloc(sizeof(struct brcms_srom_list_head) + 720 - extra_space, GFP_KERNEL); 721 - if (!entry) 722 - return -ENOMEM; 723 - entry->varid = id; 724 - entry->var_type = type; 725 - if (flags & SRFL_ETHADDR) { 726 - snprintf(entry->buf, 18, "%pM", ea); 727 - } else if (flags & SRFL_CCODE) { 728 - if (val == 0) 729 - entry->buf[0] = '\0'; 730 - else 731 - snprintf(entry->buf, 3, "%c%c", 732 - (val >> 8), (val & 0xff)); 733 - } else { 734 - entry->uval = val; 735 - } 736 - 737 - list_add(&entry->var_list, var_list); 738 - } 739 - 740 - for (p = 0; p < MAX_PATH_SROM; p++) { 741 - for (srv = perpath_pci_sromvars; 742 - srv->varid != BRCMS_SROM_NULL; srv++) { 743 - if ((srv->revmask & sr) == 0) 744 - continue; 745 - 746 - if (srv->flags & SRFL_NOVAR) 747 - continue; 748 - 749 - w = srom[pb + srv->off]; 750 - val = (w & srv->mask) >> mask_shift(srv->mask); 751 - width = mask_width(srv->mask); 752 - 753 - /* Cheating: no per-path var is more than 754 - * 1 word */ 755 - if ((srv->flags & SRFL_NOFFS) 756 - && ((int)val == (1 << width) - 1)) 757 - continue; 758 - 759 - entry = 760 - kzalloc(sizeof(struct brcms_srom_list_head), 761 - GFP_KERNEL); 762 - if (!entry) 763 - return -ENOMEM; 764 - entry->varid = srv->varid+p; 765 - entry->var_type = BRCMS_SROM_UNUMBER; 766 - entry->uval = val; 767 - list_add(&entry->var_list, var_list); 768 - } 769 - pb += psz; 770 - } 771 - return 0; 772 - } 773 - 774 - /* 775 - * The crc check is done on a little-endian array, we need 776 - * to switch the bytes around before checking crc (and 777 - * then switch it back). 778 - */ 779 - static int do_crc_check(u16 *buf, unsigned nwords) 780 - { 781 - u8 crc; 782 - 783 - cpu_to_le16_buf(buf, nwords); 784 - crc = crc8(brcms_srom_crc8_table, (void *)buf, nwords << 1, CRC8_INIT_VALUE); 785 - le16_to_cpu_buf(buf, nwords); 786 - 787 - return crc == CRC8_GOOD_VALUE(brcms_srom_crc8_table); 788 - } 789 - 790 - /* 791 - * Read in and validate sprom. 792 - * Return 0 on success, nonzero on error. 793 - */ 794 - static int 795 - sprom_read_pci(struct si_pub *sih, u16 *buf, uint nwords, bool check_crc) 796 - { 797 - int err = 0; 798 - uint i; 799 - struct bcma_device *core; 800 - uint sprom_offset; 801 - 802 - /* determine core to read */ 803 - if (ai_get_ccrev(sih) < 32) { 804 - core = ai_findcore(sih, BCMA_CORE_80211, 0); 805 - sprom_offset = PCI_BAR0_SPROM_OFFSET; 806 - } else { 807 - core = ai_findcore(sih, BCMA_CORE_CHIPCOMMON, 0); 808 - sprom_offset = CHIPCREGOFFS(sromotp); 809 - } 810 - 811 - /* read the sprom */ 812 - for (i = 0; i < nwords; i++) 813 - buf[i] = bcma_read16(core, sprom_offset+i*2); 814 - 815 - if (buf[0] == 0xffff) 816 - /* 817 - * The hardware thinks that an srom that starts with 818 - * 0xffff is blank, regardless of the rest of the 819 - * content, so declare it bad. 820 - */ 821 - return -ENODATA; 822 - 823 - if (check_crc && !do_crc_check(buf, nwords)) 824 - err = -EIO; 825 - 826 - return err; 827 - } 828 - 829 - static int otp_read_pci(struct si_pub *sih, u16 *buf, uint nwords) 830 - { 831 - u8 *otp; 832 - uint sz = OTP_SZ_MAX / 2; /* size in words */ 833 - int err = 0; 834 - 835 - otp = kzalloc(OTP_SZ_MAX, GFP_ATOMIC); 836 - if (otp == NULL) 837 - return -ENOMEM; 838 - 839 - err = otp_read_region(sih, OTP_HW_RGN, (u16 *) otp, &sz); 840 - 841 - sz = min_t(uint, sz, nwords); 842 - memcpy(buf, otp, sz * 2); 843 - 844 - kfree(otp); 845 - 846 - /* Check CRC */ 847 - if (buf[0] == 0xffff) 848 - /* The hardware thinks that an srom that starts with 0xffff 849 - * is blank, regardless of the rest of the content, so declare 850 - * it bad. 851 - */ 852 - return -ENODATA; 853 - 854 - /* fixup the endianness so crc8 will pass */ 855 - cpu_to_le16_buf(buf, sz); 856 - if (crc8(brcms_srom_crc8_table, (u8 *) buf, sz * 2, 857 - CRC8_INIT_VALUE) != CRC8_GOOD_VALUE(brcms_srom_crc8_table)) 858 - err = -EIO; 859 - else 860 - /* now correct the endianness of the byte array */ 861 - le16_to_cpu_buf(buf, sz); 862 - 863 - return err; 864 - } 865 - 866 - /* 867 - * Initialize nonvolatile variable table from sprom. 868 - * Return 0 on success, nonzero on error. 869 - */ 870 - int srom_var_init(struct si_pub *sih) 871 - { 872 - u16 *srom; 873 - u8 sromrev = 0; 874 - u32 sr; 875 - int err = 0; 876 - 877 - /* 878 - * Apply CRC over SROM content regardless SROM is present or not. 879 - */ 880 - srom = kmalloc(SROM_MAX, GFP_ATOMIC); 881 - if (!srom) 882 - return -ENOMEM; 883 - 884 - crc8_populate_lsb(brcms_srom_crc8_table, SROM_CRC8_POLY); 885 - if (ai_is_sprom_available(sih)) { 886 - err = sprom_read_pci(sih, srom, SROM4_WORDS, true); 887 - 888 - if (err == 0) 889 - /* srom read and passed crc */ 890 - /* top word of sprom contains version and crc8 */ 891 - sromrev = srom[SROM4_CRCREV] & 0xff; 892 - } else { 893 - /* Use OTP if SPROM not available */ 894 - err = otp_read_pci(sih, srom, SROM4_WORDS); 895 - if (err == 0) 896 - /* OTP only contain SROM rev8/rev9 for now */ 897 - sromrev = srom[SROM4_CRCREV] & 0xff; 898 - } 899 - 900 - if (!err) { 901 - struct si_info *sii = (struct si_info *)sih; 902 - 903 - /* Bitmask for the sromrev */ 904 - sr = 1 << sromrev; 905 - 906 - /* 907 - * srom version check: Current valid versions: 8, 9 908 - */ 909 - if ((sr & 0x300) == 0) { 910 - err = -EINVAL; 911 - goto errout; 912 - } 913 - 914 - INIT_LIST_HEAD(&sii->var_list); 915 - 916 - /* parse SROM into name=value pairs. */ 917 - err = _initvars_srom_pci(sromrev, srom, &sii->var_list); 918 - if (err) 919 - srom_free_vars(sih); 920 - } 921 - 922 - errout: 923 - kfree(srom); 924 - return err; 925 - } 926 - 927 - void srom_free_vars(struct si_pub *sih) 928 - { 929 - struct si_info *sii; 930 - struct brcms_srom_list_head *entry, *next; 931 - 932 - sii = (struct si_info *)sih; 933 - list_for_each_entry_safe(entry, next, &sii->var_list, var_list) { 934 - list_del(&entry->var_list); 935 - kfree(entry); 936 - } 937 - } 938 - 939 - /* 940 - * Search the name=value vars for a specific one and return its value. 941 - * Returns NULL if not found. 942 - */ 943 - char *getvar(struct si_pub *sih, enum brcms_srom_id id) 944 - { 945 - struct si_info *sii; 946 - struct brcms_srom_list_head *entry; 947 - 948 - sii = (struct si_info *)sih; 949 - 950 - list_for_each_entry(entry, &sii->var_list, var_list) 951 - if (entry->varid == id) 952 - return &entry->buf[0]; 953 - 954 - /* nothing found */ 955 - return NULL; 956 - } 957 - 958 - /* 959 - * Search the vars for a specific one and return its value as 960 - * an integer. Returns 0 if not found.- 961 - */ 962 - int getintvar(struct si_pub *sih, enum brcms_srom_id id) 963 - { 964 - struct si_info *sii; 965 - struct brcms_srom_list_head *entry; 966 - unsigned long res; 967 - 968 - sii = (struct si_info *)sih; 969 - 970 - list_for_each_entry(entry, &sii->var_list, var_list) 971 - if (entry->varid == id) { 972 - if (entry->var_type == BRCMS_SROM_SNUMBER || 973 - entry->var_type == BRCMS_SROM_UNUMBER) 974 - return (int)entry->sval; 975 - else if (!kstrtoul(&entry->buf[0], 0, &res)) 976 - return (int)res; 977 - } 978 - 979 - return 0; 980 - }
-29
drivers/net/wireless/brcm80211/brcmsmac/srom.h
··· 1 - /* 2 - * Copyright (c) 2010 Broadcom Corporation 3 - * 4 - * Permission to use, copy, modify, and/or distribute this software for any 5 - * purpose with or without fee is hereby granted, provided that the above 6 - * copyright notice and this permission notice appear in all copies. 7 - * 8 - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 - */ 16 - 17 - #ifndef _BRCM_SROM_H_ 18 - #define _BRCM_SROM_H_ 19 - 20 - #include "types.h" 21 - 22 - /* Prototypes */ 23 - extern int srom_var_init(struct si_pub *sih); 24 - extern void srom_free_vars(struct si_pub *sih); 25 - 26 - extern int srom_read(struct si_pub *sih, uint bus, void *curmap, 27 - uint byteoff, uint nbytes, u16 *buf, bool check_crc); 28 - 29 - #endif /* _BRCM_SROM_H_ */
+4 -2
drivers/net/wireless/brcm80211/brcmsmac/stf.c
··· 370 370 371 371 void brcms_c_stf_phy_chain_calc(struct brcms_c_info *wlc) 372 372 { 373 + struct ssb_sprom *sprom = &wlc->hw->d11core->bus->sprom; 374 + 373 375 /* get available rx/tx chains */ 374 - wlc->stf->hw_txchain = (u8) getintvar(wlc->hw->sih, BRCMS_SROM_TXCHAIN); 375 - wlc->stf->hw_rxchain = (u8) getintvar(wlc->hw->sih, BRCMS_SROM_RXCHAIN); 376 + wlc->stf->hw_txchain = sprom->txchain; 377 + wlc->stf->hw_rxchain = sprom->rxchain; 376 378 377 379 /* these parameter are intended to be used for all PHY types */ 378 380 if (wlc->stf->hw_txchain == 0 || wlc->stf->hw_txchain == 0xf) {
+33 -2
drivers/net/wireless/iwlwifi/iwl-agn-lib.c
··· 31 31 #include <linux/module.h> 32 32 #include <linux/init.h> 33 33 #include <linux/sched.h> 34 + #include <net/mac80211.h> 34 35 35 36 #include "iwl-dev.h" 36 37 #include "iwl-io.h" ··· 274 273 return; 275 274 } 276 275 276 + /* 277 + * Possible situations when BT needs to take over for receive, 278 + * at the same time where STA needs to response to AP's frame(s), 279 + * reduce the tx power of the required response frames, by that, 280 + * allow the concurrent BT receive & WiFi transmit 281 + * (BT - ANT A, WiFi -ANT B), without interference to one another 282 + * 283 + * Reduced tx power apply to control frames only (ACK/Back/CTS) 284 + * when indicated by the BT config command 285 + */ 277 286 basic.kill_ack_mask = priv->kill_ack_mask; 278 287 basic.kill_cts_mask = priv->kill_cts_mask; 279 - basic.reduce_txpower = priv->reduced_txpower; 288 + if (priv->reduced_txpower) 289 + basic.reduce_txpower = IWLAGN_BT_REDUCED_TX_PWR; 280 290 basic.valid = priv->bt_valid; 281 291 282 292 /* ··· 601 589 return need_update; 602 590 } 603 591 592 + /* 593 + * Upon RSSI changes, sends a bt config command with following changes 594 + * 1. enable/disable "reduced control frames tx power 595 + * 2. update the "kill)ack_mask" and "kill_cts_mask" 596 + * 597 + * If "reduced tx power" is enabled, uCode shall 598 + * 1. ACK/Back/CTS rate shall reduced to 6Mbps 599 + * 2. not use duplciate 20/40MHz mode 600 + */ 604 601 static bool iwlagn_fill_txpower_mode(struct iwl_priv *priv, 605 602 struct iwl_bt_uart_msg *uart_msg) 606 603 { 607 604 bool need_update = false; 605 + struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; 606 + int ave_rssi; 608 607 608 + ave_rssi = ieee80211_ave_rssi(ctx->vif); 609 + if (!ave_rssi) { 610 + /* no rssi data, no changes to reduce tx power */ 611 + IWL_DEBUG_COEX(priv, "no rssi data available\n"); 612 + return need_update; 613 + } 609 614 if (!priv->reduced_txpower && 610 615 !iwl_is_associated(priv, IWL_RXON_CTX_PAN) && 616 + (ave_rssi > BT_ENABLE_REDUCED_TXPOWER_THRESHOLD) && 611 617 (uart_msg->frame3 & (BT_UART_MSG_FRAME3ACL_MSK | 612 618 BT_UART_MSG_FRAME3OBEX_MSK)) && 613 619 !(uart_msg->frame3 & (BT_UART_MSG_FRAME3SCOESCO_MSK | ··· 636 606 need_update = true; 637 607 } else if (priv->reduced_txpower && 638 608 (iwl_is_associated(priv, IWL_RXON_CTX_PAN) || 609 + (ave_rssi < BT_DISABLE_REDUCED_TXPOWER_THRESHOLD) || 639 610 (uart_msg->frame3 & (BT_UART_MSG_FRAME3SCOESCO_MSK | 640 611 BT_UART_MSG_FRAME3SNIFF_MSK | BT_UART_MSG_FRAME3A2DP_MSK)) || 641 612 !(uart_msg->frame3 & (BT_UART_MSG_FRAME3ACL_MSK | 642 613 BT_UART_MSG_FRAME3OBEX_MSK)))) { 643 614 /* disable reduced tx power */ 644 615 priv->reduced_txpower = false; 645 - priv->bt_valid &= ~IWLAGN_BT_VALID_REDUCED_TX_PWR; 616 + priv->bt_valid |= IWLAGN_BT_VALID_REDUCED_TX_PWR; 646 617 need_update = true; 647 618 } 648 619
+4
drivers/net/wireless/iwlwifi/iwl-agn-rxon.c
··· 61 61 RXON_FILTER_ACCEPT_GRP_MSK; 62 62 break; 63 63 64 + case NL80211_IFTYPE_MONITOR: 65 + ctx->staging.dev_type = RXON_DEV_TYPE_SNIFFER; 66 + break; 67 + 64 68 default: 65 69 IWL_ERR(priv, "Unsupported interface type %d\n", 66 70 ctx->vif->type);
+12 -7
drivers/net/wireless/iwlwifi/iwl-agn-tx.c
··· 590 590 spin_unlock_bh(&priv->sta_lock); 591 591 592 592 if (test_bit(txq_id, priv->agg_q_alloc)) { 593 - /* If the transport didn't know that we wanted to start 594 - * agreggation, don't tell it that we want to stop them 593 + /* 594 + * If the transport didn't know that we wanted to start 595 + * agreggation, don't tell it that we want to stop them. 596 + * This can happen when we don't get the addBA response on 597 + * time, or we hadn't time to drain the AC queues. 595 598 */ 596 - if (agg_state != IWL_AGG_STARTING) 599 + if (agg_state == IWL_AGG_ON) 597 600 iwl_trans_tx_agg_disable(priv->trans, txq_id); 601 + else 602 + IWL_DEBUG_TX_QUEUES(priv, "Don't disable tx agg: %d\n", 603 + agg_state); 598 604 iwlagn_dealloc_agg_txq(priv, txq_id); 599 605 } 600 606 ··· 1306 1300 (u8 *) &ba_resp->sta_addr_lo32, 1307 1301 ba_resp->sta_id); 1308 1302 IWL_DEBUG_TX_REPLY(priv, "TID = %d, SeqCtl = %d, bitmap = 0x%llx, " 1309 - "scd_flow = %d, scd_ssn = %d\n", 1303 + "scd_flow = %d, scd_ssn = %d sent:%d, acked:%d\n", 1310 1304 ba_resp->tid, le16_to_cpu(ba_resp->seq_ctl), 1311 1305 (unsigned long long)le64_to_cpu(ba_resp->bitmap), 1312 - scd_flow, ba_resp_scd_ssn); 1306 + scd_flow, ba_resp_scd_ssn, ba_resp->txed, 1307 + ba_resp->txed_2_done); 1313 1308 1314 1309 /* Mark that the expected block-ack response arrived */ 1315 1310 agg->wait_for_ba = false; ··· 1326 1319 */ 1327 1320 ba_resp->txed = ba_resp->txed_2_done; 1328 1321 } 1329 - IWL_DEBUG_HT(priv, "agg frames sent:%d, acked:%d\n", 1330 - ba_resp->txed, ba_resp->txed_2_done); 1331 1322 1332 1323 priv->tid_data[sta_id][tid].next_reclaimed = ba_resp_scd_ssn; 1333 1324
+1 -1
drivers/net/wireless/iwlwifi/iwl-agn.c
··· 603 603 priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY; 604 604 priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID; 605 605 priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes = 606 - BIT(NL80211_IFTYPE_ADHOC); 606 + BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_MONITOR); 607 607 priv->contexts[IWL_RXON_CTX_BSS].interface_modes = 608 608 BIT(NL80211_IFTYPE_STATION); 609 609 priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
+6 -1
drivers/net/wireless/iwlwifi/iwl-commands.h
··· 1910 1910 IWLAGN_BT_VALID_REDUCED_TX_PWR | \ 1911 1911 IWLAGN_BT_VALID_3W_LUT) 1912 1912 1913 + #define IWLAGN_BT_REDUCED_TX_PWR BIT(0) 1914 + 1913 1915 #define IWLAGN_BT_DECISION_LUT_SIZE 12 1914 1916 1915 1917 struct iwl_basic_bt_cmd { ··· 1925 1923 u8 bt3_timer_t2_value; 1926 1924 __le16 bt4_reaction_time; /* unused */ 1927 1925 __le32 bt3_lookup_table[IWLAGN_BT_DECISION_LUT_SIZE]; 1926 + /* 1927 + * bit 0: use reduced tx power for control frame 1928 + * bit 1 - 7: reserved 1929 + */ 1928 1930 u8 reduce_txpower; 1929 1931 u8 reserved; 1930 1932 __le16 valid; ··· 2278 2272 #define IWL_GOOD_CRC_TH_DISABLED 0 2279 2273 #define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1) 2280 2274 #define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff) 2281 - #define IWL_MAX_SCAN_SIZE 1024 2282 2275 #define IWL_MAX_CMD_SIZE 4096 2283 2276 2284 2277 /*
+3 -2
drivers/net/wireless/iwlwifi/iwl-mac80211.c
··· 150 150 IEEE80211_HW_QUEUE_CONTROL | 151 151 IEEE80211_HW_SUPPORTS_PS | 152 152 IEEE80211_HW_SUPPORTS_DYNAMIC_PS | 153 + IEEE80211_HW_WANT_MONITOR_VIF | 153 154 IEEE80211_HW_SCAN_WHILE_IDLE; 154 155 155 156 hw->offchannel_tx_hw_queue = IWL_AUX_QUEUE; ··· 224 223 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 225 224 226 225 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX; 227 - /* we create the 802.11 header and a zero-length SSID element */ 228 - hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2; 226 + /* we create the 802.11 header and a max-length SSID element */ 227 + hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 34; 229 228 230 229 /* 231 230 * We don't use all queues: 4 and 9 are unused and any
+6 -2
drivers/net/wireless/iwlwifi/iwl-power.c
··· 253 253 254 254 IWL_DEBUG_POWER(priv, "numSkipDtim = %u, dtimPeriod = %d\n", 255 255 skip, period); 256 + /* The power level here is 0-4 (used as array index), but user expects 257 + to see 1-5 (according to spec). */ 256 258 IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1); 257 259 } 258 260 ··· 310 308 priv->power_data.debug_sleep_level_override, 311 309 dtimper); 312 310 else { 311 + /* Note that the user parameter is 1-5 (according to spec), 312 + but we pass 0-4 because it acts as an array index. */ 313 313 if (iwlwifi_mod_params.power_level > IWL_POWER_INDEX_1 && 314 - iwlwifi_mod_params.power_level <= IWL_POWER_INDEX_5) 314 + iwlwifi_mod_params.power_level <= IWL_POWER_NUM) 315 315 iwl_static_sleep_cmd(priv, cmd, 316 - iwlwifi_mod_params.power_level, dtimper); 316 + iwlwifi_mod_params.power_level - 1, dtimper); 317 317 else 318 318 iwl_static_sleep_cmd(priv, cmd, 319 319 IWL_POWER_INDEX_1, dtimper);
+38 -14
drivers/net/wireless/iwlwifi/iwl-scan.c
··· 52 52 #define IWL_PASSIVE_DWELL_TIME_52 (10) 53 53 #define IWL_PASSIVE_DWELL_BASE (100) 54 54 #define IWL_CHANNEL_TUNE_TIME 5 55 + #define MAX_SCAN_CHANNEL 50 55 56 56 57 static int iwl_send_scan_abort(struct iwl_priv *priv) 57 58 { ··· 617 616 */ 618 617 619 618 static u16 iwl_fill_probe_req(struct ieee80211_mgmt *frame, const u8 *ta, 620 - const u8 *ies, int ie_len, int left) 619 + const u8 *ies, int ie_len, const u8 *ssid, 620 + u8 ssid_len, int left) 621 621 { 622 622 int len = 0; 623 623 u8 *pos = NULL; ··· 640 638 /* ...next IE... */ 641 639 pos = &frame->u.probe_req.variable[0]; 642 640 643 - /* fill in our indirect SSID IE */ 644 - left -= 2; 641 + /* fill in our SSID IE */ 642 + left -= ssid_len + 2; 645 643 if (left < 0) 646 644 return 0; 647 645 *pos++ = WLAN_EID_SSID; 648 - *pos++ = 0; 646 + *pos++ = ssid_len; 647 + if (ssid && ssid_len) { 648 + memcpy(pos, ssid, ssid_len); 649 + pos += ssid_len; 650 + } 649 651 650 - len += 2; 652 + len += ssid_len + 2; 651 653 652 654 if (WARN_ON(left < ie_len)) 653 655 return len; ··· 685 679 u8 active_chains; 686 680 u8 scan_tx_antennas = priv->hw_params.valid_tx_ant; 687 681 int ret; 682 + int scan_cmd_size = sizeof(struct iwl_scan_cmd) + 683 + MAX_SCAN_CHANNEL * sizeof(struct iwl_scan_channel) + 684 + priv->fw->ucode_capa.max_probe_length; 685 + const u8 *ssid = NULL; 686 + u8 ssid_len = 0; 687 + 688 + if (WARN_ON_ONCE(priv->scan_request && 689 + priv->scan_request->n_channels > MAX_SCAN_CHANNEL)) 690 + return -EINVAL; 688 691 689 692 lockdep_assert_held(&priv->mutex); 690 693 ··· 701 686 ctx = iwl_rxon_ctx_from_vif(vif); 702 687 703 688 if (!priv->scan_cmd) { 704 - priv->scan_cmd = kmalloc(sizeof(struct iwl_scan_cmd) + 705 - IWL_MAX_SCAN_SIZE, GFP_KERNEL); 689 + priv->scan_cmd = kmalloc(scan_cmd_size, GFP_KERNEL); 706 690 if (!priv->scan_cmd) { 707 691 IWL_DEBUG_SCAN(priv, 708 692 "fail to allocate memory for scan\n"); ··· 709 695 } 710 696 } 711 697 scan = priv->scan_cmd; 712 - memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE); 698 + memset(scan, 0, scan_cmd_size); 713 699 714 700 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH; 715 701 scan->quiet_time = IWL_ACTIVE_QUIET_TIME; ··· 760 746 if (priv->scan_request->n_ssids) { 761 747 int i, p = 0; 762 748 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n"); 763 - for (i = 0; i < priv->scan_request->n_ssids; i++) { 764 - /* always does wildcard anyway */ 765 - if (!priv->scan_request->ssids[i].ssid_len) 766 - continue; 749 + /* 750 + * The highest priority SSID is inserted to the 751 + * probe request template. 752 + */ 753 + ssid_len = priv->scan_request->ssids[0].ssid_len; 754 + ssid = priv->scan_request->ssids[0].ssid; 755 + 756 + /* 757 + * Invert the order of ssids, the firmware will invert 758 + * it back. 759 + */ 760 + for (i = priv->scan_request->n_ssids - 1; i >= 1; i--) { 767 761 scan->direct_scan[p].id = WLAN_EID_SSID; 768 762 scan->direct_scan[p].len = 769 763 priv->scan_request->ssids[i].ssid_len; ··· 905 883 vif->addr, 906 884 priv->scan_request->ie, 907 885 priv->scan_request->ie_len, 908 - IWL_MAX_SCAN_SIZE - sizeof(*scan)); 886 + ssid, ssid_len, 887 + scan_cmd_size - sizeof(*scan)); 909 888 break; 910 889 case IWL_SCAN_RADIO_RESET: 911 890 case IWL_SCAN_ROC: ··· 914 891 cmd_len = iwl_fill_probe_req( 915 892 (struct ieee80211_mgmt *)scan->data, 916 893 iwl_bcast_addr, NULL, 0, 917 - IWL_MAX_SCAN_SIZE - sizeof(*scan)); 894 + NULL, 0, 895 + scan_cmd_size - sizeof(*scan)); 918 896 break; 919 897 default: 920 898 BUG();
+5
drivers/net/wireless/mac80211_hwsim.c
··· 746 746 hwsim_check_sta_magic(txi->control.sta); 747 747 748 748 ieee80211_tx_info_clear_status(txi); 749 + 750 + /* frame was transmitted at most favorable rate at first attempt */ 751 + txi->control.rates[0].count = 1; 752 + txi->control.rates[1].idx = -1; 753 + 749 754 if (!(txi->flags & IEEE80211_TX_CTL_NO_ACK) && ack) 750 755 txi->flags |= IEEE80211_TX_STAT_ACK; 751 756 ieee80211_tx_status_irqsafe(hw, skb);
+2
drivers/net/wireless/mwifiex/Makefile
··· 29 29 mwifiex-y += join.o 30 30 mwifiex-y += sta_ioctl.o 31 31 mwifiex-y += sta_cmd.o 32 + mwifiex-y += uap_cmd.o 33 + mwifiex-y += ie.o 32 34 mwifiex-y += sta_cmdresp.o 33 35 mwifiex-y += sta_event.o 34 36 mwifiex-y += sta_tx.o
+349 -145
drivers/net/wireless/mwifiex/cfg80211.c
··· 20 20 #include "cfg80211.h" 21 21 #include "main.h" 22 22 23 + static const struct ieee80211_iface_limit mwifiex_ap_sta_limits[] = { 24 + { 25 + .max = 1, .types = BIT(NL80211_IFTYPE_STATION), 26 + }, 27 + { 28 + .max = 1, .types = BIT(NL80211_IFTYPE_AP), 29 + }, 30 + }; 31 + 32 + static const struct ieee80211_iface_combination mwifiex_iface_comb_ap_sta = { 33 + .limits = mwifiex_ap_sta_limits, 34 + .num_different_channels = 1, 35 + .n_limits = ARRAY_SIZE(mwifiex_ap_sta_limits), 36 + .max_interfaces = MWIFIEX_MAX_BSS_NUM, 37 + .beacon_int_infra_match = true, 38 + }; 39 + 23 40 /* 24 41 * This function maps the nl802.11 channel type into driver channel type. 25 42 * ··· 84 67 /* 85 68 * This function retrieves the private structure from kernel wiphy structure. 86 69 */ 87 - static void *mwifiex_cfg80211_get_priv(struct wiphy *wiphy) 70 + static void *mwifiex_cfg80211_get_adapter(struct wiphy *wiphy) 88 71 { 89 72 return (void *) (*(unsigned long *) wiphy_priv(wiphy)); 90 73 } ··· 97 80 u8 key_index, bool pairwise, const u8 *mac_addr) 98 81 { 99 82 struct mwifiex_private *priv = mwifiex_netdev_get_priv(netdev); 83 + const u8 bc_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 84 + const u8 *peer_mac = pairwise ? mac_addr : bc_mac; 100 85 101 - if (mwifiex_set_encode(priv, NULL, 0, key_index, 1)) { 86 + if (mwifiex_set_encode(priv, NULL, 0, key_index, peer_mac, 1)) { 102 87 wiphy_err(wiphy, "deleting the crypto keys\n"); 103 88 return -EFAULT; 104 89 } ··· 117 98 enum nl80211_tx_power_setting type, 118 99 int mbm) 119 100 { 120 - struct mwifiex_private *priv = mwifiex_cfg80211_get_priv(wiphy); 101 + struct mwifiex_adapter *adapter = mwifiex_cfg80211_get_adapter(wiphy); 102 + struct mwifiex_private *priv; 121 103 struct mwifiex_power_cfg power_cfg; 122 104 int dbm = MBM_TO_DBM(mbm); 123 105 ··· 128 108 } else { 129 109 power_cfg.is_power_auto = 1; 130 110 } 111 + 112 + priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 131 113 132 114 return mwifiex_set_tx_power(priv, &power_cfg); 133 115 } ··· 170 148 if (!priv->sec_info.wep_enabled) 171 149 return 0; 172 150 173 - if (mwifiex_set_encode(priv, NULL, 0, key_index, 0)) { 151 + if (mwifiex_set_encode(priv, NULL, 0, key_index, NULL, 0)) { 174 152 wiphy_err(wiphy, "set default Tx key index\n"); 175 153 return -EFAULT; 176 154 } ··· 187 165 struct key_params *params) 188 166 { 189 167 struct mwifiex_private *priv = mwifiex_netdev_get_priv(netdev); 168 + const u8 bc_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 169 + const u8 *peer_mac = pairwise ? mac_addr : bc_mac; 190 170 191 171 if (mwifiex_set_encode(priv, params->key, params->key_len, 192 - key_index, 0)) { 172 + key_index, peer_mac, 0)) { 193 173 wiphy_err(wiphy, "crypto keys added\n"); 194 174 return -EFAULT; 195 175 } ··· 216 192 enum ieee80211_band band; 217 193 struct ieee80211_supported_band *sband; 218 194 struct ieee80211_channel *ch; 219 - struct mwifiex_private *priv = mwifiex_cfg80211_get_priv(wiphy); 220 - struct mwifiex_adapter *adapter = priv->adapter; 195 + struct mwifiex_adapter *adapter = mwifiex_cfg80211_get_adapter(wiphy); 196 + struct mwifiex_private *priv; 221 197 struct mwifiex_802_11d_domain_reg *domain_info = &adapter->domain_reg; 222 198 223 199 /* Set country code */ 224 - domain_info->country_code[0] = priv->country_code[0]; 225 - domain_info->country_code[1] = priv->country_code[1]; 200 + domain_info->country_code[0] = adapter->country_code[0]; 201 + domain_info->country_code[1] = adapter->country_code[1]; 226 202 domain_info->country_code[2] = ' '; 227 203 228 204 band = mwifiex_band_to_radio_type(adapter->config_bands); ··· 274 250 275 251 domain_info->no_of_triplet = no_of_triplet; 276 252 253 + priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 254 + 277 255 if (mwifiex_send_cmd_async(priv, HostCmd_CMD_802_11D_DOMAIN_INFO, 278 256 HostCmd_ACT_GEN_SET, 0, NULL)) { 279 257 wiphy_err(wiphy, "11D: setting domain info in FW\n"); ··· 298 272 static int mwifiex_reg_notifier(struct wiphy *wiphy, 299 273 struct regulatory_request *request) 300 274 { 301 - struct mwifiex_private *priv = mwifiex_cfg80211_get_priv(wiphy); 275 + struct mwifiex_adapter *adapter = mwifiex_cfg80211_get_adapter(wiphy); 302 276 303 - wiphy_dbg(wiphy, "info: cfg80211 regulatory domain callback for domain" 304 - " %c%c\n", request->alpha2[0], request->alpha2[1]); 277 + wiphy_dbg(wiphy, "info: cfg80211 regulatory domain callback for %c%c\n", 278 + request->alpha2[0], request->alpha2[1]); 305 279 306 - memcpy(priv->country_code, request->alpha2, sizeof(request->alpha2)); 280 + memcpy(adapter->country_code, request->alpha2, sizeof(request->alpha2)); 307 281 308 282 switch (request->initiator) { 309 283 case NL80211_REGDOM_SET_BY_DRIVER: ··· 387 361 if (mwifiex_bss_set_channel(priv, &cfp)) 388 362 return -EFAULT; 389 363 390 - return mwifiex_drv_change_adhoc_chan(priv, cfp.channel); 391 - } 392 - 393 - /* 394 - * CFG802.11 operation handler to set channel. 395 - * 396 - * This function can only be used when station is not connected. 397 - */ 398 - static int 399 - mwifiex_cfg80211_set_channel(struct wiphy *wiphy, struct net_device *dev, 400 - struct ieee80211_channel *chan, 401 - enum nl80211_channel_type channel_type) 402 - { 403 - struct mwifiex_private *priv; 404 - 405 - if (dev) 406 - priv = mwifiex_netdev_get_priv(dev); 364 + if (priv->bss_type == MWIFIEX_BSS_TYPE_STA) 365 + return mwifiex_drv_change_adhoc_chan(priv, cfp.channel); 407 366 else 408 - priv = mwifiex_cfg80211_get_priv(wiphy); 409 - 410 - if (priv->media_connected) { 411 - wiphy_err(wiphy, "This setting is valid only when station " 412 - "is not connected\n"); 413 - return -EINVAL; 414 - } 415 - 416 - return mwifiex_set_rf_channel(priv, chan, channel_type); 367 + return mwifiex_uap_set_channel(priv, cfp.channel); 417 368 } 418 369 419 370 /* ··· 402 399 static int 403 400 mwifiex_set_frag(struct mwifiex_private *priv, u32 frag_thr) 404 401 { 405 - int ret; 406 - 407 402 if (frag_thr < MWIFIEX_FRAG_MIN_VALUE || 408 403 frag_thr > MWIFIEX_FRAG_MAX_VALUE) 409 - return -EINVAL; 404 + frag_thr = MWIFIEX_FRAG_MAX_VALUE; 410 405 411 - /* Send request to firmware */ 412 - ret = mwifiex_send_cmd_sync(priv, HostCmd_CMD_802_11_SNMP_MIB, 413 - HostCmd_ACT_GEN_SET, FRAG_THRESH_I, 414 - &frag_thr); 415 - 416 - return ret; 406 + return mwifiex_send_cmd_sync(priv, HostCmd_CMD_802_11_SNMP_MIB, 407 + HostCmd_ACT_GEN_SET, FRAG_THRESH_I, 408 + &frag_thr); 417 409 } 418 410 419 411 /* ··· 437 439 static int 438 440 mwifiex_cfg80211_set_wiphy_params(struct wiphy *wiphy, u32 changed) 439 441 { 440 - struct mwifiex_private *priv = mwifiex_cfg80211_get_priv(wiphy); 441 - int ret = 0; 442 + struct mwifiex_adapter *adapter = mwifiex_cfg80211_get_adapter(wiphy); 443 + struct mwifiex_private *priv; 444 + struct mwifiex_uap_bss_param *bss_cfg; 445 + int ret, bss_started, i; 442 446 443 - if (changed & WIPHY_PARAM_RTS_THRESHOLD) { 444 - ret = mwifiex_set_rts(priv, wiphy->rts_threshold); 445 - if (ret) 446 - return ret; 447 + for (i = 0; i < adapter->priv_num; i++) { 448 + priv = adapter->priv[i]; 449 + 450 + switch (priv->bss_role) { 451 + case MWIFIEX_BSS_ROLE_UAP: 452 + bss_cfg = kzalloc(sizeof(struct mwifiex_uap_bss_param), 453 + GFP_KERNEL); 454 + if (!bss_cfg) 455 + return -ENOMEM; 456 + 457 + mwifiex_set_sys_config_invalid_data(bss_cfg); 458 + 459 + if (changed & WIPHY_PARAM_RTS_THRESHOLD) 460 + bss_cfg->rts_threshold = wiphy->rts_threshold; 461 + if (changed & WIPHY_PARAM_FRAG_THRESHOLD) 462 + bss_cfg->frag_threshold = wiphy->frag_threshold; 463 + if (changed & WIPHY_PARAM_RETRY_LONG) 464 + bss_cfg->retry_limit = wiphy->retry_long; 465 + 466 + bss_started = priv->bss_started; 467 + 468 + ret = mwifiex_send_cmd_sync(priv, 469 + HostCmd_CMD_UAP_BSS_STOP, 470 + HostCmd_ACT_GEN_SET, 0, 471 + NULL); 472 + if (ret) { 473 + wiphy_err(wiphy, "Failed to stop the BSS\n"); 474 + kfree(bss_cfg); 475 + return ret; 476 + } 477 + 478 + ret = mwifiex_send_cmd_async(priv, 479 + HostCmd_CMD_UAP_SYS_CONFIG, 480 + HostCmd_ACT_GEN_SET, 481 + UAP_BSS_PARAMS_I, bss_cfg); 482 + 483 + kfree(bss_cfg); 484 + 485 + if (ret) { 486 + wiphy_err(wiphy, "Failed to set bss config\n"); 487 + return ret; 488 + } 489 + 490 + if (!bss_started) 491 + break; 492 + 493 + ret = mwifiex_send_cmd_async(priv, 494 + HostCmd_CMD_UAP_BSS_START, 495 + HostCmd_ACT_GEN_SET, 0, 496 + NULL); 497 + if (ret) { 498 + wiphy_err(wiphy, "Failed to start BSS\n"); 499 + return ret; 500 + } 501 + 502 + break; 503 + case MWIFIEX_BSS_ROLE_STA: 504 + if (changed & WIPHY_PARAM_RTS_THRESHOLD) { 505 + ret = mwifiex_set_rts(priv, 506 + wiphy->rts_threshold); 507 + if (ret) 508 + return ret; 509 + } 510 + if (changed & WIPHY_PARAM_FRAG_THRESHOLD) { 511 + ret = mwifiex_set_frag(priv, 512 + wiphy->frag_threshold); 513 + if (ret) 514 + return ret; 515 + } 516 + break; 517 + } 447 518 } 448 519 449 - if (changed & WIPHY_PARAM_FRAG_THRESHOLD) 450 - ret = mwifiex_set_frag(priv, wiphy->frag_threshold); 451 - 452 - return ret; 520 + return 0; 453 521 } 454 522 455 523 /* ··· 530 466 int ret; 531 467 struct mwifiex_private *priv = mwifiex_netdev_get_priv(dev); 532 468 533 - if (priv->bss_mode == type) { 534 - wiphy_warn(wiphy, "already set to required type\n"); 535 - return 0; 536 - } 537 - 538 - priv->bss_mode = type; 539 - 540 - switch (type) { 469 + switch (dev->ieee80211_ptr->iftype) { 541 470 case NL80211_IFTYPE_ADHOC: 542 - dev->ieee80211_ptr->iftype = NL80211_IFTYPE_ADHOC; 543 - wiphy_dbg(wiphy, "info: setting interface type to adhoc\n"); 471 + switch (type) { 472 + case NL80211_IFTYPE_STATION: 473 + break; 474 + case NL80211_IFTYPE_UNSPECIFIED: 475 + wiphy_warn(wiphy, "%s: kept type as IBSS\n", dev->name); 476 + case NL80211_IFTYPE_ADHOC: /* This shouldn't happen */ 477 + return 0; 478 + case NL80211_IFTYPE_AP: 479 + default: 480 + wiphy_err(wiphy, "%s: changing to %d not supported\n", 481 + dev->name, type); 482 + return -EOPNOTSUPP; 483 + } 544 484 break; 545 485 case NL80211_IFTYPE_STATION: 546 - dev->ieee80211_ptr->iftype = NL80211_IFTYPE_STATION; 547 - wiphy_dbg(wiphy, "info: setting interface type to managed\n"); 486 + switch (type) { 487 + case NL80211_IFTYPE_ADHOC: 488 + break; 489 + case NL80211_IFTYPE_UNSPECIFIED: 490 + wiphy_warn(wiphy, "%s: kept type as STA\n", dev->name); 491 + case NL80211_IFTYPE_STATION: /* This shouldn't happen */ 492 + return 0; 493 + case NL80211_IFTYPE_AP: 494 + default: 495 + wiphy_err(wiphy, "%s: changing to %d not supported\n", 496 + dev->name, type); 497 + return -EOPNOTSUPP; 498 + } 548 499 break; 549 - case NL80211_IFTYPE_UNSPECIFIED: 550 - dev->ieee80211_ptr->iftype = NL80211_IFTYPE_STATION; 551 - wiphy_dbg(wiphy, "info: setting interface type to auto\n"); 552 - return 0; 500 + case NL80211_IFTYPE_AP: 501 + switch (type) { 502 + case NL80211_IFTYPE_UNSPECIFIED: 503 + wiphy_warn(wiphy, "%s: kept type as AP\n", dev->name); 504 + case NL80211_IFTYPE_AP: /* This shouldn't happen */ 505 + return 0; 506 + case NL80211_IFTYPE_ADHOC: 507 + case NL80211_IFTYPE_STATION: 508 + default: 509 + wiphy_err(wiphy, "%s: changing to %d not supported\n", 510 + dev->name, type); 511 + return -EOPNOTSUPP; 512 + } 513 + break; 553 514 default: 554 - wiphy_err(wiphy, "unknown interface type: %d\n", type); 555 - return -EINVAL; 515 + wiphy_err(wiphy, "%s: unknown iftype: %d\n", 516 + dev->name, dev->ieee80211_ptr->iftype); 517 + return -EOPNOTSUPP; 556 518 } 557 519 520 + dev->ieee80211_ptr->iftype = type; 521 + priv->bss_mode = type; 558 522 mwifiex_deauthenticate(priv, NULL); 559 523 560 524 priv->sec_info.authentication_mode = NL80211_AUTHTYPE_OPEN_SYSTEM; ··· 896 804 return 0; 897 805 } 898 806 807 + /* cfg80211 operation handler for stop ap. 808 + * Function stops BSS running at uAP interface. 809 + */ 810 + static int mwifiex_cfg80211_stop_ap(struct wiphy *wiphy, struct net_device *dev) 811 + { 812 + struct mwifiex_private *priv = mwifiex_netdev_get_priv(dev); 813 + 814 + if (mwifiex_del_mgmt_ies(priv)) 815 + wiphy_err(wiphy, "Failed to delete mgmt IEs!\n"); 816 + 817 + if (mwifiex_send_cmd_sync(priv, HostCmd_CMD_UAP_BSS_STOP, 818 + HostCmd_ACT_GEN_SET, 0, NULL)) { 819 + wiphy_err(wiphy, "Failed to stop the BSS\n"); 820 + return -1; 821 + } 822 + 823 + return 0; 824 + } 825 + 826 + /* cfg80211 operation handler for start_ap. 827 + * Function sets beacon period, DTIM period, SSID and security into 828 + * AP config structure. 829 + * AP is configured with these settings and BSS is started. 830 + */ 831 + static int mwifiex_cfg80211_start_ap(struct wiphy *wiphy, 832 + struct net_device *dev, 833 + struct cfg80211_ap_settings *params) 834 + { 835 + struct mwifiex_uap_bss_param *bss_cfg; 836 + struct mwifiex_private *priv = mwifiex_netdev_get_priv(dev); 837 + 838 + if (priv->bss_type != MWIFIEX_BSS_TYPE_UAP) 839 + return -1; 840 + if (mwifiex_set_mgmt_ies(priv, params)) 841 + return -1; 842 + 843 + bss_cfg = kzalloc(sizeof(struct mwifiex_uap_bss_param), GFP_KERNEL); 844 + if (!bss_cfg) 845 + return -ENOMEM; 846 + 847 + mwifiex_set_sys_config_invalid_data(bss_cfg); 848 + 849 + if (params->beacon_interval) 850 + bss_cfg->beacon_period = params->beacon_interval; 851 + if (params->dtim_period) 852 + bss_cfg->dtim_period = params->dtim_period; 853 + 854 + if (params->ssid && params->ssid_len) { 855 + memcpy(bss_cfg->ssid.ssid, params->ssid, params->ssid_len); 856 + bss_cfg->ssid.ssid_len = params->ssid_len; 857 + } 858 + 859 + if (mwifiex_set_secure_params(priv, bss_cfg, params)) { 860 + kfree(bss_cfg); 861 + wiphy_err(wiphy, "Failed to parse secuirty parameters!\n"); 862 + return -1; 863 + } 864 + 865 + if (mwifiex_send_cmd_sync(priv, HostCmd_CMD_UAP_BSS_STOP, 866 + HostCmd_ACT_GEN_SET, 0, NULL)) { 867 + wiphy_err(wiphy, "Failed to stop the BSS\n"); 868 + kfree(bss_cfg); 869 + return -1; 870 + } 871 + 872 + if (mwifiex_send_cmd_async(priv, HostCmd_CMD_UAP_SYS_CONFIG, 873 + HostCmd_ACT_GEN_SET, 874 + UAP_BSS_PARAMS_I, bss_cfg)) { 875 + wiphy_err(wiphy, "Failed to set the SSID\n"); 876 + kfree(bss_cfg); 877 + return -1; 878 + } 879 + 880 + kfree(bss_cfg); 881 + 882 + if (mwifiex_send_cmd_async(priv, HostCmd_CMD_UAP_BSS_START, 883 + HostCmd_ACT_GEN_SET, 0, NULL)) { 884 + wiphy_err(wiphy, "Failed to start the BSS\n"); 885 + return -1; 886 + } 887 + 888 + return 0; 889 + } 890 + 899 891 /* 900 892 * CFG802.11 operation handler for disconnection request. 901 893 * ··· 1099 923 priv->wep_key_curr_index = 0; 1100 924 priv->sec_info.encryption_mode = 0; 1101 925 priv->sec_info.is_authtype_auto = 0; 1102 - ret = mwifiex_set_encode(priv, NULL, 0, 0, 1); 926 + ret = mwifiex_set_encode(priv, NULL, 0, 0, NULL, 1); 1103 927 1104 928 if (mode == NL80211_IFTYPE_ADHOC) { 1105 929 /* "privacy" is set only for ad-hoc mode */ ··· 1147 971 " with key len %d\n", sme->key_len); 1148 972 priv->wep_key_curr_index = sme->key_idx; 1149 973 ret = mwifiex_set_encode(priv, sme->key, sme->key_len, 1150 - sme->key_idx, 0); 974 + sme->key_idx, NULL, 0); 1151 975 } 1152 976 } 1153 977 done: ··· 1223 1047 if (priv->bss_mode == NL80211_IFTYPE_ADHOC) { 1224 1048 wiphy_err(wiphy, "received infra assoc request " 1225 1049 "when station is in ibss mode\n"); 1050 + goto done; 1051 + } 1052 + 1053 + if (priv->bss_mode == NL80211_IFTYPE_AP) { 1054 + wiphy_err(wiphy, "skip association request for AP interface\n"); 1226 1055 goto done; 1227 1056 } 1228 1057 ··· 1464 1283 u32 *flags, 1465 1284 struct vif_params *params) 1466 1285 { 1467 - struct mwifiex_private *priv = mwifiex_cfg80211_get_priv(wiphy); 1468 - struct mwifiex_adapter *adapter; 1286 + struct mwifiex_adapter *adapter = mwifiex_cfg80211_get_adapter(wiphy); 1287 + struct mwifiex_private *priv; 1469 1288 struct net_device *dev; 1470 1289 void *mdev_priv; 1290 + struct wireless_dev *wdev; 1471 1291 1472 - if (!priv) 1473 - return NULL; 1474 - 1475 - adapter = priv->adapter; 1476 1292 if (!adapter) 1477 1293 return NULL; 1478 1294 ··· 1477 1299 case NL80211_IFTYPE_UNSPECIFIED: 1478 1300 case NL80211_IFTYPE_STATION: 1479 1301 case NL80211_IFTYPE_ADHOC: 1302 + priv = adapter->priv[MWIFIEX_BSS_TYPE_STA]; 1480 1303 if (priv->bss_mode) { 1481 - wiphy_err(wiphy, "cannot create multiple" 1482 - " station/adhoc interfaces\n"); 1304 + wiphy_err(wiphy, 1305 + "cannot create multiple sta/adhoc ifaces\n"); 1483 1306 return NULL; 1484 1307 } 1308 + 1309 + wdev = kzalloc(sizeof(struct wireless_dev), GFP_KERNEL); 1310 + if (!wdev) 1311 + return NULL; 1312 + 1313 + wdev->wiphy = wiphy; 1314 + priv->wdev = wdev; 1315 + wdev->iftype = NL80211_IFTYPE_STATION; 1485 1316 1486 1317 if (type == NL80211_IFTYPE_UNSPECIFIED) 1487 1318 priv->bss_mode = NL80211_IFTYPE_STATION; ··· 1499 1312 1500 1313 priv->bss_type = MWIFIEX_BSS_TYPE_STA; 1501 1314 priv->frame_type = MWIFIEX_DATA_FRAME_TYPE_ETH_II; 1502 - priv->bss_priority = 0; 1315 + priv->bss_priority = MWIFIEX_BSS_ROLE_STA; 1503 1316 priv->bss_role = MWIFIEX_BSS_ROLE_STA; 1504 1317 priv->bss_num = 0; 1318 + 1319 + break; 1320 + case NL80211_IFTYPE_AP: 1321 + priv = adapter->priv[MWIFIEX_BSS_TYPE_UAP]; 1322 + 1323 + if (priv->bss_mode) { 1324 + wiphy_err(wiphy, "Can't create multiple AP interfaces"); 1325 + return NULL; 1326 + } 1327 + 1328 + wdev = kzalloc(sizeof(struct wireless_dev), GFP_KERNEL); 1329 + if (!wdev) 1330 + return NULL; 1331 + 1332 + priv->wdev = wdev; 1333 + wdev->wiphy = wiphy; 1334 + wdev->iftype = NL80211_IFTYPE_AP; 1335 + 1336 + priv->bss_type = MWIFIEX_BSS_TYPE_UAP; 1337 + priv->frame_type = MWIFIEX_DATA_FRAME_TYPE_ETH_II; 1338 + priv->bss_priority = MWIFIEX_BSS_ROLE_UAP; 1339 + priv->bss_role = MWIFIEX_BSS_ROLE_UAP; 1340 + priv->bss_started = 0; 1341 + priv->bss_num = 0; 1342 + priv->bss_mode = type; 1505 1343 1506 1344 break; 1507 1345 default: ··· 1541 1329 goto error; 1542 1330 } 1543 1331 1332 + mwifiex_init_priv_params(priv, dev); 1333 + priv->netdev = dev; 1334 + 1335 + mwifiex_setup_ht_caps(&wiphy->bands[IEEE80211_BAND_2GHZ]->ht_cap, priv); 1336 + 1337 + if (adapter->config_bands & BAND_A) 1338 + mwifiex_setup_ht_caps( 1339 + &wiphy->bands[IEEE80211_BAND_5GHZ]->ht_cap, priv); 1340 + 1544 1341 dev_net_set(dev, wiphy_net(wiphy)); 1545 1342 dev->ieee80211_ptr = priv->wdev; 1546 1343 dev->ieee80211_ptr->iftype = priv->bss_mode; ··· 1563 1342 1564 1343 mdev_priv = netdev_priv(dev); 1565 1344 *((unsigned long *) mdev_priv) = (unsigned long) priv; 1566 - 1567 - priv->netdev = dev; 1568 - mwifiex_init_priv_params(priv, dev); 1569 1345 1570 1346 SET_NETDEV_DEV(dev, adapter->dev); 1571 1347 ··· 1635 1417 .get_station = mwifiex_cfg80211_get_station, 1636 1418 .dump_station = mwifiex_cfg80211_dump_station, 1637 1419 .set_wiphy_params = mwifiex_cfg80211_set_wiphy_params, 1638 - .set_channel = mwifiex_cfg80211_set_channel, 1639 1420 .join_ibss = mwifiex_cfg80211_join_ibss, 1640 1421 .leave_ibss = mwifiex_cfg80211_leave_ibss, 1641 1422 .add_key = mwifiex_cfg80211_add_key, ··· 1643 1426 .set_power_mgmt = mwifiex_cfg80211_set_power_mgmt, 1644 1427 .set_tx_power = mwifiex_cfg80211_set_tx_power, 1645 1428 .set_bitrate_mask = mwifiex_cfg80211_set_bitrate_mask, 1429 + .start_ap = mwifiex_cfg80211_start_ap, 1430 + .stop_ap = mwifiex_cfg80211_stop_ap, 1646 1431 .set_cqm_rssi_config = mwifiex_cfg80211_set_cqm_rssi_config, 1647 1432 }; 1648 1433 ··· 1655 1436 * default parameters and handler function pointers, and finally 1656 1437 * registers the device. 1657 1438 */ 1658 - int mwifiex_register_cfg80211(struct mwifiex_private *priv) 1439 + 1440 + int mwifiex_register_cfg80211(struct mwifiex_adapter *adapter) 1659 1441 { 1660 1442 int ret; 1661 1443 void *wdev_priv; 1662 - struct wireless_dev *wdev; 1663 - struct ieee80211_sta_ht_cap *ht_info; 1444 + struct wiphy *wiphy; 1445 + struct mwifiex_private *priv = adapter->priv[MWIFIEX_BSS_TYPE_STA]; 1664 1446 u8 *country_code; 1665 1447 1666 - wdev = kzalloc(sizeof(struct wireless_dev), GFP_KERNEL); 1667 - if (!wdev) { 1668 - dev_err(priv->adapter->dev, "%s: allocating wireless device\n", 1669 - __func__); 1448 + /* create a new wiphy for use with cfg80211 */ 1449 + wiphy = wiphy_new(&mwifiex_cfg80211_ops, 1450 + sizeof(struct mwifiex_adapter *)); 1451 + if (!wiphy) { 1452 + dev_err(adapter->dev, "%s: creating new wiphy\n", __func__); 1670 1453 return -ENOMEM; 1671 1454 } 1672 - wdev->wiphy = 1673 - wiphy_new(&mwifiex_cfg80211_ops, 1674 - sizeof(struct mwifiex_private *)); 1675 - if (!wdev->wiphy) { 1676 - kfree(wdev); 1677 - return -ENOMEM; 1678 - } 1679 - wdev->iftype = NL80211_IFTYPE_STATION; 1680 - wdev->wiphy->max_scan_ssids = 10; 1681 - wdev->wiphy->max_scan_ie_len = MWIFIEX_MAX_VSIE_LEN; 1682 - wdev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 1683 - BIT(NL80211_IFTYPE_ADHOC); 1455 + wiphy->max_scan_ssids = MWIFIEX_MAX_SSID_LIST_LENGTH; 1456 + wiphy->max_scan_ie_len = MWIFIEX_MAX_VSIE_LEN; 1457 + wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 1458 + BIT(NL80211_IFTYPE_ADHOC) | 1459 + BIT(NL80211_IFTYPE_AP); 1684 1460 1685 - wdev->wiphy->bands[IEEE80211_BAND_2GHZ] = &mwifiex_band_2ghz; 1686 - ht_info = &wdev->wiphy->bands[IEEE80211_BAND_2GHZ]->ht_cap; 1687 - mwifiex_setup_ht_caps(ht_info, priv); 1461 + wiphy->bands[IEEE80211_BAND_2GHZ] = &mwifiex_band_2ghz; 1462 + if (adapter->config_bands & BAND_A) 1463 + wiphy->bands[IEEE80211_BAND_5GHZ] = &mwifiex_band_5ghz; 1464 + else 1465 + wiphy->bands[IEEE80211_BAND_5GHZ] = NULL; 1688 1466 1689 - if (priv->adapter->config_bands & BAND_A) { 1690 - wdev->wiphy->bands[IEEE80211_BAND_5GHZ] = &mwifiex_band_5ghz; 1691 - ht_info = &wdev->wiphy->bands[IEEE80211_BAND_5GHZ]->ht_cap; 1692 - mwifiex_setup_ht_caps(ht_info, priv); 1693 - } else { 1694 - wdev->wiphy->bands[IEEE80211_BAND_5GHZ] = NULL; 1695 - } 1467 + wiphy->iface_combinations = &mwifiex_iface_comb_ap_sta; 1468 + wiphy->n_iface_combinations = 1; 1696 1469 1697 1470 /* Initialize cipher suits */ 1698 - wdev->wiphy->cipher_suites = mwifiex_cipher_suites; 1699 - wdev->wiphy->n_cipher_suites = ARRAY_SIZE(mwifiex_cipher_suites); 1471 + wiphy->cipher_suites = mwifiex_cipher_suites; 1472 + wiphy->n_cipher_suites = ARRAY_SIZE(mwifiex_cipher_suites); 1700 1473 1701 - memcpy(wdev->wiphy->perm_addr, priv->curr_addr, ETH_ALEN); 1702 - wdev->wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; 1474 + memcpy(wiphy->perm_addr, priv->curr_addr, ETH_ALEN); 1475 + wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; 1476 + wiphy->flags |= WIPHY_FLAG_HAVE_AP_SME | WIPHY_FLAG_CUSTOM_REGULATORY; 1703 1477 1704 1478 /* Reserve space for mwifiex specific private data for BSS */ 1705 - wdev->wiphy->bss_priv_size = sizeof(struct mwifiex_bss_priv); 1479 + wiphy->bss_priv_size = sizeof(struct mwifiex_bss_priv); 1706 1480 1707 - wdev->wiphy->reg_notifier = mwifiex_reg_notifier; 1481 + wiphy->reg_notifier = mwifiex_reg_notifier; 1708 1482 1709 - /* Set struct mwifiex_private pointer in wiphy_priv */ 1710 - wdev_priv = wiphy_priv(wdev->wiphy); 1483 + /* Set struct mwifiex_adapter pointer in wiphy_priv */ 1484 + wdev_priv = wiphy_priv(wiphy); 1485 + *(unsigned long *)wdev_priv = (unsigned long)adapter; 1711 1486 1712 - *(unsigned long *) wdev_priv = (unsigned long) priv; 1487 + set_wiphy_dev(wiphy, (struct device *)priv->adapter->dev); 1713 1488 1714 - set_wiphy_dev(wdev->wiphy, (struct device *) priv->adapter->dev); 1715 - 1716 - ret = wiphy_register(wdev->wiphy); 1489 + ret = wiphy_register(wiphy); 1717 1490 if (ret < 0) { 1718 - dev_err(priv->adapter->dev, "%s: registering cfg80211 device\n", 1719 - __func__); 1720 - wiphy_free(wdev->wiphy); 1721 - kfree(wdev); 1491 + dev_err(adapter->dev, 1492 + "%s: wiphy_register failed: %d\n", __func__, ret); 1493 + wiphy_free(wiphy); 1722 1494 return ret; 1723 - } else { 1724 - dev_dbg(priv->adapter->dev, 1725 - "info: successfully registered wiphy device\n"); 1726 1495 } 1727 - 1728 1496 country_code = mwifiex_11d_code_2_region(priv->adapter->region_code); 1729 - if (country_code && regulatory_hint(wdev->wiphy, country_code)) 1730 - dev_err(priv->adapter->dev, 1731 - "%s: regulatory_hint failed\n", __func__); 1497 + if (country_code && regulatory_hint(wiphy, country_code)) 1498 + dev_err(adapter->dev, "regulatory_hint() failed\n"); 1732 1499 1733 - priv->wdev = wdev; 1734 - 1500 + adapter->wiphy = wiphy; 1735 1501 return ret; 1736 1502 }
+1 -1
drivers/net/wireless/mwifiex/cfg80211.h
··· 24 24 25 25 #include "main.h" 26 26 27 - int mwifiex_register_cfg80211(struct mwifiex_private *); 27 + int mwifiex_register_cfg80211(struct mwifiex_adapter *); 28 28 29 29 #endif
+19 -2
drivers/net/wireless/mwifiex/cmdevt.c
··· 440 440 do_gettimeofday(&tstamp); 441 441 dev_dbg(adapter->dev, "event: %lu.%lu: cause: %#x\n", 442 442 tstamp.tv_sec, tstamp.tv_usec, eventcause); 443 + } else { 444 + /* Handle PS_SLEEP/AWAKE events on STA */ 445 + priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA); 446 + if (!priv) 447 + priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY); 443 448 } 444 449 445 450 ret = mwifiex_process_sta_event(priv); ··· 545 540 546 541 /* Prepare command */ 547 542 if (cmd_no) { 548 - ret = mwifiex_sta_prepare_cmd(priv, cmd_no, cmd_action, 549 - cmd_oid, data_buf, cmd_ptr); 543 + switch (cmd_no) { 544 + case HostCmd_CMD_UAP_SYS_CONFIG: 545 + case HostCmd_CMD_UAP_BSS_START: 546 + case HostCmd_CMD_UAP_BSS_STOP: 547 + ret = mwifiex_uap_prepare_cmd(priv, cmd_no, cmd_action, 548 + cmd_oid, data_buf, 549 + cmd_ptr); 550 + break; 551 + default: 552 + ret = mwifiex_sta_prepare_cmd(priv, cmd_no, cmd_action, 553 + cmd_oid, data_buf, 554 + cmd_ptr); 555 + break; 556 + } 550 557 } else { 551 558 ret = mwifiex_cmd_host_cmd(priv, cmd_ptr, data_buf); 552 559 cmd_node->cmd_flag |= CMD_F_HOSTCMD;
+12 -1
drivers/net/wireless/mwifiex/decl.h
··· 28 28 #include <linux/ieee80211.h> 29 29 30 30 31 - #define MWIFIEX_MAX_BSS_NUM (1) 31 + #define MWIFIEX_MAX_BSS_NUM (2) 32 32 33 33 #define MWIFIEX_MIN_DATA_HEADER_LEN 36 /* sizeof(mwifiex_txpd) 34 34 * + 4 byte alignment ··· 55 55 #define MWIFIEX_RX_DATA_BUF_SIZE (4 * 1024) 56 56 #define MWIFIEX_RX_CMD_BUF_SIZE (2 * 1024) 57 57 58 + #define MAX_BEACON_PERIOD (4000) 59 + #define MIN_BEACON_PERIOD (50) 60 + #define MAX_DTIM_PERIOD (100) 61 + #define MIN_DTIM_PERIOD (1) 62 + 58 63 #define MWIFIEX_RTS_MIN_VALUE (0) 59 64 #define MWIFIEX_RTS_MAX_VALUE (2347) 60 65 #define MWIFIEX_FRAG_MIN_VALUE (256) 61 66 #define MWIFIEX_FRAG_MAX_VALUE (2346) 62 67 68 + #define MWIFIEX_RETRY_LIMIT 14 63 69 #define MWIFIEX_SDIO_BLOCK_SIZE 256 64 70 65 71 #define MWIFIEX_BUF_FLAG_REQUEUED_PKT BIT(0) ··· 96 90 u32 helper_len; 97 91 u8 *fw_buf; 98 92 u32 fw_len; 93 + }; 94 + 95 + struct mwifiex_802_11_ssid { 96 + u32 ssid_len; 97 + u8 ssid[IEEE80211_MAX_SSID_LEN]; 99 98 }; 100 99 101 100 struct mwifiex_wait_queue {
+158 -1
drivers/net/wireless/mwifiex/fw.h
··· 93 93 94 94 #define CAL_SNR(RSSI, NF) ((s16)((s16)(RSSI)-(s16)(NF))) 95 95 96 + #define UAP_BSS_PARAMS_I 0 97 + #define UAP_CUSTOM_IE_I 1 98 + #define MWIFIEX_AUTO_IDX_MASK 0xffff 99 + #define MWIFIEX_DELETE_MASK 0x0000 100 + #define MGMT_MASK_ASSOC_REQ 0x01 101 + #define MGMT_MASK_REASSOC_REQ 0x04 102 + #define MGMT_MASK_ASSOC_RESP 0x02 103 + #define MGMT_MASK_REASSOC_RESP 0x08 104 + #define MGMT_MASK_PROBE_REQ 0x10 105 + #define MGMT_MASK_PROBE_RESP 0x20 106 + #define MGMT_MASK_BEACON 0x100 107 + 108 + #define TLV_TYPE_UAP_SSID 0x0000 109 + 96 110 #define PROPRIETARY_TLV_BASE_ID 0x0100 97 111 #define TLV_TYPE_KEY_MATERIAL (PROPRIETARY_TLV_BASE_ID + 0) 98 112 #define TLV_TYPE_CHANLIST (PROPRIETARY_TLV_BASE_ID + 1) ··· 118 104 #define TLV_TYPE_TSFTIMESTAMP (PROPRIETARY_TLV_BASE_ID + 19) 119 105 #define TLV_TYPE_RSSI_HIGH (PROPRIETARY_TLV_BASE_ID + 22) 120 106 #define TLV_TYPE_AUTH_TYPE (PROPRIETARY_TLV_BASE_ID + 31) 107 + #define TLV_TYPE_STA_MAC_ADDR (PROPRIETARY_TLV_BASE_ID + 32) 121 108 #define TLV_TYPE_CHANNELBANDLIST (PROPRIETARY_TLV_BASE_ID + 42) 109 + #define TLV_TYPE_UAP_BEACON_PERIOD (PROPRIETARY_TLV_BASE_ID + 44) 110 + #define TLV_TYPE_UAP_DTIM_PERIOD (PROPRIETARY_TLV_BASE_ID + 45) 111 + #define TLV_TYPE_UAP_RTS_THRESHOLD (PROPRIETARY_TLV_BASE_ID + 51) 112 + #define TLV_TYPE_UAP_WPA_PASSPHRASE (PROPRIETARY_TLV_BASE_ID + 60) 113 + #define TLV_TYPE_UAP_ENCRY_PROTOCOL (PROPRIETARY_TLV_BASE_ID + 64) 114 + #define TLV_TYPE_UAP_AKMP (PROPRIETARY_TLV_BASE_ID + 65) 115 + #define TLV_TYPE_UAP_FRAG_THRESHOLD (PROPRIETARY_TLV_BASE_ID + 70) 122 116 #define TLV_TYPE_RATE_DROP_CONTROL (PROPRIETARY_TLV_BASE_ID + 82) 123 117 #define TLV_TYPE_RATE_SCOPE (PROPRIETARY_TLV_BASE_ID + 83) 124 118 #define TLV_TYPE_POWER_GROUP (PROPRIETARY_TLV_BASE_ID + 84) 119 + #define TLV_TYPE_UAP_RETRY_LIMIT (PROPRIETARY_TLV_BASE_ID + 93) 125 120 #define TLV_TYPE_WAPI_IE (PROPRIETARY_TLV_BASE_ID + 94) 121 + #define TLV_TYPE_UAP_MGMT_FRAME (PROPRIETARY_TLV_BASE_ID + 104) 126 122 #define TLV_TYPE_MGMT_IE (PROPRIETARY_TLV_BASE_ID + 105) 127 123 #define TLV_TYPE_AUTO_DS_PARAM (PROPRIETARY_TLV_BASE_ID + 113) 128 124 #define TLV_TYPE_PS_PARAM (PROPRIETARY_TLV_BASE_ID + 114) 125 + #define TLV_TYPE_PWK_CIPHER (PROPRIETARY_TLV_BASE_ID + 145) 126 + #define TLV_TYPE_GWK_CIPHER (PROPRIETARY_TLV_BASE_ID + 146) 129 127 130 128 #define MWIFIEX_TX_DATA_BUF_SIZE_2K 2048 131 129 ··· 235 209 #define HostCmd_CMD_RSSI_INFO 0x00a4 236 210 #define HostCmd_CMD_FUNC_INIT 0x00a9 237 211 #define HostCmd_CMD_FUNC_SHUTDOWN 0x00aa 212 + #define HostCmd_CMD_UAP_SYS_CONFIG 0x00b0 213 + #define HostCmd_CMD_UAP_BSS_START 0x00b1 214 + #define HostCmd_CMD_UAP_BSS_STOP 0x00b2 238 215 #define HostCmd_CMD_11N_CFG 0x00cd 239 216 #define HostCmd_CMD_11N_ADDBA_REQ 0x00ce 240 217 #define HostCmd_CMD_11N_ADDBA_RSP 0x00cf ··· 251 222 #define HostCmd_CMD_CAU_REG_ACCESS 0x00ed 252 223 #define HostCmd_CMD_SET_BSS_MODE 0x00f7 253 224 #define HostCmd_CMD_PCIE_DESC_DETAILS 0x00fa 225 + 226 + #define PROTOCOL_NO_SECURITY 0x01 227 + #define PROTOCOL_STATIC_WEP 0x02 228 + #define PROTOCOL_WPA 0x08 229 + #define PROTOCOL_WPA2 0x20 230 + #define PROTOCOL_WPA2_MIXED 0x28 231 + #define PROTOCOL_EAP 0x40 232 + #define KEY_MGMT_NONE 0x04 233 + #define KEY_MGMT_PSK 0x02 234 + #define KEY_MGMT_EAP 0x01 235 + #define CIPHER_TKIP 0x04 236 + #define CIPHER_AES_CCMP 0x08 237 + #define VALID_CIPHER_BITMAP 0x0c 254 238 255 239 enum ENH_PS_MODES { 256 240 EN_PS = 1, ··· 355 313 #define EVENT_DATA_SNR_HIGH 0x00000027 356 314 #define EVENT_LINK_QUALITY 0x00000028 357 315 #define EVENT_PORT_RELEASE 0x0000002b 316 + #define EVENT_UAP_STA_DEAUTH 0x0000002c 317 + #define EVENT_UAP_STA_ASSOC 0x0000002d 318 + #define EVENT_UAP_BSS_START 0x0000002e 358 319 #define EVENT_PRE_BEACON_LOST 0x00000031 359 320 #define EVENT_ADDBA 0x00000033 360 321 #define EVENT_DELBA 0x00000034 361 322 #define EVENT_BA_STREAM_TIEMOUT 0x00000037 362 323 #define EVENT_AMSDU_AGGR_CTRL 0x00000042 324 + #define EVENT_UAP_BSS_IDLE 0x00000043 325 + #define EVENT_UAP_BSS_ACTIVE 0x00000044 363 326 #define EVENT_WEP_ICV_ERR 0x00000046 364 327 #define EVENT_HS_ACT_REQ 0x00000047 365 328 #define EVENT_BW_CHANGE 0x00000048 366 - 329 + #define EVENT_UAP_MIC_COUNTERMEASURES 0x0000004c 367 330 #define EVENT_HOSTWAKE_STAIE 0x0000004d 368 331 369 332 #define EVENT_ID_MASK 0xffff ··· 1150 1103 u8 value; 1151 1104 } __packed; 1152 1105 1106 + struct host_cmd_tlv { 1107 + __le16 type; 1108 + __le16 len; 1109 + } __packed; 1110 + 1111 + struct mwifiex_assoc_event { 1112 + u8 sta_addr[ETH_ALEN]; 1113 + __le16 type; 1114 + __le16 len; 1115 + __le16 frame_control; 1116 + __le16 cap_info; 1117 + __le16 listen_interval; 1118 + u8 data[0]; 1119 + } __packed; 1120 + 1121 + struct host_cmd_ds_sys_config { 1122 + __le16 action; 1123 + u8 tlv[0]; 1124 + }; 1125 + 1126 + struct host_cmd_tlv_akmp { 1127 + struct host_cmd_tlv tlv; 1128 + __le16 key_mgmt; 1129 + __le16 key_mgmt_operation; 1130 + } __packed; 1131 + 1132 + struct host_cmd_tlv_pwk_cipher { 1133 + struct host_cmd_tlv tlv; 1134 + __le16 proto; 1135 + u8 cipher; 1136 + u8 reserved; 1137 + } __packed; 1138 + 1139 + struct host_cmd_tlv_gwk_cipher { 1140 + struct host_cmd_tlv tlv; 1141 + u8 cipher; 1142 + u8 reserved; 1143 + } __packed; 1144 + 1145 + struct host_cmd_tlv_passphrase { 1146 + struct host_cmd_tlv tlv; 1147 + u8 passphrase[0]; 1148 + } __packed; 1149 + 1150 + struct host_cmd_tlv_auth_type { 1151 + struct host_cmd_tlv tlv; 1152 + u8 auth_type; 1153 + } __packed; 1154 + 1155 + struct host_cmd_tlv_encrypt_protocol { 1156 + struct host_cmd_tlv tlv; 1157 + __le16 proto; 1158 + } __packed; 1159 + 1160 + struct host_cmd_tlv_ssid { 1161 + struct host_cmd_tlv tlv; 1162 + u8 ssid[0]; 1163 + } __packed; 1164 + 1165 + struct host_cmd_tlv_beacon_period { 1166 + struct host_cmd_tlv tlv; 1167 + __le16 period; 1168 + } __packed; 1169 + 1170 + struct host_cmd_tlv_dtim_period { 1171 + struct host_cmd_tlv tlv; 1172 + u8 period; 1173 + } __packed; 1174 + 1175 + struct host_cmd_tlv_frag_threshold { 1176 + struct host_cmd_tlv tlv; 1177 + __le16 frag_thr; 1178 + } __packed; 1179 + 1180 + struct host_cmd_tlv_rts_threshold { 1181 + struct host_cmd_tlv tlv; 1182 + __le16 rts_thr; 1183 + } __packed; 1184 + 1185 + struct host_cmd_tlv_retry_limit { 1186 + struct host_cmd_tlv tlv; 1187 + u8 limit; 1188 + } __packed; 1189 + 1190 + struct host_cmd_tlv_mac_addr { 1191 + struct host_cmd_tlv tlv; 1192 + u8 mac_addr[ETH_ALEN]; 1193 + } __packed; 1194 + 1195 + struct host_cmd_tlv_channel_band { 1196 + struct host_cmd_tlv tlv; 1197 + u8 band_config; 1198 + u8 channel; 1199 + } __packed; 1200 + 1153 1201 struct host_cmd_ds_802_11_rf_channel { 1154 1202 __le16 action; 1155 1203 __le16 current_channel; ··· 1309 1167 __le16 events; 1310 1168 } __packed; 1311 1169 1170 + struct mwifiex_ie { 1171 + __le16 ie_index; 1172 + __le16 mgmt_subtype_mask; 1173 + __le16 ie_length; 1174 + u8 ie_buffer[IEEE_MAX_IE_SIZE]; 1175 + } __packed; 1176 + 1177 + #define MAX_MGMT_IE_INDEX 16 1178 + struct mwifiex_ie_list { 1179 + __le16 type; 1180 + __le16 len; 1181 + struct mwifiex_ie ie_list[MAX_MGMT_IE_INDEX]; 1182 + } __packed; 1183 + 1312 1184 struct host_cmd_ds_command { 1313 1185 __le16 command; 1314 1186 __le16 size; ··· 1373 1217 struct host_cmd_ds_pcie_details pcie_host_spec; 1374 1218 struct host_cmd_ds_802_11_eeprom_access eeprom; 1375 1219 struct host_cmd_ds_802_11_subsc_evt subsc_evt; 1220 + struct host_cmd_ds_sys_config uap_sys_config; 1376 1221 } params; 1377 1222 } __packed; 1378 1223
+396
drivers/net/wireless/mwifiex/ie.c
··· 1 + /* 2 + * Marvell Wireless LAN device driver: management IE handling- setting and 3 + * deleting IE. 4 + * 5 + * Copyright (C) 2012, Marvell International Ltd. 6 + * 7 + * This software file (the "File") is distributed by Marvell International 8 + * Ltd. under the terms of the GNU General Public License Version 2, June 1991 9 + * (the "License"). You may use, redistribute and/or modify this File in 10 + * accordance with the terms and conditions of the License, a copy of which 11 + * is available by writing to the Free Software Foundation, Inc., 12 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 13 + * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 14 + * 15 + * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 16 + * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 17 + * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 18 + * this warranty disclaimer. 19 + */ 20 + 21 + #include "main.h" 22 + 23 + /* This function checks if current IE index is used by any on other interface. 24 + * Return: -1: yes, current IE index is used by someone else. 25 + * 0: no, current IE index is NOT used by other interface. 26 + */ 27 + static int 28 + mwifiex_ie_index_used_by_other_intf(struct mwifiex_private *priv, u16 idx) 29 + { 30 + int i; 31 + struct mwifiex_adapter *adapter = priv->adapter; 32 + struct mwifiex_ie *ie; 33 + 34 + for (i = 0; i < adapter->priv_num; i++) { 35 + if (adapter->priv[i] != priv) { 36 + ie = &adapter->priv[i]->mgmt_ie[idx]; 37 + if (ie->mgmt_subtype_mask && ie->ie_length) 38 + return -1; 39 + } 40 + } 41 + 42 + return 0; 43 + } 44 + 45 + /* Get unused IE index. This index will be used for setting new IE */ 46 + static int 47 + mwifiex_ie_get_autoidx(struct mwifiex_private *priv, u16 subtype_mask, 48 + struct mwifiex_ie *ie, u16 *index) 49 + { 50 + u16 mask, len, i; 51 + 52 + for (i = 0; i < priv->adapter->max_mgmt_ie_index; i++) { 53 + mask = le16_to_cpu(priv->mgmt_ie[i].mgmt_subtype_mask); 54 + len = le16_to_cpu(priv->mgmt_ie[i].ie_length) + 55 + le16_to_cpu(ie->ie_length); 56 + 57 + if (mask == MWIFIEX_AUTO_IDX_MASK) 58 + continue; 59 + 60 + if (mask == subtype_mask) { 61 + if (len > IEEE_MAX_IE_SIZE) 62 + continue; 63 + 64 + *index = i; 65 + return 0; 66 + } 67 + 68 + if (!priv->mgmt_ie[i].ie_length) { 69 + if (mwifiex_ie_index_used_by_other_intf(priv, i)) 70 + continue; 71 + 72 + *index = i; 73 + return 0; 74 + } 75 + } 76 + 77 + return -1; 78 + } 79 + 80 + /* This function prepares IE data buffer for command to be sent to FW */ 81 + static int 82 + mwifiex_update_autoindex_ies(struct mwifiex_private *priv, 83 + struct mwifiex_ie_list *ie_list) 84 + { 85 + u16 travel_len, index, mask; 86 + s16 input_len; 87 + struct mwifiex_ie *ie; 88 + u8 *tmp; 89 + 90 + input_len = le16_to_cpu(ie_list->len); 91 + travel_len = sizeof(struct host_cmd_tlv); 92 + 93 + ie_list->len = 0; 94 + 95 + while (input_len > 0) { 96 + ie = (struct mwifiex_ie *)(((u8 *)ie_list) + travel_len); 97 + input_len -= le16_to_cpu(ie->ie_length) + MWIFIEX_IE_HDR_SIZE; 98 + travel_len += le16_to_cpu(ie->ie_length) + MWIFIEX_IE_HDR_SIZE; 99 + 100 + index = le16_to_cpu(ie->ie_index); 101 + mask = le16_to_cpu(ie->mgmt_subtype_mask); 102 + 103 + if (index == MWIFIEX_AUTO_IDX_MASK) { 104 + /* automatic addition */ 105 + if (mwifiex_ie_get_autoidx(priv, mask, ie, &index)) 106 + return -1; 107 + if (index == MWIFIEX_AUTO_IDX_MASK) 108 + return -1; 109 + 110 + tmp = (u8 *)&priv->mgmt_ie[index].ie_buffer; 111 + tmp += le16_to_cpu(priv->mgmt_ie[index].ie_length); 112 + memcpy(tmp, &ie->ie_buffer, le16_to_cpu(ie->ie_length)); 113 + le16_add_cpu(&priv->mgmt_ie[index].ie_length, 114 + le16_to_cpu(ie->ie_length)); 115 + priv->mgmt_ie[index].ie_index = cpu_to_le16(index); 116 + priv->mgmt_ie[index].mgmt_subtype_mask = 117 + cpu_to_le16(mask); 118 + 119 + ie->ie_index = cpu_to_le16(index); 120 + ie->ie_length = priv->mgmt_ie[index].ie_length; 121 + memcpy(&ie->ie_buffer, &priv->mgmt_ie[index].ie_buffer, 122 + le16_to_cpu(priv->mgmt_ie[index].ie_length)); 123 + } else { 124 + if (mask != MWIFIEX_DELETE_MASK) 125 + return -1; 126 + /* 127 + * Check if this index is being used on any 128 + * other interface. 129 + */ 130 + if (mwifiex_ie_index_used_by_other_intf(priv, index)) 131 + return -1; 132 + 133 + ie->ie_length = 0; 134 + memcpy(&priv->mgmt_ie[index], ie, 135 + sizeof(struct mwifiex_ie)); 136 + } 137 + 138 + le16_add_cpu(&ie_list->len, 139 + le16_to_cpu(priv->mgmt_ie[index].ie_length) + 140 + MWIFIEX_IE_HDR_SIZE); 141 + } 142 + 143 + if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_UAP) 144 + return mwifiex_send_cmd_async(priv, HostCmd_CMD_UAP_SYS_CONFIG, 145 + HostCmd_ACT_GEN_SET, 146 + UAP_CUSTOM_IE_I, ie_list); 147 + 148 + return 0; 149 + } 150 + 151 + /* Copy individual custom IEs for beacon, probe response and assoc response 152 + * and prepare single structure for IE setting. 153 + * This function also updates allocated IE indices from driver. 154 + */ 155 + static int 156 + mwifiex_update_uap_custom_ie(struct mwifiex_private *priv, 157 + struct mwifiex_ie *beacon_ie, u16 *beacon_idx, 158 + struct mwifiex_ie *pr_ie, u16 *probe_idx, 159 + struct mwifiex_ie *ar_ie, u16 *assoc_idx) 160 + { 161 + struct mwifiex_ie_list *ap_custom_ie; 162 + u8 *pos; 163 + u16 len; 164 + int ret; 165 + 166 + ap_custom_ie = kzalloc(sizeof(struct mwifiex_ie), GFP_KERNEL); 167 + if (!ap_custom_ie) 168 + return -ENOMEM; 169 + 170 + ap_custom_ie->type = cpu_to_le16(TLV_TYPE_MGMT_IE); 171 + pos = (u8 *)ap_custom_ie->ie_list; 172 + 173 + if (beacon_ie) { 174 + len = sizeof(struct mwifiex_ie) - IEEE_MAX_IE_SIZE + 175 + le16_to_cpu(beacon_ie->ie_length); 176 + memcpy(pos, beacon_ie, len); 177 + pos += len; 178 + le16_add_cpu(&ap_custom_ie->len, len); 179 + } 180 + if (pr_ie) { 181 + len = sizeof(struct mwifiex_ie) - IEEE_MAX_IE_SIZE + 182 + le16_to_cpu(pr_ie->ie_length); 183 + memcpy(pos, pr_ie, len); 184 + pos += len; 185 + le16_add_cpu(&ap_custom_ie->len, len); 186 + } 187 + if (ar_ie) { 188 + len = sizeof(struct mwifiex_ie) - IEEE_MAX_IE_SIZE + 189 + le16_to_cpu(ar_ie->ie_length); 190 + memcpy(pos, ar_ie, len); 191 + pos += len; 192 + le16_add_cpu(&ap_custom_ie->len, len); 193 + } 194 + 195 + ret = mwifiex_update_autoindex_ies(priv, ap_custom_ie); 196 + 197 + pos = (u8 *)(&ap_custom_ie->ie_list[0].ie_index); 198 + if (beacon_ie && *beacon_idx == MWIFIEX_AUTO_IDX_MASK) { 199 + /* save beacon ie index after auto-indexing */ 200 + *beacon_idx = le16_to_cpu(ap_custom_ie->ie_list[0].ie_index); 201 + len = sizeof(*beacon_ie) - IEEE_MAX_IE_SIZE + 202 + le16_to_cpu(beacon_ie->ie_length); 203 + pos += len; 204 + } 205 + if (pr_ie && le16_to_cpu(pr_ie->ie_index) == MWIFIEX_AUTO_IDX_MASK) { 206 + /* save probe resp ie index after auto-indexing */ 207 + *probe_idx = *((u16 *)pos); 208 + len = sizeof(*pr_ie) - IEEE_MAX_IE_SIZE + 209 + le16_to_cpu(pr_ie->ie_length); 210 + pos += len; 211 + } 212 + if (ar_ie && le16_to_cpu(ar_ie->ie_index) == MWIFIEX_AUTO_IDX_MASK) 213 + /* save assoc resp ie index after auto-indexing */ 214 + *assoc_idx = *((u16 *)pos); 215 + 216 + return ret; 217 + } 218 + 219 + /* This function parses different IEs- Tail IEs, beacon IEs, probe response IEs, 220 + * association response IEs from cfg80211_ap_settings function and sets these IE 221 + * to FW. 222 + */ 223 + int mwifiex_set_mgmt_ies(struct mwifiex_private *priv, 224 + struct cfg80211_ap_settings *params) 225 + { 226 + struct mwifiex_ie *beacon_ie = NULL, *pr_ie = NULL; 227 + struct mwifiex_ie *ar_ie = NULL, *rsn_ie = NULL; 228 + struct ieee_types_header *ie = NULL; 229 + u16 beacon_idx = MWIFIEX_AUTO_IDX_MASK, pr_idx = MWIFIEX_AUTO_IDX_MASK; 230 + u16 ar_idx = MWIFIEX_AUTO_IDX_MASK, rsn_idx = MWIFIEX_AUTO_IDX_MASK; 231 + u16 mask; 232 + int ret = 0; 233 + 234 + if (params->beacon.tail && params->beacon.tail_len) { 235 + ie = (void *)cfg80211_find_ie(WLAN_EID_RSN, params->beacon.tail, 236 + params->beacon.tail_len); 237 + if (ie) { 238 + rsn_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL); 239 + if (!rsn_ie) 240 + return -ENOMEM; 241 + 242 + rsn_ie->ie_index = cpu_to_le16(rsn_idx); 243 + mask = MGMT_MASK_BEACON | MGMT_MASK_PROBE_RESP | 244 + MGMT_MASK_ASSOC_RESP; 245 + rsn_ie->mgmt_subtype_mask = cpu_to_le16(mask); 246 + rsn_ie->ie_length = cpu_to_le16(ie->len + 2); 247 + memcpy(rsn_ie->ie_buffer, ie, ie->len + 2); 248 + 249 + if (mwifiex_update_uap_custom_ie(priv, rsn_ie, &rsn_idx, 250 + NULL, NULL, 251 + NULL, NULL)) { 252 + ret = -1; 253 + goto done; 254 + } 255 + 256 + priv->rsn_idx = rsn_idx; 257 + } 258 + } 259 + 260 + if (params->beacon.beacon_ies && params->beacon.beacon_ies_len) { 261 + beacon_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL); 262 + if (!beacon_ie) { 263 + ret = -ENOMEM; 264 + goto done; 265 + } 266 + 267 + beacon_ie->ie_index = cpu_to_le16(beacon_idx); 268 + beacon_ie->mgmt_subtype_mask = cpu_to_le16(MGMT_MASK_BEACON); 269 + beacon_ie->ie_length = 270 + cpu_to_le16(params->beacon.beacon_ies_len); 271 + memcpy(beacon_ie->ie_buffer, params->beacon.beacon_ies, 272 + params->beacon.beacon_ies_len); 273 + } 274 + 275 + if (params->beacon.proberesp_ies && params->beacon.proberesp_ies_len) { 276 + pr_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL); 277 + if (!pr_ie) { 278 + ret = -ENOMEM; 279 + goto done; 280 + } 281 + 282 + pr_ie->ie_index = cpu_to_le16(pr_idx); 283 + pr_ie->mgmt_subtype_mask = cpu_to_le16(MGMT_MASK_PROBE_RESP); 284 + pr_ie->ie_length = 285 + cpu_to_le16(params->beacon.proberesp_ies_len); 286 + memcpy(pr_ie->ie_buffer, params->beacon.proberesp_ies, 287 + params->beacon.proberesp_ies_len); 288 + } 289 + 290 + if (params->beacon.assocresp_ies && params->beacon.assocresp_ies_len) { 291 + ar_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL); 292 + if (!ar_ie) { 293 + ret = -ENOMEM; 294 + goto done; 295 + } 296 + 297 + ar_ie->ie_index = cpu_to_le16(ar_idx); 298 + mask = MGMT_MASK_ASSOC_RESP | MGMT_MASK_REASSOC_RESP; 299 + ar_ie->mgmt_subtype_mask = cpu_to_le16(mask); 300 + ar_ie->ie_length = 301 + cpu_to_le16(params->beacon.assocresp_ies_len); 302 + memcpy(ar_ie->ie_buffer, params->beacon.assocresp_ies, 303 + params->beacon.assocresp_ies_len); 304 + } 305 + 306 + if (beacon_ie || pr_ie || ar_ie) { 307 + ret = mwifiex_update_uap_custom_ie(priv, beacon_ie, 308 + &beacon_idx, pr_ie, 309 + &pr_idx, ar_ie, &ar_idx); 310 + if (ret) 311 + goto done; 312 + } 313 + 314 + priv->beacon_idx = beacon_idx; 315 + priv->proberesp_idx = pr_idx; 316 + priv->assocresp_idx = ar_idx; 317 + 318 + done: 319 + kfree(beacon_ie); 320 + kfree(pr_ie); 321 + kfree(ar_ie); 322 + kfree(rsn_ie); 323 + 324 + return ret; 325 + } 326 + 327 + /* This function removes management IE set */ 328 + int mwifiex_del_mgmt_ies(struct mwifiex_private *priv) 329 + { 330 + struct mwifiex_ie *beacon_ie = NULL, *pr_ie = NULL; 331 + struct mwifiex_ie *ar_ie = NULL, *rsn_ie = NULL; 332 + int ret = 0; 333 + 334 + if (priv->rsn_idx != MWIFIEX_AUTO_IDX_MASK) { 335 + rsn_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL); 336 + if (!rsn_ie) 337 + return -ENOMEM; 338 + 339 + rsn_ie->ie_index = cpu_to_le16(priv->rsn_idx); 340 + rsn_ie->mgmt_subtype_mask = cpu_to_le16(MWIFIEX_DELETE_MASK); 341 + rsn_ie->ie_length = 0; 342 + if (mwifiex_update_uap_custom_ie(priv, rsn_ie, &priv->rsn_idx, 343 + NULL, &priv->proberesp_idx, 344 + NULL, &priv->assocresp_idx)) { 345 + ret = -1; 346 + goto done; 347 + } 348 + 349 + priv->rsn_idx = MWIFIEX_AUTO_IDX_MASK; 350 + } 351 + 352 + if (priv->beacon_idx != MWIFIEX_AUTO_IDX_MASK) { 353 + beacon_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL); 354 + if (!beacon_ie) { 355 + ret = -ENOMEM; 356 + goto done; 357 + } 358 + beacon_ie->ie_index = cpu_to_le16(priv->beacon_idx); 359 + beacon_ie->mgmt_subtype_mask = cpu_to_le16(MWIFIEX_DELETE_MASK); 360 + beacon_ie->ie_length = 0; 361 + } 362 + if (priv->proberesp_idx != MWIFIEX_AUTO_IDX_MASK) { 363 + pr_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL); 364 + if (!pr_ie) { 365 + ret = -ENOMEM; 366 + goto done; 367 + } 368 + pr_ie->ie_index = cpu_to_le16(priv->proberesp_idx); 369 + pr_ie->mgmt_subtype_mask = cpu_to_le16(MWIFIEX_DELETE_MASK); 370 + pr_ie->ie_length = 0; 371 + } 372 + if (priv->assocresp_idx != MWIFIEX_AUTO_IDX_MASK) { 373 + ar_ie = kmalloc(sizeof(struct mwifiex_ie), GFP_KERNEL); 374 + if (!ar_ie) { 375 + ret = -ENOMEM; 376 + goto done; 377 + } 378 + ar_ie->ie_index = cpu_to_le16(priv->assocresp_idx); 379 + ar_ie->mgmt_subtype_mask = cpu_to_le16(MWIFIEX_DELETE_MASK); 380 + ar_ie->ie_length = 0; 381 + } 382 + 383 + if (beacon_ie || pr_ie || ar_ie) 384 + ret = mwifiex_update_uap_custom_ie(priv, 385 + beacon_ie, &priv->beacon_idx, 386 + pr_ie, &priv->proberesp_idx, 387 + ar_ie, &priv->assocresp_idx); 388 + 389 + done: 390 + kfree(beacon_ie); 391 + kfree(pr_ie); 392 + kfree(ar_ie); 393 + kfree(rsn_ie); 394 + 395 + return ret; 396 + }
+1
drivers/net/wireless/mwifiex/init.c
··· 279 279 memset(&adapter->arp_filter, 0, sizeof(adapter->arp_filter)); 280 280 adapter->arp_filter_size = 0; 281 281 adapter->channel_type = NL80211_CHAN_HT20; 282 + adapter->max_mgmt_ie_index = MAX_MGMT_IE_INDEX; 282 283 } 283 284 284 285 /*
+32
drivers/net/wireless/mwifiex/ioctl.h
··· 62 62 BAND_AN = 16, 63 63 }; 64 64 65 + #define MWIFIEX_WPA_PASSHPHRASE_LEN 64 66 + struct wpa_param { 67 + u8 pairwise_cipher_wpa; 68 + u8 pairwise_cipher_wpa2; 69 + u8 group_cipher; 70 + u32 length; 71 + u8 passphrase[MWIFIEX_WPA_PASSHPHRASE_LEN]; 72 + }; 73 + 74 + #define KEY_MGMT_ON_HOST 0x03 75 + #define MWIFIEX_AUTH_MODE_AUTO 0xFF 76 + #define BAND_CONFIG_MANUAL 0x00 77 + struct mwifiex_uap_bss_param { 78 + u8 channel; 79 + u8 band_cfg; 80 + u16 rts_threshold; 81 + u16 frag_threshold; 82 + u8 retry_limit; 83 + struct mwifiex_802_11_ssid ssid; 84 + u8 bcast_ssid_ctl; 85 + u8 radio_ctl; 86 + u8 dtim_period; 87 + u16 beacon_period; 88 + u16 auth_mode; 89 + u16 protocol; 90 + u16 key_mgmt; 91 + u16 key_mgmt_operation; 92 + struct wpa_param wpa_cfg; 93 + }; 94 + 65 95 enum { 66 96 ADHOC_IDLE, 67 97 ADHOC_STARTED, ··· 298 268 }; 299 269 300 270 #define IEEE_MAX_IE_SIZE 256 271 + 272 + #define MWIFIEX_IE_HDR_SIZE (sizeof(struct mwifiex_ie) - IEEE_MAX_IE_SIZE) 301 273 302 274 struct mwifiex_ds_misc_gen_ie { 303 275 u32 type;
+16 -10
drivers/net/wireless/mwifiex/join.c
··· 1374 1374 * 1375 1375 * In case of infra made, it sends deauthentication request, and 1376 1376 * in case of ad-hoc mode, a stop network request is sent to the firmware. 1377 + * In AP mode, a command to stop bss is sent to firmware. 1377 1378 */ 1378 1379 int mwifiex_deauthenticate(struct mwifiex_private *priv, u8 *mac) 1379 1380 { 1380 - int ret = 0; 1381 + if (!priv->media_connected) 1382 + return 0; 1381 1383 1382 - if (priv->media_connected) { 1383 - if (priv->bss_mode == NL80211_IFTYPE_STATION) { 1384 - ret = mwifiex_deauthenticate_infra(priv, mac); 1385 - } else if (priv->bss_mode == NL80211_IFTYPE_ADHOC) { 1386 - ret = mwifiex_send_cmd_sync(priv, 1387 - HostCmd_CMD_802_11_AD_HOC_STOP, 1388 - HostCmd_ACT_GEN_SET, 0, NULL); 1389 - } 1384 + switch (priv->bss_mode) { 1385 + case NL80211_IFTYPE_STATION: 1386 + return mwifiex_deauthenticate_infra(priv, mac); 1387 + case NL80211_IFTYPE_ADHOC: 1388 + return mwifiex_send_cmd_sync(priv, 1389 + HostCmd_CMD_802_11_AD_HOC_STOP, 1390 + HostCmd_ACT_GEN_SET, 0, NULL); 1391 + case NL80211_IFTYPE_AP: 1392 + return mwifiex_send_cmd_sync(priv, HostCmd_CMD_UAP_BSS_STOP, 1393 + HostCmd_ACT_GEN_SET, 0, NULL); 1394 + default: 1395 + break; 1390 1396 } 1391 1397 1392 - return ret; 1398 + return 0; 1393 1399 } 1394 1400 EXPORT_SYMBOL_GPL(mwifiex_deauthenticate); 1395 1401
+36 -21
drivers/net/wireless/mwifiex/main.c
··· 64 64 65 65 adapter->priv_num = 0; 66 66 67 - /* Allocate memory for private structure */ 68 - adapter->priv[0] = kzalloc(sizeof(struct mwifiex_private), GFP_KERNEL); 69 - if (!adapter->priv[0]) { 70 - dev_err(adapter->dev, 71 - "%s: failed to alloc priv[0]\n", __func__); 72 - goto error; 67 + for (i = 0; i < MWIFIEX_MAX_BSS_NUM; i++) { 68 + /* Allocate memory for private structure */ 69 + adapter->priv[i] = 70 + kzalloc(sizeof(struct mwifiex_private), GFP_KERNEL); 71 + if (!adapter->priv[i]) 72 + goto error; 73 + 74 + adapter->priv[i]->adapter = adapter; 75 + adapter->priv[i]->bss_priority = i; 76 + adapter->priv_num++; 73 77 } 74 - 75 - adapter->priv_num++; 76 - 77 - adapter->priv[0]->adapter = adapter; 78 78 mwifiex_init_lock_list(adapter); 79 79 80 80 init_timer(&adapter->cmd_timer); ··· 349 349 if (adapter->hw_status != MWIFIEX_HW_STATUS_READY) 350 350 goto done; 351 351 352 - priv = adapter->priv[0]; 353 - if (mwifiex_register_cfg80211(priv) != 0) { 352 + priv = adapter->priv[MWIFIEX_BSS_ROLE_STA]; 353 + if (mwifiex_register_cfg80211(adapter)) { 354 354 dev_err(adapter->dev, "cannot register with cfg80211\n"); 355 355 goto err_init_fw; 356 356 } 357 357 358 358 rtnl_lock(); 359 359 /* Create station interface by default */ 360 - if (!mwifiex_add_virtual_intf(priv->wdev->wiphy, "mlan%d", 360 + if (!mwifiex_add_virtual_intf(adapter->wiphy, "mlan%d", 361 361 NL80211_IFTYPE_STATION, NULL, NULL)) { 362 362 dev_err(adapter->dev, "cannot create default STA interface\n"); 363 + goto err_add_intf; 364 + } 365 + 366 + /* Create AP interface by default */ 367 + if (!mwifiex_add_virtual_intf(adapter->wiphy, "uap%d", 368 + NL80211_IFTYPE_AP, NULL, NULL)) { 369 + dev_err(adapter->dev, "cannot create default AP interface\n"); 363 370 goto err_add_intf; 364 371 } 365 372 rtnl_unlock(); ··· 376 369 goto done; 377 370 378 371 err_add_intf: 379 - mwifiex_del_virtual_intf(priv->wdev->wiphy, priv->netdev); 372 + mwifiex_del_virtual_intf(adapter->wiphy, priv->netdev); 380 373 rtnl_unlock(); 381 374 err_init_fw: 382 375 pr_debug("info: %s: unregister device\n", __func__); ··· 640 633 priv->current_key_index = 0; 641 634 priv->media_connected = false; 642 635 memset(&priv->nick_name, 0, sizeof(priv->nick_name)); 636 + memset(priv->mgmt_ie, 0, 637 + sizeof(struct mwifiex_ie) * MAX_MGMT_IE_INDEX); 638 + priv->beacon_idx = MWIFIEX_AUTO_IDX_MASK; 639 + priv->proberesp_idx = MWIFIEX_AUTO_IDX_MASK; 640 + priv->assocresp_idx = MWIFIEX_AUTO_IDX_MASK; 641 + priv->rsn_idx = MWIFIEX_AUTO_IDX_MASK; 643 642 priv->num_tx_timeout = 0; 644 643 memcpy(dev->dev_addr, priv->curr_addr, ETH_ALEN); 645 644 } ··· 843 830 844 831 rtnl_lock(); 845 832 if (priv->wdev && priv->netdev) 846 - mwifiex_del_virtual_intf(priv->wdev->wiphy, 847 - priv->netdev); 833 + mwifiex_del_virtual_intf(adapter->wiphy, priv->netdev); 848 834 rtnl_unlock(); 849 835 } 850 836 851 837 priv = adapter->priv[0]; 852 - if (!priv) 838 + if (!priv || !priv->wdev) 853 839 goto exit_remove; 854 840 855 - if (priv->wdev) { 856 - wiphy_unregister(priv->wdev->wiphy); 857 - wiphy_free(priv->wdev->wiphy); 858 - kfree(priv->wdev); 841 + wiphy_unregister(priv->wdev->wiphy); 842 + wiphy_free(priv->wdev->wiphy); 843 + 844 + for (i = 0; i < adapter->priv_num; i++) { 845 + priv = adapter->priv[i]; 846 + if (priv) 847 + kfree(priv->wdev); 859 848 } 860 849 861 850 mwifiex_terminate_workqueue(adapter);
+24 -2
drivers/net/wireless/mwifiex/main.h
··· 116 116 #define MAX_FREQUENCY_BAND_BG 2484 117 117 118 118 #define MWIFIEX_EVENT_HEADER_LEN 4 119 + #define MWIFIEX_UAP_EVENT_EXTRA_HEADER 2 119 120 120 121 #define MWIFIEX_TYPE_LEN 4 121 122 #define MWIFIEX_USB_TYPE_CMD 0xF00DFACE ··· 371 370 u8 bss_role; 372 371 u8 bss_priority; 373 372 u8 bss_num; 373 + u8 bss_started; 374 374 u8 frame_type; 375 375 u8 curr_addr[ETH_ALEN]; 376 376 u8 media_connected; ··· 472 470 struct cfg80211_scan_request *scan_request; 473 471 struct mwifiex_user_scan_cfg *user_scan_cfg; 474 472 u8 cfg_bssid[6]; 475 - u8 country_code[IEEE80211_COUNTRY_STRING_LEN]; 476 473 struct wps wps; 477 474 u8 scan_block; 478 475 s32 cqm_rssi_thold; 479 476 u32 cqm_rssi_hyst; 480 477 u8 subsc_evt_rssi_state; 478 + struct mwifiex_ie mgmt_ie[MAX_MGMT_IE_INDEX]; 479 + u16 beacon_idx; 480 + u16 proberesp_idx; 481 + u16 assocresp_idx; 482 + u16 rsn_idx; 481 483 }; 482 484 483 485 enum mwifiex_ba_status { ··· 577 571 char fw_name[32]; 578 572 int winner; 579 573 struct device *dev; 574 + struct wiphy *wiphy; 580 575 bool surprise_removed; 581 576 u32 fw_release_number; 582 577 u16 init_wait_q_woken; ··· 684 677 struct cmd_ctrl_node *cmd_queued; 685 678 spinlock_t queue_lock; /* lock for tx queues */ 686 679 struct completion fw_load; 680 + u8 country_code[IEEE80211_COUNTRY_STRING_LEN]; 681 + u16 max_mgmt_ie_index; 687 682 }; 688 683 689 684 int mwifiex_init_lock_list(struct mwifiex_adapter *adapter); ··· 769 760 int mwifiex_sta_prepare_cmd(struct mwifiex_private *, uint16_t cmd_no, 770 761 u16 cmd_action, u32 cmd_oid, 771 762 void *data_buf, void *cmd_buf); 763 + int mwifiex_uap_prepare_cmd(struct mwifiex_private *priv, uint16_t cmd_no, 764 + u16 cmd_action, u32 cmd_oid, 765 + void *data_buf, void *cmd_buf); 772 766 int mwifiex_process_sta_cmdresp(struct mwifiex_private *, u16 cmdresp_no, 773 767 struct host_cmd_ds_command *resp); 774 768 int mwifiex_process_sta_rx_packet(struct mwifiex_adapter *, ··· 832 820 int is_command_pending(struct mwifiex_adapter *adapter); 833 821 void mwifiex_init_priv_params(struct mwifiex_private *priv, 834 822 struct net_device *dev); 823 + int mwifiex_set_secure_params(struct mwifiex_private *priv, 824 + struct mwifiex_uap_bss_param *bss_config, 825 + struct cfg80211_ap_settings *params); 835 826 836 827 /* 837 828 * This function checks if the queuing is RA based or not. ··· 948 933 int mwifiex_drv_change_adhoc_chan(struct mwifiex_private *priv, u16 channel); 949 934 950 935 int mwifiex_set_encode(struct mwifiex_private *priv, const u8 *key, 951 - int key_len, u8 key_index, int disable); 936 + int key_len, u8 key_index, const u8 *mac_addr, 937 + int disable); 952 938 953 939 int mwifiex_set_gen_ie(struct mwifiex_private *priv, u8 *ie, int ie_len); 954 940 ··· 985 969 986 970 int mwifiex_main_process(struct mwifiex_adapter *); 987 971 972 + int mwifiex_uap_set_channel(struct mwifiex_private *priv, int channel); 988 973 int mwifiex_bss_set_channel(struct mwifiex_private *, 989 974 struct mwifiex_chan_freq_power *cfp); 990 975 int mwifiex_get_bss_info(struct mwifiex_private *, ··· 1003 986 u32 *flags, struct vif_params *params); 1004 987 int mwifiex_del_virtual_intf(struct wiphy *wiphy, struct net_device *dev); 1005 988 989 + void mwifiex_set_sys_config_invalid_data(struct mwifiex_uap_bss_param *config); 990 + 991 + int mwifiex_set_mgmt_ies(struct mwifiex_private *priv, 992 + struct cfg80211_ap_settings *params); 993 + int mwifiex_del_mgmt_ies(struct mwifiex_private *priv); 1006 994 u8 *mwifiex_11d_code_2_region(u8 code); 1007 995 1008 996 #ifdef CONFIG_DEBUG_FS
+47 -22
drivers/net/wireless/mwifiex/sta_cmd.c
··· 498 498 { 499 499 struct host_cmd_ds_802_11_key_material *key_material = 500 500 &cmd->params.key_material; 501 - u16 key_param_len = 0; 501 + struct host_cmd_tlv_mac_addr *tlv_mac; 502 + u16 key_param_len = 0, cmd_size; 502 503 int ret = 0; 503 504 const u8 bc_mac[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; 504 505 ··· 615 614 cpu_to_le16((u16) enc_key->key_len + 616 615 KEYPARAMSET_FIXED_LEN); 617 616 618 - key_param_len = (u16) (enc_key->key_len + KEYPARAMSET_FIXED_LEN) 617 + key_param_len = (u16)(enc_key->key_len + KEYPARAMSET_FIXED_LEN) 619 618 + sizeof(struct mwifiex_ie_types_header); 620 619 621 620 cmd->size = cpu_to_le16(sizeof(key_material->action) + S_DS_GEN 622 621 + key_param_len); 622 + 623 + if (priv->bss_type == MWIFIEX_BSS_TYPE_UAP) { 624 + tlv_mac = (void *)((u8 *)&key_material->key_param_set + 625 + key_param_len); 626 + tlv_mac->tlv.type = cpu_to_le16(TLV_TYPE_STA_MAC_ADDR); 627 + tlv_mac->tlv.len = cpu_to_le16(ETH_ALEN); 628 + memcpy(tlv_mac->mac_addr, enc_key->mac_addr, ETH_ALEN); 629 + cmd_size = key_param_len + S_DS_GEN + 630 + sizeof(key_material->action) + 631 + sizeof(struct host_cmd_tlv_mac_addr); 632 + } else { 633 + cmd_size = key_param_len + S_DS_GEN + 634 + sizeof(key_material->action); 635 + } 636 + cmd->size = cpu_to_le16(cmd_size); 623 637 } 624 638 625 639 return ret; ··· 1264 1248 if (ret) 1265 1249 return -1; 1266 1250 1267 - /* Enable IEEE PS by default */ 1268 - priv->adapter->ps_mode = MWIFIEX_802_11_POWER_MODE_PSP; 1269 - ret = mwifiex_send_cmd_async(priv, 1270 - HostCmd_CMD_802_11_PS_MODE_ENH, 1271 - EN_AUTO_PS, BITMAP_STA_PS, NULL); 1272 - if (ret) 1273 - return -1; 1251 + if (priv->bss_type != MWIFIEX_BSS_TYPE_UAP) { 1252 + /* Enable IEEE PS by default */ 1253 + priv->adapter->ps_mode = MWIFIEX_802_11_POWER_MODE_PSP; 1254 + ret = mwifiex_send_cmd_async( 1255 + priv, HostCmd_CMD_802_11_PS_MODE_ENH, 1256 + EN_AUTO_PS, BITMAP_STA_PS, NULL); 1257 + if (ret) 1258 + return -1; 1259 + } 1274 1260 } 1275 1261 1276 1262 /* get tx rate */ ··· 1288 1270 if (ret) 1289 1271 return -1; 1290 1272 1291 - /* set ibss coalescing_status */ 1292 - ret = mwifiex_send_cmd_async(priv, 1293 - HostCmd_CMD_802_11_IBSS_COALESCING_STATUS, 1294 - HostCmd_ACT_GEN_SET, 0, &enable); 1295 - if (ret) 1296 - return -1; 1273 + if (priv->bss_type == MWIFIEX_BSS_TYPE_STA) { 1274 + /* set ibss coalescing_status */ 1275 + ret = mwifiex_send_cmd_async( 1276 + priv, HostCmd_CMD_802_11_IBSS_COALESCING_STATUS, 1277 + HostCmd_ACT_GEN_SET, 0, &enable); 1278 + if (ret) 1279 + return -1; 1280 + } 1297 1281 1298 1282 memset(&amsdu_aggr_ctrl, 0, sizeof(amsdu_aggr_ctrl)); 1299 1283 amsdu_aggr_ctrl.enable = true; ··· 1313 1293 if (ret) 1314 1294 return -1; 1315 1295 1316 - if (first_sta && (priv->adapter->iface_type != MWIFIEX_USB)) { 1296 + if (first_sta && priv->adapter->iface_type != MWIFIEX_USB && 1297 + priv->bss_type != MWIFIEX_BSS_TYPE_UAP) { 1317 1298 /* Enable auto deep sleep */ 1318 1299 auto_ds.auto_ds = DEEP_SLEEP_ON; 1319 1300 auto_ds.idle_time = DEEP_SLEEP_IDLE_TIME; ··· 1326 1305 return -1; 1327 1306 } 1328 1307 1329 - /* Send cmd to FW to enable/disable 11D function */ 1330 - state_11d = ENABLE_11D; 1331 - ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_802_11_SNMP_MIB, 1332 - HostCmd_ACT_GEN_SET, DOT11D_I, &state_11d); 1333 - if (ret) 1334 - dev_err(priv->adapter->dev, "11D: failed to enable 11D\n"); 1308 + if (priv->bss_type != MWIFIEX_BSS_TYPE_UAP) { 1309 + /* Send cmd to FW to enable/disable 11D function */ 1310 + state_11d = ENABLE_11D; 1311 + ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_802_11_SNMP_MIB, 1312 + HostCmd_ACT_GEN_SET, DOT11D_I, 1313 + &state_11d); 1314 + if (ret) 1315 + dev_err(priv->adapter->dev, 1316 + "11D: failed to enable 11D\n"); 1317 + } 1335 1318 1336 1319 /* Send cmd to FW to configure 11n specific configuration 1337 1320 * (Short GI, Channel BW, Green field support etc.) for transmit
+8
drivers/net/wireless/mwifiex/sta_cmdresp.c
··· 944 944 case HostCmd_CMD_802_11_SUBSCRIBE_EVENT: 945 945 ret = mwifiex_ret_subsc_evt(priv, resp, data_buf); 946 946 break; 947 + case HostCmd_CMD_UAP_SYS_CONFIG: 948 + break; 949 + case HostCmd_CMD_UAP_BSS_START: 950 + priv->bss_started = 1; 951 + break; 952 + case HostCmd_CMD_UAP_BSS_STOP: 953 + priv->bss_started = 0; 954 + break; 947 955 default: 948 956 dev_err(adapter->dev, "CMD_RESP: unknown cmd response %#x\n", 949 957 resp->command);
+50 -1
drivers/net/wireless/mwifiex/sta_event.c
··· 184 184 int mwifiex_process_sta_event(struct mwifiex_private *priv) 185 185 { 186 186 struct mwifiex_adapter *adapter = priv->adapter; 187 - int ret = 0; 187 + int len, ret = 0; 188 188 u32 eventcause = adapter->event_cause; 189 + struct station_info sinfo; 190 + struct mwifiex_assoc_event *event; 189 191 190 192 switch (eventcause) { 191 193 case EVENT_DUMMY_HOST_WAKEUP_SIGNAL: ··· 403 401 404 402 case EVENT_HOSTWAKE_STAIE: 405 403 dev_dbg(adapter->dev, "event: HOSTWAKE_STAIE %d\n", eventcause); 404 + break; 405 + 406 + case EVENT_UAP_STA_ASSOC: 407 + skb_pull(adapter->event_skb, MWIFIEX_UAP_EVENT_EXTRA_HEADER); 408 + memset(&sinfo, 0, sizeof(sinfo)); 409 + event = (struct mwifiex_assoc_event *)adapter->event_skb->data; 410 + if (le16_to_cpu(event->type) == TLV_TYPE_UAP_MGMT_FRAME) { 411 + len = -1; 412 + 413 + if (ieee80211_is_assoc_req(event->frame_control)) 414 + len = 0; 415 + else if (ieee80211_is_reassoc_req(event->frame_control)) 416 + /* There will be ETH_ALEN bytes of 417 + * current_ap_addr before the re-assoc ies. 418 + */ 419 + len = ETH_ALEN; 420 + 421 + if (len != -1) { 422 + sinfo.filled = STATION_INFO_ASSOC_REQ_IES; 423 + sinfo.assoc_req_ies = (u8 *)&event->data[len]; 424 + len = (u8 *)sinfo.assoc_req_ies - 425 + (u8 *)&event->frame_control; 426 + sinfo.assoc_req_ies_len = 427 + le16_to_cpu(event->len) - (u16)len; 428 + } 429 + } 430 + cfg80211_new_sta(priv->netdev, event->sta_addr, &sinfo, 431 + GFP_KERNEL); 432 + break; 433 + case EVENT_UAP_STA_DEAUTH: 434 + skb_pull(adapter->event_skb, MWIFIEX_UAP_EVENT_EXTRA_HEADER); 435 + cfg80211_del_sta(priv->netdev, adapter->event_skb->data, 436 + GFP_KERNEL); 437 + break; 438 + case EVENT_UAP_BSS_IDLE: 439 + priv->media_connected = false; 440 + break; 441 + case EVENT_UAP_BSS_ACTIVE: 442 + priv->media_connected = true; 443 + break; 444 + case EVENT_UAP_BSS_START: 445 + dev_dbg(adapter->dev, "AP EVENT: event id: %#x\n", eventcause); 446 + memcpy(priv->netdev->dev_addr, adapter->event_body+2, ETH_ALEN); 447 + break; 448 + case EVENT_UAP_MIC_COUNTERMEASURES: 449 + /* For future development */ 450 + dev_dbg(adapter->dev, "AP EVENT: event id: %#x\n", eventcause); 406 451 break; 407 452 default: 408 453 dev_dbg(adapter->dev, "event: unknown event id: %#x\n",
+7 -2
drivers/net/wireless/mwifiex/sta_ioctl.c
··· 462 462 463 463 info->bss_chan = bss_desc->channel; 464 464 465 - memcpy(info->country_code, priv->country_code, 465 + memcpy(info->country_code, adapter->country_code, 466 466 IEEE80211_COUNTRY_STRING_LEN); 467 467 468 468 info->media_connected = priv->media_connected; ··· 1219 1219 * with requisite parameters and calls the IOCTL handler. 1220 1220 */ 1221 1221 int mwifiex_set_encode(struct mwifiex_private *priv, const u8 *key, 1222 - int key_len, u8 key_index, int disable) 1222 + int key_len, u8 key_index, 1223 + const u8 *mac_addr, int disable) 1223 1224 { 1224 1225 struct mwifiex_ds_encrypt_key encrypt_key; 1225 1226 ··· 1230 1229 encrypt_key.key_index = key_index; 1231 1230 if (key_len) 1232 1231 memcpy(encrypt_key.key_material, key, key_len); 1232 + if (mac_addr) 1233 + memcpy(encrypt_key.mac_addr, mac_addr, ETH_ALEN); 1233 1234 } else { 1234 1235 encrypt_key.key_disable = true; 1236 + if (mac_addr) 1237 + memcpy(encrypt_key.mac_addr, mac_addr, ETH_ALEN); 1235 1238 } 1236 1239 1237 1240 return mwifiex_sec_ioctl_encrypt_key(priv, &encrypt_key);
+432
drivers/net/wireless/mwifiex/uap_cmd.c
··· 1 + /* 2 + * Marvell Wireless LAN device driver: AP specific command handling 3 + * 4 + * Copyright (C) 2012, Marvell International Ltd. 5 + * 6 + * This software file (the "File") is distributed by Marvell International 7 + * Ltd. under the terms of the GNU General Public License Version 2, June 1991 8 + * (the "License"). You may use, redistribute and/or modify this File in 9 + * accordance with the terms and conditions of the License, a copy of which 10 + * is available by writing to the Free Software Foundation, Inc., 11 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 + * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 + * 14 + * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15 + * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 + * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17 + * this warranty disclaimer. 18 + */ 19 + 20 + #include "main.h" 21 + 22 + /* This function parses security related parameters from cfg80211_ap_settings 23 + * and sets into FW understandable bss_config structure. 24 + */ 25 + int mwifiex_set_secure_params(struct mwifiex_private *priv, 26 + struct mwifiex_uap_bss_param *bss_config, 27 + struct cfg80211_ap_settings *params) { 28 + int i; 29 + 30 + switch (params->auth_type) { 31 + case NL80211_AUTHTYPE_OPEN_SYSTEM: 32 + bss_config->auth_mode = WLAN_AUTH_OPEN; 33 + break; 34 + case NL80211_AUTHTYPE_SHARED_KEY: 35 + bss_config->auth_mode = WLAN_AUTH_SHARED_KEY; 36 + break; 37 + case NL80211_AUTHTYPE_NETWORK_EAP: 38 + bss_config->auth_mode = WLAN_AUTH_LEAP; 39 + break; 40 + default: 41 + bss_config->auth_mode = MWIFIEX_AUTH_MODE_AUTO; 42 + break; 43 + } 44 + 45 + bss_config->key_mgmt_operation |= KEY_MGMT_ON_HOST; 46 + 47 + for (i = 0; i < params->crypto.n_akm_suites; i++) { 48 + switch (params->crypto.akm_suites[i]) { 49 + case WLAN_AKM_SUITE_8021X: 50 + if (params->crypto.wpa_versions & 51 + NL80211_WPA_VERSION_1) { 52 + bss_config->protocol = PROTOCOL_WPA; 53 + bss_config->key_mgmt = KEY_MGMT_EAP; 54 + } 55 + if (params->crypto.wpa_versions & 56 + NL80211_WPA_VERSION_2) { 57 + bss_config->protocol = PROTOCOL_WPA2; 58 + bss_config->key_mgmt = KEY_MGMT_EAP; 59 + } 60 + break; 61 + case WLAN_AKM_SUITE_PSK: 62 + if (params->crypto.wpa_versions & 63 + NL80211_WPA_VERSION_1) { 64 + bss_config->protocol = PROTOCOL_WPA; 65 + bss_config->key_mgmt = KEY_MGMT_PSK; 66 + } 67 + if (params->crypto.wpa_versions & 68 + NL80211_WPA_VERSION_2) { 69 + bss_config->protocol = PROTOCOL_WPA2; 70 + bss_config->key_mgmt = KEY_MGMT_PSK; 71 + } 72 + break; 73 + default: 74 + break; 75 + } 76 + } 77 + for (i = 0; i < params->crypto.n_ciphers_pairwise; i++) { 78 + switch (params->crypto.ciphers_pairwise[i]) { 79 + case WLAN_CIPHER_SUITE_WEP40: 80 + case WLAN_CIPHER_SUITE_WEP104: 81 + break; 82 + case WLAN_CIPHER_SUITE_TKIP: 83 + bss_config->wpa_cfg.pairwise_cipher_wpa = CIPHER_TKIP; 84 + break; 85 + case WLAN_CIPHER_SUITE_CCMP: 86 + bss_config->wpa_cfg.pairwise_cipher_wpa2 = 87 + CIPHER_AES_CCMP; 88 + default: 89 + break; 90 + } 91 + } 92 + 93 + switch (params->crypto.cipher_group) { 94 + case WLAN_CIPHER_SUITE_WEP40: 95 + case WLAN_CIPHER_SUITE_WEP104: 96 + break; 97 + case WLAN_CIPHER_SUITE_TKIP: 98 + bss_config->wpa_cfg.group_cipher = CIPHER_TKIP; 99 + break; 100 + case WLAN_CIPHER_SUITE_CCMP: 101 + bss_config->wpa_cfg.group_cipher = CIPHER_AES_CCMP; 102 + break; 103 + default: 104 + break; 105 + } 106 + 107 + return 0; 108 + } 109 + 110 + /* This function initializes some of mwifiex_uap_bss_param variables. 111 + * This helps FW in ignoring invalid values. These values may or may not 112 + * be get updated to valid ones at later stage. 113 + */ 114 + void mwifiex_set_sys_config_invalid_data(struct mwifiex_uap_bss_param *config) 115 + { 116 + config->bcast_ssid_ctl = 0x7F; 117 + config->radio_ctl = 0x7F; 118 + config->dtim_period = 0x7F; 119 + config->beacon_period = 0x7FFF; 120 + config->auth_mode = 0x7F; 121 + config->rts_threshold = 0x7FFF; 122 + config->frag_threshold = 0x7FFF; 123 + config->retry_limit = 0x7F; 124 + } 125 + 126 + /* This function parses BSS related parameters from structure 127 + * and prepares TLVs. These TLVs are appended to command buffer. 128 + */ 129 + static int 130 + mwifiex_uap_bss_param_prepare(u8 *tlv, void *cmd_buf, u16 *param_size) 131 + { 132 + struct host_cmd_tlv_dtim_period *dtim_period; 133 + struct host_cmd_tlv_beacon_period *beacon_period; 134 + struct host_cmd_tlv_ssid *ssid; 135 + struct host_cmd_tlv_channel_band *chan_band; 136 + struct host_cmd_tlv_frag_threshold *frag_threshold; 137 + struct host_cmd_tlv_rts_threshold *rts_threshold; 138 + struct host_cmd_tlv_retry_limit *retry_limit; 139 + struct host_cmd_tlv_pwk_cipher *pwk_cipher; 140 + struct host_cmd_tlv_gwk_cipher *gwk_cipher; 141 + struct host_cmd_tlv_encrypt_protocol *encrypt_protocol; 142 + struct host_cmd_tlv_auth_type *auth_type; 143 + struct host_cmd_tlv_passphrase *passphrase; 144 + struct host_cmd_tlv_akmp *tlv_akmp; 145 + struct mwifiex_uap_bss_param *bss_cfg = cmd_buf; 146 + u16 cmd_size = *param_size; 147 + 148 + if (bss_cfg->ssid.ssid_len) { 149 + ssid = (struct host_cmd_tlv_ssid *)tlv; 150 + ssid->tlv.type = cpu_to_le16(TLV_TYPE_UAP_SSID); 151 + ssid->tlv.len = cpu_to_le16((u16)bss_cfg->ssid.ssid_len); 152 + memcpy(ssid->ssid, bss_cfg->ssid.ssid, bss_cfg->ssid.ssid_len); 153 + cmd_size += sizeof(struct host_cmd_tlv) + 154 + bss_cfg->ssid.ssid_len; 155 + tlv += sizeof(struct host_cmd_tlv) + bss_cfg->ssid.ssid_len; 156 + } 157 + if (bss_cfg->channel && bss_cfg->channel <= MAX_CHANNEL_BAND_BG) { 158 + chan_band = (struct host_cmd_tlv_channel_band *)tlv; 159 + chan_band->tlv.type = cpu_to_le16(TLV_TYPE_CHANNELBANDLIST); 160 + chan_band->tlv.len = 161 + cpu_to_le16(sizeof(struct host_cmd_tlv_channel_band) - 162 + sizeof(struct host_cmd_tlv)); 163 + chan_band->band_config = bss_cfg->band_cfg; 164 + chan_band->channel = bss_cfg->channel; 165 + cmd_size += sizeof(struct host_cmd_tlv_channel_band); 166 + tlv += sizeof(struct host_cmd_tlv_channel_band); 167 + } 168 + if (bss_cfg->beacon_period >= MIN_BEACON_PERIOD && 169 + bss_cfg->beacon_period <= MAX_BEACON_PERIOD) { 170 + beacon_period = (struct host_cmd_tlv_beacon_period *)tlv; 171 + beacon_period->tlv.type = 172 + cpu_to_le16(TLV_TYPE_UAP_BEACON_PERIOD); 173 + beacon_period->tlv.len = 174 + cpu_to_le16(sizeof(struct host_cmd_tlv_beacon_period) - 175 + sizeof(struct host_cmd_tlv)); 176 + beacon_period->period = cpu_to_le16(bss_cfg->beacon_period); 177 + cmd_size += sizeof(struct host_cmd_tlv_beacon_period); 178 + tlv += sizeof(struct host_cmd_tlv_beacon_period); 179 + } 180 + if (bss_cfg->dtim_period >= MIN_DTIM_PERIOD && 181 + bss_cfg->dtim_period <= MAX_DTIM_PERIOD) { 182 + dtim_period = (struct host_cmd_tlv_dtim_period *)tlv; 183 + dtim_period->tlv.type = cpu_to_le16(TLV_TYPE_UAP_DTIM_PERIOD); 184 + dtim_period->tlv.len = 185 + cpu_to_le16(sizeof(struct host_cmd_tlv_dtim_period) - 186 + sizeof(struct host_cmd_tlv)); 187 + dtim_period->period = bss_cfg->dtim_period; 188 + cmd_size += sizeof(struct host_cmd_tlv_dtim_period); 189 + tlv += sizeof(struct host_cmd_tlv_dtim_period); 190 + } 191 + if (bss_cfg->rts_threshold <= MWIFIEX_RTS_MAX_VALUE) { 192 + rts_threshold = (struct host_cmd_tlv_rts_threshold *)tlv; 193 + rts_threshold->tlv.type = 194 + cpu_to_le16(TLV_TYPE_UAP_RTS_THRESHOLD); 195 + rts_threshold->tlv.len = 196 + cpu_to_le16(sizeof(struct host_cmd_tlv_rts_threshold) - 197 + sizeof(struct host_cmd_tlv)); 198 + rts_threshold->rts_thr = cpu_to_le16(bss_cfg->rts_threshold); 199 + cmd_size += sizeof(struct host_cmd_tlv_frag_threshold); 200 + tlv += sizeof(struct host_cmd_tlv_frag_threshold); 201 + } 202 + if ((bss_cfg->frag_threshold >= MWIFIEX_FRAG_MIN_VALUE) && 203 + (bss_cfg->frag_threshold <= MWIFIEX_FRAG_MAX_VALUE)) { 204 + frag_threshold = (struct host_cmd_tlv_frag_threshold *)tlv; 205 + frag_threshold->tlv.type = 206 + cpu_to_le16(TLV_TYPE_UAP_FRAG_THRESHOLD); 207 + frag_threshold->tlv.len = 208 + cpu_to_le16(sizeof(struct host_cmd_tlv_frag_threshold) - 209 + sizeof(struct host_cmd_tlv)); 210 + frag_threshold->frag_thr = cpu_to_le16(bss_cfg->frag_threshold); 211 + cmd_size += sizeof(struct host_cmd_tlv_frag_threshold); 212 + tlv += sizeof(struct host_cmd_tlv_frag_threshold); 213 + } 214 + if (bss_cfg->retry_limit <= MWIFIEX_RETRY_LIMIT) { 215 + retry_limit = (struct host_cmd_tlv_retry_limit *)tlv; 216 + retry_limit->tlv.type = cpu_to_le16(TLV_TYPE_UAP_RETRY_LIMIT); 217 + retry_limit->tlv.len = 218 + cpu_to_le16(sizeof(struct host_cmd_tlv_retry_limit) - 219 + sizeof(struct host_cmd_tlv)); 220 + retry_limit->limit = (u8)bss_cfg->retry_limit; 221 + cmd_size += sizeof(struct host_cmd_tlv_retry_limit); 222 + tlv += sizeof(struct host_cmd_tlv_retry_limit); 223 + } 224 + if ((bss_cfg->protocol & PROTOCOL_WPA) || 225 + (bss_cfg->protocol & PROTOCOL_WPA2) || 226 + (bss_cfg->protocol & PROTOCOL_EAP)) { 227 + tlv_akmp = (struct host_cmd_tlv_akmp *)tlv; 228 + tlv_akmp->tlv.type = cpu_to_le16(TLV_TYPE_UAP_AKMP); 229 + tlv_akmp->tlv.len = 230 + cpu_to_le16(sizeof(struct host_cmd_tlv_akmp) - 231 + sizeof(struct host_cmd_tlv)); 232 + tlv_akmp->key_mgmt_operation = 233 + cpu_to_le16(bss_cfg->key_mgmt_operation); 234 + tlv_akmp->key_mgmt = cpu_to_le16(bss_cfg->key_mgmt); 235 + cmd_size += sizeof(struct host_cmd_tlv_akmp); 236 + tlv += sizeof(struct host_cmd_tlv_akmp); 237 + 238 + if (bss_cfg->wpa_cfg.pairwise_cipher_wpa & 239 + VALID_CIPHER_BITMAP) { 240 + pwk_cipher = (struct host_cmd_tlv_pwk_cipher *)tlv; 241 + pwk_cipher->tlv.type = 242 + cpu_to_le16(TLV_TYPE_PWK_CIPHER); 243 + pwk_cipher->tlv.len = cpu_to_le16( 244 + sizeof(struct host_cmd_tlv_pwk_cipher) - 245 + sizeof(struct host_cmd_tlv)); 246 + pwk_cipher->proto = cpu_to_le16(PROTOCOL_WPA); 247 + pwk_cipher->cipher = 248 + bss_cfg->wpa_cfg.pairwise_cipher_wpa; 249 + cmd_size += sizeof(struct host_cmd_tlv_pwk_cipher); 250 + tlv += sizeof(struct host_cmd_tlv_pwk_cipher); 251 + } 252 + if (bss_cfg->wpa_cfg.pairwise_cipher_wpa2 & 253 + VALID_CIPHER_BITMAP) { 254 + pwk_cipher = (struct host_cmd_tlv_pwk_cipher *)tlv; 255 + pwk_cipher->tlv.type = cpu_to_le16(TLV_TYPE_PWK_CIPHER); 256 + pwk_cipher->tlv.len = cpu_to_le16( 257 + sizeof(struct host_cmd_tlv_pwk_cipher) - 258 + sizeof(struct host_cmd_tlv)); 259 + pwk_cipher->proto = cpu_to_le16(PROTOCOL_WPA2); 260 + pwk_cipher->cipher = 261 + bss_cfg->wpa_cfg.pairwise_cipher_wpa2; 262 + cmd_size += sizeof(struct host_cmd_tlv_pwk_cipher); 263 + tlv += sizeof(struct host_cmd_tlv_pwk_cipher); 264 + } 265 + if (bss_cfg->wpa_cfg.group_cipher & VALID_CIPHER_BITMAP) { 266 + gwk_cipher = (struct host_cmd_tlv_gwk_cipher *)tlv; 267 + gwk_cipher->tlv.type = cpu_to_le16(TLV_TYPE_GWK_CIPHER); 268 + gwk_cipher->tlv.len = cpu_to_le16( 269 + sizeof(struct host_cmd_tlv_gwk_cipher) - 270 + sizeof(struct host_cmd_tlv)); 271 + gwk_cipher->cipher = bss_cfg->wpa_cfg.group_cipher; 272 + cmd_size += sizeof(struct host_cmd_tlv_gwk_cipher); 273 + tlv += sizeof(struct host_cmd_tlv_gwk_cipher); 274 + } 275 + if (bss_cfg->wpa_cfg.length) { 276 + passphrase = (struct host_cmd_tlv_passphrase *)tlv; 277 + passphrase->tlv.type = 278 + cpu_to_le16(TLV_TYPE_UAP_WPA_PASSPHRASE); 279 + passphrase->tlv.len = 280 + cpu_to_le16(bss_cfg->wpa_cfg.length); 281 + memcpy(passphrase->passphrase, 282 + bss_cfg->wpa_cfg.passphrase, 283 + bss_cfg->wpa_cfg.length); 284 + cmd_size += sizeof(struct host_cmd_tlv) + 285 + bss_cfg->wpa_cfg.length; 286 + tlv += sizeof(struct host_cmd_tlv) + 287 + bss_cfg->wpa_cfg.length; 288 + } 289 + } 290 + if ((bss_cfg->auth_mode <= WLAN_AUTH_SHARED_KEY) || 291 + (bss_cfg->auth_mode == MWIFIEX_AUTH_MODE_AUTO)) { 292 + auth_type = (struct host_cmd_tlv_auth_type *)tlv; 293 + auth_type->tlv.type = cpu_to_le16(TLV_TYPE_AUTH_TYPE); 294 + auth_type->tlv.len = 295 + cpu_to_le16(sizeof(struct host_cmd_tlv_auth_type) - 296 + sizeof(struct host_cmd_tlv)); 297 + auth_type->auth_type = (u8)bss_cfg->auth_mode; 298 + cmd_size += sizeof(struct host_cmd_tlv_auth_type); 299 + tlv += sizeof(struct host_cmd_tlv_auth_type); 300 + } 301 + if (bss_cfg->protocol) { 302 + encrypt_protocol = (struct host_cmd_tlv_encrypt_protocol *)tlv; 303 + encrypt_protocol->tlv.type = 304 + cpu_to_le16(TLV_TYPE_UAP_ENCRY_PROTOCOL); 305 + encrypt_protocol->tlv.len = 306 + cpu_to_le16(sizeof(struct host_cmd_tlv_encrypt_protocol) 307 + - sizeof(struct host_cmd_tlv)); 308 + encrypt_protocol->proto = cpu_to_le16(bss_cfg->protocol); 309 + cmd_size += sizeof(struct host_cmd_tlv_encrypt_protocol); 310 + tlv += sizeof(struct host_cmd_tlv_encrypt_protocol); 311 + } 312 + 313 + *param_size = cmd_size; 314 + 315 + return 0; 316 + } 317 + 318 + /* This function parses custom IEs from IE list and prepares command buffer */ 319 + static int mwifiex_uap_custom_ie_prepare(u8 *tlv, void *cmd_buf, u16 *ie_size) 320 + { 321 + struct mwifiex_ie_list *ap_ie = cmd_buf; 322 + struct host_cmd_tlv *tlv_ie = (struct host_cmd_tlv *)tlv; 323 + 324 + if (!ap_ie || !ap_ie->len || !ap_ie->ie_list) 325 + return -1; 326 + 327 + *ie_size += le16_to_cpu(ap_ie->len) + sizeof(struct host_cmd_tlv); 328 + 329 + tlv_ie->type = cpu_to_le16(TLV_TYPE_MGMT_IE); 330 + tlv_ie->len = ap_ie->len; 331 + tlv += sizeof(struct host_cmd_tlv); 332 + 333 + memcpy(tlv, ap_ie->ie_list, le16_to_cpu(ap_ie->len)); 334 + 335 + return 0; 336 + } 337 + 338 + /* Parse AP config structure and prepare TLV based command structure 339 + * to be sent to FW for uAP configuration 340 + */ 341 + static int 342 + mwifiex_cmd_uap_sys_config(struct host_cmd_ds_command *cmd, u16 cmd_action, 343 + u32 type, void *cmd_buf) 344 + { 345 + u8 *tlv; 346 + u16 cmd_size, param_size, ie_size; 347 + struct host_cmd_ds_sys_config *sys_cfg; 348 + 349 + cmd->command = cpu_to_le16(HostCmd_CMD_UAP_SYS_CONFIG); 350 + cmd_size = (u16)(sizeof(struct host_cmd_ds_sys_config) + S_DS_GEN); 351 + sys_cfg = (struct host_cmd_ds_sys_config *)&cmd->params.uap_sys_config; 352 + sys_cfg->action = cpu_to_le16(cmd_action); 353 + tlv = sys_cfg->tlv; 354 + 355 + switch (type) { 356 + case UAP_BSS_PARAMS_I: 357 + param_size = cmd_size; 358 + if (mwifiex_uap_bss_param_prepare(tlv, cmd_buf, &param_size)) 359 + return -1; 360 + cmd->size = cpu_to_le16(param_size); 361 + break; 362 + case UAP_CUSTOM_IE_I: 363 + ie_size = cmd_size; 364 + if (mwifiex_uap_custom_ie_prepare(tlv, cmd_buf, &ie_size)) 365 + return -1; 366 + cmd->size = cpu_to_le16(ie_size); 367 + break; 368 + default: 369 + return -1; 370 + } 371 + 372 + return 0; 373 + } 374 + 375 + /* This function prepares the AP specific commands before sending them 376 + * to the firmware. 377 + * This is a generic function which calls specific command preparation 378 + * routines based upon the command number. 379 + */ 380 + int mwifiex_uap_prepare_cmd(struct mwifiex_private *priv, u16 cmd_no, 381 + u16 cmd_action, u32 type, 382 + void *data_buf, void *cmd_buf) 383 + { 384 + struct host_cmd_ds_command *cmd = cmd_buf; 385 + 386 + switch (cmd_no) { 387 + case HostCmd_CMD_UAP_SYS_CONFIG: 388 + if (mwifiex_cmd_uap_sys_config(cmd, cmd_action, type, data_buf)) 389 + return -1; 390 + break; 391 + case HostCmd_CMD_UAP_BSS_START: 392 + case HostCmd_CMD_UAP_BSS_STOP: 393 + cmd->command = cpu_to_le16(cmd_no); 394 + cmd->size = cpu_to_le16(S_DS_GEN); 395 + break; 396 + default: 397 + dev_err(priv->adapter->dev, 398 + "PREP_CMD: unknown cmd %#x\n", cmd_no); 399 + return -1; 400 + } 401 + 402 + return 0; 403 + } 404 + 405 + /* This function sets the RF channel for AP. 406 + * 407 + * This function populates channel information in AP config structure 408 + * and sends command to configure channel information in AP. 409 + */ 410 + int mwifiex_uap_set_channel(struct mwifiex_private *priv, int channel) 411 + { 412 + struct mwifiex_uap_bss_param *bss_cfg; 413 + struct wiphy *wiphy = priv->wdev->wiphy; 414 + 415 + bss_cfg = kzalloc(sizeof(struct mwifiex_uap_bss_param), GFP_KERNEL); 416 + if (!bss_cfg) 417 + return -ENOMEM; 418 + 419 + bss_cfg->band_cfg = BAND_CONFIG_MANUAL; 420 + bss_cfg->channel = channel; 421 + 422 + if (mwifiex_send_cmd_async(priv, HostCmd_CMD_UAP_SYS_CONFIG, 423 + HostCmd_ACT_GEN_SET, 424 + UAP_BSS_PARAMS_I, bss_cfg)) { 425 + wiphy_err(wiphy, "Failed to set the uAP channel\n"); 426 + kfree(bss_cfg); 427 + return -1; 428 + } 429 + 430 + kfree(bss_cfg); 431 + return 0; 432 + }
+4
drivers/net/wireless/mwifiex/wmm.c
··· 885 885 tid_ptr = &(priv_tmp)->wmm. 886 886 tid_tbl_ptr[tos_to_tid[i]]; 887 887 888 + /* For non-STA ra_list_curr may be NULL */ 889 + if (!tid_ptr->ra_list_curr) 890 + continue; 891 + 888 892 spin_lock_irqsave(&tid_ptr->tid_tbl_lock, 889 893 flags); 890 894 is_list_empty =
-14
drivers/net/wireless/rndis_wlan.c
··· 505 505 506 506 static int rndis_leave_ibss(struct wiphy *wiphy, struct net_device *dev); 507 507 508 - static int rndis_set_channel(struct wiphy *wiphy, struct net_device *dev, 509 - struct ieee80211_channel *chan, enum nl80211_channel_type channel_type); 510 - 511 508 static int rndis_add_key(struct wiphy *wiphy, struct net_device *netdev, 512 509 u8 key_index, bool pairwise, const u8 *mac_addr, 513 510 struct key_params *params); ··· 546 549 .disconnect = rndis_disconnect, 547 550 .join_ibss = rndis_join_ibss, 548 551 .leave_ibss = rndis_leave_ibss, 549 - .set_channel = rndis_set_channel, 550 552 .add_key = rndis_add_key, 551 553 .del_key = rndis_del_key, 552 554 .set_default_key = rndis_set_default_key, ··· 2392 2396 memset(priv->bssid, 0, ETH_ALEN); 2393 2397 2394 2398 return deauthenticate(usbdev); 2395 - } 2396 - 2397 - static int rndis_set_channel(struct wiphy *wiphy, struct net_device *netdev, 2398 - struct ieee80211_channel *chan, enum nl80211_channel_type channel_type) 2399 - { 2400 - struct rndis_wlan_private *priv = wiphy_priv(wiphy); 2401 - struct usbnet *usbdev = priv->usbdev; 2402 - 2403 - return set_channel(usbdev, 2404 - ieee80211_frequency_to_channel(chan->center_freq)); 2405 2399 } 2406 2400 2407 2401 static int rndis_add_key(struct wiphy *wiphy, struct net_device *netdev,
+1
drivers/net/wireless/rt2x00/rt2800pci.c
··· 1192 1192 { PCI_DEVICE(0x1814, 0x5390) }, 1193 1193 { PCI_DEVICE(0x1814, 0x5392) }, 1194 1194 { PCI_DEVICE(0x1814, 0x539a) }, 1195 + { PCI_DEVICE(0x1814, 0x539b) }, 1195 1196 { PCI_DEVICE(0x1814, 0x539f) }, 1196 1197 #endif 1197 1198 { 0, }
+1
drivers/net/wireless/ti/wl12xx/Kconfig
··· 1 1 config WL12XX 2 2 tristate "TI wl12xx support" 3 + depends on MAC80211 3 4 select WLCORE 4 5 ---help--- 5 6 This module adds support for wireless adapters based on TI wl1271,
+1 -1
drivers/net/wireless/ti/wlcore/Kconfig
··· 1 1 config WLCORE 2 2 tristate "TI wlcore support" 3 - depends on WL_TI && GENERIC_HARDIRQS 3 + depends on WL_TI && GENERIC_HARDIRQS && MAC80211 4 4 depends on INET 5 5 select FW_LOADER 6 6 ---help---
+80
drivers/net/wireless/ti/wlcore/acx.c
··· 1714 1714 return ret; 1715 1715 1716 1716 } 1717 + 1718 + /* Set the global behaviour of RX filters - On/Off + default action */ 1719 + int wl1271_acx_default_rx_filter_enable(struct wl1271 *wl, bool enable, 1720 + enum rx_filter_action action) 1721 + { 1722 + struct acx_default_rx_filter *acx; 1723 + int ret; 1724 + 1725 + wl1271_debug(DEBUG_ACX, "acx default rx filter en: %d act: %d", 1726 + enable, action); 1727 + 1728 + acx = kzalloc(sizeof(*acx), GFP_KERNEL); 1729 + if (!acx) 1730 + return -ENOMEM; 1731 + 1732 + acx->enable = enable; 1733 + acx->default_action = action; 1734 + 1735 + ret = wl1271_cmd_configure(wl, ACX_ENABLE_RX_DATA_FILTER, acx, 1736 + sizeof(*acx)); 1737 + if (ret < 0) { 1738 + wl1271_warning("acx default rx filter enable failed: %d", ret); 1739 + goto out; 1740 + } 1741 + 1742 + out: 1743 + kfree(acx); 1744 + return ret; 1745 + } 1746 + 1747 + /* Configure or disable a specific RX filter pattern */ 1748 + int wl1271_acx_set_rx_filter(struct wl1271 *wl, u8 index, bool enable, 1749 + struct wl12xx_rx_filter *filter) 1750 + { 1751 + struct acx_rx_filter_cfg *acx; 1752 + int fields_size = 0; 1753 + int acx_size; 1754 + int ret; 1755 + 1756 + WARN_ON(enable && !filter); 1757 + WARN_ON(index >= WL1271_MAX_RX_FILTERS); 1758 + 1759 + wl1271_debug(DEBUG_ACX, 1760 + "acx set rx filter idx: %d enable: %d filter: %p", 1761 + index, enable, filter); 1762 + 1763 + if (enable) { 1764 + fields_size = wl1271_rx_filter_get_fields_size(filter); 1765 + 1766 + wl1271_debug(DEBUG_ACX, "act: %d num_fields: %d field_size: %d", 1767 + filter->action, filter->num_fields, fields_size); 1768 + } 1769 + 1770 + acx_size = ALIGN(sizeof(*acx) + fields_size, 4); 1771 + acx = kzalloc(acx_size, GFP_KERNEL); 1772 + 1773 + if (!acx) 1774 + return -ENOMEM; 1775 + 1776 + acx->enable = enable; 1777 + acx->index = index; 1778 + 1779 + if (enable) { 1780 + acx->num_fields = filter->num_fields; 1781 + acx->action = filter->action; 1782 + wl1271_rx_filter_flatten_fields(filter, acx->fields); 1783 + } 1784 + 1785 + wl1271_dump(DEBUG_ACX, "RX_FILTER: ", acx, acx_size); 1786 + 1787 + ret = wl1271_cmd_configure(wl, ACX_SET_RX_DATA_FILTER, acx, acx_size); 1788 + if (ret < 0) { 1789 + wl1271_warning("setting rx filter failed: %d", ret); 1790 + goto out; 1791 + } 1792 + 1793 + out: 1794 + kfree(acx); 1795 + return ret; 1796 + }
+30
drivers/net/wireless/ti/wlcore/acx.h
··· 1147 1147 u8 padding[2]; 1148 1148 } __packed; 1149 1149 1150 + 1151 + struct acx_default_rx_filter { 1152 + struct acx_header header; 1153 + u8 enable; 1154 + 1155 + /* action of type FILTER_XXX */ 1156 + u8 default_action; 1157 + 1158 + u8 pad[2]; 1159 + } __packed; 1160 + 1161 + 1162 + struct acx_rx_filter_cfg { 1163 + struct acx_header header; 1164 + 1165 + u8 enable; 1166 + 1167 + /* 0 - WL1271_MAX_RX_FILTERS-1 */ 1168 + u8 index; 1169 + 1170 + u8 action; 1171 + 1172 + u8 num_fields; 1173 + u8 fields[0]; 1174 + } __packed; 1175 + 1150 1176 enum { 1151 1177 ACX_WAKE_UP_CONDITIONS = 0x0000, 1152 1178 ACX_MEM_CFG = 0x0001, ··· 1330 1304 int wl1271_acx_fm_coex(struct wl1271 *wl); 1331 1305 int wl12xx_acx_set_rate_mgmt_params(struct wl1271 *wl); 1332 1306 int wl12xx_acx_config_hangover(struct wl1271 *wl); 1307 + int wl1271_acx_default_rx_filter_enable(struct wl1271 *wl, bool enable, 1308 + enum rx_filter_action action); 1309 + int wl1271_acx_set_rx_filter(struct wl1271 *wl, u8 index, bool enable, 1310 + struct wl12xx_rx_filter *filter); 1333 1311 1334 1312 #endif /* __WL1271_ACX_H__ */
+2 -1
drivers/net/wireless/ti/wlcore/boot.c
··· 72 72 struct wl1271_static_data *static_data; 73 73 int ret; 74 74 75 - static_data = kmalloc(sizeof(*static_data), GFP_DMA); 75 + static_data = kmalloc(sizeof(*static_data), GFP_KERNEL | GFP_DMA); 76 76 if (!static_data) { 77 77 wl1271_error("Couldn't allocate memory for static data!"); 78 78 return -ENOMEM; ··· 413 413 414 414 /* unmask required mbox events */ 415 415 wl->event_mask = BSS_LOSE_EVENT_ID | 416 + REGAINED_BSS_EVENT_ID | 416 417 SCAN_COMPLETE_EVENT_ID | 417 418 ROLE_STOP_COMPLETE_EVENT_ID | 418 419 RSSI_SNR_TRIGGER_0_EVENT_ID |
+5 -3
drivers/net/wireless/ti/wlcore/cmd.c
··· 123 123 unsigned long timeout; 124 124 int ret = 0; 125 125 126 - events_vector = kmalloc(sizeof(*events_vector), GFP_DMA); 126 + events_vector = kmalloc(sizeof(*events_vector), GFP_KERNEL | GFP_DMA); 127 + if (!events_vector) 128 + return -ENOMEM; 127 129 128 130 timeout = jiffies + msecs_to_jiffies(WL1271_EVENT_TIMEOUT); 129 131 ··· 1036 1034 skb_reserve(skb, sizeof(*hdr) + WL1271_EXTRA_SPACE_MAX); 1037 1035 1038 1036 tmpl = (struct wl12xx_arp_rsp_template *)skb_put(skb, sizeof(*tmpl)); 1039 - memset(tmpl, 0, sizeof(tmpl)); 1037 + memset(tmpl, 0, sizeof(*tmpl)); 1040 1038 1041 1039 /* llc layer */ 1042 1040 memcpy(tmpl->llc_hdr, rfc1042_header, sizeof(rfc1042_header)); ··· 1085 1083 1086 1084 /* mac80211 header */ 1087 1085 hdr = (struct ieee80211_hdr_3addr *)skb_push(skb, sizeof(*hdr)); 1088 - memset(hdr, 0, sizeof(hdr)); 1086 + memset(hdr, 0, sizeof(*hdr)); 1089 1087 fc = IEEE80211_FTYPE_DATA | IEEE80211_FCTL_TODS; 1090 1088 if (wlvif->sta.qos) 1091 1089 fc |= IEEE80211_STYPE_QOS_DATA;
+12 -17
drivers/net/wireless/ti/wlcore/event.c
··· 103 103 struct ieee80211_vif *vif; 104 104 struct wl12xx_vif *wlvif; 105 105 u32 vector; 106 - bool beacon_loss = false; 107 106 bool disconnect_sta = false; 108 107 unsigned long sta_bitmap = 0; 109 108 ··· 140 141 mbox->soft_gemini_sense_info); 141 142 142 143 /* 143 - * The BSS_LOSE_EVENT_ID is only needed while psm (and hence beacon 144 - * filtering) is enabled. Without PSM, the stack will receive all 145 - * beacons and can detect beacon loss by itself. 146 - * 147 - * As there's possibility that the driver disables PSM before receiving 148 - * BSS_LOSE_EVENT, beacon loss has to be reported to the stack. 149 - * 144 + * We are HW_MONITOR device. On beacon loss - queue 145 + * connection loss work. Cancel it on REGAINED event. 150 146 */ 151 147 if (vector & BSS_LOSE_EVENT_ID) { 152 148 /* TODO: check for multi-role */ 149 + int delay = wl->conf.conn.synch_fail_thold * 150 + wl->conf.conn.bss_lose_timeout; 153 151 wl1271_info("Beacon loss detected."); 152 + cancel_delayed_work_sync(&wl->connection_loss_work); 153 + ieee80211_queue_delayed_work(wl->hw, &wl->connection_loss_work, 154 + msecs_to_jiffies(delay)); 155 + } 154 156 155 - /* indicate to the stack, that beacons have been lost */ 156 - beacon_loss = true; 157 + if (vector & REGAINED_BSS_EVENT_ID) { 158 + /* TODO: check for multi-role */ 159 + wl1271_info("Beacon regained."); 160 + cancel_delayed_work_sync(&wl->connection_loss_work); 157 161 } 158 162 159 163 if (vector & RSSI_SNR_TRIGGER_0_EVENT_ID) { ··· 259 257 rcu_read_unlock(); 260 258 } 261 259 } 262 - 263 - if (beacon_loss) 264 - wl12xx_for_each_wlvif_sta(wl, wlvif) { 265 - vif = wl12xx_wlvif_to_vif(wlvif); 266 - ieee80211_connection_loss(vif); 267 - } 268 - 269 260 return 0; 270 261 } 271 262
+315 -8
drivers/net/wireless/ti/wlcore/main.c
··· 1120 1120 cancel_work_sync(&wl->recovery_work); 1121 1121 cancel_delayed_work_sync(&wl->elp_work); 1122 1122 cancel_delayed_work_sync(&wl->tx_watchdog_work); 1123 + cancel_delayed_work_sync(&wl->connection_loss_work); 1123 1124 1124 1125 mutex_lock(&wl->mutex); 1125 1126 wl1271_power_off(wl); ··· 1262 1261 1263 1262 1264 1263 #ifdef CONFIG_PM 1264 + static int 1265 + wl1271_validate_wowlan_pattern(struct cfg80211_wowlan_trig_pkt_pattern *p) 1266 + { 1267 + int num_fields = 0, in_field = 0, fields_size = 0; 1268 + int i, pattern_len = 0; 1269 + 1270 + if (!p->mask) { 1271 + wl1271_warning("No mask in WoWLAN pattern"); 1272 + return -EINVAL; 1273 + } 1274 + 1275 + /* 1276 + * The pattern is broken up into segments of bytes at different offsets 1277 + * that need to be checked by the FW filter. Each segment is called 1278 + * a field in the FW API. We verify that the total number of fields 1279 + * required for this pattern won't exceed FW limits (8) 1280 + * as well as the total fields buffer won't exceed the FW limit. 1281 + * Note that if there's a pattern which crosses Ethernet/IP header 1282 + * boundary a new field is required. 1283 + */ 1284 + for (i = 0; i < p->pattern_len; i++) { 1285 + if (test_bit(i, (unsigned long *)p->mask)) { 1286 + if (!in_field) { 1287 + in_field = 1; 1288 + pattern_len = 1; 1289 + } else { 1290 + if (i == WL1271_RX_FILTER_ETH_HEADER_SIZE) { 1291 + num_fields++; 1292 + fields_size += pattern_len + 1293 + RX_FILTER_FIELD_OVERHEAD; 1294 + pattern_len = 1; 1295 + } else 1296 + pattern_len++; 1297 + } 1298 + } else { 1299 + if (in_field) { 1300 + in_field = 0; 1301 + fields_size += pattern_len + 1302 + RX_FILTER_FIELD_OVERHEAD; 1303 + num_fields++; 1304 + } 1305 + } 1306 + } 1307 + 1308 + if (in_field) { 1309 + fields_size += pattern_len + RX_FILTER_FIELD_OVERHEAD; 1310 + num_fields++; 1311 + } 1312 + 1313 + if (num_fields > WL1271_RX_FILTER_MAX_FIELDS) { 1314 + wl1271_warning("RX Filter too complex. Too many segments"); 1315 + return -EINVAL; 1316 + } 1317 + 1318 + if (fields_size > WL1271_RX_FILTER_MAX_FIELDS_SIZE) { 1319 + wl1271_warning("RX filter pattern is too big"); 1320 + return -E2BIG; 1321 + } 1322 + 1323 + return 0; 1324 + } 1325 + 1326 + struct wl12xx_rx_filter *wl1271_rx_filter_alloc(void) 1327 + { 1328 + return kzalloc(sizeof(struct wl12xx_rx_filter), GFP_KERNEL); 1329 + } 1330 + 1331 + void wl1271_rx_filter_free(struct wl12xx_rx_filter *filter) 1332 + { 1333 + int i; 1334 + 1335 + if (filter == NULL) 1336 + return; 1337 + 1338 + for (i = 0; i < filter->num_fields; i++) 1339 + kfree(filter->fields[i].pattern); 1340 + 1341 + kfree(filter); 1342 + } 1343 + 1344 + int wl1271_rx_filter_alloc_field(struct wl12xx_rx_filter *filter, 1345 + u16 offset, u8 flags, 1346 + u8 *pattern, u8 len) 1347 + { 1348 + struct wl12xx_rx_filter_field *field; 1349 + 1350 + if (filter->num_fields == WL1271_RX_FILTER_MAX_FIELDS) { 1351 + wl1271_warning("Max fields per RX filter. can't alloc another"); 1352 + return -EINVAL; 1353 + } 1354 + 1355 + field = &filter->fields[filter->num_fields]; 1356 + 1357 + field->pattern = kzalloc(len, GFP_KERNEL); 1358 + if (!field->pattern) { 1359 + wl1271_warning("Failed to allocate RX filter pattern"); 1360 + return -ENOMEM; 1361 + } 1362 + 1363 + filter->num_fields++; 1364 + 1365 + field->offset = cpu_to_le16(offset); 1366 + field->flags = flags; 1367 + field->len = len; 1368 + memcpy(field->pattern, pattern, len); 1369 + 1370 + return 0; 1371 + } 1372 + 1373 + int wl1271_rx_filter_get_fields_size(struct wl12xx_rx_filter *filter) 1374 + { 1375 + int i, fields_size = 0; 1376 + 1377 + for (i = 0; i < filter->num_fields; i++) 1378 + fields_size += filter->fields[i].len + 1379 + sizeof(struct wl12xx_rx_filter_field) - 1380 + sizeof(u8 *); 1381 + 1382 + return fields_size; 1383 + } 1384 + 1385 + void wl1271_rx_filter_flatten_fields(struct wl12xx_rx_filter *filter, 1386 + u8 *buf) 1387 + { 1388 + int i; 1389 + struct wl12xx_rx_filter_field *field; 1390 + 1391 + for (i = 0; i < filter->num_fields; i++) { 1392 + field = (struct wl12xx_rx_filter_field *)buf; 1393 + 1394 + field->offset = filter->fields[i].offset; 1395 + field->flags = filter->fields[i].flags; 1396 + field->len = filter->fields[i].len; 1397 + 1398 + memcpy(&field->pattern, filter->fields[i].pattern, field->len); 1399 + buf += sizeof(struct wl12xx_rx_filter_field) - 1400 + sizeof(u8 *) + field->len; 1401 + } 1402 + } 1403 + 1404 + /* 1405 + * Allocates an RX filter returned through f 1406 + * which needs to be freed using rx_filter_free() 1407 + */ 1408 + static int wl1271_convert_wowlan_pattern_to_rx_filter( 1409 + struct cfg80211_wowlan_trig_pkt_pattern *p, 1410 + struct wl12xx_rx_filter **f) 1411 + { 1412 + int i, j, ret = 0; 1413 + struct wl12xx_rx_filter *filter; 1414 + u16 offset; 1415 + u8 flags, len; 1416 + 1417 + filter = wl1271_rx_filter_alloc(); 1418 + if (!filter) { 1419 + wl1271_warning("Failed to alloc rx filter"); 1420 + ret = -ENOMEM; 1421 + goto err; 1422 + } 1423 + 1424 + i = 0; 1425 + while (i < p->pattern_len) { 1426 + if (!test_bit(i, (unsigned long *)p->mask)) { 1427 + i++; 1428 + continue; 1429 + } 1430 + 1431 + for (j = i; j < p->pattern_len; j++) { 1432 + if (!test_bit(j, (unsigned long *)p->mask)) 1433 + break; 1434 + 1435 + if (i < WL1271_RX_FILTER_ETH_HEADER_SIZE && 1436 + j >= WL1271_RX_FILTER_ETH_HEADER_SIZE) 1437 + break; 1438 + } 1439 + 1440 + if (i < WL1271_RX_FILTER_ETH_HEADER_SIZE) { 1441 + offset = i; 1442 + flags = WL1271_RX_FILTER_FLAG_ETHERNET_HEADER; 1443 + } else { 1444 + offset = i - WL1271_RX_FILTER_ETH_HEADER_SIZE; 1445 + flags = WL1271_RX_FILTER_FLAG_IP_HEADER; 1446 + } 1447 + 1448 + len = j - i; 1449 + 1450 + ret = wl1271_rx_filter_alloc_field(filter, 1451 + offset, 1452 + flags, 1453 + &p->pattern[i], len); 1454 + if (ret) 1455 + goto err; 1456 + 1457 + i = j; 1458 + } 1459 + 1460 + filter->action = FILTER_SIGNAL; 1461 + 1462 + *f = filter; 1463 + return 0; 1464 + 1465 + err: 1466 + wl1271_rx_filter_free(filter); 1467 + *f = NULL; 1468 + 1469 + return ret; 1470 + } 1471 + 1472 + static int wl1271_configure_wowlan(struct wl1271 *wl, 1473 + struct cfg80211_wowlan *wow) 1474 + { 1475 + int i, ret; 1476 + 1477 + if (!wow || wow->any || !wow->n_patterns) { 1478 + wl1271_acx_default_rx_filter_enable(wl, 0, FILTER_SIGNAL); 1479 + wl1271_rx_filter_clear_all(wl); 1480 + return 0; 1481 + } 1482 + 1483 + if (WARN_ON(wow->n_patterns > WL1271_MAX_RX_FILTERS)) 1484 + return -EINVAL; 1485 + 1486 + /* Validate all incoming patterns before clearing current FW state */ 1487 + for (i = 0; i < wow->n_patterns; i++) { 1488 + ret = wl1271_validate_wowlan_pattern(&wow->patterns[i]); 1489 + if (ret) { 1490 + wl1271_warning("Bad wowlan pattern %d", i); 1491 + return ret; 1492 + } 1493 + } 1494 + 1495 + wl1271_acx_default_rx_filter_enable(wl, 0, FILTER_SIGNAL); 1496 + wl1271_rx_filter_clear_all(wl); 1497 + 1498 + /* Translate WoWLAN patterns into filters */ 1499 + for (i = 0; i < wow->n_patterns; i++) { 1500 + struct cfg80211_wowlan_trig_pkt_pattern *p; 1501 + struct wl12xx_rx_filter *filter = NULL; 1502 + 1503 + p = &wow->patterns[i]; 1504 + 1505 + ret = wl1271_convert_wowlan_pattern_to_rx_filter(p, &filter); 1506 + if (ret) { 1507 + wl1271_warning("Failed to create an RX filter from " 1508 + "wowlan pattern %d", i); 1509 + goto out; 1510 + } 1511 + 1512 + ret = wl1271_rx_filter_enable(wl, i, 1, filter); 1513 + 1514 + wl1271_rx_filter_free(filter); 1515 + if (ret) 1516 + goto out; 1517 + } 1518 + 1519 + ret = wl1271_acx_default_rx_filter_enable(wl, 1, FILTER_DROP); 1520 + 1521 + out: 1522 + return ret; 1523 + } 1524 + 1265 1525 static int wl1271_configure_suspend_sta(struct wl1271 *wl, 1266 - struct wl12xx_vif *wlvif) 1526 + struct wl12xx_vif *wlvif, 1527 + struct cfg80211_wowlan *wow) 1267 1528 { 1268 1529 int ret = 0; 1269 1530 ··· 1536 1273 if (ret < 0) 1537 1274 goto out; 1538 1275 1276 + wl1271_configure_wowlan(wl, wow); 1539 1277 ret = wl1271_acx_wake_up_conditions(wl, wlvif, 1540 1278 wl->conf.conn.suspend_wake_up_event, 1541 1279 wl->conf.conn.suspend_listen_interval); ··· 1572 1308 } 1573 1309 1574 1310 static int wl1271_configure_suspend(struct wl1271 *wl, 1575 - struct wl12xx_vif *wlvif) 1311 + struct wl12xx_vif *wlvif, 1312 + struct cfg80211_wowlan *wow) 1576 1313 { 1577 1314 if (wlvif->bss_type == BSS_TYPE_STA_BSS) 1578 - return wl1271_configure_suspend_sta(wl, wlvif); 1315 + return wl1271_configure_suspend_sta(wl, wlvif, wow); 1579 1316 if (wlvif->bss_type == BSS_TYPE_AP_BSS) 1580 1317 return wl1271_configure_suspend_ap(wl, wlvif); 1581 1318 return 0; ··· 1597 1332 return; 1598 1333 1599 1334 if (is_sta) { 1335 + wl1271_configure_wowlan(wl, NULL); 1336 + 1600 1337 ret = wl1271_acx_wake_up_conditions(wl, wlvif, 1601 1338 wl->conf.conn.wake_up_event, 1602 1339 wl->conf.conn.listen_interval); ··· 1622 1355 int ret; 1623 1356 1624 1357 wl1271_debug(DEBUG_MAC80211, "mac80211 suspend wow=%d", !!wow); 1625 - WARN_ON(!wow || !wow->any); 1358 + WARN_ON(!wow); 1626 1359 1627 1360 wl1271_tx_flush(wl); 1628 1361 1629 1362 mutex_lock(&wl->mutex); 1630 1363 wl->wow_enabled = true; 1631 1364 wl12xx_for_each_wlvif(wl, wlvif) { 1632 - ret = wl1271_configure_suspend(wl, wlvif); 1365 + ret = wl1271_configure_suspend(wl, wlvif, wow); 1633 1366 if (ret < 0) { 1367 + mutex_unlock(&wl->mutex); 1634 1368 wl1271_warning("couldn't prepare device to suspend"); 1635 1369 return ret; 1636 1370 } ··· 1755 1487 cancel_work_sync(&wl->tx_work); 1756 1488 cancel_delayed_work_sync(&wl->elp_work); 1757 1489 cancel_delayed_work_sync(&wl->tx_watchdog_work); 1490 + cancel_delayed_work_sync(&wl->connection_loss_work); 1758 1491 1759 1492 /* let's notify MAC80211 about the remaining pending TX frames */ 1760 1493 wl12xx_tx_reset(wl, true); ··· 3708 3439 do_join = true; 3709 3440 set_assoc = true; 3710 3441 3442 + /* Cancel connection_loss_work */ 3443 + cancel_delayed_work_sync(&wl->connection_loss_work); 3444 + 3711 3445 /* 3712 3446 * use basic rates from AP, and determine lowest rate 3713 3447 * to use with control frames. ··· 4821 4549 .read = wl1271_sysfs_read_fwlog, 4822 4550 }; 4823 4551 4552 + static void wl1271_connection_loss_work(struct work_struct *work) 4553 + { 4554 + struct delayed_work *dwork; 4555 + struct wl1271 *wl; 4556 + struct ieee80211_vif *vif; 4557 + struct wl12xx_vif *wlvif; 4558 + 4559 + dwork = container_of(work, struct delayed_work, work); 4560 + wl = container_of(dwork, struct wl1271, connection_loss_work); 4561 + 4562 + wl1271_info("Connection loss work."); 4563 + 4564 + mutex_lock(&wl->mutex); 4565 + 4566 + if (unlikely(wl->state == WL1271_STATE_OFF)) 4567 + goto out; 4568 + 4569 + /* Call mac80211 connection loss */ 4570 + wl12xx_for_each_wlvif_sta(wl, wlvif) { 4571 + if (!test_bit(WLVIF_FLAG_STA_ASSOCIATED, &wlvif->flags)) 4572 + goto out; 4573 + vif = wl12xx_wlvif_to_vif(wlvif); 4574 + ieee80211_connection_loss(vif); 4575 + } 4576 + out: 4577 + mutex_unlock(&wl->mutex); 4578 + } 4579 + 4824 4580 static void wl12xx_derive_mac_addresses(struct wl1271 *wl, 4825 4581 u32 oui, u32 nic, int n) 4826 4582 { ··· 5104 4804 INIT_WORK(&wl->recovery_work, wl1271_recovery_work); 5105 4805 INIT_DELAYED_WORK(&wl->scan_complete_work, wl1271_scan_complete_work); 5106 4806 INIT_DELAYED_WORK(&wl->tx_watchdog_work, wl12xx_tx_watchdog_work); 4807 + INIT_DELAYED_WORK(&wl->connection_loss_work, 4808 + wl1271_connection_loss_work); 5107 4809 5108 4810 wl->freezable_wq = create_freezable_workqueue("wl12xx_wq"); 5109 4811 if (!wl->freezable_wq) { ··· 5163 4861 goto err_dummy_packet; 5164 4862 } 5165 4863 5166 - wl->mbox = kmalloc(sizeof(*wl->mbox), GFP_DMA); 4864 + wl->mbox = kmalloc(sizeof(*wl->mbox), GFP_KERNEL | GFP_DMA); 5167 4865 if (!wl->mbox) { 5168 4866 ret = -ENOMEM; 5169 4867 goto err_fwlog; ··· 5305 5003 if (!ret) { 5306 5004 wl->irq_wake_enabled = true; 5307 5005 device_init_wakeup(wl->dev, 1); 5308 - if (pdata->pwr_in_suspend) 5006 + if (pdata->pwr_in_suspend) { 5309 5007 wl->hw->wiphy->wowlan.flags = WIPHY_WOWLAN_ANY; 5310 - 5008 + wl->hw->wiphy->wowlan.n_patterns = 5009 + WL1271_MAX_RX_FILTERS; 5010 + wl->hw->wiphy->wowlan.pattern_min_len = 1; 5011 + wl->hw->wiphy->wowlan.pattern_max_len = 5012 + WL1271_RX_FILTER_MAX_PATTERN_SIZE; 5013 + } 5311 5014 } 5312 5015 disable_irq(wl->irq); 5313 5016
+36
drivers/net/wireless/ti/wlcore/rx.c
··· 278 278 279 279 wl12xx_rearm_rx_streaming(wl, active_hlids); 280 280 } 281 + 282 + int wl1271_rx_filter_enable(struct wl1271 *wl, 283 + int index, bool enable, 284 + struct wl12xx_rx_filter *filter) 285 + { 286 + int ret; 287 + 288 + if (wl->rx_filter_enabled[index] == enable) { 289 + wl1271_warning("Request to enable an already " 290 + "enabled rx filter %d", index); 291 + return 0; 292 + } 293 + 294 + ret = wl1271_acx_set_rx_filter(wl, index, enable, filter); 295 + 296 + if (ret) { 297 + wl1271_error("Failed to %s rx data filter %d (err=%d)", 298 + enable ? "enable" : "disable", index, ret); 299 + return ret; 300 + } 301 + 302 + wl->rx_filter_enabled[index] = enable; 303 + 304 + return 0; 305 + } 306 + 307 + void wl1271_rx_filter_clear_all(struct wl1271 *wl) 308 + { 309 + int i; 310 + 311 + for (i = 0; i < WL1271_MAX_RX_FILTERS; i++) { 312 + if (!wl->rx_filter_enabled[i]) 313 + continue; 314 + wl1271_rx_filter_enable(wl, i, 0, NULL); 315 + } 316 + }
+4
drivers/net/wireless/ti/wlcore/rx.h
··· 138 138 139 139 void wl12xx_rx(struct wl1271 *wl, struct wl_fw_status *status); 140 140 u8 wl1271_rate_to_idx(int rate, enum ieee80211_band band); 141 + int wl1271_rx_filter_enable(struct wl1271 *wl, 142 + int index, bool enable, 143 + struct wl12xx_rx_filter *filter); 144 + void wl1271_rx_filter_clear_all(struct wl1271 *wl); 141 145 142 146 #endif
+41
drivers/net/wireless/ti/wlcore/wl12xx.h
··· 279 279 u8 ba_bitmap; 280 280 }; 281 281 282 + #define WL1271_MAX_RX_FILTERS 5 283 + #define WL1271_RX_FILTER_MAX_FIELDS 8 284 + 285 + #define WL1271_RX_FILTER_ETH_HEADER_SIZE 14 286 + #define WL1271_RX_FILTER_MAX_FIELDS_SIZE 95 287 + #define RX_FILTER_FIELD_OVERHEAD \ 288 + (sizeof(struct wl12xx_rx_filter_field) - sizeof(u8 *)) 289 + #define WL1271_RX_FILTER_MAX_PATTERN_SIZE \ 290 + (WL1271_RX_FILTER_MAX_FIELDS_SIZE - RX_FILTER_FIELD_OVERHEAD) 291 + 292 + #define WL1271_RX_FILTER_FLAG_MASK BIT(0) 293 + #define WL1271_RX_FILTER_FLAG_IP_HEADER 0 294 + #define WL1271_RX_FILTER_FLAG_ETHERNET_HEADER BIT(1) 295 + 296 + enum rx_filter_action { 297 + FILTER_DROP = 0, 298 + FILTER_SIGNAL = 1, 299 + FILTER_FW_HANDLE = 2 300 + }; 301 + 302 + struct wl12xx_rx_filter_field { 303 + __le16 offset; 304 + u8 len; 305 + u8 flags; 306 + u8 *pattern; 307 + } __packed; 308 + 309 + struct wl12xx_rx_filter { 310 + u8 action; 311 + int num_fields; 312 + struct wl12xx_rx_filter_field fields[WL1271_RX_FILTER_MAX_FIELDS]; 313 + }; 314 + 282 315 struct wl1271_station { 283 316 u8 hlid; 284 317 }; ··· 472 439 int wl1271_recalc_rx_streaming(struct wl1271 *wl, struct wl12xx_vif *wlvif); 473 440 void wl12xx_queue_recovery_work(struct wl1271 *wl); 474 441 size_t wl12xx_copy_fwlog(struct wl1271 *wl, u8 *memblock, size_t maxlen); 442 + int wl1271_rx_filter_alloc_field(struct wl12xx_rx_filter *filter, 443 + u16 offset, u8 flags, 444 + u8 *pattern, u8 len); 445 + void wl1271_rx_filter_free(struct wl12xx_rx_filter *filter); 446 + struct wl12xx_rx_filter *wl1271_rx_filter_alloc(void); 447 + int wl1271_rx_filter_get_fields_size(struct wl12xx_rx_filter *filter); 448 + void wl1271_rx_filter_flatten_fields(struct wl12xx_rx_filter *filter, 449 + u8 *buf); 475 450 476 451 #define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */ 477 452
+6
drivers/net/wireless/ti/wlcore/wlcore.h
··· 243 243 struct wl1271_scan scan; 244 244 struct delayed_work scan_complete_work; 245 245 246 + /* Connection loss work */ 247 + struct delayed_work connection_loss_work; 248 + 246 249 bool sched_scanning; 247 250 248 251 /* The current band */ ··· 352 349 353 350 /* size of the private FW status data */ 354 351 size_t fw_status_priv_len; 352 + 353 + /* RX Data filter rule state - enabled/disabled */ 354 + bool rx_filter_enabled[WL1271_MAX_RX_FILTERS]; 355 355 }; 356 356 357 357 int __devinit wlcore_probe(struct wl1271 *wl, struct platform_device *pdev);
-6
drivers/net/xen-netfront.c
··· 1962 1962 if (!xen_domain()) 1963 1963 return -ENODEV; 1964 1964 1965 - if (xen_initial_domain()) 1966 - return 0; 1967 - 1968 1965 if (xen_hvm_domain() && !xen_platform_pci_unplug) 1969 1966 return -ENODEV; 1970 1967 ··· 1974 1977 1975 1978 static void __exit netif_exit(void) 1976 1979 { 1977 - if (xen_initial_domain()) 1978 - return; 1979 - 1980 1980 xenbus_unregister_driver(&netfront_driver); 1981 1981 } 1982 1982 module_exit(netif_exit);
+13
drivers/nfc/Kconfig
··· 17 17 To compile this driver as a module, choose m here. The module will 18 18 be called pn544. 19 19 20 + config PN544_HCI_NFC 21 + tristate "HCI PN544 NFC driver" 22 + depends on I2C && NFC_SHDLC 23 + select CRC_CCITT 24 + default n 25 + ---help--- 26 + NXP PN544 i2c driver. 27 + This is a driver based on the SHDLC and HCI NFC kernel layers and 28 + will thus not work with NXP libnfc library. 29 + 30 + To compile this driver as a module, choose m here. The module will 31 + be called pn544_hci. 32 + 20 33 config NFC_PN533 21 34 tristate "NXP PN533 USB driver" 22 35 depends on USB
+1
drivers/nfc/Makefile
··· 3 3 # 4 4 5 5 obj-$(CONFIG_PN544_NFC) += pn544.o 6 + obj-$(CONFIG_PN544_HCI_NFC) += pn544_hci.o 6 7 obj-$(CONFIG_NFC_PN533) += pn533.o 7 8 obj-$(CONFIG_NFC_WILINK) += nfcwilink.o 8 9
+8 -11
drivers/nfc/pn533.c
··· 394 394 struct pn533_frame *in_frame; 395 395 int rc; 396 396 397 - if (dev == NULL) 398 - return; 399 - 400 397 in_frame = dev->wq_in_frame; 401 398 402 399 if (dev->wq_in_error) ··· 1191 1194 return rc; 1192 1195 } 1193 1196 1194 - static int pn533_activate_target(struct nfc_dev *nfc_dev, u32 target_idx, 1195 - u32 protocol) 1197 + static int pn533_activate_target(struct nfc_dev *nfc_dev, 1198 + struct nfc_target *target, u32 protocol) 1196 1199 { 1197 1200 struct pn533 *dev = nfc_get_drvdata(nfc_dev); 1198 1201 int rc; ··· 1240 1243 return 0; 1241 1244 } 1242 1245 1243 - static void pn533_deactivate_target(struct nfc_dev *nfc_dev, u32 target_idx) 1246 + static void pn533_deactivate_target(struct nfc_dev *nfc_dev, 1247 + struct nfc_target *target) 1244 1248 { 1245 1249 struct pn533 *dev = nfc_get_drvdata(nfc_dev); 1246 1250 u8 tg; ··· 1349 1351 return 0; 1350 1352 } 1351 1353 1352 - static int pn533_dep_link_up(struct nfc_dev *nfc_dev, int target_idx, 1354 + static int pn533_dep_link_up(struct nfc_dev *nfc_dev, struct nfc_target *target, 1353 1355 u8 comm_mode, u8* gb, size_t gb_len) 1354 1356 { 1355 1357 struct pn533 *dev = nfc_get_drvdata(nfc_dev); ··· 1550 1552 return 0; 1551 1553 } 1552 1554 1553 - static int pn533_data_exchange(struct nfc_dev *nfc_dev, u32 target_idx, 1554 - struct sk_buff *skb, 1555 - data_exchange_cb_t cb, 1556 - void *cb_context) 1555 + static int pn533_data_exchange(struct nfc_dev *nfc_dev, 1556 + struct nfc_target *target, struct sk_buff *skb, 1557 + data_exchange_cb_t cb, void *cb_context) 1557 1558 { 1558 1559 struct pn533 *dev = nfc_get_drvdata(nfc_dev); 1559 1560 struct pn533_frame *out_frame, *in_frame;
+947
drivers/nfc/pn544_hci.c
··· 1 + /* 2 + * HCI based Driver for NXP PN544 NFC Chip 3 + * 4 + * Copyright (C) 2012 Intel Corporation. All rights reserved. 5 + * 6 + * This program is free software; you can redistribute it and/or modify it 7 + * under the terms and conditions of the GNU General Public License, 8 + * version 2, as published by the Free Software Foundation. 9 + * 10 + * This program is distributed in the hope that it will be useful, 11 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 + * GNU General Public License for more details. 14 + * 15 + * You should have received a copy of the GNU General Public License 16 + * along with this program; if not, write to the 17 + * Free Software Foundation, Inc., 18 + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 19 + */ 20 + 21 + #include <linux/crc-ccitt.h> 22 + #include <linux/module.h> 23 + #include <linux/delay.h> 24 + #include <linux/slab.h> 25 + #include <linux/miscdevice.h> 26 + #include <linux/interrupt.h> 27 + #include <linux/gpio.h> 28 + #include <linux/i2c.h> 29 + 30 + #include <linux/nfc.h> 31 + #include <net/nfc/hci.h> 32 + #include <net/nfc/shdlc.h> 33 + 34 + #include <linux/nfc/pn544.h> 35 + 36 + #define DRIVER_DESC "HCI NFC driver for PN544" 37 + 38 + #define PN544_HCI_DRIVER_NAME "pn544_hci" 39 + 40 + /* Timing restrictions (ms) */ 41 + #define PN544_HCI_RESETVEN_TIME 30 42 + 43 + static struct i2c_device_id pn544_hci_id_table[] = { 44 + {"pn544", 0}, 45 + {} 46 + }; 47 + 48 + MODULE_DEVICE_TABLE(i2c, pn544_hci_id_table); 49 + 50 + #define HCI_MODE 0 51 + #define FW_MODE 1 52 + 53 + /* framing in HCI mode */ 54 + #define PN544_HCI_LLC_LEN 1 55 + #define PN544_HCI_LLC_CRC 2 56 + #define PN544_HCI_LLC_LEN_CRC (PN544_HCI_LLC_LEN + PN544_HCI_LLC_CRC) 57 + #define PN544_HCI_LLC_MIN_SIZE (1 + PN544_HCI_LLC_LEN_CRC) 58 + #define PN544_HCI_LLC_MAX_PAYLOAD 29 59 + #define PN544_HCI_LLC_MAX_SIZE (PN544_HCI_LLC_LEN_CRC + 1 + \ 60 + PN544_HCI_LLC_MAX_PAYLOAD) 61 + 62 + enum pn544_state { 63 + PN544_ST_COLD, 64 + PN544_ST_FW_READY, 65 + PN544_ST_READY, 66 + }; 67 + 68 + #define FULL_VERSION_LEN 11 69 + 70 + /* Proprietary commands */ 71 + #define PN544_WRITE 0x3f 72 + 73 + /* Proprietary gates, events, commands and registers */ 74 + 75 + /* NFC_HCI_RF_READER_A_GATE additional registers and commands */ 76 + #define PN544_RF_READER_A_AUTO_ACTIVATION 0x10 77 + #define PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION 0x12 78 + #define PN544_MIFARE_CMD 0x21 79 + 80 + /* Commands that apply to all RF readers */ 81 + #define PN544_RF_READER_CMD_PRESENCE_CHECK 0x30 82 + #define PN544_RF_READER_CMD_ACTIVATE_NEXT 0x32 83 + 84 + /* NFC_HCI_ID_MGMT_GATE additional registers */ 85 + #define PN544_ID_MGMT_FULL_VERSION_SW 0x10 86 + 87 + #define PN544_RF_READER_ISO15693_GATE 0x12 88 + 89 + #define PN544_RF_READER_F_GATE 0x14 90 + #define PN544_FELICA_ID 0x04 91 + #define PN544_FELICA_RAW 0x20 92 + 93 + #define PN544_RF_READER_JEWEL_GATE 0x15 94 + #define PN544_JEWEL_RAW_CMD 0x23 95 + 96 + #define PN544_RF_READER_NFCIP1_INITIATOR_GATE 0x30 97 + #define PN544_RF_READER_NFCIP1_TARGET_GATE 0x31 98 + 99 + #define PN544_SYS_MGMT_GATE 0x90 100 + #define PN544_SYS_MGMT_INFO_NOTIFICATION 0x02 101 + 102 + #define PN544_POLLING_LOOP_MGMT_GATE 0x94 103 + #define PN544_PL_RDPHASES 0x06 104 + #define PN544_PL_EMULATION 0x07 105 + #define PN544_PL_NFCT_DEACTIVATED 0x09 106 + 107 + #define PN544_SWP_MGMT_GATE 0xA0 108 + 109 + #define PN544_NFC_WI_MGMT_GATE 0xA1 110 + 111 + static u8 pn544_custom_gates[] = { 112 + PN544_SYS_MGMT_GATE, 113 + PN544_SWP_MGMT_GATE, 114 + PN544_POLLING_LOOP_MGMT_GATE, 115 + PN544_NFC_WI_MGMT_GATE, 116 + PN544_RF_READER_F_GATE, 117 + PN544_RF_READER_JEWEL_GATE, 118 + PN544_RF_READER_ISO15693_GATE, 119 + PN544_RF_READER_NFCIP1_INITIATOR_GATE, 120 + PN544_RF_READER_NFCIP1_TARGET_GATE 121 + }; 122 + 123 + /* Largest headroom needed for outgoing custom commands */ 124 + #define PN544_CMDS_HEADROOM 2 125 + 126 + struct pn544_hci_info { 127 + struct i2c_client *i2c_dev; 128 + struct nfc_shdlc *shdlc; 129 + 130 + enum pn544_state state; 131 + 132 + struct mutex info_lock; 133 + 134 + unsigned int gpio_en; 135 + unsigned int gpio_irq; 136 + unsigned int gpio_fw; 137 + unsigned int en_polarity; 138 + 139 + int hard_fault; /* 140 + * < 0 if hardware error occured (e.g. i2c err) 141 + * and prevents normal operation. 142 + */ 143 + }; 144 + 145 + static void pn544_hci_platform_init(struct pn544_hci_info *info) 146 + { 147 + int polarity, retry, ret; 148 + char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 }; 149 + int count = sizeof(rset_cmd); 150 + 151 + pr_info(DRIVER_DESC ": %s\n", __func__); 152 + dev_info(&info->i2c_dev->dev, "Detecting nfc_en polarity\n"); 153 + 154 + /* Disable fw download */ 155 + gpio_set_value(info->gpio_fw, 0); 156 + 157 + for (polarity = 0; polarity < 2; polarity++) { 158 + info->en_polarity = polarity; 159 + retry = 3; 160 + while (retry--) { 161 + /* power off */ 162 + gpio_set_value(info->gpio_en, !info->en_polarity); 163 + usleep_range(10000, 15000); 164 + 165 + /* power on */ 166 + gpio_set_value(info->gpio_en, info->en_polarity); 167 + usleep_range(10000, 15000); 168 + 169 + /* send reset */ 170 + dev_dbg(&info->i2c_dev->dev, "Sending reset cmd\n"); 171 + ret = i2c_master_send(info->i2c_dev, rset_cmd, count); 172 + if (ret == count) { 173 + dev_info(&info->i2c_dev->dev, 174 + "nfc_en polarity : active %s\n", 175 + (polarity == 0 ? "low" : "high")); 176 + goto out; 177 + } 178 + } 179 + } 180 + 181 + dev_err(&info->i2c_dev->dev, 182 + "Could not detect nfc_en polarity, fallback to active high\n"); 183 + 184 + out: 185 + gpio_set_value(info->gpio_en, !info->en_polarity); 186 + } 187 + 188 + static int pn544_hci_enable(struct pn544_hci_info *info, int mode) 189 + { 190 + pr_info(DRIVER_DESC ": %s\n", __func__); 191 + 192 + gpio_set_value(info->gpio_fw, 0); 193 + gpio_set_value(info->gpio_en, info->en_polarity); 194 + usleep_range(10000, 15000); 195 + 196 + return 0; 197 + } 198 + 199 + static void pn544_hci_disable(struct pn544_hci_info *info) 200 + { 201 + pr_info(DRIVER_DESC ": %s\n", __func__); 202 + 203 + gpio_set_value(info->gpio_fw, 0); 204 + gpio_set_value(info->gpio_en, !info->en_polarity); 205 + usleep_range(10000, 15000); 206 + 207 + gpio_set_value(info->gpio_en, info->en_polarity); 208 + usleep_range(10000, 15000); 209 + 210 + gpio_set_value(info->gpio_en, !info->en_polarity); 211 + usleep_range(10000, 15000); 212 + } 213 + 214 + static int pn544_hci_i2c_write(struct i2c_client *client, u8 *buf, int len) 215 + { 216 + int r; 217 + 218 + usleep_range(3000, 6000); 219 + 220 + r = i2c_master_send(client, buf, len); 221 + 222 + if (r == -EREMOTEIO) { /* Retry, chip was in standby */ 223 + usleep_range(6000, 10000); 224 + r = i2c_master_send(client, buf, len); 225 + } 226 + 227 + if (r >= 0 && r != len) 228 + r = -EREMOTEIO; 229 + 230 + return r; 231 + } 232 + 233 + static int check_crc(u8 *buf, int buflen) 234 + { 235 + u8 len; 236 + u16 crc; 237 + 238 + len = buf[0] + 1; 239 + crc = crc_ccitt(0xffff, buf, len - 2); 240 + crc = ~crc; 241 + 242 + if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) { 243 + pr_err(PN544_HCI_DRIVER_NAME ": CRC error 0x%x != 0x%x 0x%x\n", 244 + crc, buf[len - 1], buf[len - 2]); 245 + 246 + pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__); 247 + print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE, 248 + 16, 2, buf, buflen, false); 249 + return -EPERM; 250 + } 251 + return 0; 252 + } 253 + 254 + /* 255 + * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees 256 + * that i2c bus will be flushed and that next read will start on a new frame. 257 + * returned skb contains only LLC header and payload. 258 + * returns: 259 + * -EREMOTEIO : i2c read error (fatal) 260 + * -EBADMSG : frame was incorrect and discarded 261 + * -ENOMEM : cannot allocate skb, frame dropped 262 + */ 263 + static int pn544_hci_i2c_read(struct i2c_client *client, struct sk_buff **skb) 264 + { 265 + int r; 266 + u8 len; 267 + u8 tmp[PN544_HCI_LLC_MAX_SIZE - 1]; 268 + 269 + r = i2c_master_recv(client, &len, 1); 270 + if (r != 1) { 271 + dev_err(&client->dev, "cannot read len byte\n"); 272 + return -EREMOTEIO; 273 + } 274 + 275 + if ((len < (PN544_HCI_LLC_MIN_SIZE - 1)) || 276 + (len > (PN544_HCI_LLC_MAX_SIZE - 1))) { 277 + dev_err(&client->dev, "invalid len byte\n"); 278 + r = -EBADMSG; 279 + goto flush; 280 + } 281 + 282 + *skb = alloc_skb(1 + len, GFP_KERNEL); 283 + if (*skb == NULL) { 284 + r = -ENOMEM; 285 + goto flush; 286 + } 287 + 288 + *skb_put(*skb, 1) = len; 289 + 290 + r = i2c_master_recv(client, skb_put(*skb, len), len); 291 + if (r != len) { 292 + kfree_skb(*skb); 293 + return -EREMOTEIO; 294 + } 295 + 296 + r = check_crc((*skb)->data, (*skb)->len); 297 + if (r != 0) { 298 + kfree_skb(*skb); 299 + r = -EBADMSG; 300 + goto flush; 301 + } 302 + 303 + skb_pull(*skb, 1); 304 + skb_trim(*skb, (*skb)->len - 2); 305 + 306 + usleep_range(3000, 6000); 307 + 308 + return 0; 309 + 310 + flush: 311 + if (i2c_master_recv(client, tmp, sizeof(tmp)) < 0) 312 + r = -EREMOTEIO; 313 + 314 + usleep_range(3000, 6000); 315 + 316 + return r; 317 + } 318 + 319 + /* 320 + * Reads an shdlc frame from the chip. This is not as straightforward as it 321 + * seems. There are cases where we could loose the frame start synchronization. 322 + * The frame format is len-data-crc, and corruption can occur anywhere while 323 + * transiting on i2c bus, such that we could read an invalid len. 324 + * In order to recover synchronization with the next frame, we must be sure 325 + * to read the real amount of data without using the len byte. We do this by 326 + * assuming the following: 327 + * - the chip will always present only one single complete frame on the bus 328 + * before triggering the interrupt 329 + * - the chip will not present a new frame until we have completely read 330 + * the previous one (or until we have handled the interrupt). 331 + * The tricky case is when we read a corrupted len that is less than the real 332 + * len. We must detect this here in order to determine that we need to flush 333 + * the bus. This is the reason why we check the crc here. 334 + */ 335 + static irqreturn_t pn544_hci_irq_thread_fn(int irq, void *dev_id) 336 + { 337 + struct pn544_hci_info *info = dev_id; 338 + struct i2c_client *client = info->i2c_dev; 339 + struct sk_buff *skb = NULL; 340 + int r; 341 + 342 + BUG_ON(!info); 343 + BUG_ON(irq != info->i2c_dev->irq); 344 + 345 + dev_dbg(&client->dev, "IRQ\n"); 346 + 347 + if (info->hard_fault != 0) 348 + return IRQ_HANDLED; 349 + 350 + r = pn544_hci_i2c_read(client, &skb); 351 + if (r == -EREMOTEIO) { 352 + info->hard_fault = r; 353 + 354 + nfc_shdlc_recv_frame(info->shdlc, NULL); 355 + 356 + return IRQ_HANDLED; 357 + } else if ((r == -ENOMEM) || (r == -EBADMSG)) { 358 + return IRQ_HANDLED; 359 + } 360 + 361 + nfc_shdlc_recv_frame(info->shdlc, skb); 362 + 363 + return IRQ_HANDLED; 364 + } 365 + 366 + static int pn544_hci_open(struct nfc_shdlc *shdlc) 367 + { 368 + struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc); 369 + int r = 0; 370 + 371 + mutex_lock(&info->info_lock); 372 + 373 + if (info->state != PN544_ST_COLD) { 374 + r = -EBUSY; 375 + goto out; 376 + } 377 + 378 + r = pn544_hci_enable(info, HCI_MODE); 379 + 380 + out: 381 + mutex_unlock(&info->info_lock); 382 + return r; 383 + } 384 + 385 + static void pn544_hci_close(struct nfc_shdlc *shdlc) 386 + { 387 + struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc); 388 + 389 + mutex_lock(&info->info_lock); 390 + 391 + if (info->state == PN544_ST_COLD) 392 + goto out; 393 + 394 + pn544_hci_disable(info); 395 + 396 + out: 397 + mutex_unlock(&info->info_lock); 398 + } 399 + 400 + static int pn544_hci_ready(struct nfc_shdlc *shdlc) 401 + { 402 + struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc); 403 + struct sk_buff *skb; 404 + static struct hw_config { 405 + u8 adr[2]; 406 + u8 value; 407 + } hw_config[] = { 408 + {{0x9f, 0x9a}, 0x00}, 409 + 410 + {{0x98, 0x10}, 0xbc}, 411 + 412 + {{0x9e, 0x71}, 0x00}, 413 + 414 + {{0x98, 0x09}, 0x00}, 415 + 416 + {{0x9e, 0xb4}, 0x00}, 417 + 418 + {{0x9e, 0xd9}, 0xff}, 419 + {{0x9e, 0xda}, 0xff}, 420 + {{0x9e, 0xdb}, 0x23}, 421 + {{0x9e, 0xdc}, 0x21}, 422 + {{0x9e, 0xdd}, 0x22}, 423 + {{0x9e, 0xde}, 0x24}, 424 + 425 + {{0x9c, 0x01}, 0x08}, 426 + 427 + {{0x9e, 0xaa}, 0x01}, 428 + 429 + {{0x9b, 0xd1}, 0x0d}, 430 + {{0x9b, 0xd2}, 0x24}, 431 + {{0x9b, 0xd3}, 0x0a}, 432 + {{0x9b, 0xd4}, 0x22}, 433 + {{0x9b, 0xd5}, 0x08}, 434 + {{0x9b, 0xd6}, 0x1e}, 435 + {{0x9b, 0xdd}, 0x1c}, 436 + 437 + {{0x9b, 0x84}, 0x13}, 438 + {{0x99, 0x81}, 0x7f}, 439 + {{0x99, 0x31}, 0x70}, 440 + 441 + {{0x98, 0x00}, 0x3f}, 442 + 443 + {{0x9f, 0x09}, 0x00}, 444 + 445 + {{0x9f, 0x0a}, 0x05}, 446 + 447 + {{0x9e, 0xd1}, 0xa1}, 448 + {{0x99, 0x23}, 0x00}, 449 + 450 + {{0x9e, 0x74}, 0x80}, 451 + 452 + {{0x9f, 0x28}, 0x10}, 453 + 454 + {{0x9f, 0x35}, 0x14}, 455 + 456 + {{0x9f, 0x36}, 0x60}, 457 + 458 + {{0x9c, 0x31}, 0x00}, 459 + 460 + {{0x9c, 0x32}, 0xc8}, 461 + 462 + {{0x9c, 0x19}, 0x40}, 463 + 464 + {{0x9c, 0x1a}, 0x40}, 465 + 466 + {{0x9c, 0x0c}, 0x00}, 467 + 468 + {{0x9c, 0x0d}, 0x00}, 469 + 470 + {{0x9c, 0x12}, 0x00}, 471 + 472 + {{0x9c, 0x13}, 0x00}, 473 + 474 + {{0x98, 0xa2}, 0x0e}, 475 + 476 + {{0x98, 0x93}, 0x40}, 477 + 478 + {{0x98, 0x7d}, 0x02}, 479 + {{0x98, 0x7e}, 0x00}, 480 + {{0x9f, 0xc8}, 0x01}, 481 + }; 482 + struct hw_config *p = hw_config; 483 + int count = ARRAY_SIZE(hw_config); 484 + struct sk_buff *res_skb; 485 + u8 param[4]; 486 + int r; 487 + 488 + param[0] = 0; 489 + while (count--) { 490 + param[1] = p->adr[0]; 491 + param[2] = p->adr[1]; 492 + param[3] = p->value; 493 + 494 + r = nfc_hci_send_cmd(hdev, PN544_SYS_MGMT_GATE, PN544_WRITE, 495 + param, 4, &res_skb); 496 + if (r < 0) 497 + return r; 498 + 499 + if (res_skb->len != 1) { 500 + kfree_skb(res_skb); 501 + return -EPROTO; 502 + } 503 + 504 + if (res_skb->data[0] != p->value) { 505 + kfree_skb(res_skb); 506 + return -EIO; 507 + } 508 + 509 + kfree_skb(res_skb); 510 + 511 + p++; 512 + } 513 + 514 + param[0] = NFC_HCI_UICC_HOST_ID; 515 + r = nfc_hci_set_param(hdev, NFC_HCI_ADMIN_GATE, 516 + NFC_HCI_ADMIN_WHITELIST, param, 1); 517 + if (r < 0) 518 + return r; 519 + 520 + param[0] = 0x3d; 521 + r = nfc_hci_set_param(hdev, PN544_SYS_MGMT_GATE, 522 + PN544_SYS_MGMT_INFO_NOTIFICATION, param, 1); 523 + if (r < 0) 524 + return r; 525 + 526 + param[0] = 0x0; 527 + r = nfc_hci_set_param(hdev, NFC_HCI_RF_READER_A_GATE, 528 + PN544_RF_READER_A_AUTO_ACTIVATION, param, 1); 529 + if (r < 0) 530 + return r; 531 + 532 + r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE, 533 + NFC_HCI_EVT_END_OPERATION, NULL, 0); 534 + if (r < 0) 535 + return r; 536 + 537 + param[0] = 0x1; 538 + r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE, 539 + PN544_PL_NFCT_DEACTIVATED, param, 1); 540 + if (r < 0) 541 + return r; 542 + 543 + param[0] = 0x0; 544 + r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE, 545 + PN544_PL_RDPHASES, param, 1); 546 + if (r < 0) 547 + return r; 548 + 549 + r = nfc_hci_get_param(hdev, NFC_HCI_ID_MGMT_GATE, 550 + PN544_ID_MGMT_FULL_VERSION_SW, &skb); 551 + if (r < 0) 552 + return r; 553 + 554 + if (skb->len != FULL_VERSION_LEN) { 555 + kfree_skb(skb); 556 + return -EINVAL; 557 + } 558 + 559 + print_hex_dump(KERN_DEBUG, "FULL VERSION SOFTWARE INFO: ", 560 + DUMP_PREFIX_NONE, 16, 1, 561 + skb->data, FULL_VERSION_LEN, false); 562 + 563 + kfree_skb(skb); 564 + 565 + return 0; 566 + } 567 + 568 + static int pn544_hci_xmit(struct nfc_shdlc *shdlc, struct sk_buff *skb) 569 + { 570 + struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc); 571 + struct i2c_client *client = info->i2c_dev; 572 + 573 + if (info->hard_fault != 0) 574 + return info->hard_fault; 575 + 576 + return pn544_hci_i2c_write(client, skb->data, skb->len); 577 + } 578 + 579 + static int pn544_hci_start_poll(struct nfc_shdlc *shdlc, u32 protocols) 580 + { 581 + struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc); 582 + u8 phases = 0; 583 + int r; 584 + u8 duration[2]; 585 + u8 activated; 586 + 587 + pr_info(DRIVER_DESC ": %s protocols = %d\n", __func__, protocols); 588 + 589 + r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE, 590 + NFC_HCI_EVT_END_OPERATION, NULL, 0); 591 + if (r < 0) 592 + return r; 593 + 594 + duration[0] = 0x18; 595 + duration[1] = 0x6a; 596 + r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE, 597 + PN544_PL_EMULATION, duration, 2); 598 + if (r < 0) 599 + return r; 600 + 601 + activated = 0; 602 + r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE, 603 + PN544_PL_NFCT_DEACTIVATED, &activated, 1); 604 + if (r < 0) 605 + return r; 606 + 607 + if (protocols & (NFC_PROTO_ISO14443_MASK | NFC_PROTO_MIFARE_MASK | 608 + NFC_PROTO_JEWEL_MASK)) 609 + phases |= 1; /* Type A */ 610 + if (protocols & NFC_PROTO_FELICA_MASK) { 611 + phases |= (1 << 2); /* Type F 212 */ 612 + phases |= (1 << 3); /* Type F 424 */ 613 + } 614 + 615 + phases |= (1 << 5); /* NFC active */ 616 + 617 + r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE, 618 + PN544_PL_RDPHASES, &phases, 1); 619 + if (r < 0) 620 + return r; 621 + 622 + r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE, 623 + NFC_HCI_EVT_READER_REQUESTED, NULL, 0); 624 + if (r < 0) 625 + nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE, 626 + NFC_HCI_EVT_END_OPERATION, NULL, 0); 627 + 628 + return r; 629 + } 630 + 631 + static int pn544_hci_target_from_gate(struct nfc_shdlc *shdlc, u8 gate, 632 + struct nfc_target *target) 633 + { 634 + switch (gate) { 635 + case PN544_RF_READER_F_GATE: 636 + target->supported_protocols = NFC_PROTO_FELICA_MASK; 637 + break; 638 + case PN544_RF_READER_JEWEL_GATE: 639 + target->supported_protocols = NFC_PROTO_JEWEL_MASK; 640 + target->sens_res = 0x0c00; 641 + break; 642 + default: 643 + return -EPROTO; 644 + } 645 + 646 + return 0; 647 + } 648 + 649 + static int pn544_hci_complete_target_discovered(struct nfc_shdlc *shdlc, 650 + u8 gate, 651 + struct nfc_target *target) 652 + { 653 + struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc); 654 + struct sk_buff *uid_skb; 655 + int r = 0; 656 + 657 + if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) { 658 + if (target->nfcid1_len != 4 && target->nfcid1_len != 7 && 659 + target->nfcid1_len != 10) 660 + return -EPROTO; 661 + 662 + r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE, 663 + PN544_RF_READER_CMD_ACTIVATE_NEXT, 664 + target->nfcid1, target->nfcid1_len, NULL); 665 + } else if (target->supported_protocols & NFC_PROTO_FELICA_MASK) { 666 + r = nfc_hci_get_param(hdev, PN544_RF_READER_F_GATE, 667 + PN544_FELICA_ID, &uid_skb); 668 + if (r < 0) 669 + return r; 670 + 671 + if (uid_skb->len != 8) { 672 + kfree_skb(uid_skb); 673 + return -EPROTO; 674 + } 675 + 676 + r = nfc_hci_send_cmd(hdev, PN544_RF_READER_F_GATE, 677 + PN544_RF_READER_CMD_ACTIVATE_NEXT, 678 + uid_skb->data, uid_skb->len, NULL); 679 + kfree_skb(uid_skb); 680 + } else if (target->supported_protocols & NFC_PROTO_ISO14443_MASK) { 681 + /* 682 + * TODO: maybe other ISO 14443 require some kind of continue 683 + * activation, but for now we've seen only this one below. 684 + */ 685 + if (target->sens_res == 0x4403) /* Type 4 Mifare DESFire */ 686 + r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE, 687 + PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION, 688 + NULL, 0, NULL); 689 + } 690 + 691 + return r; 692 + } 693 + 694 + #define MIFARE_CMD_AUTH_KEY_A 0x60 695 + #define MIFARE_CMD_AUTH_KEY_B 0x61 696 + #define MIFARE_CMD_HEADER 2 697 + #define MIFARE_UID_LEN 4 698 + #define MIFARE_KEY_LEN 6 699 + #define MIFARE_CMD_LEN 12 700 + /* 701 + * Returns: 702 + * <= 0: driver handled the data exchange 703 + * 1: driver doesn't especially handle, please do standard processing 704 + */ 705 + static int pn544_hci_data_exchange(struct nfc_shdlc *shdlc, 706 + struct nfc_target *target, 707 + struct sk_buff *skb, 708 + struct sk_buff **res_skb) 709 + { 710 + struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc); 711 + int r; 712 + 713 + pr_info(DRIVER_DESC ": %s for gate=%d\n", __func__, 714 + target->hci_reader_gate); 715 + 716 + switch (target->hci_reader_gate) { 717 + case NFC_HCI_RF_READER_A_GATE: 718 + if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) { 719 + /* 720 + * It seems that pn544 is inverting key and UID for 721 + * MIFARE authentication commands. 722 + */ 723 + if (skb->len == MIFARE_CMD_LEN && 724 + (skb->data[0] == MIFARE_CMD_AUTH_KEY_A || 725 + skb->data[0] == MIFARE_CMD_AUTH_KEY_B)) { 726 + u8 uid[MIFARE_UID_LEN]; 727 + u8 *data = skb->data + MIFARE_CMD_HEADER; 728 + 729 + memcpy(uid, data + MIFARE_KEY_LEN, 730 + MIFARE_UID_LEN); 731 + memmove(data + MIFARE_UID_LEN, data, 732 + MIFARE_KEY_LEN); 733 + memcpy(data, uid, MIFARE_UID_LEN); 734 + } 735 + 736 + return nfc_hci_send_cmd(hdev, target->hci_reader_gate, 737 + PN544_MIFARE_CMD, 738 + skb->data, skb->len, res_skb); 739 + } else 740 + return 1; 741 + case PN544_RF_READER_F_GATE: 742 + *skb_push(skb, 1) = 0; 743 + *skb_push(skb, 1) = 0; 744 + 745 + r = nfc_hci_send_cmd(hdev, target->hci_reader_gate, 746 + PN544_FELICA_RAW, 747 + skb->data, skb->len, res_skb); 748 + if (r == 0) 749 + skb_pull(*res_skb, 1); 750 + return r; 751 + case PN544_RF_READER_JEWEL_GATE: 752 + return nfc_hci_send_cmd(hdev, target->hci_reader_gate, 753 + PN544_JEWEL_RAW_CMD, 754 + skb->data, skb->len, res_skb); 755 + default: 756 + return 1; 757 + } 758 + } 759 + 760 + static int pn544_hci_check_presence(struct nfc_shdlc *shdlc, 761 + struct nfc_target *target) 762 + { 763 + struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc); 764 + 765 + return nfc_hci_send_cmd(hdev, target->hci_reader_gate, 766 + PN544_RF_READER_CMD_PRESENCE_CHECK, 767 + NULL, 0, NULL); 768 + } 769 + 770 + static struct nfc_shdlc_ops pn544_shdlc_ops = { 771 + .open = pn544_hci_open, 772 + .close = pn544_hci_close, 773 + .hci_ready = pn544_hci_ready, 774 + .xmit = pn544_hci_xmit, 775 + .start_poll = pn544_hci_start_poll, 776 + .target_from_gate = pn544_hci_target_from_gate, 777 + .complete_target_discovered = pn544_hci_complete_target_discovered, 778 + .data_exchange = pn544_hci_data_exchange, 779 + .check_presence = pn544_hci_check_presence, 780 + }; 781 + 782 + static int __devinit pn544_hci_probe(struct i2c_client *client, 783 + const struct i2c_device_id *id) 784 + { 785 + struct pn544_hci_info *info; 786 + struct pn544_nfc_platform_data *pdata; 787 + int r = 0; 788 + u32 protocols; 789 + struct nfc_hci_init_data init_data; 790 + 791 + dev_dbg(&client->dev, "%s\n", __func__); 792 + dev_dbg(&client->dev, "IRQ: %d\n", client->irq); 793 + 794 + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { 795 + dev_err(&client->dev, "Need I2C_FUNC_I2C\n"); 796 + return -ENODEV; 797 + } 798 + 799 + info = kzalloc(sizeof(struct pn544_hci_info), GFP_KERNEL); 800 + if (!info) { 801 + dev_err(&client->dev, 802 + "Cannot allocate memory for pn544_hci_info.\n"); 803 + r = -ENOMEM; 804 + goto err_info_alloc; 805 + } 806 + 807 + info->i2c_dev = client; 808 + info->state = PN544_ST_COLD; 809 + mutex_init(&info->info_lock); 810 + i2c_set_clientdata(client, info); 811 + 812 + pdata = client->dev.platform_data; 813 + if (pdata == NULL) { 814 + dev_err(&client->dev, "No platform data\n"); 815 + r = -EINVAL; 816 + goto err_pdata; 817 + } 818 + 819 + if (pdata->request_resources == NULL) { 820 + dev_err(&client->dev, "request_resources() missing\n"); 821 + r = -EINVAL; 822 + goto err_pdata; 823 + } 824 + 825 + r = pdata->request_resources(client); 826 + if (r) { 827 + dev_err(&client->dev, "Cannot get platform resources\n"); 828 + goto err_pdata; 829 + } 830 + 831 + info->gpio_en = pdata->get_gpio(NFC_GPIO_ENABLE); 832 + info->gpio_fw = pdata->get_gpio(NFC_GPIO_FW_RESET); 833 + info->gpio_irq = pdata->get_gpio(NFC_GPIO_IRQ); 834 + 835 + pn544_hci_platform_init(info); 836 + 837 + r = request_threaded_irq(client->irq, NULL, pn544_hci_irq_thread_fn, 838 + IRQF_TRIGGER_RISING, PN544_HCI_DRIVER_NAME, 839 + info); 840 + if (r < 0) { 841 + dev_err(&client->dev, "Unable to register IRQ handler\n"); 842 + goto err_rti; 843 + } 844 + 845 + init_data.gate_count = ARRAY_SIZE(pn544_custom_gates); 846 + 847 + memcpy(init_data.gates, pn544_custom_gates, 848 + ARRAY_SIZE(pn544_custom_gates)); 849 + 850 + /* 851 + * TODO: Session id must include the driver name + some bus addr 852 + * persistent info to discriminate 2 identical chips 853 + */ 854 + strcpy(init_data.session_id, "ID544HCI"); 855 + 856 + protocols = NFC_PROTO_JEWEL_MASK | 857 + NFC_PROTO_MIFARE_MASK | 858 + NFC_PROTO_FELICA_MASK | 859 + NFC_PROTO_ISO14443_MASK | 860 + NFC_PROTO_NFC_DEP_MASK; 861 + 862 + info->shdlc = nfc_shdlc_allocate(&pn544_shdlc_ops, 863 + &init_data, protocols, 864 + PN544_CMDS_HEADROOM, 0, 865 + PN544_HCI_LLC_MAX_PAYLOAD, 866 + dev_name(&client->dev)); 867 + if (!info->shdlc) { 868 + dev_err(&client->dev, "Cannot allocate nfc shdlc.\n"); 869 + r = -ENOMEM; 870 + goto err_allocshdlc; 871 + } 872 + 873 + nfc_shdlc_set_clientdata(info->shdlc, info); 874 + 875 + return 0; 876 + 877 + err_allocshdlc: 878 + free_irq(client->irq, info); 879 + 880 + err_rti: 881 + if (pdata->free_resources != NULL) 882 + pdata->free_resources(); 883 + 884 + err_pdata: 885 + kfree(info); 886 + 887 + err_info_alloc: 888 + return r; 889 + } 890 + 891 + static __devexit int pn544_hci_remove(struct i2c_client *client) 892 + { 893 + struct pn544_hci_info *info = i2c_get_clientdata(client); 894 + struct pn544_nfc_platform_data *pdata = client->dev.platform_data; 895 + 896 + dev_dbg(&client->dev, "%s\n", __func__); 897 + 898 + nfc_shdlc_free(info->shdlc); 899 + 900 + if (info->state != PN544_ST_COLD) { 901 + if (pdata->disable) 902 + pdata->disable(); 903 + } 904 + 905 + free_irq(client->irq, info); 906 + if (pdata->free_resources) 907 + pdata->free_resources(); 908 + 909 + kfree(info); 910 + 911 + return 0; 912 + } 913 + 914 + static struct i2c_driver pn544_hci_driver = { 915 + .driver = { 916 + .name = PN544_HCI_DRIVER_NAME, 917 + }, 918 + .probe = pn544_hci_probe, 919 + .id_table = pn544_hci_id_table, 920 + .remove = __devexit_p(pn544_hci_remove), 921 + }; 922 + 923 + static int __init pn544_hci_init(void) 924 + { 925 + int r; 926 + 927 + pr_debug(DRIVER_DESC ": %s\n", __func__); 928 + 929 + r = i2c_add_driver(&pn544_hci_driver); 930 + if (r) { 931 + pr_err(PN544_HCI_DRIVER_NAME ": driver registration failed\n"); 932 + return r; 933 + } 934 + 935 + return 0; 936 + } 937 + 938 + static void __exit pn544_hci_exit(void) 939 + { 940 + i2c_del_driver(&pn544_hci_driver); 941 + } 942 + 943 + module_init(pn544_hci_init); 944 + module_exit(pn544_hci_exit); 945 + 946 + MODULE_LICENSE("GPL"); 947 + MODULE_DESCRIPTION(DRIVER_DESC);
+2
drivers/ssb/b43_pci_bridge.c
··· 29 29 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) }, 30 30 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) }, 31 31 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) }, 32 + { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4322) }, 33 + { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43222) }, 32 34 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) }, 33 35 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) }, 34 36 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4328) },
+82 -6
drivers/ssb/pci.c
··· 178 178 #define SPEX(_outvar, _offset, _mask, _shift) \ 179 179 SPEX16(_outvar, _offset, _mask, _shift) 180 180 181 + #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ 182 + do { \ 183 + SPEX(_field[0], _offset + 0, _mask, _shift); \ 184 + SPEX(_field[1], _offset + 2, _mask, _shift); \ 185 + SPEX(_field[2], _offset + 4, _mask, _shift); \ 186 + SPEX(_field[3], _offset + 6, _mask, _shift); \ 187 + SPEX(_field[4], _offset + 8, _mask, _shift); \ 188 + SPEX(_field[5], _offset + 10, _mask, _shift); \ 189 + SPEX(_field[6], _offset + 12, _mask, _shift); \ 190 + SPEX(_field[7], _offset + 14, _mask, _shift); \ 191 + } while (0) 192 + 181 193 182 194 static inline u8 ssb_crc8(u8 crc, u8 data) 183 195 { ··· 372 360 SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14); 373 361 SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15); 374 362 SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0); 375 - SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE, 376 - SSB_SPROM1_BINF_CCODE_SHIFT); 363 + if (out->revision == 1) 364 + SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE, 365 + SSB_SPROM1_BINF_CCODE_SHIFT); 377 366 SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA, 378 367 SSB_SPROM1_BINF_ANTA_SHIFT); 379 368 SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG, ··· 400 387 SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0); 401 388 if (out->revision >= 2) 402 389 SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0); 390 + SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8); 391 + SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0); 403 392 404 393 /* Extract the antenna gain values. */ 405 394 out->antenna_gain.a0 = r123_extract_antgain(out->revision, in, ··· 470 455 SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0); 471 456 SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A, 472 457 SSB_SPROM4_ETHPHY_ET1A_SHIFT); 458 + SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0); 473 459 if (out->revision == 4) { 474 - SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0); 460 + SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8); 461 + SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0); 475 462 SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0); 476 463 SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0); 477 464 SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0); 478 465 SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0); 479 466 } else { 480 - SPEX(country_code, SSB_SPROM5_CCODE, 0xFFFF, 0); 467 + SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8); 468 + SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0); 481 469 SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0); 482 470 SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0); 483 471 SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0); ··· 543 525 v = in[SPOFF(SSB_SPROM8_IL0MAC) + i]; 544 526 *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v); 545 527 } 546 - SPEX(country_code, SSB_SPROM8_CCODE, 0xFFFF, 0); 528 + SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0); 529 + SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8); 530 + SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0); 547 531 SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0); 548 532 SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0); 549 533 SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0); ··· 675 655 SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, 676 656 SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); 677 657 658 + SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON, 659 + SSB_SPROM8_LEDDC_ON_SHIFT); 660 + SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF, 661 + SSB_SPROM8_LEDDC_OFF_SHIFT); 662 + 663 + SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN, 664 + SSB_SPROM8_TXRXC_TXCHAIN_SHIFT); 665 + SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN, 666 + SSB_SPROM8_TXRXC_RXCHAIN_SHIFT); 667 + SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH, 668 + SSB_SPROM8_TXRXC_SWITCH_SHIFT); 669 + 670 + SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0); 671 + 672 + SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0); 673 + SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0); 674 + SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0); 675 + SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0); 676 + 677 + SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP, 678 + SSB_SPROM8_RAWTS_RAWTEMP_SHIFT); 679 + SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER, 680 + SSB_SPROM8_RAWTS_MEASPOWER_SHIFT); 681 + SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX, 682 + SSB_SPROM8_OPT_CORRX_TEMP_SLOPE, 683 + SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT); 684 + SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX, 685 + SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT); 686 + SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX, 687 + SSB_SPROM8_OPT_CORRX_TEMP_OPTION, 688 + SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT); 689 + SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP, 690 + SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR, 691 + SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT); 692 + SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP, 693 + SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP, 694 + SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT); 695 + SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL, 696 + SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT); 697 + 698 + SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0); 699 + SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0); 700 + SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0); 701 + SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0); 702 + 703 + SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH, 704 + SSB_SPROM8_THERMAL_TRESH_SHIFT); 705 + SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET, 706 + SSB_SPROM8_THERMAL_OFFSET_SHIFT); 707 + SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA, 708 + SSB_SPROM8_TEMPDELTA_PHYCAL, 709 + SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT); 710 + SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD, 711 + SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT); 712 + SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA, 713 + SSB_SPROM8_TEMPDELTA_HYSTERESIS, 714 + SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT); 678 715 sprom_extract_r458(out, in); 679 716 680 717 /* TODO - get remaining rev 8 stuff needed */ ··· 861 784 { 862 785 bi->vendor = bus->host_pci->subsystem_vendor; 863 786 bi->type = bus->host_pci->subsystem_device; 864 - bi->rev = bus->host_pci->revision; 865 787 } 866 788 867 789 int ssb_pci_get_invariants(struct ssb_bus *bus,
+2
fs/dcache.c
··· 3093 3093 HASH_EARLY, 3094 3094 &d_hash_shift, 3095 3095 &d_hash_mask, 3096 + 0, 3096 3097 0); 3097 3098 3098 3099 for (loop = 0; loop < (1U << d_hash_shift); loop++) ··· 3124 3123 0, 3125 3124 &d_hash_shift, 3126 3125 &d_hash_mask, 3126 + 0, 3127 3127 0); 3128 3128 3129 3129 for (loop = 0; loop < (1U << d_hash_shift); loop++)
+2
fs/inode.c
··· 1647 1647 HASH_EARLY, 1648 1648 &i_hash_shift, 1649 1649 &i_hash_mask, 1650 + 0, 1650 1651 0); 1651 1652 1652 1653 for (loop = 0; loop < (1U << i_hash_shift); loop++) ··· 1678 1677 0, 1679 1678 &i_hash_shift, 1680 1679 &i_hash_mask, 1680 + 0, 1681 1681 0); 1682 1682 1683 1683 for (loop = 0; loop < (1U << i_hash_shift); loop++)
+1
include/linux/Kbuild
··· 270 270 header-y += netfilter_ipv6.h 271 271 header-y += netlink.h 272 272 header-y += netrom.h 273 + header-y += nfc.h 273 274 header-y += nfs.h 274 275 header-y += nfs2.h 275 276 header-y += nfs3.h
+7
include/linux/bcma/bcma.h
··· 26 26 u8 pkg; 27 27 }; 28 28 29 + struct bcma_boardinfo { 30 + u16 vendor; 31 + u16 type; 32 + }; 33 + 29 34 enum bcma_clkmode { 30 35 BCMA_CLKMODE_FAST, 31 36 BCMA_CLKMODE_DYNAMIC, ··· 203 198 }; 204 199 205 200 struct bcma_chipinfo chipinfo; 201 + 202 + struct bcma_boardinfo boardinfo; 206 203 207 204 struct bcma_device *mapped_core; 208 205 struct list_head cores;
+11
include/linux/bcma/bcma_driver_pci.h
··· 87 87 #define BCMA_CORE_PCI_PCICFG2 0x0600 /* PCI config space 2 (rev >= 8) */ 88 88 #define BCMA_CORE_PCI_PCICFG3 0x0700 /* PCI config space 3 (rev >= 8) */ 89 89 #define BCMA_CORE_PCI_SPROM(wordoffset) (0x0800 + ((wordoffset) * 2)) /* SPROM shadow area (72 bytes) */ 90 + #define BCMA_CORE_PCI_SPROM_PI_OFFSET 0 /* first word */ 91 + #define BCMA_CORE_PCI_SPROM_PI_MASK 0xf000 /* bit 15:12 */ 92 + #define BCMA_CORE_PCI_SPROM_PI_SHIFT 12 /* bit 15:12 */ 93 + #define BCMA_CORE_PCI_SPROM_MISC_CONFIG 5 /* word 5 */ 94 + #define BCMA_CORE_PCI_SPROM_L23READY_EXIT_NOPERST 0x8000 /* bit 15 */ 95 + #define BCMA_CORE_PCI_SPROM_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */ 96 + #define BCMA_CORE_PCI_SPROM_CLKREQ_ENB 0x0800 /* bit 11 */ 90 97 91 98 /* SBtoPCIx */ 92 99 #define BCMA_CORE_PCI_SBTOPCI_MEM 0x00000000 ··· 140 133 #define BCMA_CORE_PCI_DLLP_LRREG 0x120 /* Link Replay */ 141 134 #define BCMA_CORE_PCI_DLLP_LACKTOREG 0x124 /* Link Ack Timeout */ 142 135 #define BCMA_CORE_PCI_DLLP_PMTHRESHREG 0x128 /* Power Management Threshold */ 136 + #define BCMA_CORE_PCI_ASPMTIMER_EXTEND 0x01000000 /* > rev7: enable extend ASPM timer */ 143 137 #define BCMA_CORE_PCI_DLLP_RTRYWPREG 0x12C /* Retry buffer write ptr */ 144 138 #define BCMA_CORE_PCI_DLLP_RTRYRPREG 0x130 /* Retry buffer Read ptr */ 145 139 #define BCMA_CORE_PCI_DLLP_RTRYPPREG 0x134 /* Retry buffer Purged ptr */ ··· 209 201 }; 210 202 211 203 /* Register access */ 204 + #define pcicore_read16(pc, offset) bcma_read16((pc)->core, offset) 212 205 #define pcicore_read32(pc, offset) bcma_read32((pc)->core, offset) 206 + #define pcicore_write16(pc, offset, val) bcma_write16((pc)->core, offset, val) 213 207 #define pcicore_write32(pc, offset, val) bcma_write32((pc)->core, offset, val) 214 208 215 209 extern void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc); 216 210 extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, 217 211 struct bcma_device *core, bool enable); 212 + extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend); 218 213 219 214 extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev); 220 215 extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
+2 -1
include/linux/bootmem.h
··· 154 154 int flags, 155 155 unsigned int *_hash_shift, 156 156 unsigned int *_hash_mask, 157 - unsigned long limit); 157 + unsigned long low_limit, 158 + unsigned long high_limit); 158 159 159 160 #define HASH_EARLY 0x00000001 /* Allocating during early boot? */ 160 161 #define HASH_SMALL 0x00000002 /* sub-page allocation allowed, min
+1 -1
include/linux/if_arp.h
··· 82 82 #define ARPHRD_FCPL 786 /* Fibrechannel public loop */ 83 83 #define ARPHRD_FCFABRIC 787 /* Fibrechannel fabric */ 84 84 /* 787->799 reserved for fibrechannel media types */ 85 - /* 800 used to be used for token ring */ 85 + #define ARPHRD_IEEE802_TR 800 /* Magic type ident for TR */ 86 86 #define ARPHRD_IEEE80211 801 /* IEEE 802.11 */ 87 87 #define ARPHRD_IEEE80211_PRISM 802 /* IEEE 802.11 + Prism2 header */ 88 88 #define ARPHRD_IEEE80211_RADIOTAP 803 /* IEEE 802.11 + radiotap header */
+1 -1
include/linux/ipx.h
··· 38 38 #define IPX_FRAME_8022 2 39 39 #define IPX_FRAME_ETHERII 3 40 40 #define IPX_FRAME_8023 4 41 - /* obsolete token ring was 5 */ 41 + #define IPX_FRAME_TR_8022 5 /* obsolete */ 42 42 unsigned char ipx_special; 43 43 #define IPX_SPECIAL_NONE 0 44 44 #define IPX_PRIMARY 1
+1 -1
include/linux/micrel_phy.h
··· 3 3 4 4 #define MICREL_PHY_ID_MASK 0x00fffff0 5 5 6 - #define PHY_ID_KSZ9021 0x00221611 6 + #define PHY_ID_KSZ9021 0x00221610 7 7 #define PHY_ID_KS8737 0x00221720 8 8 #define PHY_ID_KS8041 0x00221510 9 9 #define PHY_ID_KS8051 0x00221550
+7
include/linux/nfc/pn544.h
··· 84 84 }; 85 85 86 86 #ifdef __KERNEL__ 87 + enum { 88 + NFC_GPIO_ENABLE, 89 + NFC_GPIO_FW_RESET, 90 + NFC_GPIO_IRQ 91 + }; 92 + 87 93 /* board config */ 88 94 struct pn544_nfc_platform_data { 89 95 int (*request_resources) (struct i2c_client *client); ··· 97 91 void (*enable) (int fw); 98 92 int (*test) (void); 99 93 void (*disable) (void); 94 + int (*get_gpio)(int type); 100 95 }; 101 96 #endif /* __KERNEL__ */ 102 97
+5 -3
include/linux/nl80211.h
··· 1594 1594 NL80211_STA_FLAG_MAX = __NL80211_STA_FLAG_AFTER_LAST - 1 1595 1595 }; 1596 1596 1597 + #define NL80211_STA_FLAG_MAX_OLD_API NL80211_STA_FLAG_TDLS_PEER 1598 + 1597 1599 /** 1598 1600 * struct nl80211_sta_flag_update - station flags mask/set 1599 1601 * @mask: mask of station flags to set ··· 1996 1994 * enum nl80211_dfs_regions - regulatory DFS regions 1997 1995 * 1998 1996 * @NL80211_DFS_UNSET: Country has no DFS master region specified 1999 - * @NL80211_DFS_FCC_: Country follows DFS master rules from FCC 2000 - * @NL80211_DFS_FCC_: Country follows DFS master rules from ETSI 2001 - * @NL80211_DFS_JP_: Country follows DFS master rules from JP/MKK/Telec 1997 + * @NL80211_DFS_FCC: Country follows DFS master rules from FCC 1998 + * @NL80211_DFS_ETSI: Country follows DFS master rules from ETSI 1999 + * @NL80211_DFS_JP: Country follows DFS master rules from JP/MKK/Telec 2002 2000 */ 2003 2001 enum nl80211_dfs_regions { 2004 2002 NL80211_DFS_UNSET = 0,
-1
include/linux/ssb/ssb.h
··· 188 188 struct ssb_boardinfo { 189 189 u16 vendor; 190 190 u16 type; 191 - u8 rev; 192 191 }; 193 192 194 193
+57 -4
include/linux/ssb/ssb_regs.h
··· 228 228 #define SSB_SPROM1_AGAIN_BG_SHIFT 0 229 229 #define SSB_SPROM1_AGAIN_A 0xFF00 /* A-PHY */ 230 230 #define SSB_SPROM1_AGAIN_A_SHIFT 8 231 + #define SSB_SPROM1_CCODE 0x0076 231 232 232 233 /* SPROM Revision 2 (inherits from rev 1) */ 233 234 #define SSB_SPROM2_BFLHI 0x0038 /* Boardflags (high 16 bits) */ ··· 268 267 #define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */ 269 268 270 269 /* SPROM Revision 4 */ 270 + #define SSB_SPROM4_BOARDREV 0x0042 /* Board revision */ 271 271 #define SSB_SPROM4_BFLLO 0x0044 /* Boardflags (low 16 bits) */ 272 272 #define SSB_SPROM4_BFLHI 0x0046 /* Board Flags Hi */ 273 273 #define SSB_SPROM4_BFL2LO 0x0048 /* Board flags 2 (low 16 bits) */ ··· 391 389 #define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */ 392 390 #define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */ 393 391 #define SSB_SPROM8_GPIOB_P3_SHIFT 8 392 + #define SSB_SPROM8_LEDDC 0x009A 393 + #define SSB_SPROM8_LEDDC_ON 0xFF00 /* oncount */ 394 + #define SSB_SPROM8_LEDDC_ON_SHIFT 8 395 + #define SSB_SPROM8_LEDDC_OFF 0x00FF /* offcount */ 396 + #define SSB_SPROM8_LEDDC_OFF_SHIFT 0 394 397 #define SSB_SPROM8_ANTAVAIL 0x009C /* Antenna available bitfields*/ 395 398 #define SSB_SPROM8_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */ 396 399 #define SSB_SPROM8_ANTAVAIL_A_SHIFT 8 ··· 411 404 #define SSB_SPROM8_AGAIN2_SHIFT 0 412 405 #define SSB_SPROM8_AGAIN3 0xFF00 /* Antenna 3 */ 413 406 #define SSB_SPROM8_AGAIN3_SHIFT 8 407 + #define SSB_SPROM8_TXRXC 0x00A2 408 + #define SSB_SPROM8_TXRXC_TXCHAIN 0x000f 409 + #define SSB_SPROM8_TXRXC_TXCHAIN_SHIFT 0 410 + #define SSB_SPROM8_TXRXC_RXCHAIN 0x00f0 411 + #define SSB_SPROM8_TXRXC_RXCHAIN_SHIFT 4 412 + #define SSB_SPROM8_TXRXC_SWITCH 0xff00 413 + #define SSB_SPROM8_TXRXC_SWITCH_SHIFT 8 414 414 #define SSB_SPROM8_RSSIPARM2G 0x00A4 /* RSSI params for 2GHz */ 415 415 #define SSB_SPROM8_RSSISMF2G 0x000F 416 416 #define SSB_SPROM8_RSSISMC2G 0x00F0 ··· 444 430 #define SSB_SPROM8_TRI5GH_SHIFT 8 445 431 #define SSB_SPROM8_RXPO 0x00AC /* RX power offsets */ 446 432 #define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */ 433 + #define SSB_SPROM8_RXPO2G_SHIFT 0 447 434 #define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */ 448 435 #define SSB_SPROM8_RXPO5G_SHIFT 8 449 436 #define SSB_SPROM8_FEM2G 0x00AE ··· 460 445 #define SSB_SROM8_FEM_ANTSWLUT 0xF800 461 446 #define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11 462 447 #define SSB_SPROM8_THERMAL 0x00B2 463 - #define SSB_SPROM8_MPWR_RAWTS 0x00B4 464 - #define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6 465 - #define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8 466 - #define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA 448 + #define SSB_SPROM8_THERMAL_OFFSET 0x00ff 449 + #define SSB_SPROM8_THERMAL_OFFSET_SHIFT 0 450 + #define SSB_SPROM8_THERMAL_TRESH 0xff00 451 + #define SSB_SPROM8_THERMAL_TRESH_SHIFT 8 452 + /* Temp sense related entries */ 453 + #define SSB_SPROM8_RAWTS 0x00B4 454 + #define SSB_SPROM8_RAWTS_RAWTEMP 0x01ff 455 + #define SSB_SPROM8_RAWTS_RAWTEMP_SHIFT 0 456 + #define SSB_SPROM8_RAWTS_MEASPOWER 0xfe00 457 + #define SSB_SPROM8_RAWTS_MEASPOWER_SHIFT 9 458 + #define SSB_SPROM8_OPT_CORRX 0x00B6 459 + #define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE 0x00ff 460 + #define SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT 0 461 + #define SSB_SPROM8_OPT_CORRX_TEMPCORRX 0xfc00 462 + #define SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT 10 463 + #define SSB_SPROM8_OPT_CORRX_TEMP_OPTION 0x0300 464 + #define SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT 8 465 + /* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */ 466 + #define SSB_SPROM8_HWIQ_IQSWP 0x00B8 467 + #define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR 0x000f 468 + #define SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT 0 469 + #define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP 0x0010 470 + #define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT 4 471 + #define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL 0x0020 472 + #define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT 5 473 + #define SSB_SPROM8_TEMPDELTA 0x00BA 474 + #define SSB_SPROM8_TEMPDELTA_PHYCAL 0x00ff 475 + #define SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT 0 476 + #define SSB_SPROM8_TEMPDELTA_PERIOD 0x0f00 477 + #define SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT 8 478 + #define SSB_SPROM8_TEMPDELTA_HYSTERESIS 0xf000 479 + #define SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT 12 467 480 468 481 /* There are 4 blocks with power info sharing the same layout */ 469 482 #define SSB_SROM8_PWR_INFO_CORE0 0x00C0 ··· 555 512 #define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */ 556 513 #define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */ 557 514 #define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */ 515 + 516 + #define SSB_SPROM8_2G_MCSPO 0x0152 517 + #define SSB_SPROM8_5G_MCSPO 0x0162 518 + #define SSB_SPROM8_5GL_MCSPO 0x0172 519 + #define SSB_SPROM8_5GH_MCSPO 0x0182 520 + 521 + #define SSB_SPROM8_CDDPO 0x0192 522 + #define SSB_SPROM8_STBCPO 0x0194 523 + #define SSB_SPROM8_BW40PO 0x0196 524 + #define SSB_SPROM8_BWDUPPO 0x0198 558 525 559 526 /* Values for boardflags_lo read from SPROM */ 560 527 #define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
+24 -8
include/net/bluetooth/bluetooth.h
··· 163 163 __u8 b[6]; 164 164 } __packed bdaddr_t; 165 165 166 + /* BD Address type */ 167 + #define BDADDR_BREDR 0x00 168 + #define BDADDR_LE_PUBLIC 0x01 169 + #define BDADDR_LE_RANDOM 0x02 170 + 166 171 #define BDADDR_ANY (&(bdaddr_t) {{0, 0, 0, 0, 0, 0}}) 167 172 #define BDADDR_LOCAL (&(bdaddr_t) {{0, 0, 0, 0xff, 0xff, 0xff}}) 168 173 ··· 183 178 184 179 void baswap(bdaddr_t *dst, bdaddr_t *src); 185 180 char *batostr(bdaddr_t *ba); 186 - bdaddr_t *strtoba(char *str); 187 181 188 182 /* Common socket structures and functions */ 189 183 ··· 194 190 bdaddr_t dst; 195 191 struct list_head accept_q; 196 192 struct sock *parent; 197 - u32 defer_setup; 198 - bool suspended; 193 + unsigned long flags; 194 + }; 195 + 196 + enum { 197 + BT_SK_DEFER_SETUP, 198 + BT_SK_SUSPEND, 199 199 }; 200 200 201 201 struct bt_sock_list { ··· 224 216 struct sock *bt_accept_dequeue(struct sock *parent, struct socket *newsock); 225 217 226 218 /* Skb helpers */ 219 + struct l2cap_ctrl { 220 + unsigned int sframe : 1, 221 + poll : 1, 222 + final : 1, 223 + fcs : 1, 224 + sar : 2, 225 + super : 2; 226 + __u16 reqseq; 227 + __u16 txseq; 228 + __u8 retries; 229 + }; 230 + 227 231 struct bt_skb_cb { 228 232 __u8 pkt_type; 229 233 __u8 incoming; 230 234 __u16 expect; 231 - __u16 tx_seq; 232 - __u8 retries; 233 - __u8 sar; 234 235 __u8 force_active; 236 + struct l2cap_ctrl control; 235 237 }; 236 238 #define bt_cb(skb) ((struct bt_skb_cb *)((skb)->cb)) 237 239 ··· 261 243 { 262 244 struct sk_buff *skb; 263 245 264 - release_sock(sk); 265 246 if ((skb = sock_alloc_send_skb(sk, len + BT_SKB_RESERVE, nb, err))) { 266 247 skb_reserve(skb, BT_SKB_RESERVE); 267 248 bt_cb(skb)->incoming = 0; 268 249 } 269 - lock_sock(sk); 270 250 271 251 if (!skb && *err) 272 252 return NULL;
+7 -1
include/net/bluetooth/hci.h
··· 102 102 HCI_DISCOVERABLE, 103 103 HCI_LINK_SECURITY, 104 104 HCI_PENDING_CLASS, 105 + HCI_PERIODIC_INQ, 105 106 }; 106 107 107 108 /* HCI ioctl defines */ ··· 324 323 } __packed; 325 324 326 325 #define HCI_OP_INQUIRY_CANCEL 0x0402 326 + 327 + #define HCI_OP_PERIODIC_INQ 0x0403 327 328 328 329 #define HCI_OP_EXIT_PERIODIC_INQ 0x0404 329 330 ··· 720 717 } __packed; 721 718 722 719 #define HCI_OP_READ_INQ_RSP_TX_POWER 0x0c58 720 + struct hci_rp_read_inq_rsp_tx_power { 721 + __u8 status; 722 + __s8 tx_power; 723 + } __packed; 723 724 724 725 #define HCI_OP_READ_FLOW_CONTROL_MODE 0x0c66 725 726 struct hci_rp_read_flow_control_mode { ··· 1438 1431 #define IREQ_CACHE_FLUSH 0x0001 1439 1432 1440 1433 extern bool enable_hs; 1441 - extern bool enable_le; 1442 1434 1443 1435 #endif /* __HCI_H */
+36 -31
include/net/bluetooth/hci_core.h
··· 155 155 __u16 hci_rev; 156 156 __u8 lmp_ver; 157 157 __u16 manufacturer; 158 - __le16 lmp_subver; 158 + __u16 lmp_subver; 159 159 __u16 voice_setting; 160 160 __u8 io_capability; 161 + __s8 inq_tx_power; 162 + __u16 devid_source; 163 + __u16 devid_vendor; 164 + __u16 devid_product; 165 + __u16 devid_version; 161 166 162 167 __u16 pkt_type; 163 168 __u16 esco_type; ··· 255 250 256 251 struct list_head remote_oob_data; 257 252 258 - struct list_head adv_entries; 259 - struct delayed_work adv_work; 260 - 261 253 struct hci_dev_stats stat; 262 254 263 255 struct sk_buff_head driver_init; ··· 265 263 266 264 struct dentry *debugfs; 267 265 268 - struct device *parent; 269 266 struct device dev; 270 267 271 268 struct rfkill *rfkill; ··· 572 571 void hci_chan_list_flush(struct hci_conn *conn); 573 572 574 573 struct hci_conn *hci_connect(struct hci_dev *hdev, int type, bdaddr_t *dst, 575 - __u8 sec_level, __u8 auth_type); 574 + __u8 dst_type, __u8 sec_level, __u8 auth_type); 576 575 int hci_conn_check_link_mode(struct hci_conn *conn); 577 576 int hci_conn_check_secure(struct hci_conn *conn, __u8 sec_level); 578 577 int hci_conn_security(struct hci_conn *conn, __u8 sec_level, __u8 auth_type); ··· 674 673 bdaddr_t *bdaddr, u8 *val, u8 type, u8 pin_len); 675 674 struct smp_ltk *hci_find_ltk(struct hci_dev *hdev, __le16 ediv, u8 rand[8]); 676 675 int hci_add_ltk(struct hci_dev *hdev, bdaddr_t *bdaddr, u8 addr_type, u8 type, 677 - int new_key, u8 authenticated, u8 tk[16], u8 enc_size, u16 ediv, 678 - u8 rand[8]); 676 + int new_key, u8 authenticated, u8 tk[16], u8 enc_size, 677 + __le16 ediv, u8 rand[8]); 679 678 struct smp_ltk *hci_find_ltk_by_addr(struct hci_dev *hdev, bdaddr_t *bdaddr, 680 679 u8 addr_type); 681 680 int hci_remove_ltk(struct hci_dev *hdev, bdaddr_t *bdaddr); ··· 688 687 int hci_add_remote_oob_data(struct hci_dev *hdev, bdaddr_t *bdaddr, u8 *hash, 689 688 u8 *randomizer); 690 689 int hci_remove_remote_oob_data(struct hci_dev *hdev, bdaddr_t *bdaddr); 691 - 692 - #define ADV_CLEAR_TIMEOUT (3*60*HZ) /* Three minutes */ 693 - int hci_adv_entries_clear(struct hci_dev *hdev); 694 - struct adv_entry *hci_find_adv_entry(struct hci_dev *hdev, bdaddr_t *bdaddr); 695 - int hci_add_adv_entry(struct hci_dev *hdev, 696 - struct hci_ev_le_advertising_info *ev); 697 - 698 - void hci_del_off_timer(struct hci_dev *hdev); 699 690 700 691 void hci_event_packet(struct hci_dev *hdev, struct sk_buff *skb); 701 692 ··· 702 709 void hci_conn_add_sysfs(struct hci_conn *conn); 703 710 void hci_conn_del_sysfs(struct hci_conn *conn); 704 711 705 - #define SET_HCIDEV_DEV(hdev, pdev) ((hdev)->parent = (pdev)) 712 + #define SET_HCIDEV_DEV(hdev, pdev) ((hdev)->dev.parent = (pdev)) 706 713 707 714 /* ----- LMP capabilities ----- */ 708 715 #define lmp_rswitch_capable(dev) ((dev)->features[0] & LMP_RSWITCH) ··· 926 933 return false; 927 934 } 928 935 936 + static inline size_t eir_get_length(u8 *eir, size_t eir_len) 937 + { 938 + size_t parsed = 0; 939 + 940 + while (parsed < eir_len) { 941 + u8 field_len = eir[0]; 942 + 943 + if (field_len == 0) 944 + return parsed; 945 + 946 + parsed += field_len + 1; 947 + eir += field_len + 1; 948 + } 949 + 950 + return eir_len; 951 + } 952 + 929 953 static inline u16 eir_append_data(u8 *eir, u16 eir_len, u8 type, u8 *data, 930 954 u8 data_len) 931 955 { ··· 971 961 void hci_sock_dev_event(struct hci_dev *hdev, int event); 972 962 973 963 /* Management interface */ 974 - #define MGMT_ADDR_BREDR 0x00 975 - #define MGMT_ADDR_LE_PUBLIC 0x01 976 - #define MGMT_ADDR_LE_RANDOM 0x02 977 - #define MGMT_ADDR_INVALID 0xff 978 - 979 - #define DISCOV_TYPE_BREDR (BIT(MGMT_ADDR_BREDR)) 980 - #define DISCOV_TYPE_LE (BIT(MGMT_ADDR_LE_PUBLIC) | \ 981 - BIT(MGMT_ADDR_LE_RANDOM)) 982 - #define DISCOV_TYPE_INTERLEAVED (BIT(MGMT_ADDR_BREDR) | \ 983 - BIT(MGMT_ADDR_LE_PUBLIC) | \ 984 - BIT(MGMT_ADDR_LE_RANDOM)) 964 + #define DISCOV_TYPE_BREDR (BIT(BDADDR_BREDR)) 965 + #define DISCOV_TYPE_LE (BIT(BDADDR_LE_PUBLIC) | \ 966 + BIT(BDADDR_LE_RANDOM)) 967 + #define DISCOV_TYPE_INTERLEAVED (BIT(BDADDR_BREDR) | \ 968 + BIT(BDADDR_LE_PUBLIC) | \ 969 + BIT(BDADDR_LE_RANDOM)) 985 970 986 971 int mgmt_control(struct sock *sk, struct msghdr *msg, size_t len); 987 972 int mgmt_index_added(struct hci_dev *hdev); ··· 1072 1067 u16 latency, u16 to_multiplier); 1073 1068 void hci_le_start_enc(struct hci_conn *conn, __le16 ediv, __u8 rand[8], 1074 1069 __u8 ltk[16]); 1075 - void hci_le_ltk_reply(struct hci_conn *conn, u8 ltk[16]); 1076 - void hci_le_ltk_neg_reply(struct hci_conn *conn); 1077 - 1078 1070 int hci_do_inquiry(struct hci_dev *hdev, u8 length); 1079 1071 int hci_cancel_inquiry(struct hci_dev *hdev); 1080 1072 int hci_le_scan(struct hci_dev *hdev, u8 type, u16 interval, u16 window, 1081 1073 int timeout); 1074 + int hci_cancel_le_scan(struct hci_dev *hdev); 1075 + 1076 + u8 bdaddr_to_le(u8 bdaddr_type); 1082 1077 1083 1078 #endif /* __HCI_CORE_H */
+79 -14
include/net/bluetooth/l2cap.h
··· 44 44 #define L2CAP_DEFAULT_MAX_SDU_SIZE 0xFFFF 45 45 #define L2CAP_DEFAULT_SDU_ITIME 0xFFFFFFFF 46 46 #define L2CAP_DEFAULT_ACC_LAT 0xFFFFFFFF 47 + #define L2CAP_BREDR_MAX_PAYLOAD 1019 /* 3-DH5 packet */ 47 48 48 49 #define L2CAP_DISC_TIMEOUT msecs_to_jiffies(100) 49 50 #define L2CAP_DISC_REJ_TIMEOUT msecs_to_jiffies(5000) ··· 58 57 __le16 l2_psm; 59 58 bdaddr_t l2_bdaddr; 60 59 __le16 l2_cid; 60 + __u8 l2_bdaddr_type; 61 61 }; 62 62 63 63 /* L2CAP socket options */ ··· 141 139 142 140 #define L2CAP_CTRL_TXSEQ_SHIFT 1 143 141 #define L2CAP_CTRL_SUPER_SHIFT 2 142 + #define L2CAP_CTRL_POLL_SHIFT 4 143 + #define L2CAP_CTRL_FINAL_SHIFT 7 144 144 #define L2CAP_CTRL_REQSEQ_SHIFT 8 145 145 #define L2CAP_CTRL_SAR_SHIFT 14 146 146 ··· 156 152 #define L2CAP_EXT_CTRL_FINAL 0x00000002 157 153 #define L2CAP_EXT_CTRL_FRAME_TYPE 0x00000001 /* I- or S-Frame */ 158 154 155 + #define L2CAP_EXT_CTRL_FINAL_SHIFT 1 159 156 #define L2CAP_EXT_CTRL_REQSEQ_SHIFT 2 160 157 #define L2CAP_EXT_CTRL_SAR_SHIFT 16 161 158 #define L2CAP_EXT_CTRL_SUPER_SHIFT 16 159 + #define L2CAP_EXT_CTRL_POLL_SHIFT 18 162 160 #define L2CAP_EXT_CTRL_TXSEQ_SHIFT 18 163 161 164 162 /* L2CAP Supervisory Function */ ··· 192 186 #define L2CAP_FCS_SIZE 2 193 187 #define L2CAP_SDULEN_SIZE 2 194 188 #define L2CAP_PSMLEN_SIZE 2 189 + #define L2CAP_ENH_CTRL_SIZE 2 190 + #define L2CAP_EXT_CTRL_SIZE 4 195 191 196 192 struct l2cap_cmd_hdr { 197 193 __u8 code; ··· 409 401 #define L2CAP_CONN_PARAM_REJECTED 0x0001 410 402 411 403 /* ----- L2CAP channels and connections ----- */ 404 + struct l2cap_seq_list { 405 + __u16 head; 406 + __u16 tail; 407 + __u16 mask; 408 + __u16 *list; 409 + }; 410 + 411 + #define L2CAP_SEQ_LIST_CLEAR 0xFFFF 412 + #define L2CAP_SEQ_LIST_TAIL 0x8000 413 + 412 414 struct srej_list { 413 415 __u16 tx_seq; 414 416 struct list_head list; ··· 464 446 __u16 monitor_timeout; 465 447 __u16 mps; 466 448 449 + __u8 tx_state; 450 + __u8 rx_state; 451 + 467 452 unsigned long conf_state; 468 453 unsigned long conn_state; 469 454 unsigned long flags; ··· 477 456 __u16 buffer_seq; 478 457 __u16 buffer_seq_srej; 479 458 __u16 srej_save_reqseq; 459 + __u16 last_acked_seq; 480 460 __u16 frames_sent; 481 461 __u16 unacked_frames; 482 462 __u8 retry_count; 463 + __u16 srej_queue_next; 483 464 __u8 num_acked; 484 465 __u16 sdu_len; 485 466 struct sk_buff *sdu; ··· 513 490 struct sk_buff *tx_send_head; 514 491 struct sk_buff_head tx_q; 515 492 struct sk_buff_head srej_q; 493 + struct l2cap_seq_list srej_list; 494 + struct l2cap_seq_list retrans_list; 516 495 struct list_head srej_l; 517 496 518 497 struct list_head list; ··· 533 508 void (*close) (void *data); 534 509 void (*state_change) (void *data, int state); 535 510 struct sk_buff *(*alloc_skb) (struct l2cap_chan *chan, 536 - unsigned long len, int nb, int *err); 537 - 511 + unsigned long len, int nb); 538 512 }; 539 513 540 514 struct l2cap_conn { ··· 624 600 FLAG_EFS_ENABLE, 625 601 }; 626 602 603 + enum { 604 + L2CAP_TX_STATE_XMIT, 605 + L2CAP_TX_STATE_WAIT_F, 606 + }; 607 + 608 + enum { 609 + L2CAP_RX_STATE_RECV, 610 + L2CAP_RX_STATE_SREJ_SENT, 611 + }; 612 + 613 + enum { 614 + L2CAP_TXSEQ_EXPECTED, 615 + L2CAP_TXSEQ_EXPECTED_SREJ, 616 + L2CAP_TXSEQ_UNEXPECTED, 617 + L2CAP_TXSEQ_UNEXPECTED_SREJ, 618 + L2CAP_TXSEQ_DUPLICATE, 619 + L2CAP_TXSEQ_DUPLICATE_SREJ, 620 + L2CAP_TXSEQ_INVALID, 621 + L2CAP_TXSEQ_INVALID_IGNORE, 622 + }; 623 + 624 + enum { 625 + L2CAP_EV_DATA_REQUEST, 626 + L2CAP_EV_LOCAL_BUSY_DETECTED, 627 + L2CAP_EV_LOCAL_BUSY_CLEAR, 628 + L2CAP_EV_RECV_REQSEQ_AND_FBIT, 629 + L2CAP_EV_RECV_FBIT, 630 + L2CAP_EV_RETRANS_TO, 631 + L2CAP_EV_MONITOR_TO, 632 + L2CAP_EV_EXPLICIT_POLL, 633 + L2CAP_EV_RECV_IFRAME, 634 + L2CAP_EV_RECV_RR, 635 + L2CAP_EV_RECV_REJ, 636 + L2CAP_EV_RECV_RNR, 637 + L2CAP_EV_RECV_SREJ, 638 + L2CAP_EV_RECV_FRAME, 639 + }; 640 + 627 641 static inline void l2cap_chan_hold(struct l2cap_chan *c) 628 642 { 629 643 atomic_inc(&c->refcnt); ··· 684 622 } 685 623 686 624 static inline void l2cap_set_timer(struct l2cap_chan *chan, 687 - struct delayed_work *work, long timeout) 625 + struct delayed_work *work, long timeout) 688 626 { 689 627 BT_DBG("chan %p state %s timeout %ld", chan, 690 - state_to_string(chan->state), timeout); 628 + state_to_string(chan->state), timeout); 691 629 630 + /* If delayed work cancelled do not hold(chan) 631 + since it is already done with previous set_timer */ 692 632 if (!cancel_delayed_work(work)) 693 633 l2cap_chan_hold(chan); 634 + 694 635 schedule_delayed_work(work, timeout); 695 636 } 696 637 697 638 static inline bool l2cap_clear_timer(struct l2cap_chan *chan, 698 - struct delayed_work *work) 639 + struct delayed_work *work) 699 640 { 700 641 bool ret; 701 642 643 + /* put(chan) if delayed work cancelled otherwise it 644 + is done in delayed work function */ 702 645 ret = cancel_delayed_work(work); 703 646 if (ret) 704 647 l2cap_chan_put(chan); ··· 725 658 726 659 static inline int __seq_offset(struct l2cap_chan *chan, __u16 seq1, __u16 seq2) 727 660 { 728 - int offset; 729 - 730 - offset = (seq1 - seq2) % (chan->tx_win_max + 1); 731 - if (offset < 0) 732 - offset += (chan->tx_win_max + 1); 733 - 734 - return offset; 661 + if (seq1 >= seq2) 662 + return seq1 - seq2; 663 + else 664 + return chan->tx_win_max + 1 - seq2 + seq1; 735 665 } 736 666 737 667 static inline __u16 __next_seq(struct l2cap_chan *chan, __u16 seq) ··· 916 852 int l2cap_add_psm(struct l2cap_chan *chan, bdaddr_t *src, __le16 psm); 917 853 int l2cap_add_scid(struct l2cap_chan *chan, __u16 scid); 918 854 919 - struct l2cap_chan *l2cap_chan_create(struct sock *sk); 855 + struct l2cap_chan *l2cap_chan_create(void); 920 856 void l2cap_chan_close(struct l2cap_chan *chan, int reason); 921 857 void l2cap_chan_destroy(struct l2cap_chan *chan); 922 858 int l2cap_chan_connect(struct l2cap_chan *chan, __le16 psm, u16 cid, 923 - bdaddr_t *dst); 859 + bdaddr_t *dst, u8 dst_type); 924 860 int l2cap_chan_send(struct l2cap_chan *chan, struct msghdr *msg, size_t len, 925 861 u32 priority); 926 862 void l2cap_chan_busy(struct l2cap_chan *chan, int busy); 927 863 int l2cap_chan_check_security(struct l2cap_chan *chan); 864 + void l2cap_chan_set_defaults(struct l2cap_chan *chan); 928 865 929 866 #endif /* __L2CAP_H */
+9
include/net/bluetooth/mgmt.h
··· 341 341 } __packed; 342 342 #define MGMT_UNBLOCK_DEVICE_SIZE MGMT_ADDR_INFO_SIZE 343 343 344 + #define MGMT_OP_SET_DEVICE_ID 0x0028 345 + struct mgmt_cp_set_device_id { 346 + __le16 source; 347 + __le16 vendor; 348 + __le16 product; 349 + __le16 version; 350 + } __packed; 351 + #define MGMT_SET_DEVICE_ID_SIZE 8 352 + 344 353 #define MGMT_EV_CMD_COMPLETE 0x0001 345 354 struct mgmt_ev_cmd_complete { 346 355 __le16 opcode;
+1 -1
include/net/bluetooth/smp.h
··· 77 77 78 78 #define SMP_CMD_MASTER_IDENT 0x07 79 79 struct smp_cmd_master_ident { 80 - __u16 ediv; 80 + __le16 ediv; 81 81 __u8 rand[8]; 82 82 } __packed; 83 83
+3 -3
include/net/cfg80211.h
··· 3365 3365 * @chan: main channel 3366 3366 * @channel_type: HT mode 3367 3367 */ 3368 - int cfg80211_can_beacon_sec_chan(struct wiphy *wiphy, 3369 - struct ieee80211_channel *chan, 3370 - enum nl80211_channel_type channel_type); 3368 + bool cfg80211_can_beacon_sec_chan(struct wiphy *wiphy, 3369 + struct ieee80211_channel *chan, 3370 + enum nl80211_channel_type channel_type); 3371 3371 3372 3372 /* 3373 3373 * cfg80211_ch_switch_notify - update wdev channel and notify userspace
+11 -1
include/net/mac80211.h
··· 667 667 * @RX_FLAG_SHORT_GI: Short guard interval was used 668 668 * @RX_FLAG_NO_SIGNAL_VAL: The signal strength value is not present. 669 669 * Valid only for data frames (mainly A-MPDU) 670 + * @RX_FLAG_HT_GF: This frame was received in a HT-greenfield transmission, if 671 + * the driver fills this value it should add %IEEE80211_RADIOTAP_MCS_HAVE_FMT 672 + * to hw.radiotap_mcs_details to advertise that fact 670 673 */ 671 674 enum mac80211_rx_flags { 672 675 RX_FLAG_MMIC_ERROR = 1<<0, ··· 684 681 RX_FLAG_40MHZ = 1<<10, 685 682 RX_FLAG_SHORT_GI = 1<<11, 686 683 RX_FLAG_NO_SIGNAL_VAL = 1<<12, 684 + RX_FLAG_HT_GF = 1<<13, 687 685 }; 688 686 689 687 /** ··· 943 939 * CCMP key if it requires CCMP encryption of management frames (MFP) to 944 940 * be done in software. 945 941 * @IEEE80211_KEY_FLAG_PUT_IV_SPACE: This flag should be set by the driver 946 - * for a CCMP key if space should be prepared for the IV, but the IV 942 + * if space should be prepared for the IV, but the IV 947 943 * itself should not be generated. Do not set together with 948 944 * @IEEE80211_KEY_FLAG_GENERATE_IV on the same key. 949 945 */ ··· 1292 1288 * 1293 1289 * @offchannel_tx_hw_queue: HW queue ID to use for offchannel TX 1294 1290 * (if %IEEE80211_HW_QUEUE_CONTROL is set) 1291 + * 1292 + * @radiotap_mcs_details: lists which MCS information can the HW 1293 + * reports, by default it is set to _MCS, _GI and _BW but doesn't 1294 + * include _FMT. Use %IEEE80211_RADIOTAP_MCS_HAVE_* values, only 1295 + * adding _BW is supported today. 1295 1296 */ 1296 1297 struct ieee80211_hw { 1297 1298 struct ieee80211_conf conf; ··· 1318 1309 u8 max_rx_aggregation_subframes; 1319 1310 u8 max_tx_aggregation_subframes; 1320 1311 u8 offchannel_tx_hw_queue; 1312 + u8 radiotap_mcs_details; 1321 1313 }; 1322 1314 1323 1315 /**
+2 -4
include/net/nfc/hci.h
··· 39 39 int (*data_exchange) (struct nfc_hci_dev *hdev, 40 40 struct nfc_target *target, 41 41 struct sk_buff *skb, struct sk_buff **res_skb); 42 + int (*check_presence)(struct nfc_hci_dev *hdev, 43 + struct nfc_target *target); 42 44 }; 43 45 44 46 #define NFC_HCI_MAX_CUSTOM_GATES 15 ··· 83 81 void *clientdata; 84 82 85 83 u8 gate2pipe[NFC_HCI_MAX_GATES]; 86 - 87 - bool poll_started; 88 - struct nfc_target *targets; 89 - int target_count; 90 84 91 85 u8 sw_romlib; 92 86 u8 sw_patch;
+10 -9
include/net/nfc/nfc.h
··· 48 48 typedef void (*data_exchange_cb_t)(void *context, struct sk_buff *skb, 49 49 int err); 50 50 51 + struct nfc_target; 52 + 51 53 struct nfc_ops { 52 54 int (*dev_up)(struct nfc_dev *dev); 53 55 int (*dev_down)(struct nfc_dev *dev); 54 56 int (*start_poll)(struct nfc_dev *dev, u32 protocols); 55 57 void (*stop_poll)(struct nfc_dev *dev); 56 - int (*dep_link_up)(struct nfc_dev *dev, int target_idx, u8 comm_mode, 57 - u8 *gb, size_t gb_len); 58 + int (*dep_link_up)(struct nfc_dev *dev, struct nfc_target *target, 59 + u8 comm_mode, u8 *gb, size_t gb_len); 58 60 int (*dep_link_down)(struct nfc_dev *dev); 59 - int (*activate_target)(struct nfc_dev *dev, u32 target_idx, 61 + int (*activate_target)(struct nfc_dev *dev, struct nfc_target *target, 60 62 u32 protocol); 61 - void (*deactivate_target)(struct nfc_dev *dev, u32 target_idx); 62 - int (*data_exchange)(struct nfc_dev *dev, u32 target_idx, 63 + void (*deactivate_target)(struct nfc_dev *dev, 64 + struct nfc_target *target); 65 + int (*data_exchange)(struct nfc_dev *dev, struct nfc_target *target, 63 66 struct sk_buff *skb, data_exchange_cb_t cb, 64 67 void *cb_context); 65 - int (*check_presence)(struct nfc_dev *dev, u32 target_idx); 68 + int (*check_presence)(struct nfc_dev *dev, struct nfc_target *target); 66 69 }; 67 70 68 71 #define NFC_TARGET_IDX_ANY -1 69 72 #define NFC_MAX_GT_LEN 48 70 - #define NFC_TARGET_IDX_NONE 0xffffffff 71 73 72 74 struct nfc_target { 73 75 u32 idx; ··· 97 95 struct nfc_target *targets; 98 96 int n_targets; 99 97 int targets_generation; 100 - spinlock_t targets_lock; 101 98 struct device dev; 102 99 bool dev_up; 103 100 bool polling; 104 - u32 activated_target_idx; 101 + struct nfc_target *active_target; 105 102 bool dep_link_up; 106 103 u32 dep_rf_mode; 107 104 struct nfc_genl_data genl_data;
+2
include/net/nfc/shdlc.h
··· 35 35 int (*data_exchange) (struct nfc_shdlc *shdlc, 36 36 struct nfc_target *target, 37 37 struct sk_buff *skb, struct sk_buff **res_skb); 38 + int (*check_presence)(struct nfc_shdlc *shdlc, 39 + struct nfc_target *target); 38 40 }; 39 41 40 42 enum shdlc_state {
+2 -1
kernel/pid.c
··· 547 547 548 548 pid_hash = alloc_large_system_hash("PID", sizeof(*pid_hash), 0, 18, 549 549 HASH_EARLY | HASH_SMALL, 550 - &pidhash_shift, NULL, 4096); 550 + &pidhash_shift, NULL, 551 + 0, 4096); 551 552 pidhash_size = 1U << pidhash_shift; 552 553 553 554 for (i = 0; i < pidhash_size; i++)
+5 -2
mm/page_alloc.c
··· 5242 5242 int flags, 5243 5243 unsigned int *_hash_shift, 5244 5244 unsigned int *_hash_mask, 5245 - unsigned long limit) 5245 + unsigned long low_limit, 5246 + unsigned long high_limit) 5246 5247 { 5247 - unsigned long long max = limit; 5248 + unsigned long long max = high_limit; 5248 5249 unsigned long log2qty, size; 5249 5250 void *table = NULL; 5250 5251 ··· 5283 5282 } 5284 5283 max = min(max, 0x80000000ULL); 5285 5284 5285 + if (numentries < low_limit) 5286 + numentries = low_limit; 5286 5287 if (numentries > max) 5287 5288 numentries = max; 5288 5289
+4 -4
net/bluetooth/af_bluetooth.c
··· 210 210 } 211 211 212 212 if (sk->sk_state == BT_CONNECTED || !newsock || 213 - bt_sk(parent)->defer_setup) { 213 + test_bit(BT_DEFER_SETUP, &bt_sk(parent)->flags)) { 214 214 bt_accept_unlink(sk); 215 215 if (newsock) 216 216 sock_graft(sk, newsock); ··· 410 410 list_for_each_safe(p, n, &bt_sk(parent)->accept_q) { 411 411 sk = (struct sock *) list_entry(p, struct bt_sock, accept_q); 412 412 if (sk->sk_state == BT_CONNECTED || 413 - (bt_sk(parent)->defer_setup && 414 - sk->sk_state == BT_CONNECT2)) 413 + (test_bit(BT_SK_DEFER_SETUP, &bt_sk(parent)->flags) && 414 + sk->sk_state == BT_CONNECT2)) 415 415 return POLLIN | POLLRDNORM; 416 416 } 417 417 ··· 450 450 sk->sk_state == BT_CONFIG) 451 451 return mask; 452 452 453 - if (!bt_sk(sk)->suspended && sock_writeable(sk)) 453 + if (!test_bit(BT_SK_SUSPEND, &bt_sk(sk)->flags) && sock_writeable(sk)) 454 454 mask |= POLLOUT | POLLWRNORM | POLLWRBAND; 455 455 else 456 456 set_bit(SOCK_ASYNC_NOSPACE, &sk->sk_socket->flags);
+1 -1
net/bluetooth/bnep/core.c
··· 340 340 } 341 341 342 342 /* Strip 802.1p header */ 343 - if (ntohs(s->eh.h_proto) == 0x8100) { 343 + if (ntohs(s->eh.h_proto) == ETH_P_8021Q) { 344 344 if (!skb_pull(skb, 4)) 345 345 goto badframe; 346 346 s->eh.h_proto = get_unaligned((__be16 *) (skb->data - 2));
+11 -45
net/bluetooth/hci_conn.c
··· 223 223 } 224 224 EXPORT_SYMBOL(hci_le_start_enc); 225 225 226 - void hci_le_ltk_reply(struct hci_conn *conn, u8 ltk[16]) 227 - { 228 - struct hci_dev *hdev = conn->hdev; 229 - struct hci_cp_le_ltk_reply cp; 230 - 231 - BT_DBG("%p", conn); 232 - 233 - memset(&cp, 0, sizeof(cp)); 234 - 235 - cp.handle = cpu_to_le16(conn->handle); 236 - memcpy(cp.ltk, ltk, sizeof(ltk)); 237 - 238 - hci_send_cmd(hdev, HCI_OP_LE_LTK_REPLY, sizeof(cp), &cp); 239 - } 240 - EXPORT_SYMBOL(hci_le_ltk_reply); 241 - 242 - void hci_le_ltk_neg_reply(struct hci_conn *conn) 243 - { 244 - struct hci_dev *hdev = conn->hdev; 245 - struct hci_cp_le_ltk_neg_reply cp; 246 - 247 - BT_DBG("%p", conn); 248 - 249 - memset(&cp, 0, sizeof(cp)); 250 - 251 - cp.handle = cpu_to_le16(conn->handle); 252 - 253 - hci_send_cmd(hdev, HCI_OP_LE_LTK_NEG_REPLY, sizeof(cp), &cp); 254 - } 255 - 256 226 /* Device _must_ be locked */ 257 227 void hci_sco_setup(struct hci_conn *conn, __u8 status) 258 228 { ··· 483 513 484 514 /* Create SCO, ACL or LE connection. 485 515 * Device _must_ be locked */ 486 - struct hci_conn *hci_connect(struct hci_dev *hdev, int type, bdaddr_t *dst, __u8 sec_level, __u8 auth_type) 516 + struct hci_conn *hci_connect(struct hci_dev *hdev, int type, bdaddr_t *dst, 517 + __u8 dst_type, __u8 sec_level, __u8 auth_type) 487 518 { 488 519 struct hci_conn *acl; 489 520 struct hci_conn *sco; ··· 493 522 BT_DBG("%s dst %s", hdev->name, batostr(dst)); 494 523 495 524 if (type == LE_LINK) { 496 - struct adv_entry *entry; 497 - 498 525 le = hci_conn_hash_lookup_ba(hdev, LE_LINK, dst); 499 - if (le) 500 - return ERR_PTR(-EBUSY); 526 + if (!le) { 527 + le = hci_conn_add(hdev, LE_LINK, dst); 528 + if (!le) 529 + return ERR_PTR(-ENOMEM); 501 530 502 - entry = hci_find_adv_entry(hdev, dst); 503 - if (!entry) 504 - return ERR_PTR(-EHOSTUNREACH); 531 + le->dst_type = bdaddr_to_le(dst_type); 532 + hci_le_connect(le); 533 + } 505 534 506 - le = hci_conn_add(hdev, LE_LINK, dst); 507 - if (!le) 508 - return ERR_PTR(-ENOMEM); 509 - 510 - le->dst_type = entry->bdaddr_type; 511 - 512 - hci_le_connect(le); 535 + le->pending_sec_level = sec_level; 536 + le->auth_type = auth_type; 513 537 514 538 hci_conn_hold(le); 515 539
+107 -160
net/bluetooth/hci_core.c
··· 83 83 */ 84 84 if (test_bit(HCI_INIT, &hdev->flags) && hdev->init_last_cmd != cmd) { 85 85 struct hci_command_hdr *sent = (void *) hdev->sent_cmd->data; 86 + u16 opcode = __le16_to_cpu(sent->opcode); 86 87 struct sk_buff *skb; 87 88 88 89 /* Some CSR based controllers generate a spontaneous ··· 93 92 * command. 94 93 */ 95 94 96 - if (cmd != HCI_OP_RESET || sent->opcode == HCI_OP_RESET) 95 + if (cmd != HCI_OP_RESET || opcode == HCI_OP_RESET) 97 96 return; 98 97 99 98 skb = skb_clone(hdev->sent_cmd, GFP_ATOMIC); ··· 252 251 253 252 /* Read Local Version */ 254 253 hci_send_cmd(hdev, HCI_OP_READ_LOCAL_VERSION, 0, NULL); 254 + 255 + /* Read Local AMP Info */ 256 + hci_send_cmd(hdev, HCI_OP_READ_LOCAL_AMP_INFO, 0, NULL); 255 257 } 256 258 257 259 static void hci_init_req(struct hci_dev *hdev, unsigned long opt) ··· 388 384 case DISCOVERY_STOPPED: 389 385 if (hdev->discovery.state != DISCOVERY_STARTING) 390 386 mgmt_discovering(hdev, 0); 391 - hdev->discovery.type = 0; 392 387 break; 393 388 case DISCOVERY_STARTING: 394 389 break; ··· 1092 1089 .set_block = hci_rfkill_set_block, 1093 1090 }; 1094 1091 1095 - /* Alloc HCI device */ 1096 - struct hci_dev *hci_alloc_dev(void) 1097 - { 1098 - struct hci_dev *hdev; 1099 - 1100 - hdev = kzalloc(sizeof(struct hci_dev), GFP_KERNEL); 1101 - if (!hdev) 1102 - return NULL; 1103 - 1104 - hci_init_sysfs(hdev); 1105 - skb_queue_head_init(&hdev->driver_init); 1106 - 1107 - return hdev; 1108 - } 1109 - EXPORT_SYMBOL(hci_alloc_dev); 1110 - 1111 - /* Free HCI device */ 1112 - void hci_free_dev(struct hci_dev *hdev) 1113 - { 1114 - skb_queue_purge(&hdev->driver_init); 1115 - 1116 - /* will free via device release */ 1117 - put_device(&hdev->dev); 1118 - } 1119 - EXPORT_SYMBOL(hci_free_dev); 1120 - 1121 1092 static void hci_power_on(struct work_struct *work) 1122 1093 { 1123 1094 struct hci_dev *hdev = container_of(work, struct hci_dev, power_on); ··· 1313 1336 } 1314 1337 1315 1338 int hci_add_ltk(struct hci_dev *hdev, bdaddr_t *bdaddr, u8 addr_type, u8 type, 1316 - int new_key, u8 authenticated, u8 tk[16], u8 enc_size, u16 1339 + int new_key, u8 authenticated, u8 tk[16], u8 enc_size, __le16 1317 1340 ediv, u8 rand[8]) 1318 1341 { 1319 1342 struct smp_ltk *key, *old_key; ··· 1521 1544 return mgmt_device_unblocked(hdev, bdaddr, type); 1522 1545 } 1523 1546 1524 - static void hci_clear_adv_cache(struct work_struct *work) 1525 - { 1526 - struct hci_dev *hdev = container_of(work, struct hci_dev, 1527 - adv_work.work); 1528 - 1529 - hci_dev_lock(hdev); 1530 - 1531 - hci_adv_entries_clear(hdev); 1532 - 1533 - hci_dev_unlock(hdev); 1534 - } 1535 - 1536 - int hci_adv_entries_clear(struct hci_dev *hdev) 1537 - { 1538 - struct adv_entry *entry, *tmp; 1539 - 1540 - list_for_each_entry_safe(entry, tmp, &hdev->adv_entries, list) { 1541 - list_del(&entry->list); 1542 - kfree(entry); 1543 - } 1544 - 1545 - BT_DBG("%s adv cache cleared", hdev->name); 1546 - 1547 - return 0; 1548 - } 1549 - 1550 - struct adv_entry *hci_find_adv_entry(struct hci_dev *hdev, bdaddr_t *bdaddr) 1551 - { 1552 - struct adv_entry *entry; 1553 - 1554 - list_for_each_entry(entry, &hdev->adv_entries, list) 1555 - if (bacmp(bdaddr, &entry->bdaddr) == 0) 1556 - return entry; 1557 - 1558 - return NULL; 1559 - } 1560 - 1561 - static inline int is_connectable_adv(u8 evt_type) 1562 - { 1563 - if (evt_type == ADV_IND || evt_type == ADV_DIRECT_IND) 1564 - return 1; 1565 - 1566 - return 0; 1567 - } 1568 - 1569 - int hci_add_adv_entry(struct hci_dev *hdev, 1570 - struct hci_ev_le_advertising_info *ev) { struct adv_entry *entry; if (!is_connectable_adv(ev->evt_type)) 1571 - return -EINVAL; 1572 - 1573 - /* Only new entries should be added to adv_entries. So, if 1574 - * bdaddr was found, don't add it. */ 1575 - if (hci_find_adv_entry(hdev, &ev->bdaddr)) 1576 - return 0; 1577 - 1578 - entry = kzalloc(sizeof(*entry), GFP_KERNEL); 1579 - if (!entry) 1580 - return -ENOMEM; 1581 - 1582 - bacpy(&entry->bdaddr, &ev->bdaddr); 1583 - entry->bdaddr_type = ev->bdaddr_type; 1584 - 1585 - list_add(&entry->list, &hdev->adv_entries); 1586 - 1587 - BT_DBG("%s adv entry added: address %s type %u", hdev->name, 1588 - batostr(&entry->bdaddr), entry->bdaddr_type); 1589 - 1590 - return 0; 1591 - } 1592 - 1593 1547 static void le_scan_param_req(struct hci_dev *hdev, unsigned long opt) 1594 1548 { 1595 1549 struct le_scan_params *param = (struct le_scan_params *) opt; ··· 1578 1670 return 0; 1579 1671 } 1580 1672 1673 + int hci_cancel_le_scan(struct hci_dev *hdev) 1674 + { 1675 + BT_DBG("%s", hdev->name); 1676 + 1677 + if (!test_bit(HCI_LE_SCAN, &hdev->dev_flags)) 1678 + return -EALREADY; 1679 + 1680 + if (cancel_delayed_work(&hdev->le_scan_disable)) { 1681 + struct hci_cp_le_set_scan_enable cp; 1682 + 1683 + /* Send HCI command to disable LE Scan */ 1684 + memset(&cp, 0, sizeof(cp)); 1685 + hci_send_cmd(hdev, HCI_OP_LE_SET_SCAN_ENABLE, sizeof(cp), &cp); 1686 + } 1687 + 1688 + return 0; 1689 + } 1690 + 1581 1691 static void le_scan_disable_work(struct work_struct *work) 1582 1692 { 1583 1693 struct hci_dev *hdev = container_of(work, struct hci_dev, ··· 1640 1714 return 0; 1641 1715 } 1642 1716 1643 - /* Register HCI device */ 1644 - int hci_register_dev(struct hci_dev *hdev) 1717 + /* Alloc HCI device */ 1718 + struct hci_dev *hci_alloc_dev(void) 1645 1719 { 1646 - struct list_head *head = &hci_dev_list, *p; 1647 - int i, id, error; 1720 + struct hci_dev *hdev; 1648 1721 1649 - BT_DBG("%p name %s bus %d", hdev, hdev->name, hdev->bus); 1722 + hdev = kzalloc(sizeof(struct hci_dev), GFP_KERNEL); 1723 + if (!hdev) 1724 + return NULL; 1650 1725 1651 - if (!hdev->open || !hdev->close) 1652 - return -EINVAL; 1653 - 1654 - /* Do not allow HCI_AMP devices to register at index 0, 1655 - * so the index can be used as the AMP controller ID. 1656 - */ 1657 - id = (hdev->dev_type == HCI_BREDR) ? 0 : 1; 1658 - 1659 - write_lock(&hci_dev_list_lock); 1660 - 1661 - /* Find first available device id */ 1662 - list_for_each(p, &hci_dev_list) { 1663 - if (list_entry(p, struct hci_dev, list)->id != id) 1664 - break; 1665 - head = p; id++; 1666 - } 1667 - 1668 - sprintf(hdev->name, "hci%d", id); 1669 - hdev->id = id; 1670 - list_add_tail(&hdev->list, head); 1671 - 1672 - mutex_init(&hdev->lock); 1673 - 1674 - hdev->flags = 0; 1675 - hdev->dev_flags = 0; 1676 1726 hdev->pkt_type = (HCI_DM1 | HCI_DH1 | HCI_HV1); 1677 1727 hdev->esco_type = (ESCO_HV1); 1678 1728 hdev->link_mode = (HCI_LM_ACCEPT); 1679 1729 hdev->io_capability = 0x03; /* No Input No Output */ 1680 1730 1681 - hdev->idle_timeout = 0; 1682 1731 hdev->sniff_max_interval = 800; 1683 1732 hdev->sniff_min_interval = 80; 1733 + 1734 + mutex_init(&hdev->lock); 1735 + mutex_init(&hdev->req_lock); 1736 + 1737 + INIT_LIST_HEAD(&hdev->mgmt_pending); 1738 + INIT_LIST_HEAD(&hdev->blacklist); 1739 + INIT_LIST_HEAD(&hdev->uuids); 1740 + INIT_LIST_HEAD(&hdev->link_keys); 1741 + INIT_LIST_HEAD(&hdev->long_term_keys); 1742 + INIT_LIST_HEAD(&hdev->remote_oob_data); 1684 1743 1685 1744 INIT_WORK(&hdev->rx_work, hci_rx_work); 1686 1745 INIT_WORK(&hdev->cmd_work, hci_cmd_work); 1687 1746 INIT_WORK(&hdev->tx_work, hci_tx_work); 1747 + INIT_WORK(&hdev->power_on, hci_power_on); 1748 + INIT_WORK(&hdev->le_scan, le_scan_work); 1688 1749 1750 + INIT_DELAYED_WORK(&hdev->power_off, hci_power_off); 1751 + INIT_DELAYED_WORK(&hdev->discov_off, hci_discov_off); 1752 + INIT_DELAYED_WORK(&hdev->le_scan_disable, le_scan_disable_work); 1689 1753 1754 + skb_queue_head_init(&hdev->driver_init); 1690 1755 skb_queue_head_init(&hdev->rx_q); 1691 1756 skb_queue_head_init(&hdev->cmd_q); 1692 1757 skb_queue_head_init(&hdev->raw_q); 1693 1758 1759 + init_waitqueue_head(&hdev->req_wait_q); 1760 + 1694 1761 setup_timer(&hdev->cmd_timer, hci_cmd_timer, (unsigned long) hdev); 1695 1762 1696 - for (i = 0; i < NUM_REASSEMBLY; i++) 1697 - hdev->reassembly[i] = NULL; 1698 - 1699 - init_waitqueue_head(&hdev->req_wait_q); 1700 - mutex_init(&hdev->req_lock); 1701 - 1763 + hci_init_sysfs(hdev); 1702 1764 discovery_init(hdev); 1703 - 1704 1765 hci_conn_hash_init(hdev); 1705 1766 1706 - INIT_LIST_HEAD(&hdev->mgmt_pending); 1767 + return hdev; 1768 + } 1769 + EXPORT_SYMBOL(hci_alloc_dev); 1707 1770 1708 - INIT_LIST_HEAD(&hdev->blacklist); 1771 + /* Free HCI device */ 1772 + void hci_free_dev(struct hci_dev *hdev) 1773 + { 1774 + skb_queue_purge(&hdev->driver_init); 1709 1775 1710 - INIT_LIST_HEAD(&hdev->uuids); 1776 + /* will free via device release */ 1777 + put_device(&hdev->dev); 1778 + } 1779 + EXPORT_SYMBOL(hci_free_dev); 1711 1780 1712 - INIT_LIST_HEAD(&hdev->link_keys); 1713 - INIT_LIST_HEAD(&hdev->long_term_keys); 1781 + /* Register HCI device */ 1782 + int hci_register_dev(struct hci_dev *hdev) 1783 + { 1784 + struct list_head *head, *p; 1785 + int id, error; 1714 1786 1715 - INIT_LIST_HEAD(&hdev->remote_oob_data); 1787 + if (!hdev->open || !hdev->close) 1788 + return -EINVAL; 1716 1789 1717 - INIT_LIST_HEAD(&hdev->adv_entries); 1790 + write_lock(&hci_dev_list_lock); 1718 1791 1719 - INIT_DELAYED_WORK(&hdev->adv_work, hci_clear_adv_cache); 1720 - INIT_WORK(&hdev->power_on, hci_power_on); 1721 - INIT_DELAYED_WORK(&hdev->power_off, hci_power_off); 1792 + /* Do not allow HCI_AMP devices to register at index 0, 1793 + * so the index can be used as the AMP controller ID. 1794 + */ 1795 + id = (hdev->dev_type == HCI_BREDR) ? 0 : 1; 1796 + head = &hci_dev_list; 1722 1797 1723 - INIT_DELAYED_WORK(&hdev->discov_off, hci_discov_off); 1798 + /* Find first available device id */ 1799 + list_for_each(p, &hci_dev_list) { 1800 + int nid = list_entry(p, struct hci_dev, list)->id; 1801 + if (nid > id) 1802 + break; 1803 + if (nid == id) 1804 + id++; 1805 + head = p; 1806 + } 1724 1807 1725 - memset(&hdev->stat, 0, sizeof(struct hci_dev_stats)); 1808 + sprintf(hdev->name, "hci%d", id); 1809 + hdev->id = id; 1726 1810 1727 - atomic_set(&hdev->promisc, 0); 1811 + BT_DBG("%p name %s bus %d", hdev, hdev->name, hdev->bus); 1728 1812 1729 - INIT_WORK(&hdev->le_scan, le_scan_work); 1730 - 1731 - INIT_DELAYED_WORK(&hdev->le_scan_disable, le_scan_disable_work); 1813 + list_add(&hdev->list, head); 1732 1814 1733 1815 write_unlock(&hci_dev_list_lock); 1734 1816 ··· 1818 1884 1819 1885 hci_del_sysfs(hdev); 1820 1886 1821 - cancel_delayed_work_sync(&hdev->adv_work); 1822 - 1823 1887 destroy_workqueue(hdev->workqueue); 1824 1888 1825 1889 hci_dev_lock(hdev); ··· 1826 1894 hci_link_keys_clear(hdev); 1827 1895 hci_smp_ltks_clear(hdev); 1828 1896 hci_remote_oob_data_clear(hdev); 1829 - hci_adv_entries_clear(hdev); 1830 1897 hci_dev_unlock(hdev); 1831 1898 1832 1899 hci_dev_put(hdev); ··· 2162 2231 struct hci_dev *hdev = conn->hdev; 2163 2232 struct sk_buff *list; 2164 2233 2234 + skb->len = skb_headlen(skb); 2235 + skb->data_len = 0; 2236 + 2237 + bt_cb(skb)->pkt_type = HCI_ACLDATA_PKT; 2238 + hci_add_acl_hdr(skb, conn->handle, flags); 2239 + 2165 2240 list = skb_shinfo(skb)->frag_list; 2166 2241 if (!list) { 2167 2242 /* Non fragmented */ ··· 2211 2274 BT_DBG("%s chan %p flags 0x%x", hdev->name, chan, flags); 2212 2275 2213 2276 skb->dev = (void *) hdev; 2214 - bt_cb(skb)->pkt_type = HCI_ACLDATA_PKT; 2215 - hci_add_acl_hdr(skb, conn->handle, flags); 2216 2277 2217 2278 hci_queue_acl(conn, &chan->data_q, skb, flags); 2218 2279 ··· 2248 2313 { 2249 2314 struct hci_conn_hash *h = &hdev->conn_hash; 2250 2315 struct hci_conn *conn = NULL, *c; 2251 - int num = 0, min = ~0; 2316 + unsigned int num = 0, min = ~0; 2252 2317 2253 2318 /* We don't have to lock device here. Connections are always 2254 2319 * added and removed with TX task disabled. */ ··· 2329 2394 { 2330 2395 struct hci_conn_hash *h = &hdev->conn_hash; 2331 2396 struct hci_chan *chan = NULL; 2332 - int num = 0, min = ~0, cur_prio = 0; 2397 + unsigned int num = 0, min = ~0, cur_prio = 0; 2333 2398 struct hci_conn *conn; 2334 2399 int cnt, q, conn_num = 0; 2335 2400 ··· 2880 2945 BT_DBG("%s", hdev->name); 2881 2946 2882 2947 if (!test_bit(HCI_INQUIRY, &hdev->flags)) 2883 - return -EPERM; 2948 + return -EALREADY; 2884 2949 2885 2950 return hci_send_cmd(hdev, HCI_OP_INQUIRY_CANCEL, 0, NULL); 2951 + } 2952 + 2953 + u8 bdaddr_to_le(u8 bdaddr_type) 2954 + { 2955 + switch (bdaddr_type) { 2956 + case BDADDR_LE_PUBLIC: 2957 + return ADDR_LE_DEV_PUBLIC; 2958 + 2959 + default: 2960 + /* Fallback to LE Random address type */ 2961 + return ADDR_LE_DEV_RANDOM; 2962 + } 2886 2963 }
+54 -21
net/bluetooth/hci_event.c
··· 69 69 hci_conn_check_pending(hdev); 70 70 } 71 71 72 + static void hci_cc_periodic_inq(struct hci_dev *hdev, struct sk_buff *skb) 73 + { 74 + __u8 status = *((__u8 *) skb->data); 75 + 76 + BT_DBG("%s status 0x%x", hdev->name, status); 77 + 78 + if (status) 79 + return; 80 + 81 + set_bit(HCI_PERIODIC_INQ, &hdev->dev_flags); 82 + } 83 + 72 84 static void hci_cc_exit_periodic_inq(struct hci_dev *hdev, struct sk_buff *skb) 73 85 { 74 86 __u8 status = *((__u8 *) skb->data); ··· 89 77 90 78 if (status) 91 79 return; 80 + 81 + clear_bit(HCI_PERIODIC_INQ, &hdev->dev_flags); 92 82 93 83 hci_conn_check_pending(hdev); 94 84 } ··· 206 192 hci_req_complete(hdev, HCI_OP_RESET, status); 207 193 208 194 /* Reset all non-persistent flags */ 209 - hdev->dev_flags &= ~(BIT(HCI_LE_SCAN) | BIT(HCI_PENDING_CLASS)); 195 + hdev->dev_flags &= ~(BIT(HCI_LE_SCAN) | BIT(HCI_PENDING_CLASS) | 196 + BIT(HCI_PERIODIC_INQ)); 210 197 211 198 hdev->discovery.state = DISCOVERY_STOPPED; 212 199 } ··· 520 505 events[5] |= 0x10; /* Synchronous Connection Changed */ 521 506 522 507 if (hdev->features[3] & LMP_RSSI_INQ) 523 - events[4] |= 0x04; /* Inquiry Result with RSSI */ 508 + events[4] |= 0x02; /* Inquiry Result with RSSI */ 524 509 525 510 if (hdev->features[5] & LMP_SNIFF_SUBR) 526 511 events[5] |= 0x20; /* Sniff Subrating */ ··· 630 615 631 616 static void hci_setup_link_policy(struct hci_dev *hdev) 632 617 { 618 + struct hci_cp_write_def_link_policy cp; 633 619 u16 link_policy = 0; 634 620 635 621 if (hdev->features[0] & LMP_RSWITCH) ··· 642 626 if (hdev->features[1] & LMP_PARK) 643 627 link_policy |= HCI_LP_PARK; 644 628 645 - link_policy = cpu_to_le16(link_policy); 646 - hci_send_cmd(hdev, HCI_OP_WRITE_DEF_LINK_POLICY, sizeof(link_policy), 647 - &link_policy); 629 + cp.policy = cpu_to_le16(link_policy); 630 + hci_send_cmd(hdev, HCI_OP_WRITE_DEF_LINK_POLICY, sizeof(cp), &cp); 648 631 } 649 632 650 633 static void hci_cc_read_local_commands(struct hci_dev *hdev, struct sk_buff *skb) ··· 725 710 726 711 memset(&cp, 0, sizeof(cp)); 727 712 728 - if (enable_le && test_bit(HCI_LE_ENABLED, &hdev->dev_flags)) { 713 + if (test_bit(HCI_LE_ENABLED, &hdev->dev_flags)) { 729 714 cp.le = 1; 730 715 cp.simul = !!(hdev->features[6] & LMP_SIMUL_LE_BR); 731 716 } ··· 902 887 static void hci_cc_read_inq_rsp_tx_power(struct hci_dev *hdev, 903 888 struct sk_buff *skb) 904 889 { 905 - __u8 status = *((__u8 *) skb->data); 890 + struct hci_rp_read_inq_rsp_tx_power *rp = (void *) skb->data; 906 891 907 - BT_DBG("%s status 0x%x", hdev->name, status); 892 + BT_DBG("%s status 0x%x", hdev->name, rp->status); 908 893 909 - hci_req_complete(hdev, HCI_OP_READ_INQ_RSP_TX_POWER, status); 894 + if (!rp->status) 895 + hdev->inq_tx_power = rp->tx_power; 896 + 897 + hci_req_complete(hdev, HCI_OP_READ_INQ_RSP_TX_POWER, rp->status); 910 898 } 911 899 912 900 static void hci_cc_set_event_flt(struct hci_dev *hdev, struct sk_buff *skb) ··· 1100 1082 1101 1083 set_bit(HCI_LE_SCAN, &hdev->dev_flags); 1102 1084 1103 - cancel_delayed_work_sync(&hdev->adv_work); 1104 - 1105 1085 hci_dev_lock(hdev); 1106 - hci_adv_entries_clear(hdev); 1107 1086 hci_discovery_set_state(hdev, DISCOVERY_FINDING); 1108 1087 hci_dev_unlock(hdev); 1109 1088 break; 1110 1089 1111 1090 case LE_SCANNING_DISABLED: 1112 - if (status) 1091 + if (status) { 1092 + hci_dev_lock(hdev); 1093 + mgmt_stop_discovery_failed(hdev, status); 1094 + hci_dev_unlock(hdev); 1113 1095 return; 1096 + } 1114 1097 1115 1098 clear_bit(HCI_LE_SCAN, &hdev->dev_flags); 1116 1099 1117 - schedule_delayed_work(&hdev->adv_work, ADV_CLEAR_TIMEOUT); 1118 - 1119 - if (hdev->discovery.type == DISCOV_TYPE_INTERLEAVED) { 1100 + if (hdev->discovery.type == DISCOV_TYPE_INTERLEAVED && 1101 + hdev->discovery.state == DISCOVERY_FINDING) { 1120 1102 mgmt_interleaved_discovery(hdev); 1121 1103 } else { 1122 1104 hci_dev_lock(hdev); ··· 1643 1625 if (status) { 1644 1626 if (conn && conn->state == BT_CONNECT) { 1645 1627 conn->state = BT_CLOSED; 1628 + mgmt_connect_failed(hdev, &cp->peer_addr, conn->type, 1629 + conn->dst_type, status); 1646 1630 hci_proto_connect_cfm(conn, status); 1647 1631 hci_conn_del(conn); 1648 1632 } ··· 1717 1697 BT_DBG("%s num_rsp %d", hdev->name, num_rsp); 1718 1698 1719 1699 if (!num_rsp) 1700 + return; 1701 + 1702 + if (test_bit(HCI_PERIODIC_INQ, &hdev->dev_flags)) 1720 1703 return; 1721 1704 1722 1705 hci_dev_lock(hdev); ··· 2063 2040 clear_bit(HCI_CONN_ENCRYPT_PEND, &conn->flags); 2064 2041 2065 2042 if (ev->status && conn->state == BT_CONNECTED) { 2066 - hci_acl_disconn(conn, 0x13); 2043 + hci_acl_disconn(conn, HCI_ERROR_AUTH_FAILURE); 2067 2044 hci_conn_put(conn); 2068 2045 goto unlock; 2069 2046 } ··· 2175 2152 switch (opcode) { 2176 2153 case HCI_OP_INQUIRY_CANCEL: 2177 2154 hci_cc_inquiry_cancel(hdev, skb); 2155 + break; 2156 + 2157 + case HCI_OP_PERIODIC_INQ: 2158 + hci_cc_periodic_inq(hdev, skb); 2178 2159 break; 2179 2160 2180 2161 case HCI_OP_EXIT_PERIODIC_INQ: ··· 2833 2806 if (!num_rsp) 2834 2807 return; 2835 2808 2809 + if (test_bit(HCI_PERIODIC_INQ, &hdev->dev_flags)) 2810 + return; 2811 + 2836 2812 hci_dev_lock(hdev); 2837 2813 2838 2814 if ((skb->len - 1) / num_rsp != sizeof(struct inquiry_info_with_rssi)) { ··· 3001 2971 struct inquiry_data data; 3002 2972 struct extended_inquiry_info *info = (void *) (skb->data + 1); 3003 2973 int num_rsp = *((__u8 *) skb->data); 2974 + size_t eir_len; 3004 2975 3005 2976 BT_DBG("%s num_rsp %d", hdev->name, num_rsp); 3006 2977 3007 2978 if (!num_rsp) 2979 + return; 2980 + 2981 + if (test_bit(HCI_PERIODIC_INQ, &hdev->dev_flags)) 3008 2982 return; 3009 2983 3010 2984 hci_dev_lock(hdev); ··· 3034 3000 3035 3001 name_known = hci_inquiry_cache_update(hdev, &data, name_known, 3036 3002 &ssp); 3003 + eir_len = eir_get_length(info->data, sizeof(info->data)); 3037 3004 mgmt_device_found(hdev, &info->bdaddr, ACL_LINK, 0x00, 3038 3005 info->dev_class, info->rssi, !name_known, 3039 - ssp, info->data, sizeof(info->data)); 3006 + ssp, info->data, eir_len); 3040 3007 } 3041 3008 3042 3009 hci_dev_unlock(hdev); ··· 3357 3322 while (num_reports--) { 3358 3323 struct hci_ev_le_advertising_info *ev = ptr; 3359 3324 3360 - hci_add_adv_entry(hdev, ev); 3361 - 3362 3325 rssi = ev->data[ev->length]; 3363 3326 mgmt_device_found(hdev, &ev->bdaddr, LE_LINK, ev->bdaddr_type, 3364 3327 NULL, rssi, 0, 1, ev->data, ev->length); ··· 3376 3343 struct hci_conn *conn; 3377 3344 struct smp_ltk *ltk; 3378 3345 3379 - BT_DBG("%s handle %d", hdev->name, cpu_to_le16(ev->handle)); 3346 + BT_DBG("%s handle %d", hdev->name, __le16_to_cpu(ev->handle)); 3380 3347 3381 3348 hci_dev_lock(hdev); 3382 3349
+2 -3
net/bluetooth/hci_sysfs.c
··· 444 444 445 445 static void print_bt_uuid(struct seq_file *f, u8 *uuid) 446 446 { 447 - u32 data0, data4; 448 - u16 data1, data2, data3, data5; 447 + __be32 data0, data4; 448 + __be16 data1, data2, data3, data5; 449 449 450 450 memcpy(&data0, &uuid[0], 4); 451 451 memcpy(&data1, &uuid[4], 2); ··· 533 533 534 534 BT_DBG("%p name %s bus %d", hdev, hdev->name, hdev->bus); 535 535 536 - dev->parent = hdev->parent; 537 536 dev_set_name(dev, "%s", hdev->name); 538 537 539 538 err = device_add(dev);
+543 -229
net/bluetooth/l2cap_core.c
··· 4 4 Copyright (C) 2009-2010 Gustavo F. Padovan <gustavo@padovan.org> 5 5 Copyright (C) 2010 Google Inc. 6 6 Copyright (C) 2011 ProFUSION Embedded Systems 7 + Copyright (c) 2012 Code Aurora Forum. All rights reserved. 7 8 8 9 Written 2000,2001 by Maxim Krasnyansky <maxk@qualcomm.com> 9 10 ··· 71 70 void *data); 72 71 static int l2cap_build_conf_req(struct l2cap_chan *chan, void *data); 73 72 static void l2cap_send_disconn_req(struct l2cap_conn *conn, 74 - struct l2cap_chan *chan, int err); 73 + struct l2cap_chan *chan, int err); 75 74 76 75 /* ---- L2CAP channels ---- */ 77 76 ··· 98 97 } 99 98 100 99 /* Find channel with given SCID. 101 - * Returns locked socket */ 100 + * Returns locked channel. */ 102 101 static struct l2cap_chan *l2cap_get_chan_by_scid(struct l2cap_conn *conn, u16 cid) 103 102 { 104 103 struct l2cap_chan *c; 105 104 106 105 mutex_lock(&conn->chan_lock); 107 106 c = __l2cap_get_chan_by_scid(conn, cid); 107 + if (c) 108 + l2cap_chan_lock(c); 108 109 mutex_unlock(&conn->chan_lock); 109 110 110 111 return c; ··· 121 118 return c; 122 119 } 123 120 return NULL; 124 - } 125 - 126 - static inline struct l2cap_chan *l2cap_get_chan_by_ident(struct l2cap_conn *conn, u8 ident) 127 - { 128 - struct l2cap_chan *c; 129 - 130 - mutex_lock(&conn->chan_lock); 131 - c = __l2cap_get_chan_by_ident(conn, ident); 132 - mutex_unlock(&conn->chan_lock); 133 - 134 - return c; 135 121 } 136 122 137 123 static struct l2cap_chan *__l2cap_global_chan_by_addr(__le16 psm, bdaddr_t *src) ··· 224 232 release_sock(sk); 225 233 } 226 234 235 + /* ---- L2CAP sequence number lists ---- */ 236 + 237 + /* For ERTM, ordered lists of sequence numbers must be tracked for 238 + * SREJ requests that are received and for frames that are to be 239 + * retransmitted. These seq_list functions implement a singly-linked 240 + * list in an array, where membership in the list can also be checked 241 + * in constant time. Items can also be added to the tail of the list 242 + * and removed from the head in constant time, without further memory 243 + * allocs or frees. 244 + */ 245 + 246 + static int l2cap_seq_list_init(struct l2cap_seq_list *seq_list, u16 size) 247 + { 248 + size_t alloc_size, i; 249 + 250 + /* Allocated size is a power of 2 to map sequence numbers 251 + * (which may be up to 14 bits) in to a smaller array that is 252 + * sized for the negotiated ERTM transmit windows. 253 + */ 254 + alloc_size = roundup_pow_of_two(size); 255 + 256 + seq_list->list = kmalloc(sizeof(u16) * alloc_size, GFP_KERNEL); 257 + if (!seq_list->list) 258 + return -ENOMEM; 259 + 260 + seq_list->mask = alloc_size - 1; 261 + seq_list->head = L2CAP_SEQ_LIST_CLEAR; 262 + seq_list->tail = L2CAP_SEQ_LIST_CLEAR; 263 + for (i = 0; i < alloc_size; i++) 264 + seq_list->list[i] = L2CAP_SEQ_LIST_CLEAR; 265 + 266 + return 0; 267 + } 268 + 269 + static inline void l2cap_seq_list_free(struct l2cap_seq_list *seq_list) 270 + { 271 + kfree(seq_list->list); 272 + } 273 + 274 + static inline bool l2cap_seq_list_contains(struct l2cap_seq_list *seq_list, 275 + u16 seq) 276 + { 277 + /* Constant-time check for list membership */ 278 + return seq_list->list[seq & seq_list->mask] != L2CAP_SEQ_LIST_CLEAR; 279 + } 280 + 281 + static u16 l2cap_seq_list_remove(struct l2cap_seq_list *seq_list, u16 seq) 282 + { 283 + u16 mask = seq_list->mask; 284 + 285 + if (seq_list->head == L2CAP_SEQ_LIST_CLEAR) { 286 + /* In case someone tries to pop the head of an empty list */ 287 + return L2CAP_SEQ_LIST_CLEAR; 288 + } else if (seq_list->head == seq) { 289 + /* Head can be removed in constant time */ 290 + seq_list->head = seq_list->list[seq & mask]; 291 + seq_list->list[seq & mask] = L2CAP_SEQ_LIST_CLEAR; 292 + 293 + if (seq_list->head == L2CAP_SEQ_LIST_TAIL) { 294 + seq_list->head = L2CAP_SEQ_LIST_CLEAR; 295 + seq_list->tail = L2CAP_SEQ_LIST_CLEAR; 296 + } 297 + } else { 298 + /* Walk the list to find the sequence number */ 299 + u16 prev = seq_list->head; 300 + while (seq_list->list[prev & mask] != seq) { 301 + prev = seq_list->list[prev & mask]; 302 + if (prev == L2CAP_SEQ_LIST_TAIL) 303 + return L2CAP_SEQ_LIST_CLEAR; 304 + } 305 + 306 + /* Unlink the number from the list and clear it */ 307 + seq_list->list[prev & mask] = seq_list->list[seq & mask]; 308 + seq_list->list[seq & mask] = L2CAP_SEQ_LIST_CLEAR; 309 + if (seq_list->tail == seq) 310 + seq_list->tail = prev; 311 + } 312 + return seq; 313 + } 314 + 315 + static inline u16 l2cap_seq_list_pop(struct l2cap_seq_list *seq_list) 316 + { 317 + /* Remove the head in constant time */ 318 + return l2cap_seq_list_remove(seq_list, seq_list->head); 319 + } 320 + 321 + static void l2cap_seq_list_clear(struct l2cap_seq_list *seq_list) 322 + { 323 + u16 i; 324 + 325 + if (seq_list->head == L2CAP_SEQ_LIST_CLEAR) 326 + return; 327 + 328 + for (i = 0; i <= seq_list->mask; i++) 329 + seq_list->list[i] = L2CAP_SEQ_LIST_CLEAR; 330 + 331 + seq_list->head = L2CAP_SEQ_LIST_CLEAR; 332 + seq_list->tail = L2CAP_SEQ_LIST_CLEAR; 333 + } 334 + 335 + static void l2cap_seq_list_append(struct l2cap_seq_list *seq_list, u16 seq) 336 + { 337 + u16 mask = seq_list->mask; 338 + 339 + /* All appends happen in constant time */ 340 + 341 + if (seq_list->list[seq & mask] != L2CAP_SEQ_LIST_CLEAR) 342 + return; 343 + 344 + if (seq_list->tail == L2CAP_SEQ_LIST_CLEAR) 345 + seq_list->head = seq; 346 + else 347 + seq_list->list[seq_list->tail & mask] = seq; 348 + 349 + seq_list->tail = seq; 350 + seq_list->list[seq & mask] = L2CAP_SEQ_LIST_TAIL; 351 + } 352 + 227 353 static void l2cap_chan_timeout(struct work_struct *work) 228 354 { 229 355 struct l2cap_chan *chan = container_of(work, struct l2cap_chan, ··· 372 262 l2cap_chan_put(chan); 373 263 } 374 264 375 - struct l2cap_chan *l2cap_chan_create(struct sock *sk) 265 + struct l2cap_chan *l2cap_chan_create(void) 376 266 { 377 267 struct l2cap_chan *chan; 378 268 ··· 381 271 return NULL; 382 272 383 273 mutex_init(&chan->lock); 384 - 385 - chan->sk = sk; 386 274 387 275 write_lock(&chan_list_lock); 388 276 list_add(&chan->global_l, &chan_list); ··· 392 284 393 285 atomic_set(&chan->refcnt, 1); 394 286 395 - BT_DBG("sk %p chan %p", sk, chan); 287 + BT_DBG("chan %p", chan); 396 288 397 289 return chan; 398 290 } ··· 406 298 l2cap_chan_put(chan); 407 299 } 408 300 409 - void __l2cap_chan_add(struct l2cap_conn *conn, struct l2cap_chan *chan) 301 + void l2cap_chan_set_defaults(struct l2cap_chan *chan) 302 + { 303 + chan->fcs = L2CAP_FCS_CRC16; 304 + chan->max_tx = L2CAP_DEFAULT_MAX_TX; 305 + chan->tx_win = L2CAP_DEFAULT_TX_WINDOW; 306 + chan->tx_win_max = L2CAP_DEFAULT_TX_WINDOW; 307 + chan->sec_level = BT_SECURITY_LOW; 308 + 309 + set_bit(FLAG_FORCE_ACTIVE, &chan->flags); 310 + } 311 + 312 + static void __l2cap_chan_add(struct l2cap_conn *conn, struct l2cap_chan *chan) 410 313 { 411 314 BT_DBG("conn %p, psm 0x%2.2x, dcid 0x%4.4x", conn, 412 - chan->psm, chan->dcid); 315 + __le16_to_cpu(chan->psm), chan->dcid); 413 316 414 317 conn->disc_reason = HCI_ERROR_REMOTE_USER_TERM; 415 318 ··· 466 347 list_add(&chan->list, &conn->chan_l); 467 348 } 468 349 469 - void l2cap_chan_add(struct l2cap_conn *conn, struct l2cap_chan *chan) 350 + static void l2cap_chan_add(struct l2cap_conn *conn, struct l2cap_chan *chan) 470 351 { 471 352 mutex_lock(&conn->chan_lock); 472 353 __l2cap_chan_add(conn, chan); ··· 524 405 525 406 skb_queue_purge(&chan->srej_q); 526 407 408 + l2cap_seq_list_free(&chan->srej_list); 409 + l2cap_seq_list_free(&chan->retrans_list); 527 410 list_for_each_entry_safe(l, tmp, &chan->srej_l, list) { 528 411 list_del(&l->list); 529 412 kfree(l); ··· 574 453 case BT_CONFIG: 575 454 if (chan->chan_type == L2CAP_CHAN_CONN_ORIENTED && 576 455 conn->hcon->type == ACL_LINK) { 577 - __clear_chan_timer(chan); 578 456 __set_chan_timer(chan, sk->sk_sndtimeo); 579 457 l2cap_send_disconn_req(conn, chan, reason); 580 458 } else ··· 586 466 struct l2cap_conn_rsp rsp; 587 467 __u16 result; 588 468 589 - if (bt_sk(sk)->defer_setup) 469 + if (test_bit(BT_SK_DEFER_SETUP, &bt_sk(sk)->flags)) 590 470 result = L2CAP_CR_SEC_BLOCK; 591 471 else 592 472 result = L2CAP_CR_BAD_PSM; ··· 719 599 hci_send_acl(chan->conn->hchan, skb, flags); 720 600 } 721 601 602 + static void __unpack_enhanced_control(u16 enh, struct l2cap_ctrl *control) 603 + { 604 + control->reqseq = (enh & L2CAP_CTRL_REQSEQ) >> L2CAP_CTRL_REQSEQ_SHIFT; 605 + control->final = (enh & L2CAP_CTRL_FINAL) >> L2CAP_CTRL_FINAL_SHIFT; 606 + 607 + if (enh & L2CAP_CTRL_FRAME_TYPE) { 608 + /* S-Frame */ 609 + control->sframe = 1; 610 + control->poll = (enh & L2CAP_CTRL_POLL) >> L2CAP_CTRL_POLL_SHIFT; 611 + control->super = (enh & L2CAP_CTRL_SUPERVISE) >> L2CAP_CTRL_SUPER_SHIFT; 612 + 613 + control->sar = 0; 614 + control->txseq = 0; 615 + } else { 616 + /* I-Frame */ 617 + control->sframe = 0; 618 + control->sar = (enh & L2CAP_CTRL_SAR) >> L2CAP_CTRL_SAR_SHIFT; 619 + control->txseq = (enh & L2CAP_CTRL_TXSEQ) >> L2CAP_CTRL_TXSEQ_SHIFT; 620 + 621 + control->poll = 0; 622 + control->super = 0; 623 + } 624 + } 625 + 626 + static void __unpack_extended_control(u32 ext, struct l2cap_ctrl *control) 627 + { 628 + control->reqseq = (ext & L2CAP_EXT_CTRL_REQSEQ) >> L2CAP_EXT_CTRL_REQSEQ_SHIFT; 629 + control->final = (ext & L2CAP_EXT_CTRL_FINAL) >> L2CAP_EXT_CTRL_FINAL_SHIFT; 630 + 631 + if (ext & L2CAP_EXT_CTRL_FRAME_TYPE) { 632 + /* S-Frame */ 633 + control->sframe = 1; 634 + control->poll = (ext & L2CAP_EXT_CTRL_POLL) >> L2CAP_EXT_CTRL_POLL_SHIFT; 635 + control->super = (ext & L2CAP_EXT_CTRL_SUPERVISE) >> L2CAP_EXT_CTRL_SUPER_SHIFT; 636 + 637 + control->sar = 0; 638 + control->txseq = 0; 639 + } else { 640 + /* I-Frame */ 641 + control->sframe = 0; 642 + control->sar = (ext & L2CAP_EXT_CTRL_SAR) >> L2CAP_EXT_CTRL_SAR_SHIFT; 643 + control->txseq = (ext & L2CAP_EXT_CTRL_TXSEQ) >> L2CAP_EXT_CTRL_TXSEQ_SHIFT; 644 + 645 + control->poll = 0; 646 + control->super = 0; 647 + } 648 + } 649 + 650 + static inline void __unpack_control(struct l2cap_chan *chan, 651 + struct sk_buff *skb) 652 + { 653 + if (test_bit(FLAG_EXT_CTRL, &chan->flags)) { 654 + __unpack_extended_control(get_unaligned_le32(skb->data), 655 + &bt_cb(skb)->control); 656 + } else { 657 + __unpack_enhanced_control(get_unaligned_le16(skb->data), 658 + &bt_cb(skb)->control); 659 + } 660 + } 661 + 662 + static u32 __pack_extended_control(struct l2cap_ctrl *control) 663 + { 664 + u32 packed; 665 + 666 + packed = control->reqseq << L2CAP_EXT_CTRL_REQSEQ_SHIFT; 667 + packed |= control->final << L2CAP_EXT_CTRL_FINAL_SHIFT; 668 + 669 + if (control->sframe) { 670 + packed |= control->poll << L2CAP_EXT_CTRL_POLL_SHIFT; 671 + packed |= control->super << L2CAP_EXT_CTRL_SUPER_SHIFT; 672 + packed |= L2CAP_EXT_CTRL_FRAME_TYPE; 673 + } else { 674 + packed |= control->sar << L2CAP_EXT_CTRL_SAR_SHIFT; 675 + packed |= control->txseq << L2CAP_EXT_CTRL_TXSEQ_SHIFT; 676 + } 677 + 678 + return packed; 679 + } 680 + 681 + static u16 __pack_enhanced_control(struct l2cap_ctrl *control) 682 + { 683 + u16 packed; 684 + 685 + packed = control->reqseq << L2CAP_CTRL_REQSEQ_SHIFT; 686 + packed |= control->final << L2CAP_CTRL_FINAL_SHIFT; 687 + 688 + if (control->sframe) { 689 + packed |= control->poll << L2CAP_CTRL_POLL_SHIFT; 690 + packed |= control->super << L2CAP_CTRL_SUPER_SHIFT; 691 + packed |= L2CAP_CTRL_FRAME_TYPE; 692 + } else { 693 + packed |= control->sar << L2CAP_CTRL_SAR_SHIFT; 694 + packed |= control->txseq << L2CAP_CTRL_TXSEQ_SHIFT; 695 + } 696 + 697 + return packed; 698 + } 699 + 700 + static inline void __pack_control(struct l2cap_chan *chan, 701 + struct l2cap_ctrl *control, 702 + struct sk_buff *skb) 703 + { 704 + if (test_bit(FLAG_EXT_CTRL, &chan->flags)) { 705 + put_unaligned_le32(__pack_extended_control(control), 706 + skb->data + L2CAP_HDR_SIZE); 707 + } else { 708 + put_unaligned_le16(__pack_enhanced_control(control), 709 + skb->data + L2CAP_HDR_SIZE); 710 + } 711 + } 712 + 722 713 static inline void l2cap_send_sframe(struct l2cap_chan *chan, u32 control) 723 714 { 724 715 struct sk_buff *skb; ··· 912 681 l2cap_send_cmd(conn, chan->ident, L2CAP_CONN_REQ, sizeof(req), &req); 913 682 } 914 683 684 + static void l2cap_chan_ready(struct l2cap_chan *chan) 685 + { 686 + struct sock *sk = chan->sk; 687 + struct sock *parent; 688 + 689 + lock_sock(sk); 690 + 691 + parent = bt_sk(sk)->parent; 692 + 693 + BT_DBG("sk %p, parent %p", sk, parent); 694 + 695 + chan->conf_state = 0; 696 + __clear_chan_timer(chan); 697 + 698 + __l2cap_state_change(chan, BT_CONNECTED); 699 + sk->sk_state_change(sk); 700 + 701 + if (parent) 702 + parent->sk_data_ready(parent, 0); 703 + 704 + release_sock(sk); 705 + } 706 + 915 707 static void l2cap_do_start(struct l2cap_chan *chan) 916 708 { 917 709 struct l2cap_conn *conn = chan->conn; 710 + 711 + if (conn->hcon->type == LE_LINK) { 712 + l2cap_chan_ready(chan); 713 + return; 714 + } 918 715 919 716 if (conn->info_state & L2CAP_INFO_FEAT_MASK_REQ_SENT) { 920 717 if (!(conn->info_state & L2CAP_INFO_FEAT_MASK_REQ_DONE)) ··· 1050 791 1051 792 if (l2cap_chan_check_security(chan)) { 1052 793 lock_sock(sk); 1053 - if (bt_sk(sk)->defer_setup) { 794 + if (test_bit(BT_SK_DEFER_SETUP, 795 + &bt_sk(sk)->flags)) { 1054 796 struct sock *parent = bt_sk(sk)->parent; 1055 797 rsp.result = cpu_to_le16(L2CAP_CR_PEND); 1056 798 rsp.status = cpu_to_le16(L2CAP_CS_AUTHOR_PEND); ··· 1090 830 mutex_unlock(&conn->chan_lock); 1091 831 } 1092 832 1093 - /* Find socket with cid and source bdaddr. 833 + /* Find socket with cid and source/destination bdaddr. 1094 834 * Returns closest match, locked. 1095 835 */ 1096 - static struct l2cap_chan *l2cap_global_chan_by_scid(int state, __le16 cid, bdaddr_t *src) 836 + static struct l2cap_chan *l2cap_global_chan_by_scid(int state, u16 cid, 837 + bdaddr_t *src, 838 + bdaddr_t *dst) 1097 839 { 1098 840 struct l2cap_chan *c, *c1 = NULL; 1099 841 ··· 1108 846 continue; 1109 847 1110 848 if (c->scid == cid) { 849 + int src_match, dst_match; 850 + int src_any, dst_any; 851 + 1111 852 /* Exact match. */ 1112 - if (!bacmp(&bt_sk(sk)->src, src)) { 853 + src_match = !bacmp(&bt_sk(sk)->src, src); 854 + dst_match = !bacmp(&bt_sk(sk)->dst, dst); 855 + if (src_match && dst_match) { 1113 856 read_unlock(&chan_list_lock); 1114 857 return c; 1115 858 } 1116 859 1117 860 /* Closest match */ 1118 - if (!bacmp(&bt_sk(sk)->src, BDADDR_ANY)) 861 + src_any = !bacmp(&bt_sk(sk)->src, BDADDR_ANY); 862 + dst_any = !bacmp(&bt_sk(sk)->dst, BDADDR_ANY); 863 + if ((src_match && dst_any) || (src_any && dst_match) || 864 + (src_any && dst_any)) 1119 865 c1 = c; 1120 866 } 1121 867 } ··· 1142 872 1143 873 /* Check if we have socket listening on cid */ 1144 874 pchan = l2cap_global_chan_by_scid(BT_LISTEN, L2CAP_CID_LE_DATA, 1145 - conn->src); 875 + conn->src, conn->dst); 1146 876 if (!pchan) 1147 877 return; 1148 878 ··· 1178 908 1179 909 clean: 1180 910 release_sock(parent); 1181 - } 1182 - 1183 - static void l2cap_chan_ready(struct l2cap_chan *chan) 1184 - { 1185 - struct sock *sk = chan->sk; 1186 - struct sock *parent; 1187 - 1188 - lock_sock(sk); 1189 - 1190 - parent = bt_sk(sk)->parent; 1191 - 1192 - BT_DBG("sk %p, parent %p", sk, parent); 1193 - 1194 - chan->conf_state = 0; 1195 - __clear_chan_timer(chan); 1196 - 1197 - __l2cap_state_change(chan, BT_CONNECTED); 1198 - sk->sk_state_change(sk); 1199 - 1200 - if (parent) 1201 - parent->sk_data_ready(parent, 0); 1202 - 1203 - release_sock(sk); 1204 911 } 1205 912 1206 913 static void l2cap_conn_ready(struct l2cap_conn *conn) ··· 1263 1016 1264 1017 /* Kill channels */ 1265 1018 list_for_each_entry_safe(chan, l, &conn->chan_l, list) { 1019 + l2cap_chan_hold(chan); 1266 1020 l2cap_chan_lock(chan); 1267 1021 1268 1022 l2cap_chan_del(chan, err); ··· 1271 1023 l2cap_chan_unlock(chan); 1272 1024 1273 1025 chan->ops->close(chan->data); 1026 + l2cap_chan_put(chan); 1274 1027 } 1275 1028 1276 1029 mutex_unlock(&conn->chan_lock); ··· 1349 1100 1350 1101 /* ---- Socket interface ---- */ 1351 1102 1352 - /* Find socket with psm and source bdaddr. 1103 + /* Find socket with psm and source / destination bdaddr. 1353 1104 * Returns closest match. 1354 1105 */ 1355 - static struct l2cap_chan *l2cap_global_chan_by_psm(int state, __le16 psm, bdaddr_t *src) 1106 + static struct l2cap_chan *l2cap_global_chan_by_psm(int state, __le16 psm, 1107 + bdaddr_t *src, 1108 + bdaddr_t *dst) 1356 1109 { 1357 1110 struct l2cap_chan *c, *c1 = NULL; 1358 1111 ··· 1367 1116 continue; 1368 1117 1369 1118 if (c->psm == psm) { 1119 + int src_match, dst_match; 1120 + int src_any, dst_any; 1121 + 1370 1122 /* Exact match. */ 1371 - if (!bacmp(&bt_sk(sk)->src, src)) { 1123 + src_match = !bacmp(&bt_sk(sk)->src, src); 1124 + dst_match = !bacmp(&bt_sk(sk)->dst, dst); 1125 + if (src_match && dst_match) { 1372 1126 read_unlock(&chan_list_lock); 1373 1127 return c; 1374 1128 } 1375 1129 1376 1130 /* Closest match */ 1377 - if (!bacmp(&bt_sk(sk)->src, BDADDR_ANY)) 1131 + src_any = !bacmp(&bt_sk(sk)->src, BDADDR_ANY); 1132 + dst_any = !bacmp(&bt_sk(sk)->dst, BDADDR_ANY); 1133 + if ((src_match && dst_any) || (src_any && dst_match) || 1134 + (src_any && dst_any)) 1378 1135 c1 = c; 1379 1136 } 1380 1137 } ··· 1392 1133 return c1; 1393 1134 } 1394 1135 1395 - int l2cap_chan_connect(struct l2cap_chan *chan, __le16 psm, u16 cid, bdaddr_t *dst) 1136 + int l2cap_chan_connect(struct l2cap_chan *chan, __le16 psm, u16 cid, 1137 + bdaddr_t *dst, u8 dst_type) 1396 1138 { 1397 1139 struct sock *sk = chan->sk; 1398 1140 bdaddr_t *src = &bt_sk(sk)->src; ··· 1403 1143 __u8 auth_type; 1404 1144 int err; 1405 1145 1406 - BT_DBG("%s -> %s psm 0x%2.2x", batostr(src), batostr(dst), 1407 - chan->psm); 1146 + BT_DBG("%s -> %s (type %u) psm 0x%2.2x", batostr(src), batostr(dst), 1147 + dst_type, __le16_to_cpu(chan->psm)); 1408 1148 1409 1149 hdev = hci_get_route(dst, src); 1410 1150 if (!hdev) ··· 1478 1218 auth_type = l2cap_get_auth_type(chan); 1479 1219 1480 1220 if (chan->dcid == L2CAP_CID_LE_DATA) 1481 - hcon = hci_connect(hdev, LE_LINK, dst, 1482 - chan->sec_level, auth_type); 1221 + hcon = hci_connect(hdev, LE_LINK, dst, dst_type, 1222 + chan->sec_level, auth_type); 1483 1223 else 1484 - hcon = hci_connect(hdev, ACL_LINK, dst, 1485 - chan->sec_level, auth_type); 1224 + hcon = hci_connect(hdev, ACL_LINK, dst, dst_type, 1225 + chan->sec_level, auth_type); 1486 1226 1487 1227 if (IS_ERR(hcon)) { 1488 1228 err = PTR_ERR(hcon); ··· 1494 1234 hci_conn_put(hcon); 1495 1235 err = -ENOMEM; 1496 1236 goto done; 1237 + } 1238 + 1239 + if (hcon->type == LE_LINK) { 1240 + err = 0; 1241 + 1242 + if (!list_empty(&conn->chan_l)) { 1243 + err = -EBUSY; 1244 + hci_conn_put(hcon); 1245 + } 1246 + 1247 + if (err) 1248 + goto done; 1497 1249 } 1498 1250 1499 1251 /* Update source addr of the socket */ ··· 1618 1346 1619 1347 while ((skb = skb_peek(&chan->tx_q)) && 1620 1348 chan->unacked_frames) { 1621 - if (bt_cb(skb)->tx_seq == chan->expected_ack_seq) 1349 + if (bt_cb(skb)->control.txseq == chan->expected_ack_seq) 1622 1350 break; 1623 1351 1624 1352 skb = skb_dequeue(&chan->tx_q); ··· 1640 1368 while ((skb = skb_dequeue(&chan->tx_q))) { 1641 1369 control = __get_control(chan, skb->data + L2CAP_HDR_SIZE); 1642 1370 control |= __set_txseq(chan, chan->next_tx_seq); 1371 + control |= __set_ctrl_sar(chan, bt_cb(skb)->control.sar); 1643 1372 __put_control(chan, control, skb->data + L2CAP_HDR_SIZE); 1644 1373 1645 1374 if (chan->fcs == L2CAP_FCS_CRC16) { ··· 1666 1393 if (!skb) 1667 1394 return; 1668 1395 1669 - while (bt_cb(skb)->tx_seq != tx_seq) { 1396 + while (bt_cb(skb)->control.txseq != tx_seq) { 1670 1397 if (skb_queue_is_last(&chan->tx_q, skb)) 1671 1398 return; 1672 1399 1673 1400 skb = skb_queue_next(&chan->tx_q, skb); 1674 1401 } 1675 1402 1676 - if (chan->remote_max_tx && 1677 - bt_cb(skb)->retries == chan->remote_max_tx) { 1403 + if (bt_cb(skb)->control.retries == chan->remote_max_tx && 1404 + chan->remote_max_tx) { 1678 1405 l2cap_send_disconn_req(chan->conn, chan, ECONNABORTED); 1679 1406 return; 1680 1407 } 1681 1408 1682 1409 tx_skb = skb_clone(skb, GFP_ATOMIC); 1683 - bt_cb(skb)->retries++; 1410 + bt_cb(skb)->control.retries++; 1684 1411 1685 1412 control = __get_control(chan, tx_skb->data + L2CAP_HDR_SIZE); 1686 1413 control &= __get_sar_mask(chan); ··· 1713 1440 if (chan->state != BT_CONNECTED) 1714 1441 return -ENOTCONN; 1715 1442 1443 + if (test_bit(CONN_REMOTE_BUSY, &chan->conn_state)) 1444 + return 0; 1445 + 1716 1446 while ((skb = chan->tx_send_head) && (!l2cap_tx_window_full(chan))) { 1717 1447 1718 - if (chan->remote_max_tx && 1719 - bt_cb(skb)->retries == chan->remote_max_tx) { 1448 + if (bt_cb(skb)->control.retries == chan->remote_max_tx && 1449 + chan->remote_max_tx) { 1720 1450 l2cap_send_disconn_req(chan->conn, chan, ECONNABORTED); 1721 1451 break; 1722 1452 } 1723 1453 1724 1454 tx_skb = skb_clone(skb, GFP_ATOMIC); 1725 1455 1726 - bt_cb(skb)->retries++; 1456 + bt_cb(skb)->control.retries++; 1727 1457 1728 1458 control = __get_control(chan, tx_skb->data + L2CAP_HDR_SIZE); 1729 1459 control &= __get_sar_mask(chan); ··· 1736 1460 1737 1461 control |= __set_reqseq(chan, chan->buffer_seq); 1738 1462 control |= __set_txseq(chan, chan->next_tx_seq); 1463 + control |= __set_ctrl_sar(chan, bt_cb(skb)->control.sar); 1739 1464 1740 1465 __put_control(chan, control, tx_skb->data + L2CAP_HDR_SIZE); 1741 1466 ··· 1751 1474 1752 1475 __set_retrans_timer(chan); 1753 1476 1754 - bt_cb(skb)->tx_seq = chan->next_tx_seq; 1477 + bt_cb(skb)->control.txseq = chan->next_tx_seq; 1755 1478 1756 1479 chan->next_tx_seq = __next_seq(chan, chan->next_tx_seq); 1757 1480 1758 - if (bt_cb(skb)->retries == 1) { 1481 + if (bt_cb(skb)->control.retries == 1) { 1759 1482 chan->unacked_frames++; 1760 1483 1761 1484 if (!nsent++) ··· 1831 1554 { 1832 1555 struct l2cap_conn *conn = chan->conn; 1833 1556 struct sk_buff **frag; 1834 - int err, sent = 0; 1557 + int sent = 0; 1835 1558 1836 1559 if (memcpy_fromiovec(skb_put(skb, count), msg->msg_iov, count)) 1837 1560 return -EFAULT; ··· 1842 1565 /* Continuation fragments (no L2CAP header) */ 1843 1566 frag = &skb_shinfo(skb)->frag_list; 1844 1567 while (len) { 1568 + struct sk_buff *tmp; 1569 + 1845 1570 count = min_t(unsigned int, conn->mtu, len); 1846 1571 1847 - *frag = chan->ops->alloc_skb(chan, count, 1848 - msg->msg_flags & MSG_DONTWAIT, 1849 - &err); 1572 + tmp = chan->ops->alloc_skb(chan, count, 1573 + msg->msg_flags & MSG_DONTWAIT); 1574 + if (IS_ERR(tmp)) 1575 + return PTR_ERR(tmp); 1850 1576 1851 - if (!*frag) 1852 - return err; 1577 + *frag = tmp; 1578 + 1853 1579 if (memcpy_fromiovec(skb_put(*frag, count), msg->msg_iov, count)) 1854 1580 return -EFAULT; 1855 1581 ··· 1860 1580 1861 1581 sent += count; 1862 1582 len -= count; 1583 + 1584 + skb->len += (*frag)->len; 1585 + skb->data_len += (*frag)->len; 1863 1586 1864 1587 frag = &(*frag)->next; 1865 1588 } ··· 1884 1601 count = min_t(unsigned int, (conn->mtu - hlen), len); 1885 1602 1886 1603 skb = chan->ops->alloc_skb(chan, count + hlen, 1887 - msg->msg_flags & MSG_DONTWAIT, &err); 1888 - 1889 - if (!skb) 1890 - return ERR_PTR(err); 1604 + msg->msg_flags & MSG_DONTWAIT); 1605 + if (IS_ERR(skb)) 1606 + return skb; 1891 1607 1892 1608 skb->priority = priority; 1893 1609 1894 1610 /* Create L2CAP header */ 1895 1611 lh = (struct l2cap_hdr *) skb_put(skb, L2CAP_HDR_SIZE); 1896 1612 lh->cid = cpu_to_le16(chan->dcid); 1897 - lh->len = cpu_to_le16(len + (hlen - L2CAP_HDR_SIZE)); 1898 - put_unaligned_le16(chan->psm, skb_put(skb, 2)); 1613 + lh->len = cpu_to_le16(len + L2CAP_PSMLEN_SIZE); 1614 + put_unaligned(chan->psm, skb_put(skb, L2CAP_PSMLEN_SIZE)); 1899 1615 1900 1616 err = l2cap_skbuff_fromiovec(chan, msg, len, count, skb); 1901 1617 if (unlikely(err < 0)) { ··· 1910 1628 { 1911 1629 struct l2cap_conn *conn = chan->conn; 1912 1630 struct sk_buff *skb; 1913 - int err, count, hlen = L2CAP_HDR_SIZE; 1631 + int err, count; 1914 1632 struct l2cap_hdr *lh; 1915 1633 1916 1634 BT_DBG("chan %p len %d", chan, (int)len); 1917 1635 1918 - count = min_t(unsigned int, (conn->mtu - hlen), len); 1636 + count = min_t(unsigned int, (conn->mtu - L2CAP_HDR_SIZE), len); 1919 1637 1920 - skb = chan->ops->alloc_skb(chan, count + hlen, 1921 - msg->msg_flags & MSG_DONTWAIT, &err); 1922 - 1923 - if (!skb) 1924 - return ERR_PTR(err); 1638 + skb = chan->ops->alloc_skb(chan, count + L2CAP_HDR_SIZE, 1639 + msg->msg_flags & MSG_DONTWAIT); 1640 + if (IS_ERR(skb)) 1641 + return skb; 1925 1642 1926 1643 skb->priority = priority; 1927 1644 1928 1645 /* Create L2CAP header */ 1929 1646 lh = (struct l2cap_hdr *) skb_put(skb, L2CAP_HDR_SIZE); 1930 1647 lh->cid = cpu_to_le16(chan->dcid); 1931 - lh->len = cpu_to_le16(len + (hlen - L2CAP_HDR_SIZE)); 1648 + lh->len = cpu_to_le16(len); 1932 1649 1933 1650 err = l2cap_skbuff_fromiovec(chan, msg, len, count, skb); 1934 1651 if (unlikely(err < 0)) { ··· 1939 1658 1940 1659 static struct sk_buff *l2cap_create_iframe_pdu(struct l2cap_chan *chan, 1941 1660 struct msghdr *msg, size_t len, 1942 - u32 control, u16 sdulen) 1661 + u16 sdulen) 1943 1662 { 1944 1663 struct l2cap_conn *conn = chan->conn; 1945 1664 struct sk_buff *skb; ··· 1965 1684 count = min_t(unsigned int, (conn->mtu - hlen), len); 1966 1685 1967 1686 skb = chan->ops->alloc_skb(chan, count + hlen, 1968 - msg->msg_flags & MSG_DONTWAIT, &err); 1969 - 1970 - if (!skb) 1971 - return ERR_PTR(err); 1687 + msg->msg_flags & MSG_DONTWAIT); 1688 + if (IS_ERR(skb)) 1689 + return skb; 1972 1690 1973 1691 /* Create L2CAP header */ 1974 1692 lh = (struct l2cap_hdr *) skb_put(skb, L2CAP_HDR_SIZE); 1975 1693 lh->cid = cpu_to_le16(chan->dcid); 1976 1694 lh->len = cpu_to_le16(len + (hlen - L2CAP_HDR_SIZE)); 1977 1695 1978 - __put_control(chan, control, skb_put(skb, __ctrl_size(chan))); 1696 + __put_control(chan, 0, skb_put(skb, __ctrl_size(chan))); 1979 1697 1980 1698 if (sdulen) 1981 1699 put_unaligned_le16(sdulen, skb_put(skb, L2CAP_SDULEN_SIZE)); ··· 1988 1708 if (chan->fcs == L2CAP_FCS_CRC16) 1989 1709 put_unaligned_le16(0, skb_put(skb, L2CAP_FCS_SIZE)); 1990 1710 1991 - bt_cb(skb)->retries = 0; 1711 + bt_cb(skb)->control.retries = 0; 1992 1712 return skb; 1993 1713 } 1994 1714 1995 - static int l2cap_sar_segment_sdu(struct l2cap_chan *chan, struct msghdr *msg, size_t len) 1715 + static int l2cap_segment_sdu(struct l2cap_chan *chan, 1716 + struct sk_buff_head *seg_queue, 1717 + struct msghdr *msg, size_t len) 1996 1718 { 1997 1719 struct sk_buff *skb; 1998 - struct sk_buff_head sar_queue; 1999 - u32 control; 2000 - size_t size = 0; 1720 + u16 sdu_len; 1721 + size_t pdu_len; 1722 + int err = 0; 1723 + u8 sar; 2001 1724 2002 - skb_queue_head_init(&sar_queue); 2003 - control = __set_ctrl_sar(chan, L2CAP_SAR_START); 2004 - skb = l2cap_create_iframe_pdu(chan, msg, chan->remote_mps, control, len); 2005 - if (IS_ERR(skb)) 2006 - return PTR_ERR(skb); 1725 + BT_DBG("chan %p, msg %p, len %d", chan, msg, (int)len); 2007 1726 2008 - __skb_queue_tail(&sar_queue, skb); 2009 - len -= chan->remote_mps; 2010 - size += chan->remote_mps; 1727 + /* It is critical that ERTM PDUs fit in a single HCI fragment, 1728 + * so fragmented skbs are not used. The HCI layer's handling 1729 + * of fragmented skbs is not compatible with ERTM's queueing. 1730 + */ 1731 + 1732 + /* PDU size is derived from the HCI MTU */ 1733 + pdu_len = chan->conn->mtu; 1734 + 1735 + pdu_len = min_t(size_t, pdu_len, L2CAP_BREDR_MAX_PAYLOAD); 1736 + 1737 + /* Adjust for largest possible L2CAP overhead. */ 1738 + pdu_len -= L2CAP_EXT_HDR_SIZE + L2CAP_FCS_SIZE; 1739 + 1740 + /* Remote device may have requested smaller PDUs */ 1741 + pdu_len = min_t(size_t, pdu_len, chan->remote_mps); 1742 + 1743 + if (len <= pdu_len) { 1744 + sar = L2CAP_SAR_UNSEGMENTED; 1745 + sdu_len = 0; 1746 + pdu_len = len; 1747 + } else { 1748 + sar = L2CAP_SAR_START; 1749 + sdu_len = len; 1750 + pdu_len -= L2CAP_SDULEN_SIZE; 1751 + } 2011 1752 2012 1753 while (len > 0) { 2013 - size_t buflen; 1754 + skb = l2cap_create_iframe_pdu(chan, msg, pdu_len, sdu_len); 2014 1755 2015 - if (len > chan->remote_mps) { 2016 - control = __set_ctrl_sar(chan, L2CAP_SAR_CONTINUE); 2017 - buflen = chan->remote_mps; 2018 - } else { 2019 - control = __set_ctrl_sar(chan, L2CAP_SAR_END); 2020 - buflen = len; 2021 - } 2022 - 2023 - skb = l2cap_create_iframe_pdu(chan, msg, buflen, control, 0); 2024 1756 if (IS_ERR(skb)) { 2025 - skb_queue_purge(&sar_queue); 1757 + __skb_queue_purge(seg_queue); 2026 1758 return PTR_ERR(skb); 2027 1759 } 2028 1760 2029 - __skb_queue_tail(&sar_queue, skb); 2030 - len -= buflen; 2031 - size += buflen; 2032 - } 2033 - skb_queue_splice_tail(&sar_queue, &chan->tx_q); 2034 - if (chan->tx_send_head == NULL) 2035 - chan->tx_send_head = sar_queue.next; 1761 + bt_cb(skb)->control.sar = sar; 1762 + __skb_queue_tail(seg_queue, skb); 2036 1763 2037 - return size; 1764 + len -= pdu_len; 1765 + if (sdu_len) { 1766 + sdu_len = 0; 1767 + pdu_len += L2CAP_SDULEN_SIZE; 1768 + } 1769 + 1770 + if (len <= pdu_len) { 1771 + sar = L2CAP_SAR_END; 1772 + pdu_len = len; 1773 + } else { 1774 + sar = L2CAP_SAR_CONTINUE; 1775 + } 1776 + } 1777 + 1778 + return err; 2038 1779 } 2039 1780 2040 1781 int l2cap_chan_send(struct l2cap_chan *chan, struct msghdr *msg, size_t len, 2041 1782 u32 priority) 2042 1783 { 2043 1784 struct sk_buff *skb; 2044 - u32 control; 2045 1785 int err; 1786 + struct sk_buff_head seg_queue; 2046 1787 2047 1788 /* Connectionless channel */ 2048 1789 if (chan->chan_type == L2CAP_CHAN_CONN_LESS) { ··· 2092 1791 2093 1792 case L2CAP_MODE_ERTM: 2094 1793 case L2CAP_MODE_STREAMING: 2095 - /* Entire SDU fits into one PDU */ 2096 - if (len <= chan->remote_mps) { 2097 - control = __set_ctrl_sar(chan, L2CAP_SAR_UNSEGMENTED); 2098 - skb = l2cap_create_iframe_pdu(chan, msg, len, control, 2099 - 0); 2100 - if (IS_ERR(skb)) 2101 - return PTR_ERR(skb); 2102 - 2103 - __skb_queue_tail(&chan->tx_q, skb); 2104 - 2105 - if (chan->tx_send_head == NULL) 2106 - chan->tx_send_head = skb; 2107 - 2108 - } else { 2109 - /* Segment SDU into multiples PDUs */ 2110 - err = l2cap_sar_segment_sdu(chan, msg, len); 2111 - if (err < 0) 2112 - return err; 1794 + /* Check outgoing MTU */ 1795 + if (len > chan->omtu) { 1796 + err = -EMSGSIZE; 1797 + break; 2113 1798 } 2114 1799 2115 - if (chan->mode == L2CAP_MODE_STREAMING) { 1800 + __skb_queue_head_init(&seg_queue); 1801 + 1802 + /* Do segmentation before calling in to the state machine, 1803 + * since it's possible to block while waiting for memory 1804 + * allocation. 1805 + */ 1806 + err = l2cap_segment_sdu(chan, &seg_queue, msg, len); 1807 + 1808 + /* The channel could have been closed while segmenting, 1809 + * check that it is still connected. 1810 + */ 1811 + if (chan->state != BT_CONNECTED) { 1812 + __skb_queue_purge(&seg_queue); 1813 + err = -ENOTCONN; 1814 + } 1815 + 1816 + if (err) 1817 + break; 1818 + 1819 + if (chan->mode == L2CAP_MODE_ERTM && chan->tx_send_head == NULL) 1820 + chan->tx_send_head = seg_queue.next; 1821 + skb_queue_splice_tail_init(&seg_queue, &chan->tx_q); 1822 + 1823 + if (chan->mode == L2CAP_MODE_ERTM) 1824 + err = l2cap_ertm_send(chan); 1825 + else 2116 1826 l2cap_streaming_send(chan); 2117 - err = len; 2118 - break; 2119 - } 2120 1827 2121 - if (test_bit(CONN_REMOTE_BUSY, &chan->conn_state) && 2122 - test_bit(CONN_WAIT_F, &chan->conn_state)) { 2123 - err = len; 2124 - break; 2125 - } 2126 - 2127 - err = l2cap_ertm_send(chan); 2128 1828 if (err >= 0) 2129 1829 err = len; 2130 1830 1831 + /* If the skbs were not queued for sending, they'll still be in 1832 + * seg_queue and need to be purged. 1833 + */ 1834 + __skb_queue_purge(&seg_queue); 2131 1835 break; 2132 1836 2133 1837 default: ··· 2346 2040 l2cap_chan_put(chan); 2347 2041 } 2348 2042 2349 - static inline void l2cap_ertm_init(struct l2cap_chan *chan) 2043 + static inline int l2cap_ertm_init(struct l2cap_chan *chan) 2350 2044 { 2045 + int err; 2046 + 2047 + chan->next_tx_seq = 0; 2048 + chan->expected_tx_seq = 0; 2351 2049 chan->expected_ack_seq = 0; 2352 2050 chan->unacked_frames = 0; 2353 2051 chan->buffer_seq = 0; 2354 2052 chan->num_acked = 0; 2355 2053 chan->frames_sent = 0; 2054 + chan->last_acked_seq = 0; 2055 + chan->sdu = NULL; 2056 + chan->sdu_last_frag = NULL; 2057 + chan->sdu_len = 0; 2058 + 2059 + skb_queue_head_init(&chan->tx_q); 2060 + 2061 + if (chan->mode != L2CAP_MODE_ERTM) 2062 + return 0; 2063 + 2064 + chan->rx_state = L2CAP_RX_STATE_RECV; 2065 + chan->tx_state = L2CAP_TX_STATE_XMIT; 2356 2066 2357 2067 INIT_DELAYED_WORK(&chan->retrans_timer, l2cap_retrans_timeout); 2358 2068 INIT_DELAYED_WORK(&chan->monitor_timer, l2cap_monitor_timeout); ··· 2377 2055 skb_queue_head_init(&chan->srej_q); 2378 2056 2379 2057 INIT_LIST_HEAD(&chan->srej_l); 2058 + err = l2cap_seq_list_init(&chan->srej_list, chan->tx_win); 2059 + if (err < 0) 2060 + return err; 2061 + 2062 + return l2cap_seq_list_init(&chan->retrans_list, chan->remote_tx_win); 2380 2063 } 2381 2064 2382 2065 static inline __u8 l2cap_select_mode(__u8 mode, __u16 remote_feat_mask) ··· 2705 2378 chan->remote_mps = size; 2706 2379 2707 2380 rfc.retrans_timeout = 2708 - le16_to_cpu(L2CAP_DEFAULT_RETRANS_TO); 2381 + __constant_cpu_to_le16(L2CAP_DEFAULT_RETRANS_TO); 2709 2382 rfc.monitor_timeout = 2710 - le16_to_cpu(L2CAP_DEFAULT_MONITOR_TO); 2383 + __constant_cpu_to_le16(L2CAP_DEFAULT_MONITOR_TO); 2711 2384 2712 2385 set_bit(CONF_MODE_DONE, &chan->conf_state); 2713 2386 ··· 2971 2644 u16 dcid = 0, scid = __le16_to_cpu(req->scid); 2972 2645 __le16 psm = req->psm; 2973 2646 2974 - BT_DBG("psm 0x%2.2x scid 0x%4.4x", psm, scid); 2647 + BT_DBG("psm 0x%2.2x scid 0x%4.4x", __le16_to_cpu(psm), scid); 2975 2648 2976 2649 /* Check if we have socket listening on psm */ 2977 - pchan = l2cap_global_chan_by_psm(BT_LISTEN, psm, conn->src); 2650 + pchan = l2cap_global_chan_by_psm(BT_LISTEN, psm, conn->src, conn->dst); 2978 2651 if (!pchan) { 2979 2652 result = L2CAP_CR_BAD_PSM; 2980 2653 goto sendresp; ··· 3033 2706 3034 2707 if (conn->info_state & L2CAP_INFO_FEAT_MASK_REQ_DONE) { 3035 2708 if (l2cap_chan_check_security(chan)) { 3036 - if (bt_sk(sk)->defer_setup) { 2709 + if (test_bit(BT_SK_DEFER_SETUP, &bt_sk(sk)->flags)) { 3037 2710 __l2cap_state_change(chan, BT_CONNECT2); 3038 2711 result = L2CAP_CR_PEND; 3039 2712 status = L2CAP_CS_AUTHOR_PEND; ··· 3175 2848 u16 dcid, flags; 3176 2849 u8 rsp[64]; 3177 2850 struct l2cap_chan *chan; 3178 - int len; 2851 + int len, err = 0; 3179 2852 3180 2853 dcid = __le16_to_cpu(req->dcid); 3181 2854 flags = __le16_to_cpu(req->flags); ··· 3185 2858 chan = l2cap_get_chan_by_scid(conn, dcid); 3186 2859 if (!chan) 3187 2860 return -ENOENT; 3188 - 3189 - l2cap_chan_lock(chan); 3190 2861 3191 2862 if (chan->state != BT_CONFIG && chan->state != BT_CONNECT2) { 3192 2863 struct l2cap_cmd_rej_cid rej; ··· 3240 2915 3241 2916 l2cap_state_change(chan, BT_CONNECTED); 3242 2917 3243 - chan->next_tx_seq = 0; 3244 - chan->expected_tx_seq = 0; 3245 - skb_queue_head_init(&chan->tx_q); 3246 - if (chan->mode == L2CAP_MODE_ERTM) 3247 - l2cap_ertm_init(chan); 2918 + if (chan->mode == L2CAP_MODE_ERTM || 2919 + chan->mode == L2CAP_MODE_STREAMING) 2920 + err = l2cap_ertm_init(chan); 3248 2921 3249 - l2cap_chan_ready(chan); 2922 + if (err < 0) 2923 + l2cap_send_disconn_req(chan->conn, chan, -err); 2924 + else 2925 + l2cap_chan_ready(chan); 2926 + 3250 2927 goto unlock; 3251 2928 } 3252 2929 ··· 3276 2949 3277 2950 unlock: 3278 2951 l2cap_chan_unlock(chan); 3279 - return 0; 2952 + return err; 3280 2953 } 3281 2954 3282 2955 static inline int l2cap_config_rsp(struct l2cap_conn *conn, struct l2cap_cmd_hdr *cmd, u8 *data) ··· 3284 2957 struct l2cap_conf_rsp *rsp = (struct l2cap_conf_rsp *)data; 3285 2958 u16 scid, flags, result; 3286 2959 struct l2cap_chan *chan; 3287 - int len = cmd->len - sizeof(*rsp); 2960 + int len = le16_to_cpu(cmd->len) - sizeof(*rsp); 2961 + int err = 0; 3288 2962 3289 2963 scid = __le16_to_cpu(rsp->scid); 3290 2964 flags = __le16_to_cpu(rsp->flags); 3291 2965 result = __le16_to_cpu(rsp->result); 3292 2966 3293 - BT_DBG("scid 0x%4.4x flags 0x%2.2x result 0x%2.2x", 3294 - scid, flags, result); 2967 + BT_DBG("scid 0x%4.4x flags 0x%2.2x result 0x%2.2x len %d", scid, flags, 2968 + result, len); 3295 2969 3296 2970 chan = l2cap_get_chan_by_scid(conn, scid); 3297 2971 if (!chan) 3298 2972 return 0; 3299 - 3300 - l2cap_chan_lock(chan); 3301 2973 3302 2974 switch (result) { 3303 2975 case L2CAP_CONF_SUCCESS: ··· 3371 3045 set_default_fcs(chan); 3372 3046 3373 3047 l2cap_state_change(chan, BT_CONNECTED); 3374 - chan->next_tx_seq = 0; 3375 - chan->expected_tx_seq = 0; 3376 - skb_queue_head_init(&chan->tx_q); 3377 - if (chan->mode == L2CAP_MODE_ERTM) 3378 - l2cap_ertm_init(chan); 3048 + if (chan->mode == L2CAP_MODE_ERTM || 3049 + chan->mode == L2CAP_MODE_STREAMING) 3050 + err = l2cap_ertm_init(chan); 3379 3051 3380 - l2cap_chan_ready(chan); 3052 + if (err < 0) 3053 + l2cap_send_disconn_req(chan->conn, chan, -err); 3054 + else 3055 + l2cap_chan_ready(chan); 3381 3056 } 3382 3057 3383 3058 done: 3384 3059 l2cap_chan_unlock(chan); 3385 - return 0; 3060 + return err; 3386 3061 } 3387 3062 3388 3063 static inline int l2cap_disconnect_req(struct l2cap_conn *conn, struct l2cap_cmd_hdr *cmd, u8 *data) ··· 3419 3092 sk->sk_shutdown = SHUTDOWN_MASK; 3420 3093 release_sock(sk); 3421 3094 3095 + l2cap_chan_hold(chan); 3422 3096 l2cap_chan_del(chan, ECONNRESET); 3423 3097 3424 3098 l2cap_chan_unlock(chan); 3425 3099 3426 3100 chan->ops->close(chan->data); 3101 + l2cap_chan_put(chan); 3427 3102 3428 3103 mutex_unlock(&conn->chan_lock); 3429 3104 ··· 3453 3124 3454 3125 l2cap_chan_lock(chan); 3455 3126 3127 + l2cap_chan_hold(chan); 3456 3128 l2cap_chan_del(chan, 0); 3457 3129 3458 3130 l2cap_chan_unlock(chan); 3459 3131 3460 3132 chan->ops->close(chan->data); 3133 + l2cap_chan_put(chan); 3461 3134 3462 3135 mutex_unlock(&conn->chan_lock); 3463 3136 ··· 3596 3265 /* Placeholder: Always reject */ 3597 3266 rsp.dcid = 0; 3598 3267 rsp.scid = cpu_to_le16(scid); 3599 - rsp.result = L2CAP_CR_NO_MEM; 3600 - rsp.status = L2CAP_CS_NO_INFO; 3268 + rsp.result = __constant_cpu_to_le16(L2CAP_CR_NO_MEM); 3269 + rsp.status = __constant_cpu_to_le16(L2CAP_CS_NO_INFO); 3601 3270 3602 3271 l2cap_send_cmd(conn, cmd->ident, L2CAP_CREATE_CHAN_RSP, 3603 3272 sizeof(rsp), &rsp); ··· 3996 3665 struct sk_buff *next_skb; 3997 3666 int tx_seq_offset, next_tx_seq_offset; 3998 3667 3999 - bt_cb(skb)->tx_seq = tx_seq; 4000 - bt_cb(skb)->sar = sar; 3668 + bt_cb(skb)->control.txseq = tx_seq; 3669 + bt_cb(skb)->control.sar = sar; 4001 3670 4002 3671 next_skb = skb_peek(&chan->srej_q); 4003 3672 4004 3673 tx_seq_offset = __seq_offset(chan, tx_seq, chan->buffer_seq); 4005 3674 4006 3675 while (next_skb) { 4007 - if (bt_cb(next_skb)->tx_seq == tx_seq) 3676 + if (bt_cb(next_skb)->control.txseq == tx_seq) 4008 3677 return -EINVAL; 4009 3678 4010 3679 next_tx_seq_offset = __seq_offset(chan, 4011 - bt_cb(next_skb)->tx_seq, chan->buffer_seq); 3680 + bt_cb(next_skb)->control.txseq, chan->buffer_seq); 4012 3681 4013 3682 if (next_tx_seq_offset > tx_seq_offset) { 4014 3683 __skb_queue_before(&chan->srej_q, next_skb, skb); ··· 4131 3800 BT_DBG("chan %p, Enter local busy", chan); 4132 3801 4133 3802 set_bit(CONN_LOCAL_BUSY, &chan->conn_state); 3803 + l2cap_seq_list_clear(&chan->srej_list); 4134 3804 4135 3805 __set_ack_timer(chan); 4136 3806 } ··· 4180 3848 !test_bit(CONN_LOCAL_BUSY, &chan->conn_state)) { 4181 3849 int err; 4182 3850 4183 - if (bt_cb(skb)->tx_seq != tx_seq) 3851 + if (bt_cb(skb)->control.txseq != tx_seq) 4184 3852 break; 4185 3853 4186 3854 skb = skb_dequeue(&chan->srej_q); 4187 - control = __set_ctrl_sar(chan, bt_cb(skb)->sar); 3855 + control = __set_ctrl_sar(chan, bt_cb(skb)->control.sar); 4188 3856 err = l2cap_reassemble_sdu(chan, skb, control); 4189 3857 4190 3858 if (err < 0) { ··· 4224 3892 while (tx_seq != chan->expected_tx_seq) { 4225 3893 control = __set_ctrl_super(chan, L2CAP_SUPER_SREJ); 4226 3894 control |= __set_reqseq(chan, chan->expected_tx_seq); 3895 + l2cap_seq_list_append(&chan->srej_list, chan->expected_tx_seq); 4227 3896 l2cap_send_sframe(chan, control); 4228 3897 4229 3898 new = kzalloc(sizeof(struct srej_list), GFP_ATOMIC); ··· 4355 4022 chan->expected_tx_seq = __next_seq(chan, chan->expected_tx_seq); 4356 4023 4357 4024 if (test_bit(CONN_SREJ_SENT, &chan->conn_state)) { 4358 - bt_cb(skb)->tx_seq = tx_seq; 4359 - bt_cb(skb)->sar = sar; 4025 + bt_cb(skb)->control.txseq = tx_seq; 4026 + bt_cb(skb)->control.sar = sar; 4360 4027 __skb_queue_tail(&chan->srej_q, skb); 4361 4028 return 0; 4362 4029 } ··· 4553 4220 u16 req_seq; 4554 4221 int len, next_tx_seq_offset, req_seq_offset; 4555 4222 4223 + __unpack_control(chan, skb); 4224 + 4556 4225 control = __get_control(chan, skb->data); 4557 4226 skb_pull(skb, __ctrl_size(chan)); 4558 4227 len = skb->len; ··· 4629 4294 kfree_skb(skb); 4630 4295 return 0; 4631 4296 } 4632 - 4633 - l2cap_chan_lock(chan); 4634 4297 4635 4298 BT_DBG("chan %p, len %d", chan, skb->len); 4636 4299 ··· 4708 4375 { 4709 4376 struct l2cap_chan *chan; 4710 4377 4711 - chan = l2cap_global_chan_by_psm(0, psm, conn->src); 4378 + chan = l2cap_global_chan_by_psm(0, psm, conn->src, conn->dst); 4712 4379 if (!chan) 4713 4380 goto drop; 4714 4381 ··· 4729 4396 return 0; 4730 4397 } 4731 4398 4732 - static inline int l2cap_att_channel(struct l2cap_conn *conn, __le16 cid, struct sk_buff *skb) 4399 + static inline int l2cap_att_channel(struct l2cap_conn *conn, u16 cid, 4400 + struct sk_buff *skb) 4733 4401 { 4734 4402 struct l2cap_chan *chan; 4735 4403 4736 - chan = l2cap_global_chan_by_scid(0, cid, conn->src); 4404 + chan = l2cap_global_chan_by_scid(0, cid, conn->src, conn->dst); 4737 4405 if (!chan) 4738 4406 goto drop; 4739 4407 ··· 4779 4445 break; 4780 4446 4781 4447 case L2CAP_CID_CONN_LESS: 4782 - psm = get_unaligned_le16(skb->data); 4448 + psm = get_unaligned((__le16 *) skb->data); 4783 4449 skb_pull(skb, 2); 4784 4450 l2cap_conless_channel(conn, psm, skb); 4785 4451 break; ··· 4874 4540 4875 4541 if (encrypt == 0x00) { 4876 4542 if (chan->sec_level == BT_SECURITY_MEDIUM) { 4877 - __clear_chan_timer(chan); 4878 4543 __set_chan_timer(chan, L2CAP_ENC_TIMEOUT); 4879 4544 } else if (chan->sec_level == BT_SECURITY_HIGH) 4880 4545 l2cap_chan_close(chan, ECONNREFUSED); ··· 4894 4561 BT_DBG("conn %p", conn); 4895 4562 4896 4563 if (hcon->type == LE_LINK) { 4897 - smp_distribute_keys(conn, 0); 4564 + if (!status && encrypt) 4565 + smp_distribute_keys(conn, 0); 4898 4566 cancel_delayed_work(&conn->security_timer); 4899 4567 } 4900 4568 ··· 4925 4591 chan->state == BT_CONFIG)) { 4926 4592 struct sock *sk = chan->sk; 4927 4593 4928 - bt_sk(sk)->suspended = false; 4594 + clear_bit(BT_SK_SUSPEND, &bt_sk(sk)->flags); 4929 4595 sk->sk_state_change(sk); 4930 4596 4931 4597 l2cap_check_encryption(chan, encrypt); ··· 4937 4603 if (!status) { 4938 4604 l2cap_send_conn_req(chan); 4939 4605 } else { 4940 - __clear_chan_timer(chan); 4941 4606 __set_chan_timer(chan, L2CAP_DISC_TIMEOUT); 4942 4607 } 4943 4608 } else if (chan->state == BT_CONNECT2) { ··· 4947 4614 lock_sock(sk); 4948 4615 4949 4616 if (!status) { 4950 - if (bt_sk(sk)->defer_setup) { 4617 + if (test_bit(BT_SK_DEFER_SETUP, 4618 + &bt_sk(sk)->flags)) { 4951 4619 struct sock *parent = bt_sk(sk)->parent; 4952 4620 res = L2CAP_CR_PEND; 4953 4621 stat = L2CAP_CS_AUTHOR_PEND; ··· 4998 4664 4999 4665 if (!(flags & ACL_CONT)) { 5000 4666 struct l2cap_hdr *hdr; 5001 - struct l2cap_chan *chan; 5002 - u16 cid; 5003 4667 int len; 5004 4668 5005 4669 if (conn->rx_len) { ··· 5017 4685 5018 4686 hdr = (struct l2cap_hdr *) skb->data; 5019 4687 len = __le16_to_cpu(hdr->len) + L2CAP_HDR_SIZE; 5020 - cid = __le16_to_cpu(hdr->cid); 5021 4688 5022 4689 if (len == skb->len) { 5023 4690 /* Complete frame received */ ··· 5031 4700 skb->len, len); 5032 4701 l2cap_conn_unreliable(conn, ECOMM); 5033 4702 goto drop; 5034 - } 5035 - 5036 - chan = l2cap_get_chan_by_scid(conn, cid); 5037 - 5038 - if (chan && chan->sk) { 5039 - struct sock *sk = chan->sk; 5040 - lock_sock(sk); 5041 - 5042 - if (chan->imtu < len - L2CAP_HDR_SIZE) { 5043 - BT_ERR("Frame exceeding recv MTU (len %d, " 5044 - "MTU %d)", len, 5045 - chan->imtu); 5046 - release_sock(sk); 5047 - l2cap_conn_unreliable(conn, ECOMM); 5048 - goto drop; 5049 - } 5050 - release_sock(sk); 5051 4703 } 5052 4704 5053 4705 /* Allocate skb for the complete frame (with header) */
+46 -30
net/bluetooth/l2cap_sock.c
··· 124 124 return -EINVAL; 125 125 126 126 err = l2cap_chan_connect(chan, la.l2_psm, __le16_to_cpu(la.l2_cid), 127 - &la.l2_bdaddr); 127 + &la.l2_bdaddr, la.l2_bdaddr_type); 128 128 if (err) 129 129 return err; 130 130 ··· 148 148 149 149 lock_sock(sk); 150 150 151 - if ((sock->type != SOCK_SEQPACKET && sock->type != SOCK_STREAM) 152 - || sk->sk_state != BT_BOUND) { 151 + if (sk->sk_state != BT_BOUND) { 153 152 err = -EBADFD; 153 + goto done; 154 + } 155 + 156 + if (sk->sk_type != SOCK_SEQPACKET && sk->sk_type != SOCK_STREAM) { 157 + err = -EINVAL; 154 158 goto done; 155 159 } 156 160 ··· 324 320 325 321 case L2CAP_CONNINFO: 326 322 if (sk->sk_state != BT_CONNECTED && 327 - !(sk->sk_state == BT_CONNECT2 && 328 - bt_sk(sk)->defer_setup)) { 323 + !(sk->sk_state == BT_CONNECT2 && 324 + test_bit(BT_SK_DEFER_SETUP, &bt_sk(sk)->flags))) { 329 325 err = -ENOTCONN; 330 326 break; 331 327 } ··· 379 375 } 380 376 381 377 memset(&sec, 0, sizeof(sec)); 382 - sec.level = chan->sec_level; 378 + if (chan->conn) 379 + sec.level = chan->conn->hcon->sec_level; 380 + else 381 + sec.level = chan->sec_level; 383 382 384 383 if (sk->sk_state == BT_CONNECTED) 385 384 sec.key_size = chan->conn->hcon->enc_key_size; ··· 399 392 break; 400 393 } 401 394 402 - if (put_user(bt_sk(sk)->defer_setup, (u32 __user *) optval)) 395 + if (put_user(test_bit(BT_SK_DEFER_SETUP, &bt_sk(sk)->flags), 396 + (u32 __user *) optval)) 403 397 err = -EFAULT; 404 398 405 399 break; ··· 602 594 603 595 /* or for ACL link */ 604 596 } else if ((sk->sk_state == BT_CONNECT2 && 605 - bt_sk(sk)->defer_setup) || 597 + test_bit(BT_SK_DEFER_SETUP, &bt_sk(sk)->flags)) || 606 598 sk->sk_state == BT_CONNECTED) { 607 599 if (!l2cap_chan_check_security(chan)) 608 - bt_sk(sk)->suspended = true; 600 + set_bit(BT_SK_SUSPEND, &bt_sk(sk)->flags); 609 601 else 610 602 sk->sk_state_change(sk); 611 603 } else { ··· 624 616 break; 625 617 } 626 618 627 - bt_sk(sk)->defer_setup = opt; 619 + if (opt) 620 + set_bit(BT_SK_DEFER_SETUP, &bt_sk(sk)->flags); 621 + else 622 + clear_bit(BT_SK_DEFER_SETUP, &bt_sk(sk)->flags); 628 623 break; 629 624 630 625 case BT_FLUSHABLE: ··· 727 716 if (msg->msg_flags & MSG_OOB) 728 717 return -EOPNOTSUPP; 729 718 730 - lock_sock(sk); 731 - 732 - if (sk->sk_state != BT_CONNECTED) { 733 - release_sock(sk); 719 + if (sk->sk_state != BT_CONNECTED) 734 720 return -ENOTCONN; 735 - } 736 721 722 + l2cap_chan_lock(chan); 737 723 err = l2cap_chan_send(chan, msg, len, sk->sk_priority); 724 + l2cap_chan_unlock(chan); 738 725 739 - release_sock(sk); 740 726 return err; 741 727 } 742 728 ··· 745 737 746 738 lock_sock(sk); 747 739 748 - if (sk->sk_state == BT_CONNECT2 && bt_sk(sk)->defer_setup) { 740 + if (sk->sk_state == BT_CONNECT2 && test_bit(BT_SK_DEFER_SETUP, 741 + &bt_sk(sk)->flags)) { 749 742 sk->sk_state = BT_CONFIG; 750 743 pi->chan->state = BT_CONFIG; 751 744 ··· 940 931 } 941 932 942 933 static struct sk_buff *l2cap_sock_alloc_skb_cb(struct l2cap_chan *chan, 943 - unsigned long len, int nb, 944 - int *err) 934 + unsigned long len, int nb) 945 935 { 946 - struct sock *sk = chan->sk; 936 + struct sk_buff *skb; 937 + int err; 947 938 948 - return bt_skb_send_alloc(sk, len, nb, err); 939 + l2cap_chan_unlock(chan); 940 + skb = bt_skb_send_alloc(chan->sk, len, nb, &err); 941 + l2cap_chan_lock(chan); 942 + 943 + if (!skb) 944 + return ERR_PTR(err); 945 + 946 + return skb; 949 947 } 950 948 951 949 static struct l2cap_ops l2cap_chan_ops = { ··· 968 952 { 969 953 BT_DBG("sk %p", sk); 970 954 955 + l2cap_chan_put(l2cap_pi(sk)->chan); 971 956 if (l2cap_pi(sk)->rx_busy_skb) { 972 957 kfree_skb(l2cap_pi(sk)->rx_busy_skb); 973 958 l2cap_pi(sk)->rx_busy_skb = NULL; ··· 989 972 struct l2cap_chan *pchan = l2cap_pi(parent)->chan; 990 973 991 974 sk->sk_type = parent->sk_type; 992 - bt_sk(sk)->defer_setup = bt_sk(parent)->defer_setup; 975 + bt_sk(sk)->flags = bt_sk(parent)->flags; 993 976 994 977 chan->chan_type = pchan->chan_type; 995 978 chan->imtu = pchan->imtu; ··· 1027 1010 } else { 1028 1011 chan->mode = L2CAP_MODE_BASIC; 1029 1012 } 1030 - chan->max_tx = L2CAP_DEFAULT_MAX_TX; 1031 - chan->fcs = L2CAP_FCS_CRC16; 1032 - chan->tx_win = L2CAP_DEFAULT_TX_WINDOW; 1033 - chan->tx_win_max = L2CAP_DEFAULT_TX_WINDOW; 1034 - chan->sec_level = BT_SECURITY_LOW; 1035 - chan->flags = 0; 1036 - set_bit(FLAG_FORCE_ACTIVE, &chan->flags); 1013 + 1014 + l2cap_chan_set_defaults(chan); 1037 1015 } 1038 1016 1039 1017 /* Default config options */ ··· 1064 1052 sk->sk_protocol = proto; 1065 1053 sk->sk_state = BT_OPEN; 1066 1054 1067 - chan = l2cap_chan_create(sk); 1055 + chan = l2cap_chan_create(); 1068 1056 if (!chan) { 1069 1057 l2cap_sock_kill(sk); 1070 1058 return NULL; 1071 1059 } 1060 + 1061 + l2cap_chan_hold(chan); 1062 + 1063 + chan->sk = sk; 1072 1064 1073 1065 l2cap_pi(sk)->chan = chan; 1074 1066
+173 -115
net/bluetooth/mgmt.c
··· 35 35 #include <net/bluetooth/smp.h> 36 36 37 37 bool enable_hs; 38 - bool enable_le; 39 38 40 39 #define MGMT_VERSION 1 41 - #define MGMT_REVISION 0 40 + #define MGMT_REVISION 1 42 41 43 42 static const u16 mgmt_commands[] = { 44 43 MGMT_OP_READ_INDEX_LIST, ··· 77 78 MGMT_OP_CONFIRM_NAME, 78 79 MGMT_OP_BLOCK_DEVICE, 79 80 MGMT_OP_UNBLOCK_DEVICE, 81 + MGMT_OP_SET_DEVICE_ID, 80 82 }; 81 83 82 84 static const u16 mgmt_events[] = { ··· 224 224 225 225 ev = (void *) skb_put(skb, sizeof(*ev)); 226 226 ev->status = status; 227 - put_unaligned_le16(cmd, &ev->opcode); 227 + ev->opcode = cpu_to_le16(cmd); 228 228 229 229 err = sock_queue_rcv_skb(sk, skb); 230 230 if (err < 0) ··· 254 254 hdr->len = cpu_to_le16(sizeof(*ev) + rp_len); 255 255 256 256 ev = (void *) skb_put(skb, sizeof(*ev) + rp_len); 257 - put_unaligned_le16(cmd, &ev->opcode); 257 + ev->opcode = cpu_to_le16(cmd); 258 258 ev->status = status; 259 259 260 260 if (rp) ··· 275 275 BT_DBG("sock %p", sk); 276 276 277 277 rp.version = MGMT_VERSION; 278 - put_unaligned_le16(MGMT_REVISION, &rp.revision); 278 + rp.revision = __constant_cpu_to_le16(MGMT_REVISION); 279 279 280 280 return cmd_complete(sk, MGMT_INDEX_NONE, MGMT_OP_READ_VERSION, 0, &rp, 281 281 sizeof(rp)); ··· 285 285 u16 data_len) 286 286 { 287 287 struct mgmt_rp_read_commands *rp; 288 - u16 num_commands = ARRAY_SIZE(mgmt_commands); 289 - u16 num_events = ARRAY_SIZE(mgmt_events); 290 - u16 *opcode; 288 + const u16 num_commands = ARRAY_SIZE(mgmt_commands); 289 + const u16 num_events = ARRAY_SIZE(mgmt_events); 290 + __le16 *opcode; 291 291 size_t rp_size; 292 292 int i, err; 293 293 ··· 299 299 if (!rp) 300 300 return -ENOMEM; 301 301 302 - put_unaligned_le16(num_commands, &rp->num_commands); 303 - put_unaligned_le16(num_events, &rp->num_events); 302 + rp->num_commands = __constant_cpu_to_le16(num_commands); 303 + rp->num_events = __constant_cpu_to_le16(num_events); 304 304 305 305 for (i = 0, opcode = rp->opcodes; i < num_commands; i++, opcode++) 306 306 put_unaligned_le16(mgmt_commands[i], opcode); ··· 341 341 return -ENOMEM; 342 342 } 343 343 344 - put_unaligned_le16(count, &rp->num_controllers); 344 + rp->num_controllers = cpu_to_le16(count); 345 345 346 346 i = 0; 347 347 list_for_each_entry(d, &hci_dev_list, list) { 348 348 if (test_bit(HCI_SETUP, &d->dev_flags)) 349 349 continue; 350 350 351 - put_unaligned_le16(d->id, &rp->index[i++]); 351 + rp->index[i++] = cpu_to_le16(d->id); 352 352 BT_DBG("Added hci%u", d->id); 353 353 } 354 354 ··· 383 383 if (enable_hs) 384 384 settings |= MGMT_SETTING_HS; 385 385 386 - if (enable_le) { 387 - if (hdev->features[4] & LMP_LE) 388 - settings |= MGMT_SETTING_LE; 389 - } 386 + if (hdev->features[4] & LMP_LE) 387 + settings |= MGMT_SETTING_LE; 390 388 391 389 return settings; 392 390 } ··· 440 442 return 0; 441 443 } 442 444 443 - memcpy(&val, &uuid128[12], 4); 444 - 445 - val = le32_to_cpu(val); 445 + val = get_unaligned_le32(&uuid128[12]); 446 446 if (val > 0xffff) 447 447 return 0; 448 448 ··· 473 477 474 478 eir_len += (name_len + 2); 475 479 ptr += (name_len + 2); 480 + } 481 + 482 + if (hdev->inq_tx_power) { 483 + ptr[0] = 2; 484 + ptr[1] = EIR_TX_POWER; 485 + ptr[2] = (u8) hdev->inq_tx_power; 486 + 487 + eir_len += 3; 488 + ptr += 3; 489 + } 490 + 491 + if (hdev->devid_source > 0) { 492 + ptr[0] = 9; 493 + ptr[1] = EIR_DEVICE_ID; 494 + 495 + put_unaligned_le16(hdev->devid_source, ptr + 2); 496 + put_unaligned_le16(hdev->devid_vendor, ptr + 4); 497 + put_unaligned_le16(hdev->devid_product, ptr + 6); 498 + put_unaligned_le16(hdev->devid_version, ptr + 8); 499 + 500 + eir_len += 10; 501 + ptr += 10; 476 502 } 477 503 478 504 memset(uuid16_list, 0, sizeof(uuid16_list)); ··· 660 642 bacpy(&rp.bdaddr, &hdev->bdaddr); 661 643 662 644 rp.version = hdev->hci_ver; 663 - 664 - put_unaligned_le16(hdev->manufacturer, &rp.manufacturer); 645 + rp.manufacturer = cpu_to_le16(hdev->manufacturer); 665 646 666 647 rp.supported_settings = cpu_to_le32(get_supported_settings(hdev)); 667 648 rp.current_settings = cpu_to_le32(get_current_settings(hdev)); ··· 857 840 858 841 BT_DBG("request for %s", hdev->name); 859 842 860 - timeout = get_unaligned_le16(&cp->timeout); 843 + timeout = __le16_to_cpu(cp->timeout); 861 844 if (!cp->val && timeout > 0) 862 845 return cmd_status(sk, hdev->id, MGMT_OP_SET_DISCOVERABLE, 863 846 MGMT_STATUS_INVALID_PARAMS); ··· 1139 1122 } 1140 1123 1141 1124 if (mgmt_pending_find(MGMT_OP_SET_SSP, hdev)) { 1142 - err = cmd_status(sk, hdev->id, MGMT_OP_SET_SSP, 1143 - MGMT_STATUS_BUSY); 1125 + err = cmd_status(sk, hdev->id, MGMT_OP_SET_SSP, 1126 + MGMT_STATUS_BUSY); 1144 1127 goto failed; 1145 1128 } 1146 1129 ··· 1196 1179 1197 1180 hci_dev_lock(hdev); 1198 1181 1199 - if (!enable_le || !(hdev->features[4] & LMP_LE)) { 1182 + if (!(hdev->features[4] & LMP_LE)) { 1200 1183 err = cmd_status(sk, hdev->id, MGMT_OP_SET_LE, 1201 1184 MGMT_STATUS_NOT_SUPPORTED); 1202 1185 goto unlock; ··· 1244 1227 1245 1228 err = hci_send_cmd(hdev, HCI_OP_WRITE_LE_HOST_SUPPORTED, sizeof(hci_cp), 1246 1229 &hci_cp); 1247 - if (err < 0) { 1230 + if (err < 0) 1248 1231 mgmt_pending_remove(cmd); 1249 - goto unlock; 1250 - } 1251 1232 1252 1233 unlock: 1253 1234 hci_dev_unlock(hdev); ··· 1295 1280 } 1296 1281 1297 1282 cmd = mgmt_pending_add(sk, MGMT_OP_ADD_UUID, hdev, data, len); 1298 - if (!cmd) { 1283 + if (!cmd) 1299 1284 err = -ENOMEM; 1300 - goto failed; 1301 - } 1302 1285 1303 1286 failed: 1304 1287 hci_dev_unlock(hdev); ··· 1381 1368 } 1382 1369 1383 1370 cmd = mgmt_pending_add(sk, MGMT_OP_REMOVE_UUID, hdev, data, len); 1384 - if (!cmd) { 1371 + if (!cmd) 1385 1372 err = -ENOMEM; 1386 - goto unlock; 1387 - } 1388 1373 1389 1374 unlock: 1390 1375 hci_dev_unlock(hdev); ··· 1433 1422 } 1434 1423 1435 1424 cmd = mgmt_pending_add(sk, MGMT_OP_SET_DEV_CLASS, hdev, data, len); 1436 - if (!cmd) { 1425 + if (!cmd) 1437 1426 err = -ENOMEM; 1438 - goto unlock; 1439 - } 1440 1427 1441 1428 unlock: 1442 1429 hci_dev_unlock(hdev); ··· 1448 1439 u16 key_count, expected_len; 1449 1440 int i; 1450 1441 1451 - key_count = get_unaligned_le16(&cp->key_count); 1442 + key_count = __le16_to_cpu(cp->key_count); 1452 1443 1453 1444 expected_len = sizeof(*cp) + key_count * 1454 1445 sizeof(struct mgmt_link_key_info); ··· 1521 1512 goto unlock; 1522 1513 } 1523 1514 1524 - if (cp->addr.type == MGMT_ADDR_BREDR) 1515 + if (cp->addr.type == BDADDR_BREDR) 1525 1516 err = hci_remove_link_key(hdev, &cp->addr.bdaddr); 1526 1517 else 1527 1518 err = hci_remove_ltk(hdev, &cp->addr.bdaddr); ··· 1533 1524 } 1534 1525 1535 1526 if (cp->disconnect) { 1536 - if (cp->addr.type == MGMT_ADDR_BREDR) 1527 + if (cp->addr.type == BDADDR_BREDR) 1537 1528 conn = hci_conn_hash_lookup_ba(hdev, ACL_LINK, 1538 1529 &cp->addr.bdaddr); 1539 1530 else ··· 1557 1548 goto unlock; 1558 1549 } 1559 1550 1560 - put_unaligned_le16(conn->handle, &dc.handle); 1551 + dc.handle = cpu_to_le16(conn->handle); 1561 1552 dc.reason = 0x13; /* Remote User Terminated Connection */ 1562 1553 err = hci_send_cmd(hdev, HCI_OP_DISCONNECT, sizeof(dc), &dc); 1563 1554 if (err < 0) ··· 1593 1584 goto failed; 1594 1585 } 1595 1586 1596 - if (cp->addr.type == MGMT_ADDR_BREDR) 1587 + if (cp->addr.type == BDADDR_BREDR) 1597 1588 conn = hci_conn_hash_lookup_ba(hdev, ACL_LINK, &cp->addr.bdaddr); 1598 1589 else 1599 1590 conn = hci_conn_hash_lookup_ba(hdev, LE_LINK, &cp->addr.bdaddr); ··· 1610 1601 goto failed; 1611 1602 } 1612 1603 1613 - put_unaligned_le16(conn->handle, &dc.handle); 1604 + dc.handle = cpu_to_le16(conn->handle); 1614 1605 dc.reason = 0x13; /* Remote User Terminated Connection */ 1615 1606 1616 1607 err = hci_send_cmd(hdev, HCI_OP_DISCONNECT, sizeof(dc), &dc); ··· 1622 1613 return err; 1623 1614 } 1624 1615 1625 - static u8 link_to_mgmt(u8 link_type, u8 addr_type) 1616 + static u8 link_to_bdaddr(u8 link_type, u8 addr_type) 1626 1617 { 1627 1618 switch (link_type) { 1628 1619 case LE_LINK: 1629 1620 switch (addr_type) { 1630 1621 case ADDR_LE_DEV_PUBLIC: 1631 - return MGMT_ADDR_LE_PUBLIC; 1632 - case ADDR_LE_DEV_RANDOM: 1633 - return MGMT_ADDR_LE_RANDOM; 1622 + return BDADDR_LE_PUBLIC; 1623 + 1634 1624 default: 1635 - return MGMT_ADDR_INVALID; 1625 + /* Fallback to LE Random address type */ 1626 + return BDADDR_LE_RANDOM; 1636 1627 } 1637 - case ACL_LINK: 1638 - return MGMT_ADDR_BREDR; 1628 + 1639 1629 default: 1640 - return MGMT_ADDR_INVALID; 1630 + /* Fallback to BR/EDR type */ 1631 + return BDADDR_BREDR; 1641 1632 } 1642 1633 } 1643 1634 ··· 1678 1669 if (!test_bit(HCI_CONN_MGMT_CONNECTED, &c->flags)) 1679 1670 continue; 1680 1671 bacpy(&rp->addr[i].bdaddr, &c->dst); 1681 - rp->addr[i].type = link_to_mgmt(c->type, c->dst_type); 1682 - if (rp->addr[i].type == MGMT_ADDR_INVALID) 1672 + rp->addr[i].type = link_to_bdaddr(c->type, c->dst_type); 1673 + if (c->type == SCO_LINK || c->type == ESCO_LINK) 1683 1674 continue; 1684 1675 i++; 1685 1676 } 1686 1677 1687 - put_unaligned_le16(i, &rp->conn_count); 1678 + rp->conn_count = cpu_to_le16(i); 1688 1679 1689 1680 /* Recalculate length in case of filtered SCO connections, etc */ 1690 1681 rp_len = sizeof(*rp) + (i * sizeof(struct mgmt_addr_info)); ··· 1845 1836 struct hci_conn *conn = cmd->user_data; 1846 1837 1847 1838 bacpy(&rp.addr.bdaddr, &conn->dst); 1848 - rp.addr.type = link_to_mgmt(conn->type, conn->dst_type); 1839 + rp.addr.type = link_to_bdaddr(conn->type, conn->dst_type); 1849 1840 1850 1841 cmd_complete(cmd->sk, cmd->index, MGMT_OP_PAIR_DEVICE, status, 1851 1842 &rp, sizeof(rp)); ··· 1899 1890 else 1900 1891 auth_type = HCI_AT_DEDICATED_BONDING_MITM; 1901 1892 1902 - if (cp->addr.type == MGMT_ADDR_BREDR) 1903 - conn = hci_connect(hdev, ACL_LINK, &cp->addr.bdaddr, sec_level, 1904 - auth_type); 1893 + if (cp->addr.type == BDADDR_BREDR) 1894 + conn = hci_connect(hdev, ACL_LINK, &cp->addr.bdaddr, 1895 + cp->addr.type, sec_level, auth_type); 1905 1896 else 1906 - conn = hci_connect(hdev, LE_LINK, &cp->addr.bdaddr, sec_level, 1907 - auth_type); 1897 + conn = hci_connect(hdev, LE_LINK, &cp->addr.bdaddr, 1898 + cp->addr.type, sec_level, auth_type); 1908 1899 1909 1900 memset(&rp, 0, sizeof(rp)); 1910 1901 bacpy(&rp.addr.bdaddr, &cp->addr.bdaddr); ··· 1932 1923 } 1933 1924 1934 1925 /* For LE, just connecting isn't a proof that the pairing finished */ 1935 - if (cp->addr.type == MGMT_ADDR_BREDR) 1926 + if (cp->addr.type == BDADDR_BREDR) 1936 1927 conn->connect_cfm_cb = pairing_complete_cb; 1937 1928 1938 1929 conn->security_cfm_cb = pairing_complete_cb; ··· 2009 2000 goto done; 2010 2001 } 2011 2002 2012 - if (type == MGMT_ADDR_BREDR) 2003 + if (type == BDADDR_BREDR) 2013 2004 conn = hci_conn_hash_lookup_ba(hdev, ACL_LINK, bdaddr); 2014 2005 else 2015 2006 conn = hci_conn_hash_lookup_ba(hdev, LE_LINK, bdaddr); ··· 2020 2011 goto done; 2021 2012 } 2022 2013 2023 - if (type == MGMT_ADDR_LE_PUBLIC || type == MGMT_ADDR_LE_RANDOM) { 2014 + if (type == BDADDR_LE_PUBLIC || type == BDADDR_LE_RANDOM) { 2024 2015 /* Continue with pairing via SMP */ 2025 2016 err = smp_user_confirm_reply(conn, mgmt_op, passkey); 2026 2017 ··· 2304 2295 goto failed; 2305 2296 } 2306 2297 2298 + if (test_bit(HCI_PERIODIC_INQ, &hdev->dev_flags)) { 2299 + err = cmd_status(sk, hdev->id, MGMT_OP_START_DISCOVERY, 2300 + MGMT_STATUS_BUSY); 2301 + goto failed; 2302 + } 2303 + 2307 2304 if (hdev->discovery.state != DISCOVERY_STOPPED) { 2308 2305 err = cmd_status(sk, hdev->id, MGMT_OP_START_DISCOVERY, 2309 2306 MGMT_STATUS_BUSY); ··· 2396 2381 goto unlock; 2397 2382 } 2398 2383 2399 - if (hdev->discovery.state == DISCOVERY_FINDING) { 2400 - err = hci_cancel_inquiry(hdev); 2401 - if (err < 0) 2402 - mgmt_pending_remove(cmd); 2384 + switch (hdev->discovery.state) { 2385 + case DISCOVERY_FINDING: 2386 + if (test_bit(HCI_INQUIRY, &hdev->flags)) 2387 + err = hci_cancel_inquiry(hdev); 2403 2388 else 2404 - hci_discovery_set_state(hdev, DISCOVERY_STOPPING); 2405 - goto unlock; 2389 + err = hci_cancel_le_scan(hdev); 2390 + 2391 + break; 2392 + 2393 + case DISCOVERY_RESOLVING: 2394 + e = hci_inquiry_cache_lookup_resolve(hdev, BDADDR_ANY, 2395 + NAME_PENDING); 2396 + if (!e) { 2397 + mgmt_pending_remove(cmd); 2398 + err = cmd_complete(sk, hdev->id, 2399 + MGMT_OP_STOP_DISCOVERY, 0, 2400 + &mgmt_cp->type, 2401 + sizeof(mgmt_cp->type)); 2402 + hci_discovery_set_state(hdev, DISCOVERY_STOPPED); 2403 + goto unlock; 2404 + } 2405 + 2406 + bacpy(&cp.bdaddr, &e->data.bdaddr); 2407 + err = hci_send_cmd(hdev, HCI_OP_REMOTE_NAME_REQ_CANCEL, 2408 + sizeof(cp), &cp); 2409 + 2410 + break; 2411 + 2412 + default: 2413 + BT_DBG("unknown discovery state %u", hdev->discovery.state); 2414 + err = -EFAULT; 2406 2415 } 2407 2416 2408 - e = hci_inquiry_cache_lookup_resolve(hdev, BDADDR_ANY, NAME_PENDING); 2409 - if (!e) { 2410 - mgmt_pending_remove(cmd); 2411 - err = cmd_complete(sk, hdev->id, MGMT_OP_STOP_DISCOVERY, 0, 2412 - &mgmt_cp->type, sizeof(mgmt_cp->type)); 2413 - hci_discovery_set_state(hdev, DISCOVERY_STOPPED); 2414 - goto unlock; 2415 - } 2416 - 2417 - bacpy(&cp.bdaddr, &e->data.bdaddr); 2418 - err = hci_send_cmd(hdev, HCI_OP_REMOTE_NAME_REQ_CANCEL, sizeof(cp), 2419 - &cp); 2420 2417 if (err < 0) 2421 2418 mgmt_pending_remove(cmd); 2422 2419 else ··· 2528 2501 return err; 2529 2502 } 2530 2503 2504 + static int set_device_id(struct sock *sk, struct hci_dev *hdev, void *data, 2505 + u16 len) 2506 + { 2507 + struct mgmt_cp_set_device_id *cp = data; 2508 + int err; 2509 + __u16 source; 2510 + 2511 + BT_DBG("%s", hdev->name); 2512 + 2513 + source = __le16_to_cpu(cp->source); 2514 + 2515 + if (source > 0x0002) 2516 + return cmd_status(sk, hdev->id, MGMT_OP_SET_DEVICE_ID, 2517 + MGMT_STATUS_INVALID_PARAMS); 2518 + 2519 + hci_dev_lock(hdev); 2520 + 2521 + hdev->devid_source = source; 2522 + hdev->devid_vendor = __le16_to_cpu(cp->vendor); 2523 + hdev->devid_product = __le16_to_cpu(cp->product); 2524 + hdev->devid_version = __le16_to_cpu(cp->version); 2525 + 2526 + err = cmd_complete(sk, hdev->id, MGMT_OP_SET_DEVICE_ID, 0, NULL, 0); 2527 + 2528 + update_eir(hdev); 2529 + 2530 + hci_dev_unlock(hdev); 2531 + 2532 + return err; 2533 + } 2534 + 2531 2535 static int set_fast_connectable(struct sock *sk, struct hci_dev *hdev, 2532 2536 void *data, u16 len) 2533 2537 { ··· 2623 2565 u16 key_count, expected_len; 2624 2566 int i; 2625 2567 2626 - key_count = get_unaligned_le16(&cp->key_count); 2568 + key_count = __le16_to_cpu(cp->key_count); 2627 2569 2628 2570 expected_len = sizeof(*cp) + key_count * 2629 2571 sizeof(struct mgmt_ltk_info); ··· 2649 2591 else 2650 2592 type = HCI_SMP_LTK_SLAVE; 2651 2593 2652 - hci_add_ltk(hdev, &key->addr.bdaddr, key->addr.type, 2594 + hci_add_ltk(hdev, &key->addr.bdaddr, 2595 + bdaddr_to_le(key->addr.type), 2653 2596 type, 0, key->authenticated, key->val, 2654 2597 key->enc_size, key->ediv, key->rand); 2655 2598 } ··· 2660 2601 return 0; 2661 2602 } 2662 2603 2663 - struct mgmt_handler { 2604 + static const struct mgmt_handler { 2664 2605 int (*func) (struct sock *sk, struct hci_dev *hdev, void *data, 2665 2606 u16 data_len); 2666 2607 bool var_len; ··· 2706 2647 { confirm_name, false, MGMT_CONFIRM_NAME_SIZE }, 2707 2648 { block_device, false, MGMT_BLOCK_DEVICE_SIZE }, 2708 2649 { unblock_device, false, MGMT_UNBLOCK_DEVICE_SIZE }, 2650 + { set_device_id, false, MGMT_SET_DEVICE_ID_SIZE }, 2709 2651 }; 2710 2652 2711 2653 ··· 2717 2657 struct mgmt_hdr *hdr; 2718 2658 u16 opcode, index, len; 2719 2659 struct hci_dev *hdev = NULL; 2720 - struct mgmt_handler *handler; 2660 + const struct mgmt_handler *handler; 2721 2661 int err; 2722 2662 2723 2663 BT_DBG("got %zu bytes", msglen); ··· 2735 2675 } 2736 2676 2737 2677 hdr = buf; 2738 - opcode = get_unaligned_le16(&hdr->opcode); 2739 - index = get_unaligned_le16(&hdr->index); 2740 - len = get_unaligned_le16(&hdr->len); 2678 + opcode = __le16_to_cpu(hdr->opcode); 2679 + index = __le16_to_cpu(hdr->index); 2680 + len = __le16_to_cpu(hdr->len); 2741 2681 2742 2682 if (len != msglen - sizeof(*hdr)) { 2743 2683 err = -EINVAL; ··· 2944 2884 return 0; 2945 2885 } 2946 2886 2947 - int mgmt_new_link_key(struct hci_dev *hdev, struct link_key *key, bool persistent) 2887 + int mgmt_new_link_key(struct hci_dev *hdev, struct link_key *key, 2888 + bool persistent) 2948 2889 { 2949 2890 struct mgmt_ev_new_link_key ev; 2950 2891 ··· 2953 2892 2954 2893 ev.store_hint = persistent; 2955 2894 bacpy(&ev.key.addr.bdaddr, &key->bdaddr); 2956 - ev.key.addr.type = MGMT_ADDR_BREDR; 2895 + ev.key.addr.type = BDADDR_BREDR; 2957 2896 ev.key.type = key->type; 2958 2897 memcpy(ev.key.val, key->val, 16); 2959 2898 ev.key.pin_len = key->pin_len; ··· 2969 2908 2970 2909 ev.store_hint = persistent; 2971 2910 bacpy(&ev.key.addr.bdaddr, &key->bdaddr); 2972 - ev.key.addr.type = key->bdaddr_type; 2911 + ev.key.addr.type = link_to_bdaddr(LE_LINK, key->bdaddr_type); 2973 2912 ev.key.authenticated = key->authenticated; 2974 2913 ev.key.enc_size = key->enc_size; 2975 2914 ev.key.ediv = key->ediv; ··· 2993 2932 u16 eir_len = 0; 2994 2933 2995 2934 bacpy(&ev->addr.bdaddr, bdaddr); 2996 - ev->addr.type = link_to_mgmt(link_type, addr_type); 2935 + ev->addr.type = link_to_bdaddr(link_type, addr_type); 2997 2936 2998 2937 ev->flags = __cpu_to_le32(flags); 2999 2938 ··· 3005 2944 eir_len = eir_append_data(ev->eir, eir_len, 3006 2945 EIR_CLASS_OF_DEV, dev_class, 3); 3007 2946 3008 - put_unaligned_le16(eir_len, &ev->eir_len); 2947 + ev->eir_len = cpu_to_le16(eir_len); 3009 2948 3010 2949 return mgmt_event(MGMT_EV_DEVICE_CONNECTED, hdev, buf, 3011 2950 sizeof(*ev) + eir_len, NULL); ··· 3056 2995 mgmt_pending_foreach(MGMT_OP_DISCONNECT, hdev, disconnect_rsp, &sk); 3057 2996 3058 2997 bacpy(&ev.bdaddr, bdaddr); 3059 - ev.type = link_to_mgmt(link_type, addr_type); 2998 + ev.type = link_to_bdaddr(link_type, addr_type); 3060 2999 3061 3000 err = mgmt_event(MGMT_EV_DEVICE_DISCONNECTED, hdev, &ev, sizeof(ev), 3062 3001 sk); 3063 3002 3064 3003 if (sk) 3065 - sock_put(sk); 3004 + sock_put(sk); 3066 3005 3067 3006 mgmt_pending_foreach(MGMT_OP_UNPAIR_DEVICE, hdev, unpair_device_rsp, 3068 3007 hdev); ··· 3082 3021 return -ENOENT; 3083 3022 3084 3023 bacpy(&rp.addr.bdaddr, bdaddr); 3085 - rp.addr.type = link_to_mgmt(link_type, addr_type); 3024 + rp.addr.type = link_to_bdaddr(link_type, addr_type); 3086 3025 3087 3026 err = cmd_complete(cmd->sk, cmd->index, MGMT_OP_DISCONNECT, 3088 3027 mgmt_status(status), &rp, sizeof(rp)); ··· 3100 3039 struct mgmt_ev_connect_failed ev; 3101 3040 3102 3041 bacpy(&ev.addr.bdaddr, bdaddr); 3103 - ev.addr.type = link_to_mgmt(link_type, addr_type); 3042 + ev.addr.type = link_to_bdaddr(link_type, addr_type); 3104 3043 ev.status = mgmt_status(status); 3105 3044 3106 3045 return mgmt_event(MGMT_EV_CONNECT_FAILED, hdev, &ev, sizeof(ev), NULL); ··· 3111 3050 struct mgmt_ev_pin_code_request ev; 3112 3051 3113 3052 bacpy(&ev.addr.bdaddr, bdaddr); 3114 - ev.addr.type = MGMT_ADDR_BREDR; 3053 + ev.addr.type = BDADDR_BREDR; 3115 3054 ev.secure = secure; 3116 3055 3117 3056 return mgmt_event(MGMT_EV_PIN_CODE_REQUEST, hdev, &ev, sizeof(ev), ··· 3130 3069 return -ENOENT; 3131 3070 3132 3071 bacpy(&rp.addr.bdaddr, bdaddr); 3133 - rp.addr.type = MGMT_ADDR_BREDR; 3072 + rp.addr.type = BDADDR_BREDR; 3134 3073 3135 3074 err = cmd_complete(cmd->sk, hdev->id, MGMT_OP_PIN_CODE_REPLY, 3136 3075 mgmt_status(status), &rp, sizeof(rp)); ··· 3152 3091 return -ENOENT; 3153 3092 3154 3093 bacpy(&rp.addr.bdaddr, bdaddr); 3155 - rp.addr.type = MGMT_ADDR_BREDR; 3094 + rp.addr.type = BDADDR_BREDR; 3156 3095 3157 3096 err = cmd_complete(cmd->sk, hdev->id, MGMT_OP_PIN_CODE_NEG_REPLY, 3158 3097 mgmt_status(status), &rp, sizeof(rp)); ··· 3171 3110 BT_DBG("%s", hdev->name); 3172 3111 3173 3112 bacpy(&ev.addr.bdaddr, bdaddr); 3174 - ev.addr.type = link_to_mgmt(link_type, addr_type); 3113 + ev.addr.type = link_to_bdaddr(link_type, addr_type); 3175 3114 ev.confirm_hint = confirm_hint; 3176 - put_unaligned_le32(value, &ev.value); 3115 + ev.value = value; 3177 3116 3178 3117 return mgmt_event(MGMT_EV_USER_CONFIRM_REQUEST, hdev, &ev, sizeof(ev), 3179 3118 NULL); ··· 3187 3126 BT_DBG("%s", hdev->name); 3188 3127 3189 3128 bacpy(&ev.addr.bdaddr, bdaddr); 3190 - ev.addr.type = link_to_mgmt(link_type, addr_type); 3129 + ev.addr.type = link_to_bdaddr(link_type, addr_type); 3191 3130 3192 3131 return mgmt_event(MGMT_EV_USER_PASSKEY_REQUEST, hdev, &ev, sizeof(ev), 3193 3132 NULL); ··· 3206 3145 return -ENOENT; 3207 3146 3208 3147 bacpy(&rp.addr.bdaddr, bdaddr); 3209 - rp.addr.type = link_to_mgmt(link_type, addr_type); 3148 + rp.addr.type = link_to_bdaddr(link_type, addr_type); 3210 3149 err = cmd_complete(cmd->sk, hdev->id, opcode, mgmt_status(status), 3211 3150 &rp, sizeof(rp)); 3212 3151 ··· 3249 3188 struct mgmt_ev_auth_failed ev; 3250 3189 3251 3190 bacpy(&ev.addr.bdaddr, bdaddr); 3252 - ev.addr.type = link_to_mgmt(link_type, addr_type); 3191 + ev.addr.type = link_to_bdaddr(link_type, addr_type); 3253 3192 ev.status = mgmt_status(status); 3254 3193 3255 3194 return mgmt_event(MGMT_EV_AUTH_FAILED, hdev, &ev, sizeof(ev), NULL); ··· 3474 3413 3475 3414 if (enable && test_and_clear_bit(HCI_LE_ENABLED, 3476 3415 &hdev->dev_flags)) 3477 - err = new_settings(hdev, NULL); 3416 + err = new_settings(hdev, NULL); 3478 3417 3479 - mgmt_pending_foreach(MGMT_OP_SET_LE, hdev, 3480 - cmd_status_rsp, &mgmt_err); 3418 + mgmt_pending_foreach(MGMT_OP_SET_LE, hdev, cmd_status_rsp, 3419 + &mgmt_err); 3481 3420 3482 3421 return err; 3483 3422 } ··· 3516 3455 memset(buf, 0, sizeof(buf)); 3517 3456 3518 3457 bacpy(&ev->addr.bdaddr, bdaddr); 3519 - ev->addr.type = link_to_mgmt(link_type, addr_type); 3458 + ev->addr.type = link_to_bdaddr(link_type, addr_type); 3520 3459 ev->rssi = rssi; 3521 3460 if (cfm_name) 3522 3461 ev->flags[0] |= MGMT_DEV_FOUND_CONFIRM_NAME; ··· 3530 3469 eir_len = eir_append_data(ev->eir, eir_len, EIR_CLASS_OF_DEV, 3531 3470 dev_class, 3); 3532 3471 3533 - put_unaligned_le16(eir_len, &ev->eir_len); 3472 + ev->eir_len = cpu_to_le16(eir_len); 3534 3473 3535 3474 ev_size = sizeof(*ev) + eir_len; 3536 3475 ··· 3549 3488 memset(buf, 0, sizeof(buf)); 3550 3489 3551 3490 bacpy(&ev->addr.bdaddr, bdaddr); 3552 - ev->addr.type = link_to_mgmt(link_type, addr_type); 3491 + ev->addr.type = link_to_bdaddr(link_type, addr_type); 3553 3492 ev->rssi = rssi; 3554 3493 3555 3494 eir_len = eir_append_data(ev->eir, 0, EIR_NAME_COMPLETE, name, 3556 3495 name_len); 3557 3496 3558 - put_unaligned_le16(eir_len, &ev->eir_len); 3497 + ev->eir_len = cpu_to_le16(eir_len); 3559 3498 3560 3499 return mgmt_event(MGMT_EV_DEVICE_FOUND, hdev, ev, 3561 3500 sizeof(*ev) + eir_len, NULL); ··· 3655 3594 3656 3595 module_param(enable_hs, bool, 0644); 3657 3596 MODULE_PARM_DESC(enable_hs, "Enable High Speed support"); 3658 - 3659 - module_param(enable_le, bool, 0644); 3660 - MODULE_PARM_DESC(enable_le, "Enable Low Energy support");
+10 -4
net/bluetooth/rfcomm/sock.c
··· 260 260 261 261 if (parent) { 262 262 sk->sk_type = parent->sk_type; 263 - pi->dlc->defer_setup = bt_sk(parent)->defer_setup; 263 + pi->dlc->defer_setup = test_bit(BT_SK_DEFER_SETUP, 264 + &bt_sk(parent)->flags); 264 265 265 266 pi->sec_level = rfcomm_pi(parent)->sec_level; 266 267 pi->role_switch = rfcomm_pi(parent)->role_switch; ··· 732 731 break; 733 732 } 734 733 735 - bt_sk(sk)->defer_setup = opt; 734 + if (opt) 735 + set_bit(BT_SK_DEFER_SETUP, &bt_sk(sk)->flags); 736 + else 737 + clear_bit(BT_SK_DEFER_SETUP, &bt_sk(sk)->flags); 738 + 736 739 break; 737 740 738 741 default: ··· 854 849 break; 855 850 } 856 851 857 - if (put_user(bt_sk(sk)->defer_setup, (u32 __user *) optval)) 852 + if (put_user(test_bit(BT_SK_DEFER_SETUP, &bt_sk(sk)->flags), 853 + (u32 __user *) optval)) 858 854 err = -EFAULT; 859 855 860 856 break; ··· 978 972 done: 979 973 bh_unlock_sock(parent); 980 974 981 - if (bt_sk(parent)->defer_setup) 975 + if (test_bit(BT_SK_DEFER_SETUP, &bt_sk(parent)->flags)) 982 976 parent->sk_state_change(parent); 983 977 984 978 return result;
+44 -31
net/bluetooth/sco.c
··· 61 61 static void __sco_chan_add(struct sco_conn *conn, struct sock *sk, struct sock *parent); 62 62 static void sco_chan_del(struct sock *sk, int err); 63 63 64 - static int sco_conn_del(struct hci_conn *conn, int err); 65 - 66 64 static void sco_sock_close(struct sock *sk); 67 65 static void sco_sock_kill(struct sock *sk); 68 66 ··· 93 95 } 94 96 95 97 /* ---- SCO connections ---- */ 96 - static struct sco_conn *sco_conn_add(struct hci_conn *hcon, __u8 status) 98 + static struct sco_conn *sco_conn_add(struct hci_conn *hcon) 97 99 { 98 100 struct hci_dev *hdev = hcon->hdev; 99 101 struct sco_conn *conn = hcon->sco_data; 100 102 101 - if (conn || status) 103 + if (conn) 102 104 return conn; 103 105 104 106 conn = kzalloc(sizeof(struct sco_conn), GFP_ATOMIC); ··· 193 195 else 194 196 type = SCO_LINK; 195 197 196 - hcon = hci_connect(hdev, type, dst, BT_SECURITY_LOW, HCI_AT_NO_BONDING); 198 + hcon = hci_connect(hdev, type, dst, BDADDR_BREDR, BT_SECURITY_LOW, 199 + HCI_AT_NO_BONDING); 197 200 if (IS_ERR(hcon)) { 198 201 err = PTR_ERR(hcon); 199 202 goto done; 200 203 } 201 204 202 - conn = sco_conn_add(hcon, 0); 205 + conn = sco_conn_add(hcon); 203 206 if (!conn) { 204 207 hci_conn_put(hcon); 205 208 err = -ENOMEM; ··· 232 233 { 233 234 struct sco_conn *conn = sco_pi(sk)->conn; 234 235 struct sk_buff *skb; 235 - int err, count; 236 + int err; 236 237 237 238 /* Check outgoing MTU */ 238 239 if (len > conn->mtu) ··· 240 241 241 242 BT_DBG("sk %p len %d", sk, len); 242 243 243 - count = min_t(unsigned int, conn->mtu, len); 244 - skb = bt_skb_send_alloc(sk, count, 245 - msg->msg_flags & MSG_DONTWAIT, &err); 244 + skb = bt_skb_send_alloc(sk, len, msg->msg_flags & MSG_DONTWAIT, &err); 246 245 if (!skb) 247 246 return err; 248 247 249 - if (memcpy_fromiovec(skb_put(skb, count), msg->msg_iov, count)) { 248 + if (memcpy_fromiovec(skb_put(skb, len), msg->msg_iov, len)) { 250 249 kfree_skb(skb); 251 250 return -EFAULT; 252 251 } 253 252 254 253 hci_send_sco(conn->hcon, skb); 255 254 256 - return count; 255 + return len; 257 256 } 258 257 259 258 static inline void sco_recv_frame(struct sco_conn *conn, struct sk_buff *skb) ··· 274 277 } 275 278 276 279 /* -------- Socket interface ---------- */ 277 - static struct sock *__sco_get_sock_by_addr(bdaddr_t *ba) 280 + static struct sock *__sco_get_sock_listen_by_addr(bdaddr_t *ba) 278 281 { 279 - struct sock *sk; 280 282 struct hlist_node *node; 283 + struct sock *sk; 281 284 282 - sk_for_each(sk, node, &sco_sk_list.head) 285 + sk_for_each(sk, node, &sco_sk_list.head) { 286 + if (sk->sk_state != BT_LISTEN) 287 + continue; 288 + 283 289 if (!bacmp(&bt_sk(sk)->src, ba)) 284 - goto found; 285 - sk = NULL; 286 - found: 287 - return sk; 290 + return sk; 291 + } 292 + 293 + return NULL; 288 294 } 289 295 290 296 /* Find socket listening on source bdaddr. ··· 466 466 { 467 467 struct sockaddr_sco *sa = (struct sockaddr_sco *) addr; 468 468 struct sock *sk = sock->sk; 469 - bdaddr_t *src = &sa->sco_bdaddr; 470 469 int err = 0; 471 470 472 471 BT_DBG("sk %p %s", sk, batostr(&sa->sco_bdaddr)); ··· 480 481 goto done; 481 482 } 482 483 483 - write_lock(&sco_sk_list.lock); 484 - 485 - if (bacmp(src, BDADDR_ANY) && __sco_get_sock_by_addr(src)) { 486 - err = -EADDRINUSE; 487 - } else { 488 - /* Save source address */ 489 - bacpy(&bt_sk(sk)->src, &sa->sco_bdaddr); 490 - sk->sk_state = BT_BOUND; 484 + if (sk->sk_type != SOCK_SEQPACKET) { 485 + err = -EINVAL; 486 + goto done; 491 487 } 492 488 493 - write_unlock(&sco_sk_list.lock); 489 + bacpy(&bt_sk(sk)->src, &sa->sco_bdaddr); 490 + 491 + sk->sk_state = BT_BOUND; 494 492 495 493 done: 496 494 release_sock(sk); ··· 533 537 static int sco_sock_listen(struct socket *sock, int backlog) 534 538 { 535 539 struct sock *sk = sock->sk; 540 + bdaddr_t *src = &bt_sk(sk)->src; 536 541 int err = 0; 537 542 538 543 BT_DBG("sk %p backlog %d", sk, backlog); 539 544 540 545 lock_sock(sk); 541 546 542 - if (sk->sk_state != BT_BOUND || sock->type != SOCK_SEQPACKET) { 547 + if (sk->sk_state != BT_BOUND) { 543 548 err = -EBADFD; 544 549 goto done; 545 550 } 546 551 552 + if (sk->sk_type != SOCK_SEQPACKET) { 553 + err = -EINVAL; 554 + goto done; 555 + } 556 + 557 + write_lock(&sco_sk_list.lock); 558 + 559 + if (__sco_get_sock_listen_by_addr(src)) { 560 + err = -EADDRINUSE; 561 + goto unlock; 562 + } 563 + 547 564 sk->sk_max_ack_backlog = backlog; 548 565 sk->sk_ack_backlog = 0; 566 + 549 567 sk->sk_state = BT_LISTEN; 568 + 569 + unlock: 570 + write_unlock(&sco_sk_list.lock); 550 571 551 572 done: 552 573 release_sock(sk); ··· 936 923 if (!status) { 937 924 struct sco_conn *conn; 938 925 939 - conn = sco_conn_add(hcon, status); 926 + conn = sco_conn_add(hcon); 940 927 if (conn) 941 928 sco_conn_ready(conn); 942 929 } else
+1 -1
net/bluetooth/smp.c
··· 956 956 HCI_SMP_LTK_SLAVE, 1, authenticated, 957 957 enc.ltk, smp->enc_key_size, ediv, ident.rand); 958 958 959 - ident.ediv = cpu_to_le16(ediv); 959 + ident.ediv = ediv; 960 960 961 961 smp_send_cmd(conn, SMP_CMD_MASTER_IDENT, sizeof(ident), &ident); 962 962
+6 -6
net/ipv4/fib_semantics.c
··· 145 145 { 146 146 struct fib_info *fi = container_of(head, struct fib_info, rcu); 147 147 148 + change_nexthops(fi) { 149 + if (nexthop_nh->nh_dev) 150 + dev_put(nexthop_nh->nh_dev); 151 + } endfor_nexthops(fi); 152 + 153 + release_net(fi->fib_net); 148 154 if (fi->fib_metrics != (u32 *) dst_default_metrics) 149 155 kfree(fi->fib_metrics); 150 156 kfree(fi); ··· 162 156 pr_warn("Freeing alive fib_info %p\n", fi); 163 157 return; 164 158 } 165 - change_nexthops(fi) { 166 - if (nexthop_nh->nh_dev) 167 - dev_put(nexthop_nh->nh_dev); 168 - nexthop_nh->nh_dev = NULL; 169 - } endfor_nexthops(fi); 170 159 fib_info_cnt--; 171 - release_net(fi->fib_net); 172 160 call_rcu(&fi->rcu, free_fib_info_rcu); 173 161 } 174 162
+1
net/ipv4/route.c
··· 3452 3452 0, 3453 3453 &rt_hash_log, 3454 3454 &rt_hash_mask, 3455 + 0, 3455 3456 rhash_entries ? 0 : 512 * 1024); 3456 3457 memset(rt_hash_table, 0, (rt_hash_mask + 1) * sizeof(struct rt_hash_bucket)); 3457 3458 rt_hash_lock_init();
+2
net/ipv4/tcp.c
··· 3514 3514 0, 3515 3515 NULL, 3516 3516 &tcp_hashinfo.ehash_mask, 3517 + 0, 3517 3518 thash_entries ? 0 : 512 * 1024); 3518 3519 for (i = 0; i <= tcp_hashinfo.ehash_mask; i++) { 3519 3520 INIT_HLIST_NULLS_HEAD(&tcp_hashinfo.ehash[i].chain, i); ··· 3531 3530 0, 3532 3531 &tcp_hashinfo.bhash_size, 3533 3532 NULL, 3533 + 0, 3534 3534 64 * 1024); 3535 3535 tcp_hashinfo.bhash_size = 1U << tcp_hashinfo.bhash_size; 3536 3536 for (i = 0; i < tcp_hashinfo.bhash_size; i++) {
+5
net/ipv4/tcp_input.c
··· 4555 4555 4556 4556 if (tcp_hdr(from)->fin) 4557 4557 return false; 4558 + 4559 + /* Its possible this segment overlaps with prior segment in queue */ 4560 + if (TCP_SKB_CB(from)->seq != TCP_SKB_CB(to)->end_seq) 4561 + return false; 4562 + 4558 4563 if (!skb_try_coalesce(to, from, fragstolen, &delta)) 4559 4564 return false; 4560 4565
+10 -20
net/ipv4/udp.c
··· 2192 2192 { 2193 2193 unsigned int i; 2194 2194 2195 - if (!CONFIG_BASE_SMALL) 2196 - table->hash = alloc_large_system_hash(name, 2197 - 2 * sizeof(struct udp_hslot), 2198 - uhash_entries, 2199 - 21, /* one slot per 2 MB */ 2200 - 0, 2201 - &table->log, 2202 - &table->mask, 2203 - 64 * 1024); 2204 - /* 2205 - * Make sure hash table has the minimum size 2206 - */ 2207 - if (CONFIG_BASE_SMALL || table->mask < UDP_HTABLE_SIZE_MIN - 1) { 2208 - table->hash = kmalloc(UDP_HTABLE_SIZE_MIN * 2209 - 2 * sizeof(struct udp_hslot), GFP_KERNEL); 2210 - if (!table->hash) 2211 - panic(name); 2212 - table->log = ilog2(UDP_HTABLE_SIZE_MIN); 2213 - table->mask = UDP_HTABLE_SIZE_MIN - 1; 2214 - } 2195 + table->hash = alloc_large_system_hash(name, 2196 + 2 * sizeof(struct udp_hslot), 2197 + uhash_entries, 2198 + 21, /* one slot per 2 MB */ 2199 + 0, 2200 + &table->log, 2201 + &table->mask, 2202 + UDP_HTABLE_SIZE_MIN, 2203 + 64 * 1024); 2204 + 2215 2205 table->hash2 = table->hash + (table->mask + 1); 2216 2206 for (i = 0; i <= table->mask; i++) { 2217 2207 INIT_HLIST_NULLS_HEAD(&table->hash[i].head, i);
+8 -2
net/mac80211/agg-tx.c
··· 421 421 struct tid_ampdu_tx *tid_tx; 422 422 unsigned long timeout; 423 423 424 - tid_tx = rcu_dereference_protected_tid_tx(sta, *ptid); 425 - if (!tid_tx) 424 + rcu_read_lock(); 425 + tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[*ptid]); 426 + if (!tid_tx || test_bit(HT_AGG_STATE_STOPPING, &tid_tx->state)) { 427 + rcu_read_unlock(); 426 428 return; 429 + } 427 430 428 431 timeout = tid_tx->last_tx + TU_TO_JIFFIES(tid_tx->timeout); 429 432 if (time_is_after_jiffies(timeout)) { 430 433 mod_timer(&tid_tx->session_timer, timeout); 434 + rcu_read_unlock(); 431 435 return; 432 436 } 437 + 438 + rcu_read_unlock(); 433 439 434 440 #ifdef CONFIG_MAC80211_HT_DEBUG 435 441 printk(KERN_DEBUG "tx session timer expired on tid %d\n", (u16)*ptid);
+2
net/mac80211/debugfs_netdev.c
··· 509 509 u.mesh.mshcfg.dot11MeshHWMPRannInterval, DEC); 510 510 IEEE80211_IF_FILE(dot11MeshForwarding, u.mesh.mshcfg.dot11MeshForwarding, DEC); 511 511 IEEE80211_IF_FILE(rssi_threshold, u.mesh.mshcfg.rssi_threshold, DEC); 512 + IEEE80211_IF_FILE(ht_opmode, u.mesh.mshcfg.ht_opmode, DEC); 512 513 #endif 513 514 514 515 #define DEBUGFS_ADD_MODE(name, mode) \ ··· 609 608 MESHPARAMS_ADD(dot11MeshHWMPRannInterval); 610 609 MESHPARAMS_ADD(dot11MeshGateAnnouncementProtocol); 611 610 MESHPARAMS_ADD(rssi_threshold); 611 + MESHPARAMS_ADD(ht_opmode); 612 612 #undef MESHPARAMS_ADD 613 613 } 614 614 #endif
+5
net/mac80211/ibss.c
··· 163 163 sizeof(struct ieee80211_ht_operation)); 164 164 pos = ieee80211_ie_build_ht_cap(pos, &sband->ht_cap, 165 165 sband->ht_cap.cap); 166 + /* 167 + * Note: According to 802.11n-2009 9.13.3.1, HT Protection 168 + * field and RIFS Mode are reserved in IBSS mode, therefore 169 + * keep them at 0 170 + */ 166 171 pos = ieee80211_ie_build_ht_oper(pos, &sband->ht_cap, 167 172 chan, channel_type, 0); 168 173 }
+3 -1
net/mac80211/iface.c
··· 206 206 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 207 207 if (local->hw.flags & IEEE80211_HW_QUEUE_CONTROL) 208 208 sdata->vif.hw_queue[i] = IEEE80211_INVAL_HW_QUEUE; 209 - else 209 + else if (local->hw.queues >= IEEE80211_NUM_ACS) 210 210 sdata->vif.hw_queue[i] = i; 211 + else 212 + sdata->vif.hw_queue[i] = 0; 211 213 } 212 214 sdata->vif.cab_queue = IEEE80211_INVAL_HW_QUEUE; 213 215 }
+3
net/mac80211/main.c
··· 596 596 local->hw.offchannel_tx_hw_queue = IEEE80211_INVAL_HW_QUEUE; 597 597 local->hw.conf.long_frame_max_tx_count = wiphy->retry_long; 598 598 local->hw.conf.short_frame_max_tx_count = wiphy->retry_short; 599 + local->hw.radiotap_mcs_details = IEEE80211_RADIOTAP_MCS_HAVE_MCS | 600 + IEEE80211_RADIOTAP_MCS_HAVE_GI | 601 + IEEE80211_RADIOTAP_MCS_HAVE_BW; 599 602 local->user_power_level = -1; 600 603 wiphy->ht_capa_mod_mask = &mac80211_ht_capa_mod_mask; 601 604
+4 -2
net/mac80211/mesh.c
··· 109 109 110 110 /* Disallow HT40+/- mismatch */ 111 111 if (ie->ht_operation && 112 - local->_oper_channel_type > NL80211_CHAN_HT20 && 113 - sta_channel_type > NL80211_CHAN_HT20 && 112 + (local->_oper_channel_type == NL80211_CHAN_HT40MINUS || 113 + local->_oper_channel_type == NL80211_CHAN_HT40PLUS) && 114 + (sta_channel_type == NL80211_CHAN_HT40MINUS || 115 + sta_channel_type == NL80211_CHAN_HT40PLUS) && 114 116 local->_oper_channel_type != sta_channel_type) 115 117 goto mismatch; 116 118
+4 -1
net/mac80211/mesh_hwmp.c
··· 603 603 hopcount, ttl, cpu_to_le32(lifetime), 604 604 cpu_to_le32(metric), cpu_to_le32(preq_id), 605 605 sdata); 606 - ifmsh->mshstats.fwded_mcast++; 606 + if (!is_multicast_ether_addr(da)) 607 + ifmsh->mshstats.fwded_unicast++; 608 + else 609 + ifmsh->mshstats.fwded_mcast++; 607 610 ifmsh->mshstats.fwded_frames++; 608 611 } 609 612 }
+33 -32
net/mac80211/mesh_plink.c
··· 105 105 return sta; 106 106 } 107 107 108 - /** mesh_set_ht_prot_mode - set correct HT protection mode 108 + /* 109 + * mesh_set_ht_prot_mode - set correct HT protection mode 109 110 * 110 - * Section 9.23.3.5 of IEEE 80211s standard describes the protection rules for 111 - * HT mesh STA in a MBSS. Three HT protection modes are supported for now, 112 - * non-HT mixed mode, 20MHz-protection and no-protection mode. non-HT mixed 113 - * mode is selected if any non-HT peers are present in our MBSS. 114 - * 20MHz-protection mode is selected if all peers in our 20/40MHz MBSS support 115 - * HT and atleast one HT20 peer is present. Otherwise no-protection mode is 116 - * selected. 111 + * Section 9.23.3.5 of IEEE 80211-2012 describes the protection rules for HT 112 + * mesh STA in a MBSS. Three HT protection modes are supported for now, non-HT 113 + * mixed mode, 20MHz-protection and no-protection mode. non-HT mixed mode is 114 + * selected if any non-HT peers are present in our MBSS. 20MHz-protection mode 115 + * is selected if all peers in our 20/40MHz MBSS support HT and atleast one 116 + * HT20 peer is present. Otherwise no-protection mode is selected. 117 117 */ 118 118 static u32 mesh_set_ht_prot_mode(struct ieee80211_sub_if_data *sdata) 119 119 { ··· 128 128 129 129 rcu_read_lock(); 130 130 list_for_each_entry_rcu(sta, &local->sta_list, list) { 131 - if (sdata == sta->sdata && 132 - sta->plink_state == NL80211_PLINK_ESTAB) { 133 - switch (sta->ch_type) { 134 - case NL80211_CHAN_NO_HT: 135 - mpl_dbg("mesh_plink %pM: nonHT sta (%pM) is present", 136 - sdata->vif.addr, sta->sta.addr); 137 - non_ht_sta = true; 138 - goto out; 139 - case NL80211_CHAN_HT20: 140 - mpl_dbg("mesh_plink %pM: HT20 sta (%pM) is present", 141 - sdata->vif.addr, sta->sta.addr); 142 - ht20_sta = true; 143 - default: 144 - break; 145 - } 131 + if (sdata != sta->sdata || 132 + sta->plink_state != NL80211_PLINK_ESTAB) 133 + continue; 134 + 135 + switch (sta->ch_type) { 136 + case NL80211_CHAN_NO_HT: 137 + mpl_dbg("mesh_plink %pM: nonHT sta (%pM) is present", 138 + sdata->vif.addr, sta->sta.addr); 139 + non_ht_sta = true; 140 + goto out; 141 + case NL80211_CHAN_HT20: 142 + mpl_dbg("mesh_plink %pM: HT20 sta (%pM) is present", 143 + sdata->vif.addr, sta->sta.addr); 144 + ht20_sta = true; 145 + default: 146 + break; 146 147 } 147 148 } 148 149 out: ··· 347 346 348 347 sta = sta_info_get(sdata, addr); 349 348 if (!sta) { 349 + /* Userspace handles peer allocation when security is enabled */ 350 + if (sdata->u.mesh.security & IEEE80211_MESH_SEC_AUTHED) { 351 + cfg80211_notify_new_peer_candidate(sdata->dev, addr, 352 + elems->ie_start, 353 + elems->total_len, 354 + GFP_ATOMIC); 355 + return NULL; 356 + } 357 + 350 358 sta = mesh_plink_alloc(sdata, addr); 351 359 if (!sta) 352 360 return NULL; ··· 396 386 struct ieee802_11_elems *elems) 397 387 { 398 388 struct sta_info *sta; 399 - 400 - /* Userspace handles peer allocation when security is enabled */ 401 - if (sdata->u.mesh.security & IEEE80211_MESH_SEC_AUTHED) { 402 - cfg80211_notify_new_peer_candidate(sdata->dev, hw_addr, 403 - elems->ie_start, 404 - elems->total_len, 405 - GFP_KERNEL); 406 - return; 407 - } 408 389 409 390 rcu_read_lock(); 410 391 sta = mesh_peer_init(sdata, hw_addr, elems);
+3 -3
net/mac80211/rx.c
··· 204 204 205 205 if (status->flag & RX_FLAG_HT) { 206 206 rthdr->it_present |= cpu_to_le32(1 << IEEE80211_RADIOTAP_MCS); 207 - *pos++ = IEEE80211_RADIOTAP_MCS_HAVE_MCS | 208 - IEEE80211_RADIOTAP_MCS_HAVE_GI | 209 - IEEE80211_RADIOTAP_MCS_HAVE_BW; 207 + *pos++ = local->hw.radiotap_mcs_details; 210 208 *pos = 0; 211 209 if (status->flag & RX_FLAG_SHORT_GI) 212 210 *pos |= IEEE80211_RADIOTAP_MCS_SGI; 213 211 if (status->flag & RX_FLAG_40MHZ) 214 212 *pos |= IEEE80211_RADIOTAP_MCS_BW_40; 213 + if (status->flag & RX_FLAG_HT_GF) 214 + *pos |= IEEE80211_RADIOTAP_MCS_FMT_GF; 215 215 pos++; 216 216 *pos++ = status->rate_idx; 217 217 }
+12 -3
net/mac80211/wep.c
··· 92 92 int keylen, int keyidx) 93 93 { 94 94 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 95 + struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 95 96 unsigned int hdrlen; 96 97 u8 *newhdr; 97 98 ··· 105 104 hdrlen = ieee80211_hdrlen(hdr->frame_control); 106 105 newhdr = skb_push(skb, WEP_IV_LEN); 107 106 memmove(newhdr, newhdr + WEP_IV_LEN, hdrlen); 107 + 108 + /* the HW only needs room for the IV, but not the actual IV */ 109 + if (info->control.hw_key && 110 + (info->control.hw_key->flags & IEEE80211_KEY_FLAG_PUT_IV_SPACE)) 111 + return newhdr + hdrlen; 112 + 113 + skb_set_network_header(skb, skb_network_offset(skb) + WEP_IV_LEN); 108 114 ieee80211_wep_get_iv(local, keylen, keyidx, newhdr + hdrlen); 109 115 return newhdr + hdrlen; 110 116 } ··· 321 313 static int wep_encrypt_skb(struct ieee80211_tx_data *tx, struct sk_buff *skb) 322 314 { 323 315 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 316 + struct ieee80211_key_conf *hw_key = info->control.hw_key; 324 317 325 - if (!info->control.hw_key) { 318 + if (!hw_key) { 326 319 if (ieee80211_wep_encrypt(tx->local, skb, tx->key->conf.key, 327 320 tx->key->conf.keylen, 328 321 tx->key->conf.keyidx)) 329 322 return -1; 330 - } else if (info->control.hw_key->flags & 331 - IEEE80211_KEY_FLAG_GENERATE_IV) { 323 + } else if ((hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_IV) || 324 + (hw_key->flags & IEEE80211_KEY_FLAG_PUT_IV_SPACE)) { 332 325 if (!ieee80211_wep_add_iv(tx->local, skb, 333 326 tx->key->conf.keylen, 334 327 tx->key->conf.keyidx))
+9 -1
net/mac80211/wpa.c
··· 183 183 u8 *pos; 184 184 185 185 if (info->control.hw_key && 186 - !(info->control.hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_IV)) { 186 + !(info->control.hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_IV) && 187 + !(info->control.hw_key->flags & IEEE80211_KEY_FLAG_PUT_IV_SPACE)) { 187 188 /* hwaccel - with no need for software-generated IV */ 188 189 return 0; 189 190 } ··· 203 202 204 203 pos = skb_push(skb, TKIP_IV_LEN); 205 204 memmove(pos, pos + TKIP_IV_LEN, hdrlen); 205 + skb_set_network_header(skb, skb_network_offset(skb) + TKIP_IV_LEN); 206 206 pos += hdrlen; 207 + 208 + /* the HW only needs room for the IV, but not the actual IV */ 209 + if (info->control.hw_key && 210 + (info->control.hw_key->flags & IEEE80211_KEY_FLAG_PUT_IV_SPACE)) 211 + return 0; 207 212 208 213 /* Increase IV for the frame */ 209 214 spin_lock_irqsave(&key->u.tkip.txlock, flags); ··· 429 422 430 423 pos = skb_push(skb, CCMP_HDR_LEN); 431 424 memmove(pos, pos + CCMP_HDR_LEN, hdrlen); 425 + skb_set_network_header(skb, skb_network_offset(skb) + CCMP_HDR_LEN); 432 426 433 427 /* the HW only needs room for the IV, but not the actual IV */ 434 428 if (info->control.hw_key &&
+85 -27
net/nfc/core.c
··· 97 97 goto error; 98 98 } 99 99 100 - if (dev->polling || dev->activated_target_idx != NFC_TARGET_IDX_NONE) { 100 + if (dev->polling || dev->active_target) { 101 101 rc = -EBUSY; 102 102 goto error; 103 103 } ··· 183 183 return rc; 184 184 } 185 185 186 + static struct nfc_target *nfc_find_target(struct nfc_dev *dev, u32 target_idx) 187 + { 188 + int i; 189 + 190 + if (dev->n_targets == 0) 191 + return NULL; 192 + 193 + for (i = 0; i < dev->n_targets ; i++) { 194 + if (dev->targets[i].idx == target_idx) 195 + return &dev->targets[i]; 196 + } 197 + 198 + return NULL; 199 + } 200 + 186 201 int nfc_dep_link_up(struct nfc_dev *dev, int target_index, u8 comm_mode) 187 202 { 188 203 int rc = 0; 189 204 u8 *gb; 190 205 size_t gb_len; 206 + struct nfc_target *target; 191 207 192 208 pr_debug("dev_name=%s comm %d\n", dev_name(&dev->dev), comm_mode); 193 209 ··· 228 212 goto error; 229 213 } 230 214 231 - rc = dev->ops->dep_link_up(dev, target_index, comm_mode, gb, gb_len); 215 + target = nfc_find_target(dev, target_index); 216 + if (target == NULL) { 217 + rc = -ENOTCONN; 218 + goto error; 219 + } 220 + 221 + rc = dev->ops->dep_link_up(dev, target, comm_mode, gb, gb_len); 232 222 if (!rc) 233 - dev->activated_target_idx = target_index; 223 + dev->active_target = target; 234 224 235 225 error: 236 226 device_unlock(&dev->dev); ··· 272 250 rc = dev->ops->dep_link_down(dev); 273 251 if (!rc) { 274 252 dev->dep_link_up = false; 275 - dev->activated_target_idx = NFC_TARGET_IDX_NONE; 253 + dev->active_target = NULL; 276 254 nfc_llcp_mac_is_down(dev); 277 255 nfc_genl_dep_link_down_event(dev); 278 256 } ··· 304 282 int nfc_activate_target(struct nfc_dev *dev, u32 target_idx, u32 protocol) 305 283 { 306 284 int rc; 285 + struct nfc_target *target; 307 286 308 287 pr_debug("dev_name=%s target_idx=%u protocol=%u\n", 309 288 dev_name(&dev->dev), target_idx, protocol); ··· 316 293 goto error; 317 294 } 318 295 319 - rc = dev->ops->activate_target(dev, target_idx, protocol); 296 + if (dev->active_target) { 297 + rc = -EBUSY; 298 + goto error; 299 + } 300 + 301 + target = nfc_find_target(dev, target_idx); 302 + if (target == NULL) { 303 + rc = -ENOTCONN; 304 + goto error; 305 + } 306 + 307 + rc = dev->ops->activate_target(dev, target, protocol); 320 308 if (!rc) { 321 - dev->activated_target_idx = target_idx; 309 + dev->active_target = target; 322 310 323 311 if (dev->ops->check_presence) 324 312 mod_timer(&dev->check_pres_timer, jiffies + ··· 361 327 goto error; 362 328 } 363 329 330 + if (dev->active_target == NULL) { 331 + rc = -ENOTCONN; 332 + goto error; 333 + } 334 + 335 + if (dev->active_target->idx != target_idx) { 336 + rc = -ENOTCONN; 337 + goto error; 338 + } 339 + 364 340 if (dev->ops->check_presence) 365 341 del_timer_sync(&dev->check_pres_timer); 366 342 367 - dev->ops->deactivate_target(dev, target_idx); 368 - dev->activated_target_idx = NFC_TARGET_IDX_NONE; 343 + dev->ops->deactivate_target(dev, dev->active_target); 344 + dev->active_target = NULL; 369 345 370 346 error: 371 347 device_unlock(&dev->dev); ··· 409 365 goto error; 410 366 } 411 367 412 - if (dev->activated_target_idx == NFC_TARGET_IDX_NONE) { 368 + if (dev->active_target == NULL) { 413 369 rc = -ENOTCONN; 414 370 kfree_skb(skb); 415 371 goto error; 416 372 } 417 373 418 - if (target_idx != dev->activated_target_idx) { 374 + if (dev->active_target->idx != target_idx) { 419 375 rc = -EADDRNOTAVAIL; 420 376 kfree_skb(skb); 421 377 goto error; ··· 424 380 if (dev->ops->check_presence) 425 381 del_timer_sync(&dev->check_pres_timer); 426 382 427 - rc = dev->ops->data_exchange(dev, target_idx, skb, cb, cb_context); 383 + rc = dev->ops->data_exchange(dev, dev->active_target, skb, cb, 384 + cb_context); 428 385 429 386 if (!rc && dev->ops->check_presence) 430 387 mod_timer(&dev->check_pres_timer, jiffies + ··· 501 456 * The device driver must call this function when one or many nfc targets 502 457 * are found. After calling this function, the device driver must stop 503 458 * polling for targets. 459 + * IMPORTANT: this function must not be called from an atomic context. 460 + * In addition, it must also not be called from a context that would prevent 461 + * the NFC Core to call other nfc ops entry point concurrently. 504 462 */ 505 463 int nfc_targets_found(struct nfc_dev *dev, 506 464 struct nfc_target *targets, int n_targets) ··· 517 469 for (i = 0; i < n_targets; i++) 518 470 targets[i].idx = dev->target_next_idx++; 519 471 520 - spin_lock_bh(&dev->targets_lock); 472 + device_lock(&dev->dev); 521 473 522 474 dev->targets_generation++; 523 475 ··· 527 479 528 480 if (!dev->targets) { 529 481 dev->n_targets = 0; 530 - spin_unlock_bh(&dev->targets_lock); 482 + device_unlock(&dev->dev); 531 483 return -ENOMEM; 532 484 } 533 485 534 486 dev->n_targets = n_targets; 535 - spin_unlock_bh(&dev->targets_lock); 487 + device_unlock(&dev->dev); 536 488 537 489 nfc_genl_targets_found(dev); 538 490 ··· 540 492 } 541 493 EXPORT_SYMBOL(nfc_targets_found); 542 494 495 + /** 496 + * nfc_target_lost - inform that an activated target went out of field 497 + * 498 + * @dev: The nfc device that had the activated target in field 499 + * @target_idx: the nfc index of the target 500 + * 501 + * The device driver must call this function when the activated target 502 + * goes out of the field. 503 + * IMPORTANT: this function must not be called from an atomic context. 504 + * In addition, it must also not be called from a context that would prevent 505 + * the NFC Core to call other nfc ops entry point concurrently. 506 + */ 543 507 int nfc_target_lost(struct nfc_dev *dev, u32 target_idx) 544 508 { 545 509 struct nfc_target *tg; ··· 559 499 560 500 pr_debug("dev_name %s n_target %d\n", dev_name(&dev->dev), target_idx); 561 501 562 - spin_lock_bh(&dev->targets_lock); 502 + device_lock(&dev->dev); 563 503 564 504 for (i = 0; i < dev->n_targets; i++) { 565 505 tg = &dev->targets[i]; ··· 568 508 } 569 509 570 510 if (i == dev->n_targets) { 571 - spin_unlock_bh(&dev->targets_lock); 511 + device_unlock(&dev->dev); 572 512 return -EINVAL; 573 513 } 574 514 575 515 dev->targets_generation++; 576 516 dev->n_targets--; 577 - dev->activated_target_idx = NFC_TARGET_IDX_NONE; 517 + dev->active_target = NULL; 578 518 579 519 if (dev->n_targets) { 580 520 memcpy(&dev->targets[i], &dev->targets[i + 1], ··· 584 524 dev->targets = NULL; 585 525 } 586 526 587 - spin_unlock_bh(&dev->targets_lock); 527 + device_unlock(&dev->dev); 588 528 589 529 nfc_genl_target_lost(dev, target_idx); 590 530 ··· 616 556 617 557 device_lock(&dev->dev); 618 558 619 - if (dev->activated_target_idx != NFC_TARGET_IDX_NONE && 620 - timer_pending(&dev->check_pres_timer) == 0) { 621 - rc = dev->ops->check_presence(dev, dev->activated_target_idx); 559 + if (dev->active_target && timer_pending(&dev->check_pres_timer) == 0) { 560 + rc = dev->ops->check_presence(dev, dev->active_target); 622 561 if (!rc) { 623 562 mod_timer(&dev->check_pres_timer, jiffies + 624 563 msecs_to_jiffies(NFC_CHECK_PRES_FREQ_MS)); 625 564 } else { 626 - nfc_target_lost(dev, dev->activated_target_idx); 627 - dev->activated_target_idx = NFC_TARGET_IDX_NONE; 565 + u32 active_target_idx = dev->active_target->idx; 566 + device_unlock(&dev->dev); 567 + nfc_target_lost(dev, active_target_idx); 568 + return; 628 569 } 629 570 } 630 571 ··· 698 637 dev->tx_headroom = tx_headroom; 699 638 dev->tx_tailroom = tx_tailroom; 700 639 701 - spin_lock_init(&dev->targets_lock); 702 640 nfc_genl_data_init(&dev->genl_data); 641 + 703 642 704 643 /* first generation must not be 0 */ 705 644 dev->targets_generation = 1; 706 - 707 - dev->activated_target_idx = NFC_TARGET_IDX_NONE; 708 645 709 646 if (ops->check_presence) { 710 647 char name[32]; ··· 720 661 return NULL; 721 662 } 722 663 } 723 - 724 664 725 665 return dev; 726 666 }
+1
net/nfc/hci/Kconfig
··· 9 9 10 10 config NFC_SHDLC 11 11 depends on NFC_HCI 12 + select CRC_CCITT 12 13 bool "SHDLC link layer for HCI based NFC drivers" 13 14 default n 14 15 ---help---
+23 -55
net/nfc/hci/core.c
··· 235 235 targets->hci_reader_gate = gate; 236 236 237 237 r = nfc_targets_found(hdev->ndev, targets, 1); 238 - if (r < 0) 239 - goto exit; 240 - 241 - kfree(hdev->targets); 242 - hdev->targets = targets; 243 - targets = NULL; 244 - hdev->target_count = 1; 245 238 246 239 exit: 247 240 kfree(targets); ··· 251 258 252 259 switch (event) { 253 260 case NFC_HCI_EVT_TARGET_DISCOVERED: 254 - if (hdev->poll_started == false) { 255 - r = -EPROTO; 256 - goto exit; 257 - } 258 - 259 261 if (skb->len < 1) { /* no status data? */ 260 262 r = -EPROTO; 261 263 goto exit; ··· 484 496 static int hci_start_poll(struct nfc_dev *nfc_dev, u32 protocols) 485 497 { 486 498 struct nfc_hci_dev *hdev = nfc_get_drvdata(nfc_dev); 487 - int r; 488 499 489 500 if (hdev->ops->start_poll) 490 - r = hdev->ops->start_poll(hdev, protocols); 501 + return hdev->ops->start_poll(hdev, protocols); 491 502 else 492 - r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE, 503 + return nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE, 493 504 NFC_HCI_EVT_READER_REQUESTED, NULL, 0); 494 - if (r == 0) 495 - hdev->poll_started = true; 496 - 497 - return r; 498 505 } 499 506 500 507 static void hci_stop_poll(struct nfc_dev *nfc_dev) 501 508 { 502 509 struct nfc_hci_dev *hdev = nfc_get_drvdata(nfc_dev); 503 510 504 - if (hdev->poll_started) { 505 - nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE, 506 - NFC_HCI_EVT_END_OPERATION, NULL, 0); 507 - hdev->poll_started = false; 508 - } 511 + nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE, 512 + NFC_HCI_EVT_END_OPERATION, NULL, 0); 509 513 } 510 514 511 - static struct nfc_target *hci_find_target(struct nfc_hci_dev *hdev, 512 - u32 target_idx) 515 + static int hci_activate_target(struct nfc_dev *nfc_dev, 516 + struct nfc_target *target, u32 protocol) 513 517 { 514 - int i; 515 - if (hdev->poll_started == false || hdev->targets == NULL) 516 - return NULL; 517 - 518 - for (i = 0; i < hdev->target_count; i++) { 519 - if (hdev->targets[i].idx == target_idx) 520 - return &hdev->targets[i]; 521 - } 522 - 523 - return NULL; 524 - } 525 - 526 - static int hci_activate_target(struct nfc_dev *nfc_dev, u32 target_idx, 527 - u32 protocol) 528 - { 529 - struct nfc_hci_dev *hdev = nfc_get_drvdata(nfc_dev); 530 - 531 - if (hci_find_target(hdev, target_idx) == NULL) 532 - return -ENOMEDIUM; 533 - 534 518 return 0; 535 519 } 536 520 537 - static void hci_deactivate_target(struct nfc_dev *nfc_dev, u32 target_idx) 521 + static void hci_deactivate_target(struct nfc_dev *nfc_dev, 522 + struct nfc_target *target) 538 523 { 539 524 } 540 525 541 - static int hci_data_exchange(struct nfc_dev *nfc_dev, u32 target_idx, 526 + static int hci_data_exchange(struct nfc_dev *nfc_dev, struct nfc_target *target, 542 527 struct sk_buff *skb, data_exchange_cb_t cb, 543 528 void *cb_context) 544 529 { 545 530 struct nfc_hci_dev *hdev = nfc_get_drvdata(nfc_dev); 546 531 int r; 547 - struct nfc_target *target; 548 532 struct sk_buff *res_skb = NULL; 549 533 550 - pr_debug("target_idx=%d\n", target_idx); 551 - 552 - target = hci_find_target(hdev, target_idx); 553 - if (target == NULL) 554 - return -ENOMEDIUM; 534 + pr_debug("target_idx=%d\n", target->idx); 555 535 556 536 switch (target->hci_reader_gate) { 557 537 case NFC_HCI_RF_READER_A_GATE: ··· 561 605 return 0; 562 606 } 563 607 564 - struct nfc_ops hci_nfc_ops = { 608 + static int hci_check_presence(struct nfc_dev *nfc_dev, 609 + struct nfc_target *target) 610 + { 611 + struct nfc_hci_dev *hdev = nfc_get_drvdata(nfc_dev); 612 + 613 + if (hdev->ops->check_presence) 614 + return hdev->ops->check_presence(hdev, target); 615 + 616 + return 0; 617 + } 618 + 619 + static struct nfc_ops hci_nfc_ops = { 565 620 .dev_up = hci_dev_up, 566 621 .dev_down = hci_dev_down, 567 622 .start_poll = hci_start_poll, ··· 580 613 .activate_target = hci_activate_target, 581 614 .deactivate_target = hci_deactivate_target, 582 615 .data_exchange = hci_data_exchange, 616 + .check_presence = hci_check_presence, 583 617 }; 584 618 585 619 struct nfc_hci_dev *nfc_hci_allocate_device(struct nfc_hci_ops *ops,
+12
net/nfc/hci/shdlc.c
··· 816 816 return -EPERM; 817 817 } 818 818 819 + static int nfc_shdlc_check_presence(struct nfc_hci_dev *hdev, 820 + struct nfc_target *target) 821 + { 822 + struct nfc_shdlc *shdlc = nfc_hci_get_clientdata(hdev); 823 + 824 + if (shdlc->ops->check_presence) 825 + return shdlc->ops->check_presence(shdlc, target); 826 + 827 + return 0; 828 + } 829 + 819 830 static struct nfc_hci_ops shdlc_ops = { 820 831 .open = nfc_shdlc_open, 821 832 .close = nfc_shdlc_close, ··· 836 825 .target_from_gate = nfc_shdlc_target_from_gate, 837 826 .complete_target_discovered = nfc_shdlc_complete_target_discovered, 838 827 .data_exchange = nfc_shdlc_data_exchange, 828 + .check_presence = nfc_shdlc_check_presence, 839 829 }; 840 830 841 831 struct nfc_shdlc *nfc_shdlc_allocate(struct nfc_shdlc_ops *ops,
+2 -2
net/nfc/llcp/commands.c
··· 488 488 489 489 memcpy(skb_put(pdu, frag_len), msg_ptr, frag_len); 490 490 491 - skb_queue_head(&sock->tx_queue, pdu); 491 + skb_queue_tail(&sock->tx_queue, pdu); 492 492 493 493 lock_sock(sk); 494 494 ··· 502 502 503 503 kfree(msg_data); 504 504 505 - return 0; 505 + return len; 506 506 } 507 507 508 508 int nfc_llcp_send_rr(struct nfc_llcp_sock *sock)
+7
net/nfc/llcp/llcp.c
··· 448 448 { 449 449 struct nfc_llcp_sock *sock, *llcp_sock, *n; 450 450 451 + pr_debug("ssap dsap %d %d\n", ssap, dsap); 452 + 451 453 if (ssap == 0 && dsap == 0) 452 454 return NULL; 453 455 ··· 785 783 static void nfc_llcp_recv_cc(struct nfc_llcp_local *local, struct sk_buff *skb) 786 784 { 787 785 struct nfc_llcp_sock *llcp_sock; 786 + struct sock *sk; 788 787 u8 dsap, ssap; 789 788 790 789 dsap = nfc_llcp_dsap(skb); ··· 804 801 } 805 802 806 803 llcp_sock->dsap = ssap; 804 + sk = &llcp_sock->sk; 807 805 808 806 nfc_llcp_parse_tlv(local, &skb->data[LLCP_HEADER_SIZE], 809 807 skb->len - LLCP_HEADER_SIZE); 808 + 809 + sk->sk_state = LLCP_CONNECTED; 810 + sk->sk_state_change(sk); 810 811 811 812 nfc_llcp_sock_put(llcp_sock); 812 813 }
+55 -2
net/nfc/llcp/sock.c
··· 27 27 #include "../nfc.h" 28 28 #include "llcp.h" 29 29 30 + static int sock_wait_state(struct sock *sk, int state, unsigned long timeo) 31 + { 32 + DECLARE_WAITQUEUE(wait, current); 33 + int err = 0; 34 + 35 + pr_debug("sk %p", sk); 36 + 37 + add_wait_queue(sk_sleep(sk), &wait); 38 + set_current_state(TASK_INTERRUPTIBLE); 39 + 40 + while (sk->sk_state != state) { 41 + if (!timeo) { 42 + err = -EINPROGRESS; 43 + break; 44 + } 45 + 46 + if (signal_pending(current)) { 47 + err = sock_intr_errno(timeo); 48 + break; 49 + } 50 + 51 + release_sock(sk); 52 + timeo = schedule_timeout(timeo); 53 + lock_sock(sk); 54 + set_current_state(TASK_INTERRUPTIBLE); 55 + 56 + err = sock_error(sk); 57 + if (err) 58 + break; 59 + } 60 + 61 + __set_current_state(TASK_RUNNING); 62 + remove_wait_queue(sk_sleep(sk), &wait); 63 + return err; 64 + } 65 + 30 66 static struct proto llcp_sock_proto = { 31 67 .name = "NFC_LLCP", 32 68 .owner = THIS_MODULE, ··· 340 304 mask |= POLLERR; 341 305 342 306 if (!skb_queue_empty(&sk->sk_receive_queue)) 343 - mask |= POLLIN; 307 + mask |= POLLIN | POLLRDNORM; 344 308 345 309 if (sk->sk_state == LLCP_CLOSED) 346 310 mask |= POLLHUP; 311 + 312 + if (sk->sk_shutdown & RCV_SHUTDOWN) 313 + mask |= POLLRDHUP | POLLIN | POLLRDNORM; 314 + 315 + if (sk->sk_shutdown == SHUTDOWN_MASK) 316 + mask |= POLLHUP; 317 + 318 + if (sock_writeable(sk)) 319 + mask |= POLLOUT | POLLWRNORM | POLLWRBAND; 320 + else 321 + set_bit(SOCK_ASYNC_NOSPACE, &sk->sk_socket->flags); 322 + 323 + pr_debug("mask 0x%x\n", mask); 347 324 348 325 return mask; 349 326 } ··· 511 462 if (ret) 512 463 goto put_dev; 513 464 514 - sk->sk_state = LLCP_CONNECTED; 465 + ret = sock_wait_state(sk, LLCP_CONNECTED, 466 + sock_sndtimeo(sk, flags & O_NONBLOCK)); 467 + if (ret) 468 + goto put_dev; 515 469 516 470 release_sock(sk); 471 + 517 472 return 0; 518 473 519 474 put_dev:
+14 -13
net/nfc/nci/core.c
··· 436 436 msecs_to_jiffies(NCI_RF_DEACTIVATE_TIMEOUT)); 437 437 } 438 438 439 - static int nci_activate_target(struct nfc_dev *nfc_dev, __u32 target_idx, 440 - __u32 protocol) 439 + static int nci_activate_target(struct nfc_dev *nfc_dev, 440 + struct nfc_target *target, __u32 protocol) 441 441 { 442 442 struct nci_dev *ndev = nfc_get_drvdata(nfc_dev); 443 443 struct nci_rf_discover_select_param param; 444 - struct nfc_target *target = NULL; 444 + struct nfc_target *nci_target = NULL; 445 445 int i; 446 446 int rc = 0; 447 447 448 - pr_debug("target_idx %d, protocol 0x%x\n", target_idx, protocol); 448 + pr_debug("target_idx %d, protocol 0x%x\n", target->idx, protocol); 449 449 450 450 if ((atomic_read(&ndev->state) != NCI_W4_HOST_SELECT) && 451 451 (atomic_read(&ndev->state) != NCI_POLL_ACTIVE)) { ··· 459 459 } 460 460 461 461 for (i = 0; i < ndev->n_targets; i++) { 462 - if (ndev->targets[i].idx == target_idx) { 463 - target = &ndev->targets[i]; 462 + if (ndev->targets[i].idx == target->idx) { 463 + nci_target = &ndev->targets[i]; 464 464 break; 465 465 } 466 466 } 467 467 468 - if (!target) { 468 + if (!nci_target) { 469 469 pr_err("unable to find the selected target\n"); 470 470 return -EINVAL; 471 471 } 472 472 473 - if (!(target->supported_protocols & (1 << protocol))) { 473 + if (!(nci_target->supported_protocols & (1 << protocol))) { 474 474 pr_err("target does not support the requested protocol 0x%x\n", 475 475 protocol); 476 476 return -EINVAL; 477 477 } 478 478 479 479 if (atomic_read(&ndev->state) == NCI_W4_HOST_SELECT) { 480 - param.rf_discovery_id = target->logical_idx; 480 + param.rf_discovery_id = nci_target->logical_idx; 481 481 482 482 if (protocol == NFC_PROTO_JEWEL) 483 483 param.rf_protocol = NCI_RF_PROTOCOL_T1T; ··· 501 501 return rc; 502 502 } 503 503 504 - static void nci_deactivate_target(struct nfc_dev *nfc_dev, __u32 target_idx) 504 + static void nci_deactivate_target(struct nfc_dev *nfc_dev, 505 + struct nfc_target *target) 505 506 { 506 507 struct nci_dev *ndev = nfc_get_drvdata(nfc_dev); 507 508 508 - pr_debug("target_idx %d\n", target_idx); 509 + pr_debug("target_idx %d\n", target->idx); 509 510 510 511 if (!ndev->target_active_prot) { 511 512 pr_err("unable to deactivate target, no active target\n"); ··· 521 520 } 522 521 } 523 522 524 - static int nci_data_exchange(struct nfc_dev *nfc_dev, __u32 target_idx, 523 + static int nci_data_exchange(struct nfc_dev *nfc_dev, struct nfc_target *target, 525 524 struct sk_buff *skb, 526 525 data_exchange_cb_t cb, void *cb_context) 527 526 { 528 527 struct nci_dev *ndev = nfc_get_drvdata(nfc_dev); 529 528 int rc; 530 529 531 - pr_debug("target_idx %d, len %d\n", target_idx, skb->len); 530 + pr_debug("target_idx %d, len %d\n", target->idx, skb->len); 532 531 533 532 if (!ndev->target_active_prot) { 534 533 pr_err("unable to exchange data, no active target\n");
+4 -4
net/nfc/nci/data.c
··· 49 49 50 50 if (cb) { 51 51 ndev->data_exchange_cb = NULL; 52 - ndev->data_exchange_cb_context = 0; 52 + ndev->data_exchange_cb_context = NULL; 53 53 54 54 /* forward skb to nfc core */ 55 55 cb(cb_context, skb, err); ··· 200 200 pr_err("error adding room for accumulated rx data\n"); 201 201 202 202 kfree_skb(skb); 203 - skb = 0; 203 + skb = NULL; 204 204 205 205 kfree_skb(ndev->rx_data_reassembly); 206 - ndev->rx_data_reassembly = 0; 206 + ndev->rx_data_reassembly = NULL; 207 207 208 208 err = -ENOMEM; 209 209 goto exit; ··· 216 216 217 217 /* third, free old reassembly */ 218 218 kfree_skb(ndev->rx_data_reassembly); 219 - ndev->rx_data_reassembly = 0; 219 + ndev->rx_data_reassembly = NULL; 220 220 } 221 221 222 222 if (pbf == NCI_PBF_CONT) {
+1
net/nfc/nci/lib.c
··· 31 31 #include <linux/errno.h> 32 32 33 33 #include <net/nfc/nci.h> 34 + #include <net/nfc/nci_core.h> 34 35 35 36 /* NCI status codes to Unix errno mapping */ 36 37 int nci_to_errno(__u8 code)
+1 -1
net/nfc/nci/ntf.c
··· 497 497 /* drop partial rx data packet */ 498 498 if (ndev->rx_data_reassembly) { 499 499 kfree_skb(ndev->rx_data_reassembly); 500 - ndev->rx_data_reassembly = 0; 500 + ndev->rx_data_reassembly = NULL; 501 501 } 502 502 503 503 /* complete the data exchange transaction, if exists */
+3 -3
net/nfc/netlink.c
··· 33 33 .name = NFC_GENL_MCAST_EVENT_NAME, 34 34 }; 35 35 36 - struct genl_family nfc_genl_family = { 36 + static struct genl_family nfc_genl_family = { 37 37 .id = GENL_ID_GENERATE, 38 38 .hdrsize = 0, 39 39 .name = NFC_GENL_NAME, ··· 128 128 cb->args[1] = (long) dev; 129 129 } 130 130 131 - spin_lock_bh(&dev->targets_lock); 131 + device_lock(&dev->dev); 132 132 133 133 cb->seq = dev->targets_generation; 134 134 ··· 141 141 i++; 142 142 } 143 143 144 - spin_unlock_bh(&dev->targets_lock); 144 + device_unlock(&dev->dev); 145 145 146 146 cb->args[0] = i; 147 147
+1 -1
net/nfc/nfc.h
··· 84 84 return 0; 85 85 } 86 86 87 - static inline u8 *nfc_llcp_general_bytes(struct nfc_dev *dev, u8 *gb_len) 87 + static inline u8 *nfc_llcp_general_bytes(struct nfc_dev *dev, size_t *gb_len) 88 88 { 89 89 *gb_len = 0; 90 90 return NULL;
+1 -1
net/wireless/chan.c
··· 45 45 return chan; 46 46 } 47 47 48 - int cfg80211_can_beacon_sec_chan(struct wiphy *wiphy, 48 + bool cfg80211_can_beacon_sec_chan(struct wiphy *wiphy, 49 49 struct ieee80211_channel *chan, 50 50 enum nl80211_channel_type channel_type) 51 51 {
+2 -2
net/wireless/core.c
··· 664 664 mutex_lock(&rdev->devlist_mtx); 665 665 __count = rdev->opencount; 666 666 mutex_unlock(&rdev->devlist_mtx); 667 - __count == 0;})); 667 + __count == 0; })); 668 668 669 669 mutex_lock(&rdev->devlist_mtx); 670 670 BUG_ON(!list_empty(&rdev->netdev_list)); ··· 776 776 .name = "wlan", 777 777 }; 778 778 779 - static int cfg80211_netdev_notifier_call(struct notifier_block * nb, 779 + static int cfg80211_netdev_notifier_call(struct notifier_block *nb, 780 780 unsigned long state, 781 781 void *ndev) 782 782 {
-2
net/wireless/core.h
··· 445 445 struct wireless_dev *wdev, int freq, 446 446 enum nl80211_channel_type channel_type); 447 447 448 - u16 cfg80211_calculate_bitrate(struct rate_info *rate); 449 - 450 448 int ieee80211_get_ratemask(struct ieee80211_supported_band *sband, 451 449 const u8 *rates, unsigned int n_rates, 452 450 u32 *mask);
+37 -32
net/wireless/nl80211.c
··· 1179 1179 wdev->iftype == NL80211_IFTYPE_P2P_GO; 1180 1180 } 1181 1181 1182 + static bool nl80211_valid_channel_type(struct genl_info *info, 1183 + enum nl80211_channel_type *channel_type) 1184 + { 1185 + enum nl80211_channel_type tmp; 1186 + 1187 + if (!info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]) 1188 + return false; 1189 + 1190 + tmp = nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]); 1191 + if (tmp != NL80211_CHAN_NO_HT && 1192 + tmp != NL80211_CHAN_HT20 && 1193 + tmp != NL80211_CHAN_HT40PLUS && 1194 + tmp != NL80211_CHAN_HT40MINUS) 1195 + return false; 1196 + 1197 + if (channel_type) 1198 + *channel_type = tmp; 1199 + 1200 + return true; 1201 + } 1202 + 1182 1203 static int __nl80211_set_channel(struct cfg80211_registered_device *rdev, 1183 1204 struct wireless_dev *wdev, 1184 1205 struct genl_info *info) ··· 1214 1193 if (!nl80211_can_set_dev_channel(wdev)) 1215 1194 return -EOPNOTSUPP; 1216 1195 1217 - if (info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]) { 1218 - channel_type = nla_get_u32(info->attrs[ 1219 - NL80211_ATTR_WIPHY_CHANNEL_TYPE]); 1220 - if (channel_type != NL80211_CHAN_NO_HT && 1221 - channel_type != NL80211_CHAN_HT20 && 1222 - channel_type != NL80211_CHAN_HT40PLUS && 1223 - channel_type != NL80211_CHAN_HT40MINUS) 1224 - return -EINVAL; 1225 - } 1196 + if (info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE] && 1197 + !nl80211_valid_channel_type(info, &channel_type)) 1198 + return -EINVAL; 1226 1199 1227 1200 freq = nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_FREQ]); 1228 1201 ··· 2425 2410 return -EINVAL; 2426 2411 } 2427 2412 2428 - for (flag = 1; flag <= NL80211_STA_FLAG_MAX; flag++) 2429 - if (flags[flag]) 2413 + for (flag = 1; flag <= NL80211_STA_FLAG_MAX; flag++) { 2414 + if (flags[flag]) { 2430 2415 params->sta_flags_set |= (1<<flag); 2416 + 2417 + /* no longer support new API additions in old API */ 2418 + if (flag > NL80211_STA_FLAG_MAX_OLD_API) 2419 + return -EINVAL; 2420 + } 2421 + } 2431 2422 2432 2423 return 0; 2433 2424 } ··· 4933 4912 if (info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]) { 4934 4913 enum nl80211_channel_type channel_type; 4935 4914 4936 - channel_type = nla_get_u32( 4937 - info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]); 4938 - if (channel_type != NL80211_CHAN_NO_HT && 4939 - channel_type != NL80211_CHAN_HT20 && 4940 - channel_type != NL80211_CHAN_HT40MINUS && 4941 - channel_type != NL80211_CHAN_HT40PLUS) 4915 + if (!nl80211_valid_channel_type(info, &channel_type)) 4942 4916 return -EINVAL; 4943 4917 4944 4918 if (channel_type != NL80211_CHAN_NO_HT && ··· 5501 5485 !(rdev->wiphy.flags & WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL)) 5502 5486 return -EOPNOTSUPP; 5503 5487 5504 - if (info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]) { 5505 - channel_type = nla_get_u32( 5506 - info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]); 5507 - if (channel_type != NL80211_CHAN_NO_HT && 5508 - channel_type != NL80211_CHAN_HT20 && 5509 - channel_type != NL80211_CHAN_HT40PLUS && 5510 - channel_type != NL80211_CHAN_HT40MINUS) 5511 - return -EINVAL; 5512 - } 5488 + if (info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE] && 5489 + !nl80211_valid_channel_type(info, &channel_type)) 5490 + return -EINVAL; 5513 5491 5514 5492 freq = nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_FREQ]); 5515 5493 chan = rdev_freq_to_chan(rdev, freq, channel_type); ··· 5774 5764 } 5775 5765 5776 5766 if (info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]) { 5777 - channel_type = nla_get_u32( 5778 - info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]); 5779 - if (channel_type != NL80211_CHAN_NO_HT && 5780 - channel_type != NL80211_CHAN_HT20 && 5781 - channel_type != NL80211_CHAN_HT40PLUS && 5782 - channel_type != NL80211_CHAN_HT40MINUS) 5767 + if (!nl80211_valid_channel_type(info, &channel_type)) 5783 5768 return -EINVAL; 5784 5769 channel_type_valid = true; 5785 5770 }
+1 -1
net/wireless/util.c
··· 879 879 return rate->legacy; 880 880 881 881 /* the formula below does only work for MCS values smaller than 32 */ 882 - if (rate->mcs >= 32) 882 + if (WARN_ON_ONCE(rate->mcs >= 32)) 883 883 return 0; 884 884 885 885 modulation = rate->mcs & 7;