tjh.dev
+3
-4
arch/arm/kernel/hyp-stub.S
+3
-4
arch/arm/kernel/hyp-stub.S
···
146
146
#if !defined(ZIMAGE) && defined(CONFIG_ARM_ARCH_TIMER)
147
147
@ make CNTP_* and CNTPCT accessible from PL1
148
148
mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1
149
-
lsr r7, #16
150
-
and r7, #0xf
151
-
cmp r7, #1
152
-
bne 1f
149
+
ubfx r7, r7, #16, #4
150
+
teq r7, #0
151
+
beq 1f
153
152
mrc p15, 4, r7, c14, c1, 0 @ CNTHCTL
154
153
orr r7, r7, #3 @ PL1PCEN | PL1PCTEN
155
154
mcr p15, 4, r7, c14, c1, 0 @ CNTHCTL
+17
scripts/recordmcount.c
+17
scripts/recordmcount.c
···
38
38
#define R_AARCH64_ABS64 257
39
39
#endif
40
40
41
+
#define R_ARM_PC24 1
42
+
#define R_ARM_THM_CALL 10
43
+
#define R_ARM_CALL 28
44
+
41
45
static int fd_map; /* File descriptor for file being modified. */
42
46
static int mmap_failed; /* Boolean flag. */
43
47
static char gpfx; /* prefix for global symbol name (sometimes '_') */
···
422
418
#define RECORD_MCOUNT_64
423
419
#include "recordmcount.h"
424
420
421
+
static int arm_is_fake_mcount(Elf32_Rel const *rp)
422
+
{
423
+
switch (ELF32_R_TYPE(w(rp->r_info))) {
424
+
case R_ARM_THM_CALL:
425
+
case R_ARM_CALL:
426
+
case R_ARM_PC24:
427
+
return 0;
428
+
}
429
+
430
+
return 1;
431
+
}
432
+
425
433
/* 64-bit EM_MIPS has weird ELF64_Rela.r_info.
426
434
* http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf
427
435
* We interpret Table 29 Relocation Operation (Elf64_Rel, Elf64_Rela) [p.40]
···
539
523
altmcount = "__gnu_mcount_nc";
540
524
make_nop = make_nop_arm;
541
525
rel_type_nop = R_ARM_NONE;
526
+
is_fake_mcount32 = arm_is_fake_mcount;
542
527
gpfx = 0;
543
528
break;
544
529
case EM_AARCH64: