tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

drm/etnaviv: update common.xml.h

Update the common hardware header with new information
from rnndb.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Lucas Stach 2801c849 8555137e

+89 -61
+89 -61
drivers/gpu/drm/etnaviv/common.xml.h
··· 8 8 git clone git://0x04.net/rules-ng-ng 9 9 10 10 The rules-ng-ng source files this header was generated from are: 11 - - state_hi.xml ( 24309 bytes, from 2015-12-12 09:02:53) 12 - - common.xml ( 18379 bytes, from 2015-12-12 09:02:53) 11 + - state.xml ( 19930 bytes, from 2017-03-09 15:43:43) 12 + - common.xml ( 23473 bytes, from 2017-03-09 15:43:43) 13 + - state_hi.xml ( 26403 bytes, from 2017-03-09 15:43:43) 14 + - copyright.xml ( 1597 bytes, from 2016-12-08 16:37:56) 15 + - state_2d.xml ( 51552 bytes, from 2016-12-08 16:37:56) 16 + - state_3d.xml ( 66957 bytes, from 2017-03-09 15:43:43) 17 + - state_vg.xml ( 5975 bytes, from 2016-12-08 16:37:56) 13 18 14 - Copyright (C) 2015 19 + Copyright (C) 2012-2017 by the following authors: 20 + - Wladimir J. van der Laan <laanwj@gmail.com> 21 + - Christian Gmeiner <christian.gmeiner@gmail.com> 22 + - Lucas Stach <l.stach@pengutronix.de> 23 + - Russell King <rmk@arm.linux.org.uk> 24 + 25 + Permission is hereby granted, free of charge, to any person obtaining a 26 + copy of this software and associated documentation files (the "Software"), 27 + to deal in the Software without restriction, including without limitation 28 + the rights to use, copy, modify, merge, publish, distribute, sub license, 29 + and/or sell copies of the Software, and to permit persons to whom the 30 + Software is furnished to do so, subject to the following conditions: 31 + 32 + The above copyright notice and this permission notice (including the 33 + next paragraph) shall be included in all copies or substantial portions 34 + of the Software. 35 + 36 + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 37 + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 38 + FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 39 + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 40 + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 41 + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 42 + DEALINGS IN THE SOFTWARE. 15 43 */ 16 44 17 45 ··· 190 162 #define chipMinorFeatures1_FC_FLUSH_STALL 0x80000000 191 163 #define chipMinorFeatures2_LINE_LOOP 0x00000001 192 164 #define chipMinorFeatures2_LOGIC_OP 0x00000002 193 - #define chipMinorFeatures2_UNK2 0x00000004 165 + #define chipMinorFeatures2_SEAMLESS_CUBE_MAP 0x00000004 194 166 #define chipMinorFeatures2_SUPERTILED_TEXTURE 0x00000008 195 - #define chipMinorFeatures2_UNK4 0x00000010 167 + #define chipMinorFeatures2_LINEAR_PE 0x00000010 196 168 #define chipMinorFeatures2_RECT_PRIMITIVE 0x00000020 197 169 #define chipMinorFeatures2_COMPOSITION 0x00000040 198 170 #define chipMinorFeatures2_CORRECT_AUTO_DISABLE_COUNT 0x00000080 199 - #define chipMinorFeatures2_UNK8 0x00000100 200 - #define chipMinorFeatures2_UNK9 0x00000200 201 - #define chipMinorFeatures2_UNK10 0x00000400 171 + #define chipMinorFeatures2_PE_SWIZZLE 0x00000100 172 + #define chipMinorFeatures2_END_EVENT 0x00000200 173 + #define chipMinorFeatures2_S1S8 0x00000400 202 174 #define chipMinorFeatures2_HALTI1 0x00000800 203 - #define chipMinorFeatures2_UNK12 0x00001000 204 - #define chipMinorFeatures2_UNK13 0x00002000 205 - #define chipMinorFeatures2_UNK14 0x00004000 175 + #define chipMinorFeatures2_RGB888 0x00001000 176 + #define chipMinorFeatures2_TX__YUV_ASSEMBLER 0x00002000 177 + #define chipMinorFeatures2_DYNAMIC_FREQUENCY_SCALING 0x00004000 206 178 #define chipMinorFeatures2_EXTRA_TEXTURE_STATE 0x00008000 207 179 #define chipMinorFeatures2_FULL_DIRECTFB 0x00010000 208 180 #define chipMinorFeatures2_2D_TILING 0x00020000 209 181 #define chipMinorFeatures2_THREAD_WALKER_IN_PS 0x00040000 210 182 #define chipMinorFeatures2_TILE_FILLER 0x00080000 211 - #define chipMinorFeatures2_UNK20 0x00100000 183 + #define chipMinorFeatures2_YUV_STANDARD 0x00100000 212 184 #define chipMinorFeatures2_2D_MULTI_SOURCE_BLIT 0x00200000 213 - #define chipMinorFeatures2_UNK22 0x00400000 214 - #define chipMinorFeatures2_UNK23 0x00800000 215 - #define chipMinorFeatures2_UNK24 0x01000000 185 + #define chipMinorFeatures2_YUV_CONVERSION 0x00400000 186 + #define chipMinorFeatures2_FLUSH_FIXED_2D 0x00800000 187 + #define chipMinorFeatures2_INTERLEAVER 0x01000000 216 188 #define chipMinorFeatures2_MIXED_STREAMS 0x02000000 217 189 #define chipMinorFeatures2_2D_420_L2CACHE 0x04000000 218 - #define chipMinorFeatures2_UNK27 0x08000000 190 + #define chipMinorFeatures2_BUG_FIXES7 0x08000000 219 191 #define chipMinorFeatures2_2D_NO_INDEX8_BRUSH 0x10000000 220 192 #define chipMinorFeatures2_TEXTURE_TILED_READ 0x20000000 221 - #define chipMinorFeatures2_UNK30 0x40000000 222 - #define chipMinorFeatures2_UNK31 0x80000000 193 + #define chipMinorFeatures2_DECOMPRESS_Z16 0x40000000 194 + #define chipMinorFeatures2_BUG_FIXES8 0x80000000 223 195 #define chipMinorFeatures3_ROTATION_STALL_FIX 0x00000001 224 - #define chipMinorFeatures3_UNK1 0x00000002 196 + #define chipMinorFeatures3_OCL_ONLY 0x00000002 225 197 #define chipMinorFeatures3_2D_MULTI_SOURCE_BLT_EX 0x00000004 226 - #define chipMinorFeatures3_UNK3 0x00000008 227 - #define chipMinorFeatures3_UNK4 0x00000010 228 - #define chipMinorFeatures3_UNK5 0x00000020 229 - #define chipMinorFeatures3_UNK6 0x00000040 230 - #define chipMinorFeatures3_UNK7 0x00000080 198 + #define chipMinorFeatures3_INSTRUCTION_CACHE 0x00000008 199 + #define chipMinorFeatures3_GEOMETRY_SHADER 0x00000010 200 + #define chipMinorFeatures3_TEX_COMPRESSION_SUPERTILED 0x00000020 201 + #define chipMinorFeatures3_GENERICS 0x00000040 202 + #define chipMinorFeatures3_BUG_FIXES9 0x00000080 231 203 #define chipMinorFeatures3_FAST_MSAA 0x00000100 232 - #define chipMinorFeatures3_UNK9 0x00000200 204 + #define chipMinorFeatures3_WCLIP 0x00000200 233 205 #define chipMinorFeatures3_BUG_FIXES10 0x00000400 234 - #define chipMinorFeatures3_UNK11 0x00000800 206 + #define chipMinorFeatures3_UNIFIED_SAMPLERS 0x00000800 235 207 #define chipMinorFeatures3_BUG_FIXES11 0x00001000 236 - #define chipMinorFeatures3_UNK13 0x00002000 237 - #define chipMinorFeatures3_UNK14 0x00004000 238 - #define chipMinorFeatures3_UNK15 0x00008000 239 - #define chipMinorFeatures3_UNK16 0x00010000 240 - #define chipMinorFeatures3_UNK17 0x00020000 208 + #define chipMinorFeatures3_PERFORMANCE_COUNTERS 0x00002000 209 + #define chipMinorFeatures3_HAS_FAST_TRANSCENDENTALS 0x00004000 210 + #define chipMinorFeatures3_BUG_FIXES12 0x00008000 211 + #define chipMinorFeatures3_BUG_FIXES13 0x00010000 212 + #define chipMinorFeatures3_DE_ENHANCEMENTS1 0x00020000 241 213 #define chipMinorFeatures3_ACE 0x00040000 242 - #define chipMinorFeatures3_UNK19 0x00080000 243 - #define chipMinorFeatures3_UNK20 0x00100000 244 - #define chipMinorFeatures3_UNK21 0x00200000 214 + #define chipMinorFeatures3_TX_ENHANCEMENTS1 0x00080000 215 + #define chipMinorFeatures3_SH_ENHANCEMENTS1 0x00100000 216 + #define chipMinorFeatures3_SH_ENHANCEMENTS2 0x00200000 245 217 #define chipMinorFeatures3_UNK22 0x00400000 246 - #define chipMinorFeatures3_UNK23 0x00800000 218 + #define chipMinorFeatures3_2D_FC_SOURCE 0x00800000 247 219 #define chipMinorFeatures3_UNK24 0x01000000 248 220 #define chipMinorFeatures3_UNK25 0x02000000 249 221 #define chipMinorFeatures3_NEW_HZ 0x04000000 250 222 #define chipMinorFeatures3_UNK27 0x08000000 251 223 #define chipMinorFeatures3_UNK28 0x10000000 252 - #define chipMinorFeatures3_UNK29 0x20000000 224 + #define chipMinorFeatures3_SH_ENHANCEMENTS3 0x20000000 253 225 #define chipMinorFeatures3_UNK30 0x40000000 254 226 #define chipMinorFeatures3_UNK31 0x80000000 255 227 #define chipMinorFeatures4_UNK0 0x00000001 256 - #define chipMinorFeatures4_UNK1 0x00000002 257 - #define chipMinorFeatures4_UNK2 0x00000004 228 + #define chipMinorFeatures4_PE_ENHANCEMENTS2 0x00000002 229 + #define chipMinorFeatures4_FRUSTUM_CLIP_FIX 0x00000004 258 230 #define chipMinorFeatures4_UNK3 0x00000008 259 231 #define chipMinorFeatures4_UNK4 0x00000010 260 - #define chipMinorFeatures4_UNK5 0x00000020 261 - #define chipMinorFeatures4_UNK6 0x00000040 232 + #define chipMinorFeatures4_2D_GAMMA 0x00000020 233 + #define chipMinorFeatures4_SINGLE_BUFFER 0x00000040 262 234 #define chipMinorFeatures4_UNK7 0x00000080 263 235 #define chipMinorFeatures4_UNK8 0x00000100 264 236 #define chipMinorFeatures4_UNK9 0x00000200 265 237 #define chipMinorFeatures4_UNK10 0x00000400 266 - #define chipMinorFeatures4_UNK11 0x00000800 267 - #define chipMinorFeatures4_UNK12 0x00001000 268 - #define chipMinorFeatures4_UNK13 0x00002000 238 + #define chipMinorFeatures4_TX_LERP_PRECISION_FIX 0x00000800 239 + #define chipMinorFeatures4_2D_COLOR_SPACE_CONVERSION 0x00001000 240 + #define chipMinorFeatures4_TEXTURE_ASTC 0x00002000 269 241 #define chipMinorFeatures4_UNK14 0x00004000 270 242 #define chipMinorFeatures4_UNK15 0x00008000 271 243 #define chipMinorFeatures4_HALTI2 0x00010000 272 244 #define chipMinorFeatures4_UNK17 0x00020000 273 245 #define chipMinorFeatures4_SMALL_MSAA 0x00040000 274 246 #define chipMinorFeatures4_UNK19 0x00080000 275 - #define chipMinorFeatures4_UNK20 0x00100000 276 - #define chipMinorFeatures4_UNK21 0x00200000 277 - #define chipMinorFeatures4_UNK22 0x00400000 278 - #define chipMinorFeatures4_UNK23 0x00800000 279 - #define chipMinorFeatures4_UNK24 0x01000000 280 - #define chipMinorFeatures4_UNK25 0x02000000 281 - #define chipMinorFeatures4_UNK26 0x04000000 282 - #define chipMinorFeatures4_UNK27 0x08000000 247 + #define chipMinorFeatures4_NEW_RA 0x00100000 248 + #define chipMinorFeatures4_2D_OPF_YUV_OUTPUT 0x00200000 249 + #define chipMinorFeatures4_2D_MULTI_SOURCE_BLT_EX2 0x00400000 250 + #define chipMinorFeatures4_NO_USER_CSC 0x00800000 251 + #define chipMinorFeatures4_ZFIXES 0x01000000 252 + #define chipMinorFeatures4_BUG_FIXES18 0x02000000 253 + #define chipMinorFeatures4_2D_COMPRESSION 0x04000000 254 + #define chipMinorFeatures4_PROBE 0x08000000 283 255 #define chipMinorFeatures4_UNK28 0x10000000 284 - #define chipMinorFeatures4_UNK29 0x20000000 256 + #define chipMinorFeatures4_2D_SUPER_TILE_VERSION 0x20000000 285 257 #define chipMinorFeatures4_UNK30 0x40000000 286 258 #define chipMinorFeatures4_UNK31 0x80000000 287 259 #define chipMinorFeatures5_UNK0 0x00000001 288 260 #define chipMinorFeatures5_UNK1 0x00000002 289 261 #define chipMinorFeatures5_UNK2 0x00000004 290 262 #define chipMinorFeatures5_UNK3 0x00000008 291 - #define chipMinorFeatures5_UNK4 0x00000010 263 + #define chipMinorFeatures5_EEZ 0x00000010 292 264 #define chipMinorFeatures5_UNK5 0x00000020 293 265 #define chipMinorFeatures5_UNK6 0x00000040 294 266 #define chipMinorFeatures5_UNK7 0x00000080 295 267 #define chipMinorFeatures5_UNK8 0x00000100 296 268 #define chipMinorFeatures5_HALTI3 0x00000200 297 269 #define chipMinorFeatures5_UNK10 0x00000400 298 - #define chipMinorFeatures5_UNK11 0x00000800 270 + #define chipMinorFeatures5_2D_ONE_PASS_FILTER_TAP 0x00000800 299 271 #define chipMinorFeatures5_UNK12 0x00001000 300 - #define chipMinorFeatures5_UNK13 0x00002000 301 - #define chipMinorFeatures5_UNK14 0x00004000 272 + #define chipMinorFeatures5_SEPARATE_SRC_DST 0x00002000 273 + #define chipMinorFeatures5_HALTI4 0x00004000 302 274 #define chipMinorFeatures5_UNK15 0x00008000 303 - #define chipMinorFeatures5_UNK16 0x00010000 304 - #define chipMinorFeatures5_UNK17 0x00020000 275 + #define chipMinorFeatures5_ANDROID_ONLY 0x00010000 276 + #define chipMinorFeatures5_HAS_PRODUCTID 0x00020000 305 277 #define chipMinorFeatures5_UNK18 0x00040000 306 278 #define chipMinorFeatures5_UNK19 0x00080000 307 - #define chipMinorFeatures5_UNK20 0x00100000 279 + #define chipMinorFeatures5_PE_DITHER_FIX2 0x00100000 308 280 #define chipMinorFeatures5_UNK21 0x00200000 309 281 #define chipMinorFeatures5_UNK22 0x00400000 310 282 #define chipMinorFeatures5_UNK23 0x00800000 311 283 #define chipMinorFeatures5_UNK24 0x01000000 312 284 #define chipMinorFeatures5_UNK25 0x02000000 313 285 #define chipMinorFeatures5_UNK26 0x04000000 314 - #define chipMinorFeatures5_UNK27 0x08000000 315 - #define chipMinorFeatures5_UNK28 0x10000000 286 + #define chipMinorFeatures5_RS_DEPTHSTENCIL_NATIVE_SUPPORT 0x08000000 287 + #define chipMinorFeatures5_V2_MSAA_COMP_FIX 0x10000000 316 288 #define chipMinorFeatures5_UNK29 0x20000000 317 289 #define chipMinorFeatures5_UNK30 0x40000000 318 290 #define chipMinorFeatures5_UNK31 0x80000000