Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[media] platform: Make use of media_bus_format enum

In order to have subsytem agnostic media bus format definitions we've
moved media bus definition to include/uapi/linux/media-bus-format.h and
prefixed values with MEDIA_BUS_FMT instead of V4L2_MBUS_FMT.

Reference new definitions in all platform drivers.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>

authored by

Boris BREZILLON and committed by
Mauro Carvalho Chehab
27ffaeb0 43ba4641

+483 -495
+1 -1
Documentation/video4linux/soc-camera.txt
··· 151 151 conveniently manage these formats. A table of standard transformations is 152 152 maintained by soc-camera core, which describes, what FOURCC pixel format will 153 153 be obtained, if a media-bus pixel format is stored in memory according to 154 - certain rules. E.g. if V4L2_MBUS_FMT_YUYV8_2X8 data is sampled with 8 bits per 154 + certain rules. E.g. if MEDIA_BUS_FMT_YUYV8_2X8 data is sampled with 8 bits per 155 155 sample and stored in memory in the little-endian order with no gaps between 156 156 bytes, data in memory will represent the V4L2_PIX_FMT_YUYV FOURCC format. These 157 157 standard transformations will be used by soc-camera or by camera host drivers to
+1 -1
arch/arm/mach-davinci/board-dm355-evm.c
··· 294 294 .default_mode = "ntsc", 295 295 .num_modes = ARRAY_SIZE(dm355evm_enc_preset_timing), 296 296 .modes = dm355evm_enc_preset_timing, 297 - .if_params = V4L2_MBUS_FMT_FIXED, 297 + .if_params = MEDIA_BUS_FMT_FIXED, 298 298 }, 299 299 }; 300 300
+2 -2
arch/arm/mach-davinci/board-dm365-evm.c
··· 485 485 .default_mode = "ntsc", 486 486 .num_modes = ARRAY_SIZE(dm365evm_enc_std_timing), 487 487 .modes = dm365evm_enc_std_timing, 488 - .if_params = V4L2_MBUS_FMT_FIXED, 488 + .if_params = MEDIA_BUS_FMT_FIXED, 489 489 }, 490 490 { 491 491 .output = { ··· 498 498 .default_mode = "480p59_94", 499 499 .num_modes = ARRAY_SIZE(dm365evm_enc_preset_timing), 500 500 .modes = dm365evm_enc_preset_timing, 501 - .if_params = V4L2_MBUS_FMT_FIXED, 501 + .if_params = MEDIA_BUS_FMT_FIXED, 502 502 }, 503 503 }; 504 504
+3 -4
arch/arm/mach-davinci/dm355.c
··· 785 785 }, 786 786 }; 787 787 788 - static int dm355_vpbe_setup_pinmux(enum v4l2_mbus_pixelcode if_type, 789 - int field) 788 + static int dm355_vpbe_setup_pinmux(u32 if_type, int field) 790 789 { 791 790 switch (if_type) { 792 - case V4L2_MBUS_FMT_SGRBG8_1X8: 791 + case MEDIA_BUS_FMT_SGRBG8_1X8: 793 792 davinci_cfg_reg(DM355_VOUT_FIELD_G70); 794 793 break; 795 - case V4L2_MBUS_FMT_YUYV10_1X20: 794 + case MEDIA_BUS_FMT_YUYV10_1X20: 796 795 if (field) 797 796 davinci_cfg_reg(DM355_VOUT_FIELD); 798 797 else
+3 -4
arch/arm/mach-davinci/dm365.c
··· 1306 1306 }, 1307 1307 }; 1308 1308 1309 - static int dm365_vpbe_setup_pinmux(enum v4l2_mbus_pixelcode if_type, 1310 - int field) 1309 + static int dm365_vpbe_setup_pinmux(u32 if_type, int field) 1311 1310 { 1312 1311 switch (if_type) { 1313 - case V4L2_MBUS_FMT_SGRBG8_1X8: 1312 + case MEDIA_BUS_FMT_SGRBG8_1X8: 1314 1313 davinci_cfg_reg(DM365_VOUT_FIELD_G81); 1315 1314 davinci_cfg_reg(DM365_VOUT_COUTL_EN); 1316 1315 davinci_cfg_reg(DM365_VOUT_COUTH_EN); 1317 1316 break; 1318 - case V4L2_MBUS_FMT_YUYV10_1X20: 1317 + case MEDIA_BUS_FMT_YUYV10_1X20: 1319 1318 if (field) 1320 1319 davinci_cfg_reg(DM365_VOUT_FIELD); 1321 1320 else
+1 -1
arch/arm/mach-shmobile/board-mackerel.c
··· 1153 1153 .format_name = "UYVY", 1154 1154 .format_depth = 16, 1155 1155 .format = { 1156 - .code = V4L2_MBUS_FMT_UYVY8_2X8, 1156 + .code = MEDIA_BUS_FMT_UYVY8_2X8, 1157 1157 .colorspace = V4L2_COLORSPACE_SMPTE170M, 1158 1158 .field = V4L2_FIELD_NONE, 1159 1159 .width = 640,
+1 -1
arch/sh/boards/mach-ap325rxa/setup.c
··· 338 338 .format_name = "UYVY", 339 339 .format_depth = 16, 340 340 .format = { 341 - .code = V4L2_MBUS_FMT_UYVY8_2X8, 341 + .code = MEDIA_BUS_FMT_UYVY8_2X8, 342 342 .colorspace = V4L2_COLORSPACE_SMPTE170M, 343 343 .field = V4L2_FIELD_NONE, 344 344 .width = 640,
+7 -7
drivers/media/platform/blackfin/bfin_capture.c
··· 49 49 struct bcap_format { 50 50 char *desc; 51 51 u32 pixelformat; 52 - enum v4l2_mbus_pixelcode mbus_code; 52 + u32 mbus_code; 53 53 int bpp; /* bits per pixel */ 54 54 int dlen; /* data length for ppi in bits */ 55 55 }; ··· 116 116 { 117 117 .desc = "YCbCr 4:2:2 Interleaved UYVY", 118 118 .pixelformat = V4L2_PIX_FMT_UYVY, 119 - .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8, 119 + .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, 120 120 .bpp = 16, 121 121 .dlen = 8, 122 122 }, 123 123 { 124 124 .desc = "YCbCr 4:2:2 Interleaved YUYV", 125 125 .pixelformat = V4L2_PIX_FMT_YUYV, 126 - .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 126 + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 127 127 .bpp = 16, 128 128 .dlen = 8, 129 129 }, 130 130 { 131 131 .desc = "YCbCr 4:2:2 Interleaved UYVY", 132 132 .pixelformat = V4L2_PIX_FMT_UYVY, 133 - .mbus_code = V4L2_MBUS_FMT_UYVY8_1X16, 133 + .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16, 134 134 .bpp = 16, 135 135 .dlen = 16, 136 136 }, 137 137 { 138 138 .desc = "RGB 565", 139 139 .pixelformat = V4L2_PIX_FMT_RGB565, 140 - .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE, 140 + .mbus_code = MEDIA_BUS_FMT_RGB565_2X8_LE, 141 141 .bpp = 16, 142 142 .dlen = 8, 143 143 }, 144 144 { 145 145 .desc = "RGB 444", 146 146 .pixelformat = V4L2_PIX_FMT_RGB444, 147 - .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE, 147 + .mbus_code = MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE, 148 148 .bpp = 16, 149 149 .dlen = 8, 150 150 }, ··· 161 161 162 162 static int bcap_init_sensor_formats(struct bcap_device *bcap_dev) 163 163 { 164 - enum v4l2_mbus_pixelcode code; 164 + u32 code; 165 165 struct bcap_format *sf; 166 166 unsigned int num_formats = 0; 167 167 int i, j;
+1 -1
drivers/media/platform/davinci/vpbe.c
··· 227 227 vpbe_current_encoder_info(vpbe_dev); 228 228 struct vpbe_config *cfg = vpbe_dev->cfg; 229 229 struct venc_platform_data *venc_device = vpbe_dev->venc_device; 230 - enum v4l2_mbus_pixelcode if_params; 230 + u32 if_params; 231 231 int enc_out_index; 232 232 int sd_index; 233 233 int ret = 0;
+2 -2
drivers/media/platform/davinci/vpfe_capture.c
··· 414 414 /* assume V4L2_PIX_FMT_UYVY as default */ 415 415 pix->pixelformat = V4L2_PIX_FMT_UYVY; 416 416 v4l2_fill_mbus_format(&mbus_fmt, pix, 417 - V4L2_MBUS_FMT_YUYV10_2X10); 417 + MEDIA_BUS_FMT_YUYV10_2X10); 418 418 } else { 419 419 pix->field = V4L2_FIELD_NONE; 420 420 /* assume V4L2_PIX_FMT_SBGGR8 */ 421 421 pix->pixelformat = V4L2_PIX_FMT_SBGGR8; 422 422 v4l2_fill_mbus_format(&mbus_fmt, pix, 423 - V4L2_MBUS_FMT_SBGGR8_1X8); 423 + MEDIA_BUS_FMT_SBGGR8_1X8); 424 424 } 425 425 426 426 /* if sub device supports g_mbus_fmt, override the defaults */
+4 -4
drivers/media/platform/exynos-gsc/gsc-core.c
··· 54 54 .corder = GSC_CBCR, 55 55 .num_planes = 1, 56 56 .num_comp = 1, 57 - .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 57 + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 58 58 }, { 59 59 .name = "YUV 4:2:2 packed, CbYCrY", 60 60 .pixelformat = V4L2_PIX_FMT_UYVY, ··· 64 64 .corder = GSC_CBCR, 65 65 .num_planes = 1, 66 66 .num_comp = 1, 67 - .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8, 67 + .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, 68 68 }, { 69 69 .name = "YUV 4:2:2 packed, CrYCbY", 70 70 .pixelformat = V4L2_PIX_FMT_VYUY, ··· 74 74 .corder = GSC_CRCB, 75 75 .num_planes = 1, 76 76 .num_comp = 1, 77 - .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8, 77 + .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, 78 78 }, { 79 79 .name = "YUV 4:2:2 packed, YCrYCb", 80 80 .pixelformat = V4L2_PIX_FMT_YVYU, ··· 84 84 .corder = GSC_CRCB, 85 85 .num_planes = 1, 86 86 .num_comp = 1, 87 - .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8, 87 + .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, 88 88 }, { 89 89 .name = "YUV 4:4:4 planar, YCbYCr", 90 90 .pixelformat = V4L2_PIX_FMT_YUV32,
+1 -1
drivers/media/platform/exynos-gsc/gsc-core.h
··· 117 117 * @flags: flags indicating which operation mode format applies to 118 118 */ 119 119 struct gsc_fmt { 120 - enum v4l2_mbus_pixelcode mbus_code; 120 + u32 mbus_code; 121 121 char *name; 122 122 u32 pixelformat; 123 123 u32 color;
+1 -1
drivers/media/platform/exynos4-is/fimc-capture.c
··· 749 749 return -EINVAL; 750 750 strncpy(f->description, fmt->name, sizeof(f->description) - 1); 751 751 f->pixelformat = fmt->fourcc; 752 - if (fmt->fourcc == V4L2_MBUS_FMT_JPEG_1X8) 752 + if (fmt->fourcc == MEDIA_BUS_FMT_JPEG_1X8) 753 753 f->flags |= V4L2_FMT_FLAG_COMPRESSED; 754 754 return 0; 755 755 }
+7 -7
drivers/media/platform/exynos4-is/fimc-core.c
··· 81 81 .flags = FMT_FLAGS_M2M_OUT | FMT_HAS_ALPHA, 82 82 }, { 83 83 .name = "YUV 4:4:4", 84 - .mbus_code = V4L2_MBUS_FMT_YUV10_1X30, 84 + .mbus_code = MEDIA_BUS_FMT_YUV10_1X30, 85 85 .flags = FMT_FLAGS_WRITEBACK, 86 86 }, { 87 87 .name = "YUV 4:2:2 packed, YCbYCr", ··· 90 90 .color = FIMC_FMT_YCBYCR422, 91 91 .memplanes = 1, 92 92 .colplanes = 1, 93 - .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 93 + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 94 94 .flags = FMT_FLAGS_M2M | FMT_FLAGS_CAM, 95 95 }, { 96 96 .name = "YUV 4:2:2 packed, CbYCrY", ··· 99 99 .color = FIMC_FMT_CBYCRY422, 100 100 .memplanes = 1, 101 101 .colplanes = 1, 102 - .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8, 102 + .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, 103 103 .flags = FMT_FLAGS_M2M | FMT_FLAGS_CAM, 104 104 }, { 105 105 .name = "YUV 4:2:2 packed, CrYCbY", ··· 108 108 .color = FIMC_FMT_CRYCBY422, 109 109 .memplanes = 1, 110 110 .colplanes = 1, 111 - .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8, 111 + .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, 112 112 .flags = FMT_FLAGS_M2M | FMT_FLAGS_CAM, 113 113 }, { 114 114 .name = "YUV 4:2:2 packed, YCrYCb", ··· 117 117 .color = FIMC_FMT_YCRYCB422, 118 118 .memplanes = 1, 119 119 .colplanes = 1, 120 - .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8, 120 + .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, 121 121 .flags = FMT_FLAGS_M2M | FMT_FLAGS_CAM, 122 122 }, { 123 123 .name = "YUV 4:2:2 planar, Y/Cb/Cr", ··· 190 190 .depth = { 8 }, 191 191 .memplanes = 1, 192 192 .colplanes = 1, 193 - .mbus_code = V4L2_MBUS_FMT_JPEG_1X8, 193 + .mbus_code = MEDIA_BUS_FMT_JPEG_1X8, 194 194 .flags = FMT_FLAGS_CAM | FMT_FLAGS_COMPRESSED, 195 195 }, { 196 196 .name = "S5C73MX interleaved UYVY/JPEG", ··· 200 200 .memplanes = 2, 201 201 .colplanes = 1, 202 202 .mdataplanes = 0x2, /* plane 1 holds frame meta data */ 203 - .mbus_code = V4L2_MBUS_FMT_S5C_UYVY_JPEG_1X8, 203 + .mbus_code = MEDIA_BUS_FMT_S5C_UYVY_JPEG_1X8, 204 204 .flags = FMT_FLAGS_CAM | FMT_FLAGS_COMPRESSED, 205 205 }, 206 206 };
+2 -2
drivers/media/platform/exynos4-is/fimc-core.h
··· 579 579 580 580 static inline bool fimc_user_defined_mbus_fmt(u32 code) 581 581 { 582 - return (code == V4L2_MBUS_FMT_JPEG_1X8 || 583 - code == V4L2_MBUS_FMT_S5C_UYVY_JPEG_1X8); 582 + return (code == MEDIA_BUS_FMT_JPEG_1X8 || 583 + code == MEDIA_BUS_FMT_S5C_UYVY_JPEG_1X8); 584 584 } 585 585 586 586 /* Return the alpha component bit mask */
+8 -8
drivers/media/platform/exynos4-is/fimc-isp.c
··· 41 41 .depth = { 8 }, 42 42 .color = FIMC_FMT_RAW8, 43 43 .memplanes = 1, 44 - .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8, 44 + .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, 45 45 }, { 46 46 .name = "RAW10 (GRBG)", 47 47 .fourcc = V4L2_PIX_FMT_SGRBG10, 48 48 .depth = { 10 }, 49 49 .color = FIMC_FMT_RAW10, 50 50 .memplanes = 1, 51 - .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10, 51 + .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, 52 52 }, { 53 53 .name = "RAW12 (GRBG)", 54 54 .fourcc = V4L2_PIX_FMT_SGRBG12, 55 55 .depth = { 12 }, 56 56 .color = FIMC_FMT_RAW12, 57 57 .memplanes = 1, 58 - .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12, 58 + .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, 59 59 }, 60 60 }; 61 61 ··· 149 149 150 150 if (fmt->pad == FIMC_ISP_SD_PAD_SRC_FIFO) { 151 151 mf->colorspace = V4L2_COLORSPACE_JPEG; 152 - mf->code = V4L2_MBUS_FMT_YUV10_1X30; 152 + mf->code = MEDIA_BUS_FMT_YUV10_1X30; 153 153 } 154 154 } 155 155 ··· 175 175 FIMC_ISP_SINK_WIDTH_MAX, 0, 176 176 &mf->height, FIMC_ISP_SINK_HEIGHT_MIN, 177 177 FIMC_ISP_SINK_HEIGHT_MAX, 0, 0); 178 - mf->code = V4L2_MBUS_FMT_SGRBG10_1X10; 178 + mf->code = MEDIA_BUS_FMT_SGRBG10_1X10; 179 179 } else { 180 180 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) 181 181 format = v4l2_subdev_get_try_format(fh, ··· 188 188 mf->height = format->height - FIMC_ISP_CAC_MARGIN_HEIGHT; 189 189 190 190 if (fmt->pad == FIMC_ISP_SD_PAD_SRC_FIFO) { 191 - mf->code = V4L2_MBUS_FMT_YUV10_1X30; 191 + mf->code = MEDIA_BUS_FMT_YUV10_1X30; 192 192 mf->colorspace = V4L2_COLORSPACE_JPEG; 193 193 } else { 194 194 mf->code = format->code; ··· 680 680 FIMC_ISP_CAC_MARGIN_WIDTH; 681 681 isp->sink_fmt.height = DEFAULT_PREVIEW_STILL_HEIGHT + 682 682 FIMC_ISP_CAC_MARGIN_HEIGHT; 683 - isp->sink_fmt.code = V4L2_MBUS_FMT_SGRBG10_1X10; 683 + isp->sink_fmt.code = MEDIA_BUS_FMT_SGRBG10_1X10; 684 684 685 685 isp->src_fmt.width = DEFAULT_PREVIEW_STILL_WIDTH; 686 686 isp->src_fmt.height = DEFAULT_PREVIEW_STILL_HEIGHT; 687 - isp->src_fmt.code = V4L2_MBUS_FMT_SGRBG10_1X10; 687 + isp->src_fmt.code = MEDIA_BUS_FMT_SGRBG10_1X10; 688 688 __is_set_frame_size(is, &isp->src_fmt); 689 689 } 690 690
+13 -13
drivers/media/platform/exynos4-is/fimc-lite-reg.c
··· 112 112 } 113 113 114 114 static const u32 src_pixfmt_map[8][3] = { 115 - { V4L2_MBUS_FMT_YUYV8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_YCBYCR, 115 + { MEDIA_BUS_FMT_YUYV8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_YCBYCR, 116 116 FLITE_REG_CIGCTRL_YUV422_1P }, 117 - { V4L2_MBUS_FMT_YVYU8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_YCRYCB, 117 + { MEDIA_BUS_FMT_YVYU8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_YCRYCB, 118 118 FLITE_REG_CIGCTRL_YUV422_1P }, 119 - { V4L2_MBUS_FMT_UYVY8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_CBYCRY, 119 + { MEDIA_BUS_FMT_UYVY8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_CBYCRY, 120 120 FLITE_REG_CIGCTRL_YUV422_1P }, 121 - { V4L2_MBUS_FMT_VYUY8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_CRYCBY, 121 + { MEDIA_BUS_FMT_VYUY8_2X8, FLITE_REG_CISRCSIZE_ORDER422_IN_CRYCBY, 122 122 FLITE_REG_CIGCTRL_YUV422_1P }, 123 - { V4L2_MBUS_FMT_SGRBG8_1X8, 0, FLITE_REG_CIGCTRL_RAW8 }, 124 - { V4L2_MBUS_FMT_SGRBG10_1X10, 0, FLITE_REG_CIGCTRL_RAW10 }, 125 - { V4L2_MBUS_FMT_SGRBG12_1X12, 0, FLITE_REG_CIGCTRL_RAW12 }, 126 - { V4L2_MBUS_FMT_JPEG_1X8, 0, FLITE_REG_CIGCTRL_USER(1) }, 123 + { MEDIA_BUS_FMT_SGRBG8_1X8, 0, FLITE_REG_CIGCTRL_RAW8 }, 124 + { MEDIA_BUS_FMT_SGRBG10_1X10, 0, FLITE_REG_CIGCTRL_RAW10 }, 125 + { MEDIA_BUS_FMT_SGRBG12_1X12, 0, FLITE_REG_CIGCTRL_RAW12 }, 126 + { MEDIA_BUS_FMT_JPEG_1X8, 0, FLITE_REG_CIGCTRL_USER(1) }, 127 127 }; 128 128 129 129 /* Set camera input pixel format and resolution */ 130 130 void flite_hw_set_source_format(struct fimc_lite *dev, struct flite_frame *f) 131 131 { 132 - enum v4l2_mbus_pixelcode pixelcode = f->fmt->mbus_code; 132 + u32 pixelcode = f->fmt->mbus_code; 133 133 int i = ARRAY_SIZE(src_pixfmt_map); 134 134 u32 cfg; 135 135 ··· 232 232 static void flite_hw_set_out_order(struct fimc_lite *dev, struct flite_frame *f) 233 233 { 234 234 static const u32 pixcode[4][2] = { 235 - { V4L2_MBUS_FMT_YUYV8_2X8, FLITE_REG_CIODMAFMT_YCBYCR }, 236 - { V4L2_MBUS_FMT_YVYU8_2X8, FLITE_REG_CIODMAFMT_YCRYCB }, 237 - { V4L2_MBUS_FMT_UYVY8_2X8, FLITE_REG_CIODMAFMT_CBYCRY }, 238 - { V4L2_MBUS_FMT_VYUY8_2X8, FLITE_REG_CIODMAFMT_CRYCBY }, 235 + { MEDIA_BUS_FMT_YUYV8_2X8, FLITE_REG_CIODMAFMT_YCBYCR }, 236 + { MEDIA_BUS_FMT_YVYU8_2X8, FLITE_REG_CIODMAFMT_YCRYCB }, 237 + { MEDIA_BUS_FMT_UYVY8_2X8, FLITE_REG_CIODMAFMT_CBYCRY }, 238 + { MEDIA_BUS_FMT_VYUY8_2X8, FLITE_REG_CIODMAFMT_CRYCBY }, 239 239 }; 240 240 u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT); 241 241 int i = ARRAY_SIZE(pixcode);
+7 -7
drivers/media/platform/exynos4-is/fimc-lite.c
··· 48 48 .depth = { 16 }, 49 49 .color = FIMC_FMT_YCBYCR422, 50 50 .memplanes = 1, 51 - .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 51 + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 52 52 .flags = FMT_FLAGS_YUV, 53 53 }, { 54 54 .name = "YUV 4:2:2 packed, CbYCrY", ··· 57 57 .depth = { 16 }, 58 58 .color = FIMC_FMT_CBYCRY422, 59 59 .memplanes = 1, 60 - .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8, 60 + .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, 61 61 .flags = FMT_FLAGS_YUV, 62 62 }, { 63 63 .name = "YUV 4:2:2 packed, CrYCbY", ··· 66 66 .depth = { 16 }, 67 67 .color = FIMC_FMT_CRYCBY422, 68 68 .memplanes = 1, 69 - .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8, 69 + .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, 70 70 .flags = FMT_FLAGS_YUV, 71 71 }, { 72 72 .name = "YUV 4:2:2 packed, YCrYCb", ··· 75 75 .depth = { 16 }, 76 76 .color = FIMC_FMT_YCRYCB422, 77 77 .memplanes = 1, 78 - .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8, 78 + .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, 79 79 .flags = FMT_FLAGS_YUV, 80 80 }, { 81 81 .name = "RAW8 (GRBG)", ··· 84 84 .depth = { 8 }, 85 85 .color = FIMC_FMT_RAW8, 86 86 .memplanes = 1, 87 - .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8, 87 + .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, 88 88 .flags = FMT_FLAGS_RAW_BAYER, 89 89 }, { 90 90 .name = "RAW10 (GRBG)", ··· 93 93 .depth = { 16 }, 94 94 .color = FIMC_FMT_RAW10, 95 95 .memplanes = 1, 96 - .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10, 96 + .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, 97 97 .flags = FMT_FLAGS_RAW_BAYER, 98 98 }, { 99 99 .name = "RAW12 (GRBG)", ··· 102 102 .depth = { 16 }, 103 103 .color = FIMC_FMT_RAW12, 104 104 .memplanes = 1, 105 - .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12, 105 + .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, 106 106 .flags = FMT_FLAGS_RAW_BAYER, 107 107 }, 108 108 };
+7 -7
drivers/media/platform/exynos4-is/fimc-reg.c
··· 592 592 }; 593 593 594 594 static const struct mbus_pixfmt_desc pix_desc[] = { 595 - { V4L2_MBUS_FMT_YUYV8_2X8, FIMC_REG_CISRCFMT_ORDER422_YCBYCR, 8 }, 596 - { V4L2_MBUS_FMT_YVYU8_2X8, FIMC_REG_CISRCFMT_ORDER422_YCRYCB, 8 }, 597 - { V4L2_MBUS_FMT_VYUY8_2X8, FIMC_REG_CISRCFMT_ORDER422_CRYCBY, 8 }, 598 - { V4L2_MBUS_FMT_UYVY8_2X8, FIMC_REG_CISRCFMT_ORDER422_CBYCRY, 8 }, 595 + { MEDIA_BUS_FMT_YUYV8_2X8, FIMC_REG_CISRCFMT_ORDER422_YCBYCR, 8 }, 596 + { MEDIA_BUS_FMT_YVYU8_2X8, FIMC_REG_CISRCFMT_ORDER422_YCRYCB, 8 }, 597 + { MEDIA_BUS_FMT_VYUY8_2X8, FIMC_REG_CISRCFMT_ORDER422_CRYCBY, 8 }, 598 + { MEDIA_BUS_FMT_UYVY8_2X8, FIMC_REG_CISRCFMT_ORDER422_CBYCRY, 8 }, 599 599 }; 600 600 601 601 int fimc_hw_set_camera_source(struct fimc_dev *fimc, ··· 689 689 690 690 /* TODO: add remaining supported formats. */ 691 691 switch (vid_cap->ci_fmt.code) { 692 - case V4L2_MBUS_FMT_VYUY8_2X8: 692 + case MEDIA_BUS_FMT_VYUY8_2X8: 693 693 tmp = FIMC_REG_CSIIMGFMT_YCBCR422_8BIT; 694 694 break; 695 - case V4L2_MBUS_FMT_JPEG_1X8: 696 - case V4L2_MBUS_FMT_S5C_UYVY_JPEG_1X8: 695 + case MEDIA_BUS_FMT_JPEG_1X8: 696 + case MEDIA_BUS_FMT_S5C_UYVY_JPEG_1X8: 697 697 tmp = FIMC_REG_CSIIMGFMT_USER(1); 698 698 cfg |= FIMC_REG_CIGCTRL_CAM_JPEG; 699 699 break;
+7 -7
drivers/media/platform/exynos4-is/mipi-csis.c
··· 238 238 */ 239 239 struct csis_pix_format { 240 240 unsigned int pix_width_alignment; 241 - enum v4l2_mbus_pixelcode code; 241 + u32 code; 242 242 u32 fmt_reg; 243 243 u8 data_alignment; 244 244 }; 245 245 246 246 static const struct csis_pix_format s5pcsis_formats[] = { 247 247 { 248 - .code = V4L2_MBUS_FMT_VYUY8_2X8, 248 + .code = MEDIA_BUS_FMT_VYUY8_2X8, 249 249 .fmt_reg = S5PCSIS_CFG_FMT_YCBCR422_8BIT, 250 250 .data_alignment = 32, 251 251 }, { 252 - .code = V4L2_MBUS_FMT_JPEG_1X8, 252 + .code = MEDIA_BUS_FMT_JPEG_1X8, 253 253 .fmt_reg = S5PCSIS_CFG_FMT_USER(1), 254 254 .data_alignment = 32, 255 255 }, { 256 - .code = V4L2_MBUS_FMT_S5C_UYVY_JPEG_1X8, 256 + .code = MEDIA_BUS_FMT_S5C_UYVY_JPEG_1X8, 257 257 .fmt_reg = S5PCSIS_CFG_FMT_USER(1), 258 258 .data_alignment = 32, 259 259 }, { 260 - .code = V4L2_MBUS_FMT_SGRBG8_1X8, 260 + .code = MEDIA_BUS_FMT_SGRBG8_1X8, 261 261 .fmt_reg = S5PCSIS_CFG_FMT_RAW8, 262 262 .data_alignment = 24, 263 263 }, { 264 - .code = V4L2_MBUS_FMT_SGRBG10_1X10, 264 + .code = MEDIA_BUS_FMT_SGRBG10_1X10, 265 265 .fmt_reg = S5PCSIS_CFG_FMT_RAW10, 266 266 .data_alignment = 24, 267 267 }, { 268 - .code = V4L2_MBUS_FMT_SGRBG12_1X12, 268 + .code = MEDIA_BUS_FMT_SGRBG12_1X12, 269 269 .fmt_reg = S5PCSIS_CFG_FMT_RAW12, 270 270 .data_alignment = 24, 271 271 }
+10 -11
drivers/media/platform/marvell-ccic/mcam-core.c
··· 106 106 __u32 pixelformat; 107 107 int bpp; /* Bytes per pixel */ 108 108 bool planar; 109 - enum v4l2_mbus_pixelcode mbus_code; 109 + u32 mbus_code; 110 110 } mcam_formats[] = { 111 111 { 112 112 .desc = "YUYV 4:2:2", 113 113 .pixelformat = V4L2_PIX_FMT_YUYV, 114 - .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 114 + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 115 115 .bpp = 2, 116 116 .planar = false, 117 117 }, 118 118 { 119 119 .desc = "UYVY 4:2:2", 120 120 .pixelformat = V4L2_PIX_FMT_UYVY, 121 - .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 121 + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 122 122 .bpp = 2, 123 123 .planar = false, 124 124 }, 125 125 { 126 126 .desc = "YUV 4:2:2 PLANAR", 127 127 .pixelformat = V4L2_PIX_FMT_YUV422P, 128 - .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 128 + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 129 129 .bpp = 2, 130 130 .planar = true, 131 131 }, 132 132 { 133 133 .desc = "YUV 4:2:0 PLANAR", 134 134 .pixelformat = V4L2_PIX_FMT_YUV420, 135 - .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 135 + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 136 136 .bpp = 2, 137 137 .planar = true, 138 138 }, 139 139 { 140 140 .desc = "YVU 4:2:0 PLANAR", 141 141 .pixelformat = V4L2_PIX_FMT_YVU420, 142 - .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 142 + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 143 143 .bpp = 2, 144 144 .planar = true, 145 145 }, 146 146 { 147 147 .desc = "RGB 444", 148 148 .pixelformat = V4L2_PIX_FMT_RGB444, 149 - .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE, 149 + .mbus_code = MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE, 150 150 .bpp = 2, 151 151 .planar = false, 152 152 }, 153 153 { 154 154 .desc = "RGB 565", 155 155 .pixelformat = V4L2_PIX_FMT_RGB565, 156 - .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE, 156 + .mbus_code = MEDIA_BUS_FMT_RGB565_2X8_LE, 157 157 .bpp = 2, 158 158 .planar = false, 159 159 }, 160 160 { 161 161 .desc = "Raw RGB Bayer", 162 162 .pixelformat = V4L2_PIX_FMT_SBGGR8, 163 - .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8, 163 + .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8, 164 164 .bpp = 1, 165 165 .planar = false, 166 166 }, ··· 190 190 .sizeimage = VGA_WIDTH*VGA_HEIGHT*2, 191 191 }; 192 192 193 - static const enum v4l2_mbus_pixelcode mcam_def_mbus_code = 194 - V4L2_MBUS_FMT_YUYV8_2X8; 193 + static const u32 mcam_def_mbus_code = MEDIA_BUS_FMT_YUYV8_2X8; 195 194 196 195 197 196 /*
+1 -1
drivers/media/platform/marvell-ccic/mcam-core.h
··· 183 183 184 184 /* Current operating parameters */ 185 185 struct v4l2_pix_format pix_format; 186 - enum v4l2_mbus_pixelcode mbus_code; 186 + u32 mbus_code; 187 187 188 188 /* Locks */ 189 189 struct mutex s_mutex; /* Access to this structure */
+55 -57
drivers/media/platform/omap3isp/ispccdc.c
··· 36 36 unsigned int pad, enum v4l2_subdev_format_whence which); 37 37 38 38 static const unsigned int ccdc_fmts[] = { 39 - V4L2_MBUS_FMT_Y8_1X8, 40 - V4L2_MBUS_FMT_Y10_1X10, 41 - V4L2_MBUS_FMT_Y12_1X12, 42 - V4L2_MBUS_FMT_SGRBG8_1X8, 43 - V4L2_MBUS_FMT_SRGGB8_1X8, 44 - V4L2_MBUS_FMT_SBGGR8_1X8, 45 - V4L2_MBUS_FMT_SGBRG8_1X8, 46 - V4L2_MBUS_FMT_SGRBG10_1X10, 47 - V4L2_MBUS_FMT_SRGGB10_1X10, 48 - V4L2_MBUS_FMT_SBGGR10_1X10, 49 - V4L2_MBUS_FMT_SGBRG10_1X10, 50 - V4L2_MBUS_FMT_SGRBG12_1X12, 51 - V4L2_MBUS_FMT_SRGGB12_1X12, 52 - V4L2_MBUS_FMT_SBGGR12_1X12, 53 - V4L2_MBUS_FMT_SGBRG12_1X12, 54 - V4L2_MBUS_FMT_YUYV8_2X8, 55 - V4L2_MBUS_FMT_UYVY8_2X8, 39 + MEDIA_BUS_FMT_Y8_1X8, 40 + MEDIA_BUS_FMT_Y10_1X10, 41 + MEDIA_BUS_FMT_Y12_1X12, 42 + MEDIA_BUS_FMT_SGRBG8_1X8, 43 + MEDIA_BUS_FMT_SRGGB8_1X8, 44 + MEDIA_BUS_FMT_SBGGR8_1X8, 45 + MEDIA_BUS_FMT_SGBRG8_1X8, 46 + MEDIA_BUS_FMT_SGRBG10_1X10, 47 + MEDIA_BUS_FMT_SRGGB10_1X10, 48 + MEDIA_BUS_FMT_SBGGR10_1X10, 49 + MEDIA_BUS_FMT_SGBRG10_1X10, 50 + MEDIA_BUS_FMT_SGRBG12_1X12, 51 + MEDIA_BUS_FMT_SRGGB12_1X12, 52 + MEDIA_BUS_FMT_SBGGR12_1X12, 53 + MEDIA_BUS_FMT_SGBRG12_1X12, 54 + MEDIA_BUS_FMT_YUYV8_2X8, 55 + MEDIA_BUS_FMT_UYVY8_2X8, 56 56 }; 57 57 58 58 /* ··· 266 266 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK, 267 267 V4L2_SUBDEV_FORMAT_ACTIVE); 268 268 269 - if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) && 270 - (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) && 271 - (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) && 272 - (format->code != V4L2_MBUS_FMT_SGBRG10_1X10)) 269 + if ((format->code != MEDIA_BUS_FMT_SGRBG10_1X10) && 270 + (format->code != MEDIA_BUS_FMT_SRGGB10_1X10) && 271 + (format->code != MEDIA_BUS_FMT_SBGGR10_1X10) && 272 + (format->code != MEDIA_BUS_FMT_SGBRG10_1X10)) 273 273 return -EINVAL; 274 274 275 275 if (enable) ··· 971 971 972 972 format = &ccdc->formats[CCDC_PAD_SINK]; 973 973 974 - if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 || 975 - format->code == V4L2_MBUS_FMT_UYVY8_2X8) { 974 + if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 || 975 + format->code == MEDIA_BUS_FMT_UYVY8_2X8) { 976 976 /* According to the OMAP3 TRM the input mode only affects SYNC 977 977 * mode, enabling BT.656 mode should take precedence. However, 978 978 * in practice setting the input mode to YCbCr data on 8 bits ··· 1020 1020 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The 1021 1021 * hardware seems to ignore it in all other input modes. 1022 1022 */ 1023 - if (format->code == V4L2_MBUS_FMT_UYVY8_2X8) 1023 + if (format->code == MEDIA_BUS_FMT_UYVY8_2X8) 1024 1024 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, 1025 1025 ISPCCDC_CFG_Y8POS); 1026 1026 else ··· 1168 1168 1169 1169 if (ccdc->bt656) 1170 1170 bridge = ISPCTRL_PAR_BRIDGE_DISABLE; 1171 - else if (fmt_info->code == V4L2_MBUS_FMT_YUYV8_2X8) 1171 + else if (fmt_info->code == MEDIA_BUS_FMT_YUYV8_2X8) 1172 1172 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN; 1173 - else if (fmt_info->code == V4L2_MBUS_FMT_UYVY8_2X8) 1173 + else if (fmt_info->code == MEDIA_BUS_FMT_UYVY8_2X8) 1174 1174 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN; 1175 1175 else 1176 1176 bridge = ISPCTRL_PAR_BRIDGE_DISABLE; ··· 1199 1199 1200 1200 /* Mosaic filter */ 1201 1201 switch (format->code) { 1202 - case V4L2_MBUS_FMT_SRGGB10_1X10: 1203 - case V4L2_MBUS_FMT_SRGGB12_1X12: 1202 + case MEDIA_BUS_FMT_SRGGB10_1X10: 1203 + case MEDIA_BUS_FMT_SRGGB12_1X12: 1204 1204 ccdc_pattern = ccdc_srggb_pattern; 1205 1205 break; 1206 - case V4L2_MBUS_FMT_SBGGR10_1X10: 1207 - case V4L2_MBUS_FMT_SBGGR12_1X12: 1206 + case MEDIA_BUS_FMT_SBGGR10_1X10: 1207 + case MEDIA_BUS_FMT_SBGGR12_1X12: 1208 1208 ccdc_pattern = ccdc_sbggr_pattern; 1209 1209 break; 1210 - case V4L2_MBUS_FMT_SGBRG10_1X10: 1211 - case V4L2_MBUS_FMT_SGBRG12_1X12: 1210 + case MEDIA_BUS_FMT_SGBRG10_1X10: 1211 + case MEDIA_BUS_FMT_SGBRG12_1X12: 1212 1212 ccdc_pattern = ccdc_sgbrg_pattern; 1213 1213 break; 1214 1214 default: ··· 1267 1267 /* The CCDC outputs data in UYVY order by default. Swap bytes to get 1268 1268 * YUYV. 1269 1269 */ 1270 - if (format->code == V4L2_MBUS_FMT_YUYV8_1X16) 1270 + if (format->code == MEDIA_BUS_FMT_YUYV8_1X16) 1271 1271 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, 1272 1272 ISPCCDC_CFG_BSWD); 1273 1273 else ··· 1967 1967 enum v4l2_subdev_format_whence which) 1968 1968 { 1969 1969 const struct isp_format_info *info; 1970 - enum v4l2_mbus_pixelcode pixelcode; 1970 + u32 pixelcode; 1971 1971 unsigned int width = fmt->width; 1972 1972 unsigned int height = fmt->height; 1973 1973 struct v4l2_rect *crop; ··· 1983 1983 1984 1984 /* If not found, use SGRBG10 as default */ 1985 1985 if (i >= ARRAY_SIZE(ccdc_fmts)) 1986 - fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10; 1986 + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; 1987 1987 1988 1988 /* Clamp the input size. */ 1989 1989 fmt->width = clamp_t(u32, width, 32, 4096); ··· 2007 2007 * configured to pack bytes in BT.656, hiding the inaccuracy. 2008 2008 * In all cases bytes can be swapped. 2009 2009 */ 2010 - if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 || 2011 - fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) { 2010 + if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 || 2011 + fmt->code == MEDIA_BUS_FMT_UYVY8_2X8) { 2012 2012 /* Use the user requested format if YUV. */ 2013 - if (pixelcode == V4L2_MBUS_FMT_YUYV8_2X8 || 2014 - pixelcode == V4L2_MBUS_FMT_UYVY8_2X8 || 2015 - pixelcode == V4L2_MBUS_FMT_YUYV8_1X16 || 2016 - pixelcode == V4L2_MBUS_FMT_UYVY8_1X16) 2013 + if (pixelcode == MEDIA_BUS_FMT_YUYV8_2X8 || 2014 + pixelcode == MEDIA_BUS_FMT_UYVY8_2X8 || 2015 + pixelcode == MEDIA_BUS_FMT_YUYV8_1X16 || 2016 + pixelcode == MEDIA_BUS_FMT_UYVY8_1X16) 2017 2017 fmt->code = pixelcode; 2018 2018 2019 - if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8) 2020 - fmt->code = V4L2_MBUS_FMT_YUYV8_1X16; 2021 - else if (fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) 2022 - fmt->code = V4L2_MBUS_FMT_UYVY8_1X16; 2019 + if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8) 2020 + fmt->code = MEDIA_BUS_FMT_YUYV8_1X16; 2021 + else if (fmt->code == MEDIA_BUS_FMT_UYVY8_2X8) 2022 + fmt->code = MEDIA_BUS_FMT_UYVY8_1X16; 2023 2023 } 2024 2024 2025 2025 /* Hardcode the output size to the crop rectangle size. */ ··· 2047 2047 fmt->code = info->truncated; 2048 2048 2049 2049 /* YUV formats are not supported by the video port. */ 2050 - if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 || 2051 - fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) 2050 + if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 || 2051 + fmt->code == MEDIA_BUS_FMT_UYVY8_2X8) 2052 2052 fmt->code = 0; 2053 2053 2054 2054 /* The number of lines that can be clocked out from the video ··· 2083 2083 * to keep the Bayer pattern. 2084 2084 */ 2085 2085 info = omap3isp_video_format_info(sink->code); 2086 - if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) { 2086 + if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) { 2087 2087 crop->left &= ~1; 2088 2088 crop->top &= ~1; 2089 2089 } ··· 2103 2103 sink->height - crop->top); 2104 2104 2105 2105 /* Odd width/height values don't make sense for Bayer formats. */ 2106 - if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) { 2106 + if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) { 2107 2107 crop->width &= ~1; 2108 2108 crop->height &= ~1; 2109 2109 } ··· 2135 2135 format = __ccdc_get_format(ccdc, fh, code->pad, 2136 2136 V4L2_SUBDEV_FORMAT_TRY); 2137 2137 2138 - if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 || 2139 - format->code == V4L2_MBUS_FMT_UYVY8_2X8) { 2138 + if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 || 2139 + format->code == MEDIA_BUS_FMT_UYVY8_2X8) { 2140 2140 /* In YUV mode the CCDC can swap bytes. */ 2141 2141 if (code->index == 0) 2142 - code->code = V4L2_MBUS_FMT_YUYV8_1X16; 2142 + code->code = MEDIA_BUS_FMT_YUYV8_1X16; 2143 2143 else if (code->index == 1) 2144 - code->code = V4L2_MBUS_FMT_UYVY8_1X16; 2144 + code->code = MEDIA_BUS_FMT_UYVY8_1X16; 2145 2145 else 2146 2146 return -EINVAL; 2147 2147 } else { ··· 2383 2383 * return true if the combination is possible 2384 2384 * return false otherwise 2385 2385 */ 2386 - static bool ccdc_is_shiftable(enum v4l2_mbus_pixelcode in, 2387 - enum v4l2_mbus_pixelcode out, 2388 - unsigned int additional_shift) 2386 + static bool ccdc_is_shiftable(u32 in, u32 out, unsigned int additional_shift) 2389 2387 { 2390 2388 const struct isp_format_info *in_info, *out_info; 2391 2389 ··· 2450 2452 memset(&format, 0, sizeof(format)); 2451 2453 format.pad = CCDC_PAD_SINK; 2452 2454 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; 2453 - format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10; 2455 + format.format.code = MEDIA_BUS_FMT_SGRBG10_1X10; 2454 2456 format.format.width = 4096; 2455 2457 format.format.height = 4096; 2456 2458 ccdc_set_format(sd, fh, &format);
+9 -9
drivers/media/platform/omap3isp/ispccp2.c
··· 289 289 u32 val, format; 290 290 291 291 switch (config->format) { 292 - case V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8: 292 + case MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8: 293 293 format = ISPCCP2_LCx_CTRL_FORMAT_RAW8_DPCM10_VP; 294 294 break; 295 - case V4L2_MBUS_FMT_SGRBG10_1X10: 295 + case MEDIA_BUS_FMT_SGRBG10_1X10: 296 296 default: 297 297 format = ISPCCP2_LCx_CTRL_FORMAT_RAW10_VP; /* RAW10+VP */ 298 298 break; ··· 438 438 u32 val, hwords; 439 439 440 440 if (sink_pixcode != source_pixcode && 441 - sink_pixcode == V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8) 441 + sink_pixcode == MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8) 442 442 dpcm_decompress = 1; 443 443 444 444 ccp2_pwr_cfg(ccp2); ··· 604 604 */ 605 605 606 606 static const unsigned int ccp2_fmts[] = { 607 - V4L2_MBUS_FMT_SGRBG10_1X10, 608 - V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8, 607 + MEDIA_BUS_FMT_SGRBG10_1X10, 608 + MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8, 609 609 }; 610 610 611 611 /* ··· 643 643 644 644 switch (pad) { 645 645 case CCP2_PAD_SINK: 646 - if (fmt->code != V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8) 647 - fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10; 646 + if (fmt->code != MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8) 647 + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; 648 648 649 649 if (ccp2->input == CCP2_INPUT_SENSOR) { 650 650 fmt->width = clamp_t(u32, fmt->width, ··· 671 671 */ 672 672 format = __ccp2_get_format(ccp2, fh, CCP2_PAD_SINK, which); 673 673 memcpy(fmt, format, sizeof(*fmt)); 674 - fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10; 674 + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; 675 675 break; 676 676 } 677 677 ··· 808 808 memset(&format, 0, sizeof(format)); 809 809 format.pad = CCP2_PAD_SINK; 810 810 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; 811 - format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10; 811 + format.format.code = MEDIA_BUS_FMT_SGRBG10_1X10; 812 812 format.format.width = 4096; 813 813 format.format.height = 4096; 814 814 ccp2_set_format(sd, fh, &format);
+21 -21
drivers/media/platform/omap3isp/ispcsi2.c
··· 78 78 } 79 79 80 80 static const unsigned int csi2_input_fmts[] = { 81 - V4L2_MBUS_FMT_SGRBG10_1X10, 82 - V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8, 83 - V4L2_MBUS_FMT_SRGGB10_1X10, 84 - V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8, 85 - V4L2_MBUS_FMT_SBGGR10_1X10, 86 - V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8, 87 - V4L2_MBUS_FMT_SGBRG10_1X10, 88 - V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8, 89 - V4L2_MBUS_FMT_YUYV8_2X8, 81 + MEDIA_BUS_FMT_SGRBG10_1X10, 82 + MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8, 83 + MEDIA_BUS_FMT_SRGGB10_1X10, 84 + MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8, 85 + MEDIA_BUS_FMT_SBGGR10_1X10, 86 + MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8, 87 + MEDIA_BUS_FMT_SGBRG10_1X10, 88 + MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8, 89 + MEDIA_BUS_FMT_YUYV8_2X8, 90 90 }; 91 91 92 92 /* To set the format on the CSI2 requires a mapping function that takes ··· 171 171 int fmtidx, destidx, is_3630; 172 172 173 173 switch (fmt->code) { 174 - case V4L2_MBUS_FMT_SGRBG10_1X10: 175 - case V4L2_MBUS_FMT_SRGGB10_1X10: 176 - case V4L2_MBUS_FMT_SBGGR10_1X10: 177 - case V4L2_MBUS_FMT_SGBRG10_1X10: 174 + case MEDIA_BUS_FMT_SGRBG10_1X10: 175 + case MEDIA_BUS_FMT_SRGGB10_1X10: 176 + case MEDIA_BUS_FMT_SBGGR10_1X10: 177 + case MEDIA_BUS_FMT_SGBRG10_1X10: 178 178 fmtidx = 0; 179 179 break; 180 - case V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8: 181 - case V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8: 182 - case V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8: 183 - case V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8: 180 + case MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8: 181 + case MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8: 182 + case MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8: 183 + case MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8: 184 184 fmtidx = 1; 185 185 break; 186 - case V4L2_MBUS_FMT_YUYV8_2X8: 186 + case MEDIA_BUS_FMT_YUYV8_2X8: 187 187 fmtidx = 2; 188 188 break; 189 189 default: ··· 843 843 unsigned int pad, struct v4l2_mbus_framefmt *fmt, 844 844 enum v4l2_subdev_format_whence which) 845 845 { 846 - enum v4l2_mbus_pixelcode pixelcode; 846 + u32 pixelcode; 847 847 struct v4l2_mbus_framefmt *format; 848 848 const struct isp_format_info *info; 849 849 unsigned int i; ··· 858 858 859 859 /* If not found, use SGRBG10 as default */ 860 860 if (i >= ARRAY_SIZE(csi2_input_fmts)) 861 - fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10; 861 + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; 862 862 863 863 fmt->width = clamp_t(u32, fmt->width, 1, 8191); 864 864 fmt->height = clamp_t(u32, fmt->height, 1, 8191); ··· 1029 1029 memset(&format, 0, sizeof(format)); 1030 1030 format.pad = CSI2_PAD_SINK; 1031 1031 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; 1032 - format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10; 1032 + format.format.code = MEDIA_BUS_FMT_SGRBG10_1X10; 1033 1033 format.format.width = 4096; 1034 1034 format.format.height = 4096; 1035 1035 csi2_set_format(sd, fh, &format);
+29 -31
drivers/media/platform/omap3isp/isppreview.c
··· 964 964 * @prev: pointer to previewer private structure 965 965 * @pixelcode: pixel code 966 966 */ 967 - static void 968 - preview_config_ycpos(struct isp_prev_device *prev, 969 - enum v4l2_mbus_pixelcode pixelcode) 967 + static void preview_config_ycpos(struct isp_prev_device *prev, u32 pixelcode) 970 968 { 971 969 struct isp_device *isp = to_isp_device(prev); 972 970 enum preview_ycpos_mode mode; 973 971 974 972 switch (pixelcode) { 975 - case V4L2_MBUS_FMT_YUYV8_1X16: 973 + case MEDIA_BUS_FMT_YUYV8_1X16: 976 974 mode = YCPOS_CrYCbY; 977 975 break; 978 - case V4L2_MBUS_FMT_UYVY8_1X16: 976 + case MEDIA_BUS_FMT_UYVY8_1X16: 979 977 mode = YCPOS_YCrYCb; 980 978 break; 981 979 default: ··· 1026 1028 ISPPRV_PCR_WIDTH); 1027 1029 1028 1030 switch (info->flavor) { 1029 - case V4L2_MBUS_FMT_SGRBG8_1X8: 1031 + case MEDIA_BUS_FMT_SGRBG8_1X8: 1030 1032 prev->params.cfa_order = 0; 1031 1033 break; 1032 - case V4L2_MBUS_FMT_SRGGB8_1X8: 1034 + case MEDIA_BUS_FMT_SRGGB8_1X8: 1033 1035 prev->params.cfa_order = 1; 1034 1036 break; 1035 - case V4L2_MBUS_FMT_SBGGR8_1X8: 1037 + case MEDIA_BUS_FMT_SBGGR8_1X8: 1036 1038 prev->params.cfa_order = 2; 1037 1039 break; 1038 - case V4L2_MBUS_FMT_SGBRG8_1X8: 1040 + case MEDIA_BUS_FMT_SGBRG8_1X8: 1039 1041 prev->params.cfa_order = 3; 1040 1042 break; 1041 1043 default: ··· 1076 1078 unsigned int elv = prev->crop.top + prev->crop.height - 1; 1077 1079 u32 features; 1078 1080 1079 - if (format->code != V4L2_MBUS_FMT_Y8_1X8 && 1080 - format->code != V4L2_MBUS_FMT_Y10_1X10) { 1081 + if (format->code != MEDIA_BUS_FMT_Y8_1X8 && 1082 + format->code != MEDIA_BUS_FMT_Y10_1X10) { 1081 1083 sph -= 2; 1082 1084 eph += 2; 1083 1085 slv -= 2; ··· 1707 1709 1708 1710 /* previewer format descriptions */ 1709 1711 static const unsigned int preview_input_fmts[] = { 1710 - V4L2_MBUS_FMT_Y8_1X8, 1711 - V4L2_MBUS_FMT_SGRBG8_1X8, 1712 - V4L2_MBUS_FMT_SRGGB8_1X8, 1713 - V4L2_MBUS_FMT_SBGGR8_1X8, 1714 - V4L2_MBUS_FMT_SGBRG8_1X8, 1715 - V4L2_MBUS_FMT_Y10_1X10, 1716 - V4L2_MBUS_FMT_SGRBG10_1X10, 1717 - V4L2_MBUS_FMT_SRGGB10_1X10, 1718 - V4L2_MBUS_FMT_SBGGR10_1X10, 1719 - V4L2_MBUS_FMT_SGBRG10_1X10, 1712 + MEDIA_BUS_FMT_Y8_1X8, 1713 + MEDIA_BUS_FMT_SGRBG8_1X8, 1714 + MEDIA_BUS_FMT_SRGGB8_1X8, 1715 + MEDIA_BUS_FMT_SBGGR8_1X8, 1716 + MEDIA_BUS_FMT_SGBRG8_1X8, 1717 + MEDIA_BUS_FMT_Y10_1X10, 1718 + MEDIA_BUS_FMT_SGRBG10_1X10, 1719 + MEDIA_BUS_FMT_SRGGB10_1X10, 1720 + MEDIA_BUS_FMT_SBGGR10_1X10, 1721 + MEDIA_BUS_FMT_SGBRG10_1X10, 1720 1722 }; 1721 1723 1722 1724 static const unsigned int preview_output_fmts[] = { 1723 - V4L2_MBUS_FMT_UYVY8_1X16, 1724 - V4L2_MBUS_FMT_YUYV8_1X16, 1725 + MEDIA_BUS_FMT_UYVY8_1X16, 1726 + MEDIA_BUS_FMT_YUYV8_1X16, 1725 1727 }; 1726 1728 1727 1729 /* ··· 1740 1742 struct v4l2_mbus_framefmt *fmt, 1741 1743 enum v4l2_subdev_format_whence which) 1742 1744 { 1743 - enum v4l2_mbus_pixelcode pixelcode; 1745 + u32 pixelcode; 1744 1746 struct v4l2_rect *crop; 1745 1747 unsigned int i; 1746 1748 ··· 1772 1774 1773 1775 /* If not found, use SGRBG10 as default */ 1774 1776 if (i >= ARRAY_SIZE(preview_input_fmts)) 1775 - fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10; 1777 + fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10; 1776 1778 break; 1777 1779 1778 1780 case PREV_PAD_SOURCE: ··· 1780 1782 *fmt = *__preview_get_format(prev, fh, PREV_PAD_SINK, which); 1781 1783 1782 1784 switch (pixelcode) { 1783 - case V4L2_MBUS_FMT_YUYV8_1X16: 1784 - case V4L2_MBUS_FMT_UYVY8_1X16: 1785 + case MEDIA_BUS_FMT_YUYV8_1X16: 1786 + case MEDIA_BUS_FMT_UYVY8_1X16: 1785 1787 fmt->code = pixelcode; 1786 1788 break; 1787 1789 1788 1790 default: 1789 - fmt->code = V4L2_MBUS_FMT_YUYV8_1X16; 1791 + fmt->code = MEDIA_BUS_FMT_YUYV8_1X16; 1790 1792 break; 1791 1793 } 1792 1794 ··· 1841 1843 * and no columns in other modes. Increase the margins based on the sink 1842 1844 * format. 1843 1845 */ 1844 - if (sink->code != V4L2_MBUS_FMT_Y8_1X8 && 1845 - sink->code != V4L2_MBUS_FMT_Y10_1X10) { 1846 + if (sink->code != MEDIA_BUS_FMT_Y8_1X8 && 1847 + sink->code != MEDIA_BUS_FMT_Y10_1X10) { 1846 1848 left += 2; 1847 1849 right -= 2; 1848 1850 top += 2; ··· 2090 2092 memset(&format, 0, sizeof(format)); 2091 2093 format.pad = PREV_PAD_SINK; 2092 2094 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; 2093 - format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10; 2095 + format.format.code = MEDIA_BUS_FMT_SGRBG10_1X10; 2094 2096 format.format.width = 4096; 2095 2097 format.format.height = 4096; 2096 2098 preview_set_format(sd, fh, &format);
+9 -10
drivers/media/platform/omap3isp/ispresizer.c
··· 198 198 * @res: Device context. 199 199 * @pixelcode: pixel code. 200 200 */ 201 - static void resizer_set_ycpos(struct isp_res_device *res, 202 - enum v4l2_mbus_pixelcode pixelcode) 201 + static void resizer_set_ycpos(struct isp_res_device *res, u32 pixelcode) 203 202 { 204 203 struct isp_device *isp = to_isp_device(res); 205 204 206 205 switch (pixelcode) { 207 - case V4L2_MBUS_FMT_YUYV8_1X16: 206 + case MEDIA_BUS_FMT_YUYV8_1X16: 208 207 isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT, 209 208 ISPRSZ_CNT_YCPOS); 210 209 break; 211 - case V4L2_MBUS_FMT_UYVY8_1X16: 210 + case MEDIA_BUS_FMT_UYVY8_1X16: 212 211 isp_reg_clr(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT, 213 212 ISPRSZ_CNT_YCPOS); 214 213 break; ··· 1347 1348 1348 1349 /* resizer pixel formats */ 1349 1350 static const unsigned int resizer_formats[] = { 1350 - V4L2_MBUS_FMT_UYVY8_1X16, 1351 - V4L2_MBUS_FMT_YUYV8_1X16, 1351 + MEDIA_BUS_FMT_UYVY8_1X16, 1352 + MEDIA_BUS_FMT_YUYV8_1X16, 1352 1353 }; 1353 1354 1354 1355 static unsigned int resizer_max_in_width(struct isp_res_device *res) ··· 1384 1385 1385 1386 switch (pad) { 1386 1387 case RESZ_PAD_SINK: 1387 - if (fmt->code != V4L2_MBUS_FMT_YUYV8_1X16 && 1388 - fmt->code != V4L2_MBUS_FMT_UYVY8_1X16) 1389 - fmt->code = V4L2_MBUS_FMT_YUYV8_1X16; 1388 + if (fmt->code != MEDIA_BUS_FMT_YUYV8_1X16 && 1389 + fmt->code != MEDIA_BUS_FMT_UYVY8_1X16) 1390 + fmt->code = MEDIA_BUS_FMT_YUYV8_1X16; 1390 1391 1391 1392 fmt->width = clamp_t(u32, fmt->width, MIN_IN_WIDTH, 1392 1393 resizer_max_in_width(res)); ··· 1570 1571 memset(&format, 0, sizeof(format)); 1571 1572 format.pad = RESZ_PAD_SINK; 1572 1573 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; 1573 - format.format.code = V4L2_MBUS_FMT_YUYV8_1X16; 1574 + format.format.code = MEDIA_BUS_FMT_YUYV8_1X16; 1574 1575 format.format.width = 4096; 1575 1576 format.format.height = 4096; 1576 1577 resizer_set_format(sd, fh, &format);
+47 -48
drivers/media/platform/omap3isp/ispvideo.c
··· 39 39 * corresponding in-memory formats to the table below!!! 40 40 */ 41 41 static struct isp_format_info formats[] = { 42 - { V4L2_MBUS_FMT_Y8_1X8, V4L2_MBUS_FMT_Y8_1X8, 43 - V4L2_MBUS_FMT_Y8_1X8, V4L2_MBUS_FMT_Y8_1X8, 42 + { MEDIA_BUS_FMT_Y8_1X8, MEDIA_BUS_FMT_Y8_1X8, 43 + MEDIA_BUS_FMT_Y8_1X8, MEDIA_BUS_FMT_Y8_1X8, 44 44 V4L2_PIX_FMT_GREY, 8, 1, }, 45 - { V4L2_MBUS_FMT_Y10_1X10, V4L2_MBUS_FMT_Y10_1X10, 46 - V4L2_MBUS_FMT_Y10_1X10, V4L2_MBUS_FMT_Y8_1X8, 45 + { MEDIA_BUS_FMT_Y10_1X10, MEDIA_BUS_FMT_Y10_1X10, 46 + MEDIA_BUS_FMT_Y10_1X10, MEDIA_BUS_FMT_Y8_1X8, 47 47 V4L2_PIX_FMT_Y10, 10, 2, }, 48 - { V4L2_MBUS_FMT_Y12_1X12, V4L2_MBUS_FMT_Y10_1X10, 49 - V4L2_MBUS_FMT_Y12_1X12, V4L2_MBUS_FMT_Y8_1X8, 48 + { MEDIA_BUS_FMT_Y12_1X12, MEDIA_BUS_FMT_Y10_1X10, 49 + MEDIA_BUS_FMT_Y12_1X12, MEDIA_BUS_FMT_Y8_1X8, 50 50 V4L2_PIX_FMT_Y12, 12, 2, }, 51 - { V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_MBUS_FMT_SBGGR8_1X8, 52 - V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_MBUS_FMT_SBGGR8_1X8, 51 + { MEDIA_BUS_FMT_SBGGR8_1X8, MEDIA_BUS_FMT_SBGGR8_1X8, 52 + MEDIA_BUS_FMT_SBGGR8_1X8, MEDIA_BUS_FMT_SBGGR8_1X8, 53 53 V4L2_PIX_FMT_SBGGR8, 8, 1, }, 54 - { V4L2_MBUS_FMT_SGBRG8_1X8, V4L2_MBUS_FMT_SGBRG8_1X8, 55 - V4L2_MBUS_FMT_SGBRG8_1X8, V4L2_MBUS_FMT_SGBRG8_1X8, 54 + { MEDIA_BUS_FMT_SGBRG8_1X8, MEDIA_BUS_FMT_SGBRG8_1X8, 55 + MEDIA_BUS_FMT_SGBRG8_1X8, MEDIA_BUS_FMT_SGBRG8_1X8, 56 56 V4L2_PIX_FMT_SGBRG8, 8, 1, }, 57 - { V4L2_MBUS_FMT_SGRBG8_1X8, V4L2_MBUS_FMT_SGRBG8_1X8, 58 - V4L2_MBUS_FMT_SGRBG8_1X8, V4L2_MBUS_FMT_SGRBG8_1X8, 57 + { MEDIA_BUS_FMT_SGRBG8_1X8, MEDIA_BUS_FMT_SGRBG8_1X8, 58 + MEDIA_BUS_FMT_SGRBG8_1X8, MEDIA_BUS_FMT_SGRBG8_1X8, 59 59 V4L2_PIX_FMT_SGRBG8, 8, 1, }, 60 - { V4L2_MBUS_FMT_SRGGB8_1X8, V4L2_MBUS_FMT_SRGGB8_1X8, 61 - V4L2_MBUS_FMT_SRGGB8_1X8, V4L2_MBUS_FMT_SRGGB8_1X8, 60 + { MEDIA_BUS_FMT_SRGGB8_1X8, MEDIA_BUS_FMT_SRGGB8_1X8, 61 + MEDIA_BUS_FMT_SRGGB8_1X8, MEDIA_BUS_FMT_SRGGB8_1X8, 62 62 V4L2_PIX_FMT_SRGGB8, 8, 1, }, 63 - { V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8, V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8, 64 - V4L2_MBUS_FMT_SBGGR10_1X10, 0, 63 + { MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8, MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8, 64 + MEDIA_BUS_FMT_SBGGR10_1X10, 0, 65 65 V4L2_PIX_FMT_SBGGR10DPCM8, 8, 1, }, 66 - { V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8, V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8, 67 - V4L2_MBUS_FMT_SGBRG10_1X10, 0, 66 + { MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8, MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8, 67 + MEDIA_BUS_FMT_SGBRG10_1X10, 0, 68 68 V4L2_PIX_FMT_SGBRG10DPCM8, 8, 1, }, 69 - { V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8, V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8, 70 - V4L2_MBUS_FMT_SGRBG10_1X10, 0, 69 + { MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8, MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8, 70 + MEDIA_BUS_FMT_SGRBG10_1X10, 0, 71 71 V4L2_PIX_FMT_SGRBG10DPCM8, 8, 1, }, 72 - { V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8, V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8, 73 - V4L2_MBUS_FMT_SRGGB10_1X10, 0, 72 + { MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8, MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8, 73 + MEDIA_BUS_FMT_SRGGB10_1X10, 0, 74 74 V4L2_PIX_FMT_SRGGB10DPCM8, 8, 1, }, 75 - { V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_MBUS_FMT_SBGGR10_1X10, 76 - V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_MBUS_FMT_SBGGR8_1X8, 75 + { MEDIA_BUS_FMT_SBGGR10_1X10, MEDIA_BUS_FMT_SBGGR10_1X10, 76 + MEDIA_BUS_FMT_SBGGR10_1X10, MEDIA_BUS_FMT_SBGGR8_1X8, 77 77 V4L2_PIX_FMT_SBGGR10, 10, 2, }, 78 - { V4L2_MBUS_FMT_SGBRG10_1X10, V4L2_MBUS_FMT_SGBRG10_1X10, 79 - V4L2_MBUS_FMT_SGBRG10_1X10, V4L2_MBUS_FMT_SGBRG8_1X8, 78 + { MEDIA_BUS_FMT_SGBRG10_1X10, MEDIA_BUS_FMT_SGBRG10_1X10, 79 + MEDIA_BUS_FMT_SGBRG10_1X10, MEDIA_BUS_FMT_SGBRG8_1X8, 80 80 V4L2_PIX_FMT_SGBRG10, 10, 2, }, 81 - { V4L2_MBUS_FMT_SGRBG10_1X10, V4L2_MBUS_FMT_SGRBG10_1X10, 82 - V4L2_MBUS_FMT_SGRBG10_1X10, V4L2_MBUS_FMT_SGRBG8_1X8, 81 + { MEDIA_BUS_FMT_SGRBG10_1X10, MEDIA_BUS_FMT_SGRBG10_1X10, 82 + MEDIA_BUS_FMT_SGRBG10_1X10, MEDIA_BUS_FMT_SGRBG8_1X8, 83 83 V4L2_PIX_FMT_SGRBG10, 10, 2, }, 84 - { V4L2_MBUS_FMT_SRGGB10_1X10, V4L2_MBUS_FMT_SRGGB10_1X10, 85 - V4L2_MBUS_FMT_SRGGB10_1X10, V4L2_MBUS_FMT_SRGGB8_1X8, 84 + { MEDIA_BUS_FMT_SRGGB10_1X10, MEDIA_BUS_FMT_SRGGB10_1X10, 85 + MEDIA_BUS_FMT_SRGGB10_1X10, MEDIA_BUS_FMT_SRGGB8_1X8, 86 86 V4L2_PIX_FMT_SRGGB10, 10, 2, }, 87 - { V4L2_MBUS_FMT_SBGGR12_1X12, V4L2_MBUS_FMT_SBGGR10_1X10, 88 - V4L2_MBUS_FMT_SBGGR12_1X12, V4L2_MBUS_FMT_SBGGR8_1X8, 87 + { MEDIA_BUS_FMT_SBGGR12_1X12, MEDIA_BUS_FMT_SBGGR10_1X10, 88 + MEDIA_BUS_FMT_SBGGR12_1X12, MEDIA_BUS_FMT_SBGGR8_1X8, 89 89 V4L2_PIX_FMT_SBGGR12, 12, 2, }, 90 - { V4L2_MBUS_FMT_SGBRG12_1X12, V4L2_MBUS_FMT_SGBRG10_1X10, 91 - V4L2_MBUS_FMT_SGBRG12_1X12, V4L2_MBUS_FMT_SGBRG8_1X8, 90 + { MEDIA_BUS_FMT_SGBRG12_1X12, MEDIA_BUS_FMT_SGBRG10_1X10, 91 + MEDIA_BUS_FMT_SGBRG12_1X12, MEDIA_BUS_FMT_SGBRG8_1X8, 92 92 V4L2_PIX_FMT_SGBRG12, 12, 2, }, 93 - { V4L2_MBUS_FMT_SGRBG12_1X12, V4L2_MBUS_FMT_SGRBG10_1X10, 94 - V4L2_MBUS_FMT_SGRBG12_1X12, V4L2_MBUS_FMT_SGRBG8_1X8, 93 + { MEDIA_BUS_FMT_SGRBG12_1X12, MEDIA_BUS_FMT_SGRBG10_1X10, 94 + MEDIA_BUS_FMT_SGRBG12_1X12, MEDIA_BUS_FMT_SGRBG8_1X8, 95 95 V4L2_PIX_FMT_SGRBG12, 12, 2, }, 96 - { V4L2_MBUS_FMT_SRGGB12_1X12, V4L2_MBUS_FMT_SRGGB10_1X10, 97 - V4L2_MBUS_FMT_SRGGB12_1X12, V4L2_MBUS_FMT_SRGGB8_1X8, 96 + { MEDIA_BUS_FMT_SRGGB12_1X12, MEDIA_BUS_FMT_SRGGB10_1X10, 97 + MEDIA_BUS_FMT_SRGGB12_1X12, MEDIA_BUS_FMT_SRGGB8_1X8, 98 98 V4L2_PIX_FMT_SRGGB12, 12, 2, }, 99 - { V4L2_MBUS_FMT_UYVY8_1X16, V4L2_MBUS_FMT_UYVY8_1X16, 100 - V4L2_MBUS_FMT_UYVY8_1X16, 0, 99 + { MEDIA_BUS_FMT_UYVY8_1X16, MEDIA_BUS_FMT_UYVY8_1X16, 100 + MEDIA_BUS_FMT_UYVY8_1X16, 0, 101 101 V4L2_PIX_FMT_UYVY, 16, 2, }, 102 - { V4L2_MBUS_FMT_YUYV8_1X16, V4L2_MBUS_FMT_YUYV8_1X16, 103 - V4L2_MBUS_FMT_YUYV8_1X16, 0, 102 + { MEDIA_BUS_FMT_YUYV8_1X16, MEDIA_BUS_FMT_YUYV8_1X16, 103 + MEDIA_BUS_FMT_YUYV8_1X16, 0, 104 104 V4L2_PIX_FMT_YUYV, 16, 2, }, 105 - { V4L2_MBUS_FMT_UYVY8_2X8, V4L2_MBUS_FMT_UYVY8_2X8, 106 - V4L2_MBUS_FMT_UYVY8_2X8, 0, 105 + { MEDIA_BUS_FMT_UYVY8_2X8, MEDIA_BUS_FMT_UYVY8_2X8, 106 + MEDIA_BUS_FMT_UYVY8_2X8, 0, 107 107 V4L2_PIX_FMT_UYVY, 8, 2, }, 108 - { V4L2_MBUS_FMT_YUYV8_2X8, V4L2_MBUS_FMT_YUYV8_2X8, 109 - V4L2_MBUS_FMT_YUYV8_2X8, 0, 108 + { MEDIA_BUS_FMT_YUYV8_2X8, MEDIA_BUS_FMT_YUYV8_2X8, 109 + MEDIA_BUS_FMT_YUYV8_2X8, 0, 110 110 V4L2_PIX_FMT_YUYV, 8, 2, }, 111 111 /* Empty entry to catch the unsupported pixel code (0) used by the CCDC 112 112 * module and avoid NULL pointer dereferences. ··· 114 114 { 0, } 115 115 }; 116 116 117 - const struct isp_format_info * 118 - omap3isp_video_format_info(enum v4l2_mbus_pixelcode code) 117 + const struct isp_format_info *omap3isp_video_format_info(u32 code) 119 118 { 120 119 unsigned int i; 121 120
+5 -5
drivers/media/platform/omap3isp/ispvideo.h
··· 44 44 * @bpp: Bytes per pixel (when stored in memory) 45 45 */ 46 46 struct isp_format_info { 47 - enum v4l2_mbus_pixelcode code; 48 - enum v4l2_mbus_pixelcode truncated; 49 - enum v4l2_mbus_pixelcode uncompressed; 50 - enum v4l2_mbus_pixelcode flavor; 47 + u32 code; 48 + u32 truncated; 49 + u32 uncompressed; 50 + u32 flavor; 51 51 u32 pixelformat; 52 52 unsigned int width; 53 53 unsigned int bpp; ··· 206 206 struct media_pad *omap3isp_video_remote_pad(struct isp_video *video); 207 207 208 208 const struct isp_format_info * 209 - omap3isp_video_format_info(enum v4l2_mbus_pixelcode code); 209 + omap3isp_video_format_info(u32 code); 210 210 211 211 #endif /* OMAP3_ISP_VIDEO_H */
+5 -5
drivers/media/platform/s3c-camif/camif-capture.c
··· 1218 1218 } 1219 1219 1220 1220 /* Media bus pixel formats supported at the camif input */ 1221 - static const enum v4l2_mbus_pixelcode camif_mbus_formats[] = { 1222 - V4L2_MBUS_FMT_YUYV8_2X8, 1223 - V4L2_MBUS_FMT_YVYU8_2X8, 1224 - V4L2_MBUS_FMT_UYVY8_2X8, 1225 - V4L2_MBUS_FMT_VYUY8_2X8, 1221 + static const u32 camif_mbus_formats[] = { 1222 + MEDIA_BUS_FMT_YUYV8_2X8, 1223 + MEDIA_BUS_FMT_YVYU8_2X8, 1224 + MEDIA_BUS_FMT_UYVY8_2X8, 1225 + MEDIA_BUS_FMT_VYUY8_2X8, 1226 1226 }; 1227 1227 1228 1228 /*
+4 -4
drivers/media/platform/s3c-camif/camif-regs.c
··· 96 96 } 97 97 98 98 static const u32 src_pixfmt_map[8][2] = { 99 - { V4L2_MBUS_FMT_YUYV8_2X8, CISRCFMT_ORDER422_YCBYCR }, 100 - { V4L2_MBUS_FMT_YVYU8_2X8, CISRCFMT_ORDER422_YCRYCB }, 101 - { V4L2_MBUS_FMT_UYVY8_2X8, CISRCFMT_ORDER422_CBYCRY }, 102 - { V4L2_MBUS_FMT_VYUY8_2X8, CISRCFMT_ORDER422_CRYCBY }, 99 + { MEDIA_BUS_FMT_YUYV8_2X8, CISRCFMT_ORDER422_YCBYCR }, 100 + { MEDIA_BUS_FMT_YVYU8_2X8, CISRCFMT_ORDER422_YCRYCB }, 101 + { MEDIA_BUS_FMT_UYVY8_2X8, CISRCFMT_ORDER422_CBYCRY }, 102 + { MEDIA_BUS_FMT_VYUY8_2X8, CISRCFMT_ORDER422_CRYCBY }, 103 103 }; 104 104 105 105 /* Set camera input pixel format and resolution */
+1 -1
drivers/media/platform/s5p-tv/hdmi_drv.c
··· 660 660 memset(fmt, 0, sizeof(*fmt)); 661 661 fmt->width = t->hact.end - t->hact.beg; 662 662 fmt->height = t->vact[0].end - t->vact[0].beg; 663 - fmt->code = V4L2_MBUS_FMT_FIXED; /* means RGB888 */ 663 + fmt->code = MEDIA_BUS_FMT_FIXED; /* means RGB888 */ 664 664 fmt->colorspace = V4L2_COLORSPACE_SRGB; 665 665 if (t->interlaced) { 666 666 fmt->field = V4L2_FIELD_INTERLACED;
+1 -1
drivers/media/platform/s5p-tv/sdo_drv.c
··· 170 170 /* all modes are 720 pixels wide */ 171 171 fmt->width = 720; 172 172 fmt->height = sdev->fmt->height; 173 - fmt->code = V4L2_MBUS_FMT_FIXED; 173 + fmt->code = MEDIA_BUS_FMT_FIXED; 174 174 fmt->field = V4L2_FIELD_INTERLACED; 175 175 fmt->colorspace = V4L2_COLORSPACE_JPEG; 176 176 return 0;
+4 -4
drivers/media/platform/sh_vou.c
··· 680 680 struct sh_vou_geometry geo; 681 681 struct v4l2_mbus_framefmt mbfmt = { 682 682 /* Revisit: is this the correct code? */ 683 - .code = V4L2_MBUS_FMT_YUYV8_2X8, 683 + .code = MEDIA_BUS_FMT_YUYV8_2X8, 684 684 .field = V4L2_FIELD_INTERLACED, 685 685 .colorspace = V4L2_COLORSPACE_SMPTE170M, 686 686 }; ··· 733 733 /* Sanity checks */ 734 734 if ((unsigned)mbfmt.width > VOU_MAX_IMAGE_WIDTH || 735 735 (unsigned)mbfmt.height > img_height_max || 736 - mbfmt.code != V4L2_MBUS_FMT_YUYV8_2X8) 736 + mbfmt.code != MEDIA_BUS_FMT_YUYV8_2X8) 737 737 return -EIO; 738 738 739 739 if (mbfmt.width != geo.output.width || ··· 943 943 struct sh_vou_geometry geo; 944 944 struct v4l2_mbus_framefmt mbfmt = { 945 945 /* Revisit: is this the correct code? */ 946 - .code = V4L2_MBUS_FMT_YUYV8_2X8, 946 + .code = MEDIA_BUS_FMT_YUYV8_2X8, 947 947 .field = V4L2_FIELD_INTERLACED, 948 948 .colorspace = V4L2_COLORSPACE_SMPTE170M, 949 949 }; ··· 994 994 /* Sanity checks */ 995 995 if ((unsigned)mbfmt.width > VOU_MAX_IMAGE_WIDTH || 996 996 (unsigned)mbfmt.height > img_height_max || 997 - mbfmt.code != V4L2_MBUS_FMT_YUYV8_2X8) 997 + mbfmt.code != MEDIA_BUS_FMT_YUYV8_2X8) 998 998 return -EIO; 999 999 1000 1000 geo.output.width = mbfmt.width;
+11 -11
drivers/media/platform/soc_camera/atmel-isi.c
··· 105 105 } 106 106 107 107 static int configure_geometry(struct atmel_isi *isi, u32 width, 108 - u32 height, enum v4l2_mbus_pixelcode code) 108 + u32 height, u32 code) 109 109 { 110 110 u32 cfg2, cr; 111 111 112 112 switch (code) { 113 113 /* YUV, including grey */ 114 - case V4L2_MBUS_FMT_Y8_1X8: 114 + case MEDIA_BUS_FMT_Y8_1X8: 115 115 cr = ISI_CFG2_GRAYSCALE; 116 116 break; 117 - case V4L2_MBUS_FMT_VYUY8_2X8: 117 + case MEDIA_BUS_FMT_VYUY8_2X8: 118 118 cr = ISI_CFG2_YCC_SWAP_MODE_3; 119 119 break; 120 - case V4L2_MBUS_FMT_UYVY8_2X8: 120 + case MEDIA_BUS_FMT_UYVY8_2X8: 121 121 cr = ISI_CFG2_YCC_SWAP_MODE_2; 122 122 break; 123 - case V4L2_MBUS_FMT_YVYU8_2X8: 123 + case MEDIA_BUS_FMT_YVYU8_2X8: 124 124 cr = ISI_CFG2_YCC_SWAP_MODE_1; 125 125 break; 126 - case V4L2_MBUS_FMT_YUYV8_2X8: 126 + case MEDIA_BUS_FMT_YUYV8_2X8: 127 127 cr = ISI_CFG2_YCC_SWAP_DEFAULT; 128 128 break; 129 129 /* RGB, TODO */ ··· 645 645 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 646 646 int formats = 0, ret; 647 647 /* sensor format */ 648 - enum v4l2_mbus_pixelcode code; 648 + u32 code; 649 649 /* soc camera host format */ 650 650 const struct soc_mbus_pixelfmt *fmt; 651 651 ··· 670 670 } 671 671 672 672 switch (code) { 673 - case V4L2_MBUS_FMT_UYVY8_2X8: 674 - case V4L2_MBUS_FMT_VYUY8_2X8: 675 - case V4L2_MBUS_FMT_YUYV8_2X8: 676 - case V4L2_MBUS_FMT_YVYU8_2X8: 673 + case MEDIA_BUS_FMT_UYVY8_2X8: 674 + case MEDIA_BUS_FMT_VYUY8_2X8: 675 + case MEDIA_BUS_FMT_YUYV8_2X8: 676 + case MEDIA_BUS_FMT_YVYU8_2X8: 677 677 formats++; 678 678 if (xlate) { 679 679 xlate->host_fmt = &isi_camera_formats[0];
+12 -14
drivers/media/platform/soc_camera/mx2_camera.c
··· 211 211 212 212 /* prp configuration for a client-host fmt pair */ 213 213 struct mx2_fmt_cfg { 214 - enum v4l2_mbus_pixelcode in_fmt; 214 + u32 in_fmt; 215 215 u32 out_fmt; 216 216 struct mx2_prp_cfg cfg; 217 217 }; ··· 309 309 } 310 310 }, 311 311 { 312 - .in_fmt = V4L2_MBUS_FMT_UYVY8_2X8, 312 + .in_fmt = MEDIA_BUS_FMT_UYVY8_2X8, 313 313 .out_fmt = V4L2_PIX_FMT_YUYV, 314 314 .cfg = { 315 315 .channel = 1, ··· 323 323 } 324 324 }, 325 325 { 326 - .in_fmt = V4L2_MBUS_FMT_YUYV8_2X8, 326 + .in_fmt = MEDIA_BUS_FMT_YUYV8_2X8, 327 327 .out_fmt = V4L2_PIX_FMT_YUYV, 328 328 .cfg = { 329 329 .channel = 1, ··· 337 337 } 338 338 }, 339 339 { 340 - .in_fmt = V4L2_MBUS_FMT_YUYV8_2X8, 340 + .in_fmt = MEDIA_BUS_FMT_YUYV8_2X8, 341 341 .out_fmt = V4L2_PIX_FMT_YUV420, 342 342 .cfg = { 343 343 .channel = 2, ··· 351 351 } 352 352 }, 353 353 { 354 - .in_fmt = V4L2_MBUS_FMT_UYVY8_2X8, 354 + .in_fmt = MEDIA_BUS_FMT_UYVY8_2X8, 355 355 .out_fmt = V4L2_PIX_FMT_YUV420, 356 356 .cfg = { 357 357 .channel = 2, ··· 366 366 }, 367 367 }; 368 368 369 - static struct mx2_fmt_cfg *mx27_emma_prp_get_format( 370 - enum v4l2_mbus_pixelcode in_fmt, 371 - u32 out_fmt) 369 + static struct mx2_fmt_cfg *mx27_emma_prp_get_format(u32 in_fmt, u32 out_fmt) 372 370 { 373 371 int i; 374 372 ··· 943 945 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 944 946 const struct soc_mbus_pixelfmt *fmt; 945 947 struct device *dev = icd->parent; 946 - enum v4l2_mbus_pixelcode code; 948 + u32 code; 947 949 int ret, formats = 0; 948 950 949 951 ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code); ··· 957 959 return 0; 958 960 } 959 961 960 - if (code == V4L2_MBUS_FMT_YUYV8_2X8 || 961 - code == V4L2_MBUS_FMT_UYVY8_2X8) { 962 + if (code == MEDIA_BUS_FMT_YUYV8_2X8 || 963 + code == MEDIA_BUS_FMT_UYVY8_2X8) { 962 964 formats++; 963 965 if (xlate) { 964 966 /* ··· 966 968 * soc_mediabus.c 967 969 */ 968 970 xlate->host_fmt = 969 - soc_mbus_get_fmtdesc(V4L2_MBUS_FMT_YUYV8_1_5X8); 971 + soc_mbus_get_fmtdesc(MEDIA_BUS_FMT_YUYV8_1_5X8); 970 972 xlate->code = code; 971 973 dev_dbg(dev, "Providing host format %s for sensor code %d\n", 972 974 xlate->host_fmt->name, code); ··· 974 976 } 975 977 } 976 978 977 - if (code == V4L2_MBUS_FMT_UYVY8_2X8) { 979 + if (code == MEDIA_BUS_FMT_UYVY8_2X8) { 978 980 formats++; 979 981 if (xlate) { 980 982 xlate->host_fmt = 981 - soc_mbus_get_fmtdesc(V4L2_MBUS_FMT_YUYV8_2X8); 983 + soc_mbus_get_fmtdesc(MEDIA_BUS_FMT_YUYV8_2X8); 982 984 xlate->code = code; 983 985 dev_dbg(dev, "Providing host format %s for sensor code %d\n", 984 986 xlate->host_fmt->name, code);
+3 -3
drivers/media/platform/soc_camera/mx3_camera.c
··· 656 656 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 657 657 struct device *dev = icd->parent; 658 658 int formats = 0, ret; 659 - enum v4l2_mbus_pixelcode code; 659 + u32 code; 660 660 const struct soc_mbus_pixelfmt *fmt; 661 661 662 662 ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code); ··· 677 677 return 0; 678 678 679 679 switch (code) { 680 - case V4L2_MBUS_FMT_SBGGR10_1X10: 680 + case MEDIA_BUS_FMT_SBGGR10_1X10: 681 681 formats++; 682 682 if (xlate) { 683 683 xlate->host_fmt = &mx3_camera_formats[0]; ··· 687 687 mx3_camera_formats[0].name, code); 688 688 } 689 689 break; 690 - case V4L2_MBUS_FMT_Y10_1X10: 690 + case MEDIA_BUS_FMT_Y10_1X10: 691 691 formats++; 692 692 if (xlate) { 693 693 xlate->host_fmt = &mx3_camera_formats[1];
+18 -18
drivers/media/platform/soc_camera/omap1_camera.c
··· 140 140 /* buffer for one video frame */ 141 141 struct omap1_cam_buf { 142 142 struct videobuf_buffer vb; 143 - enum v4l2_mbus_pixelcode code; 143 + u32 code; 144 144 int inwork; 145 145 struct scatterlist *sgbuf; 146 146 int sgcount; ··· 980 980 /* Duplicate standard formats based on host capability of byte swapping */ 981 981 static const struct soc_mbus_lookup omap1_cam_formats[] = { 982 982 { 983 - .code = V4L2_MBUS_FMT_UYVY8_2X8, 983 + .code = MEDIA_BUS_FMT_UYVY8_2X8, 984 984 .fmt = { 985 985 .fourcc = V4L2_PIX_FMT_YUYV, 986 986 .name = "YUYV", ··· 990 990 .layout = SOC_MBUS_LAYOUT_PACKED, 991 991 }, 992 992 }, { 993 - .code = V4L2_MBUS_FMT_VYUY8_2X8, 993 + .code = MEDIA_BUS_FMT_VYUY8_2X8, 994 994 .fmt = { 995 995 .fourcc = V4L2_PIX_FMT_YVYU, 996 996 .name = "YVYU", ··· 1000 1000 .layout = SOC_MBUS_LAYOUT_PACKED, 1001 1001 }, 1002 1002 }, { 1003 - .code = V4L2_MBUS_FMT_YUYV8_2X8, 1003 + .code = MEDIA_BUS_FMT_YUYV8_2X8, 1004 1004 .fmt = { 1005 1005 .fourcc = V4L2_PIX_FMT_UYVY, 1006 1006 .name = "UYVY", ··· 1010 1010 .layout = SOC_MBUS_LAYOUT_PACKED, 1011 1011 }, 1012 1012 }, { 1013 - .code = V4L2_MBUS_FMT_YVYU8_2X8, 1013 + .code = MEDIA_BUS_FMT_YVYU8_2X8, 1014 1014 .fmt = { 1015 1015 .fourcc = V4L2_PIX_FMT_VYUY, 1016 1016 .name = "VYUY", ··· 1020 1020 .layout = SOC_MBUS_LAYOUT_PACKED, 1021 1021 }, 1022 1022 }, { 1023 - .code = V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, 1023 + .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE, 1024 1024 .fmt = { 1025 1025 .fourcc = V4L2_PIX_FMT_RGB555, 1026 1026 .name = "RGB555", ··· 1030 1030 .layout = SOC_MBUS_LAYOUT_PACKED, 1031 1031 }, 1032 1032 }, { 1033 - .code = V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, 1033 + .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, 1034 1034 .fmt = { 1035 1035 .fourcc = V4L2_PIX_FMT_RGB555X, 1036 1036 .name = "RGB555X", ··· 1040 1040 .layout = SOC_MBUS_LAYOUT_PACKED, 1041 1041 }, 1042 1042 }, { 1043 - .code = V4L2_MBUS_FMT_RGB565_2X8_BE, 1043 + .code = MEDIA_BUS_FMT_RGB565_2X8_BE, 1044 1044 .fmt = { 1045 1045 .fourcc = V4L2_PIX_FMT_RGB565, 1046 1046 .name = "RGB565", ··· 1050 1050 .layout = SOC_MBUS_LAYOUT_PACKED, 1051 1051 }, 1052 1052 }, { 1053 - .code = V4L2_MBUS_FMT_RGB565_2X8_LE, 1053 + .code = MEDIA_BUS_FMT_RGB565_2X8_LE, 1054 1054 .fmt = { 1055 1055 .fourcc = V4L2_PIX_FMT_RGB565X, 1056 1056 .name = "RGB565X", ··· 1068 1068 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 1069 1069 struct device *dev = icd->parent; 1070 1070 int formats = 0, ret; 1071 - enum v4l2_mbus_pixelcode code; 1071 + u32 code; 1072 1072 const struct soc_mbus_pixelfmt *fmt; 1073 1073 1074 1074 ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code); ··· 1088 1088 return 0; 1089 1089 1090 1090 switch (code) { 1091 - case V4L2_MBUS_FMT_YUYV8_2X8: 1092 - case V4L2_MBUS_FMT_YVYU8_2X8: 1093 - case V4L2_MBUS_FMT_UYVY8_2X8: 1094 - case V4L2_MBUS_FMT_VYUY8_2X8: 1095 - case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE: 1096 - case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE: 1097 - case V4L2_MBUS_FMT_RGB565_2X8_BE: 1098 - case V4L2_MBUS_FMT_RGB565_2X8_LE: 1091 + case MEDIA_BUS_FMT_YUYV8_2X8: 1092 + case MEDIA_BUS_FMT_YVYU8_2X8: 1093 + case MEDIA_BUS_FMT_UYVY8_2X8: 1094 + case MEDIA_BUS_FMT_VYUY8_2X8: 1095 + case MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE: 1096 + case MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE: 1097 + case MEDIA_BUS_FMT_RGB565_2X8_BE: 1098 + case MEDIA_BUS_FMT_RGB565_2X8_LE: 1099 1099 formats++; 1100 1100 if (xlate) { 1101 1101 xlate->host_fmt = soc_mbus_find_fmtdesc(code,
+8 -8
drivers/media/platform/soc_camera/pxa_camera.c
··· 187 187 struct pxa_buffer { 188 188 /* common v4l buffer stuff -- must be first */ 189 189 struct videobuf_buffer vb; 190 - enum v4l2_mbus_pixelcode code; 190 + u32 code; 191 191 /* our descriptor lists for Y, U and V channels */ 192 192 struct pxa_cam_dma dmas[3]; 193 193 int inwork; ··· 1253 1253 struct device *dev = icd->parent; 1254 1254 int formats = 0, ret; 1255 1255 struct pxa_cam *cam; 1256 - enum v4l2_mbus_pixelcode code; 1256 + u32 code; 1257 1257 const struct soc_mbus_pixelfmt *fmt; 1258 1258 1259 1259 ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code); ··· 1283 1283 } 1284 1284 1285 1285 switch (code) { 1286 - case V4L2_MBUS_FMT_UYVY8_2X8: 1286 + case MEDIA_BUS_FMT_UYVY8_2X8: 1287 1287 formats++; 1288 1288 if (xlate) { 1289 1289 xlate->host_fmt = &pxa_camera_formats[0]; ··· 1292 1292 dev_dbg(dev, "Providing format %s using code %d\n", 1293 1293 pxa_camera_formats[0].name, code); 1294 1294 } 1295 - case V4L2_MBUS_FMT_VYUY8_2X8: 1296 - case V4L2_MBUS_FMT_YUYV8_2X8: 1297 - case V4L2_MBUS_FMT_YVYU8_2X8: 1298 - case V4L2_MBUS_FMT_RGB565_2X8_LE: 1299 - case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE: 1295 + case MEDIA_BUS_FMT_VYUY8_2X8: 1296 + case MEDIA_BUS_FMT_YUYV8_2X8: 1297 + case MEDIA_BUS_FMT_YVYU8_2X8: 1298 + case MEDIA_BUS_FMT_RGB565_2X8_LE: 1299 + case MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE: 1300 1300 if (xlate) 1301 1301 dev_dbg(dev, "Providing format %s packed\n", 1302 1302 fmt->name);
+7 -7
drivers/media/platform/soc_camera/rcar_vin.c
··· 272 272 273 273 /* input interface */ 274 274 switch (icd->current_fmt->code) { 275 - case V4L2_MBUS_FMT_YUYV8_1X16: 275 + case MEDIA_BUS_FMT_YUYV8_1X16: 276 276 /* BT.601/BT.1358 16bit YCbCr422 */ 277 277 vnmc |= VNMC_INF_YUV16; 278 278 break; 279 - case V4L2_MBUS_FMT_YUYV8_2X8: 279 + case MEDIA_BUS_FMT_YUYV8_2X8: 280 280 /* BT.656 8bit YCbCr422 or BT.601 8bit YCbCr422 */ 281 281 vnmc |= priv->pdata_flags & RCAR_VIN_BT656 ? 282 282 VNMC_INF_YUV8_BT656 : VNMC_INF_YUV8_BT601; 283 283 break; 284 - case V4L2_MBUS_FMT_YUYV10_2X10: 284 + case MEDIA_BUS_FMT_YUYV10_2X10: 285 285 /* BT.656 10bit YCbCr422 or BT.601 10bit YCbCr422 */ 286 286 vnmc |= priv->pdata_flags & RCAR_VIN_BT656 ? 287 287 VNMC_INF_YUV10_BT656 : VNMC_INF_YUV10_BT601; ··· 921 921 int ret, k, n; 922 922 int formats = 0; 923 923 struct rcar_vin_cam *cam; 924 - enum v4l2_mbus_pixelcode code; 924 + u32 code; 925 925 const struct soc_mbus_pixelfmt *fmt; 926 926 927 927 ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code); ··· 1010 1010 cam->extra_fmt = NULL; 1011 1011 1012 1012 switch (code) { 1013 - case V4L2_MBUS_FMT_YUYV8_1X16: 1014 - case V4L2_MBUS_FMT_YUYV8_2X8: 1015 - case V4L2_MBUS_FMT_YUYV10_2X10: 1013 + case MEDIA_BUS_FMT_YUYV8_1X16: 1014 + case MEDIA_BUS_FMT_YUYV8_2X8: 1015 + case MEDIA_BUS_FMT_YUYV10_2X10: 1016 1016 if (cam->extra_fmt) 1017 1017 break; 1018 1018
+10 -10
drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
··· 149 149 /* Camera cropping rectangle */ 150 150 struct v4l2_rect rect; 151 151 const struct soc_mbus_pixelfmt *extra_fmt; 152 - enum v4l2_mbus_pixelcode code; 152 + u32 code; 153 153 }; 154 154 155 155 static struct sh_mobile_ceu_buffer *to_ceu_vb(struct vb2_buffer *vb) ··· 861 861 case V4L2_PIX_FMT_NV16: 862 862 case V4L2_PIX_FMT_NV61: 863 863 switch (cam->code) { 864 - case V4L2_MBUS_FMT_UYVY8_2X8: 864 + case MEDIA_BUS_FMT_UYVY8_2X8: 865 865 value = 0x00000000; /* Cb0, Y0, Cr0, Y1 */ 866 866 break; 867 - case V4L2_MBUS_FMT_VYUY8_2X8: 867 + case MEDIA_BUS_FMT_VYUY8_2X8: 868 868 value = 0x00000100; /* Cr0, Y0, Cb0, Y1 */ 869 869 break; 870 - case V4L2_MBUS_FMT_YUYV8_2X8: 870 + case MEDIA_BUS_FMT_YUYV8_2X8: 871 871 value = 0x00000200; /* Y0, Cb0, Y1, Cr0 */ 872 872 break; 873 - case V4L2_MBUS_FMT_YVYU8_2X8: 873 + case MEDIA_BUS_FMT_YVYU8_2X8: 874 874 value = 0x00000300; /* Y0, Cr0, Y1, Cb0 */ 875 875 break; 876 876 default: ··· 1048 1048 int ret, k, n; 1049 1049 int formats = 0; 1050 1050 struct sh_mobile_ceu_cam *cam; 1051 - enum v4l2_mbus_pixelcode code; 1051 + u32 code; 1052 1052 const struct soc_mbus_pixelfmt *fmt; 1053 1053 1054 1054 ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code); ··· 1141 1141 cam->extra_fmt = NULL; 1142 1142 1143 1143 switch (code) { 1144 - case V4L2_MBUS_FMT_UYVY8_2X8: 1145 - case V4L2_MBUS_FMT_VYUY8_2X8: 1146 - case V4L2_MBUS_FMT_YUYV8_2X8: 1147 - case V4L2_MBUS_FMT_YVYU8_2X8: 1144 + case MEDIA_BUS_FMT_UYVY8_2X8: 1145 + case MEDIA_BUS_FMT_VYUY8_2X8: 1146 + case MEDIA_BUS_FMT_YUYV8_2X8: 1147 + case MEDIA_BUS_FMT_YVYU8_2X8: 1148 1148 if (cam->extra_fmt) 1149 1149 break; 1150 1150
+19 -19
drivers/media/platform/soc_camera/sh_mobile_csi2.c
··· 59 59 switch (pdata->type) { 60 60 case SH_CSI2C: 61 61 switch (mf->code) { 62 - case V4L2_MBUS_FMT_UYVY8_2X8: /* YUV422 */ 63 - case V4L2_MBUS_FMT_YUYV8_1_5X8: /* YUV420 */ 64 - case V4L2_MBUS_FMT_Y8_1X8: /* RAW8 */ 65 - case V4L2_MBUS_FMT_SBGGR8_1X8: 66 - case V4L2_MBUS_FMT_SGRBG8_1X8: 62 + case MEDIA_BUS_FMT_UYVY8_2X8: /* YUV422 */ 63 + case MEDIA_BUS_FMT_YUYV8_1_5X8: /* YUV420 */ 64 + case MEDIA_BUS_FMT_Y8_1X8: /* RAW8 */ 65 + case MEDIA_BUS_FMT_SBGGR8_1X8: 66 + case MEDIA_BUS_FMT_SGRBG8_1X8: 67 67 break; 68 68 default: 69 69 /* All MIPI CSI-2 devices must support one of primary formats */ 70 - mf->code = V4L2_MBUS_FMT_YUYV8_2X8; 70 + mf->code = MEDIA_BUS_FMT_YUYV8_2X8; 71 71 } 72 72 break; 73 73 case SH_CSI2I: 74 74 switch (mf->code) { 75 - case V4L2_MBUS_FMT_Y8_1X8: /* RAW8 */ 76 - case V4L2_MBUS_FMT_SBGGR8_1X8: 77 - case V4L2_MBUS_FMT_SGRBG8_1X8: 78 - case V4L2_MBUS_FMT_SBGGR10_1X10: /* RAW10 */ 79 - case V4L2_MBUS_FMT_SBGGR12_1X12: /* RAW12 */ 75 + case MEDIA_BUS_FMT_Y8_1X8: /* RAW8 */ 76 + case MEDIA_BUS_FMT_SBGGR8_1X8: 77 + case MEDIA_BUS_FMT_SGRBG8_1X8: 78 + case MEDIA_BUS_FMT_SBGGR10_1X10: /* RAW10 */ 79 + case MEDIA_BUS_FMT_SBGGR12_1X12: /* RAW12 */ 80 80 break; 81 81 default: 82 82 /* All MIPI CSI-2 devices must support one of primary formats */ 83 - mf->code = V4L2_MBUS_FMT_SBGGR8_1X8; 83 + mf->code = MEDIA_BUS_FMT_SBGGR8_1X8; 84 84 } 85 85 break; 86 86 } ··· 104 104 return -EINVAL; 105 105 106 106 switch (mf->code) { 107 - case V4L2_MBUS_FMT_UYVY8_2X8: 107 + case MEDIA_BUS_FMT_UYVY8_2X8: 108 108 tmp |= 0x1e; /* YUV422 8 bit */ 109 109 break; 110 - case V4L2_MBUS_FMT_YUYV8_1_5X8: 110 + case MEDIA_BUS_FMT_YUYV8_1_5X8: 111 111 tmp |= 0x18; /* YUV420 8 bit */ 112 112 break; 113 - case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE: 113 + case MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE: 114 114 tmp |= 0x21; /* RGB555 */ 115 115 break; 116 - case V4L2_MBUS_FMT_RGB565_2X8_BE: 116 + case MEDIA_BUS_FMT_RGB565_2X8_BE: 117 117 tmp |= 0x22; /* RGB565 */ 118 118 break; 119 - case V4L2_MBUS_FMT_Y8_1X8: 120 - case V4L2_MBUS_FMT_SBGGR8_1X8: 121 - case V4L2_MBUS_FMT_SGRBG8_1X8: 119 + case MEDIA_BUS_FMT_Y8_1X8: 120 + case MEDIA_BUS_FMT_SBGGR8_1X8: 121 + case MEDIA_BUS_FMT_SGRBG8_1X8: 122 122 tmp |= 0x2a; /* RAW8 */ 123 123 break; 124 124 default:
+1 -1
drivers/media/platform/soc_camera/soc_camera.c
··· 460 460 struct soc_camera_host *ici = to_soc_camera_host(icd->parent); 461 461 unsigned int i, fmts = 0, raw_fmts = 0; 462 462 int ret; 463 - enum v4l2_mbus_pixelcode code; 463 + u32 code; 464 464 465 465 while (!v4l2_subdev_call(sd, video, enum_mbus_fmt, raw_fmts, &code)) 466 466 raw_fmts++;
+1 -1
drivers/media/platform/soc_camera/soc_camera_platform.c
··· 62 62 }; 63 63 64 64 static int soc_camera_platform_enum_fmt(struct v4l2_subdev *sd, unsigned int index, 65 - enum v4l2_mbus_pixelcode *code) 65 + u32 *code) 66 66 { 67 67 struct soc_camera_platform_info *p = v4l2_get_subdevdata(sd); 68 68
+39 -39
drivers/media/platform/soc_camera/soc_mediabus.c
··· 17 17 18 18 static const struct soc_mbus_lookup mbus_fmt[] = { 19 19 { 20 - .code = V4L2_MBUS_FMT_YUYV8_2X8, 20 + .code = MEDIA_BUS_FMT_YUYV8_2X8, 21 21 .fmt = { 22 22 .fourcc = V4L2_PIX_FMT_YUYV, 23 23 .name = "YUYV", ··· 27 27 .layout = SOC_MBUS_LAYOUT_PACKED, 28 28 }, 29 29 }, { 30 - .code = V4L2_MBUS_FMT_YVYU8_2X8, 30 + .code = MEDIA_BUS_FMT_YVYU8_2X8, 31 31 .fmt = { 32 32 .fourcc = V4L2_PIX_FMT_YVYU, 33 33 .name = "YVYU", ··· 37 37 .layout = SOC_MBUS_LAYOUT_PACKED, 38 38 }, 39 39 }, { 40 - .code = V4L2_MBUS_FMT_UYVY8_2X8, 40 + .code = MEDIA_BUS_FMT_UYVY8_2X8, 41 41 .fmt = { 42 42 .fourcc = V4L2_PIX_FMT_UYVY, 43 43 .name = "UYVY", ··· 47 47 .layout = SOC_MBUS_LAYOUT_PACKED, 48 48 }, 49 49 }, { 50 - .code = V4L2_MBUS_FMT_VYUY8_2X8, 50 + .code = MEDIA_BUS_FMT_VYUY8_2X8, 51 51 .fmt = { 52 52 .fourcc = V4L2_PIX_FMT_VYUY, 53 53 .name = "VYUY", ··· 57 57 .layout = SOC_MBUS_LAYOUT_PACKED, 58 58 }, 59 59 }, { 60 - .code = V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, 60 + .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, 61 61 .fmt = { 62 62 .fourcc = V4L2_PIX_FMT_RGB555, 63 63 .name = "RGB555", ··· 67 67 .layout = SOC_MBUS_LAYOUT_PACKED, 68 68 }, 69 69 }, { 70 - .code = V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, 70 + .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE, 71 71 .fmt = { 72 72 .fourcc = V4L2_PIX_FMT_RGB555X, 73 73 .name = "RGB555X", ··· 77 77 .layout = SOC_MBUS_LAYOUT_PACKED, 78 78 }, 79 79 }, { 80 - .code = V4L2_MBUS_FMT_RGB565_2X8_LE, 80 + .code = MEDIA_BUS_FMT_RGB565_2X8_LE, 81 81 .fmt = { 82 82 .fourcc = V4L2_PIX_FMT_RGB565, 83 83 .name = "RGB565", ··· 87 87 .layout = SOC_MBUS_LAYOUT_PACKED, 88 88 }, 89 89 }, { 90 - .code = V4L2_MBUS_FMT_RGB565_2X8_BE, 90 + .code = MEDIA_BUS_FMT_RGB565_2X8_BE, 91 91 .fmt = { 92 92 .fourcc = V4L2_PIX_FMT_RGB565X, 93 93 .name = "RGB565X", ··· 97 97 .layout = SOC_MBUS_LAYOUT_PACKED, 98 98 }, 99 99 }, { 100 - .code = V4L2_MBUS_FMT_RGB666_1X18, 100 + .code = MEDIA_BUS_FMT_RGB666_1X18, 101 101 .fmt = { 102 102 .fourcc = V4L2_PIX_FMT_RGB32, 103 103 .name = "RGB666/32bpp", ··· 106 106 .order = SOC_MBUS_ORDER_LE, 107 107 }, 108 108 }, { 109 - .code = V4L2_MBUS_FMT_RGB888_1X24, 109 + .code = MEDIA_BUS_FMT_RGB888_1X24, 110 110 .fmt = { 111 111 .fourcc = V4L2_PIX_FMT_RGB32, 112 112 .name = "RGB888/32bpp", ··· 115 115 .order = SOC_MBUS_ORDER_LE, 116 116 }, 117 117 }, { 118 - .code = V4L2_MBUS_FMT_RGB888_2X12_BE, 118 + .code = MEDIA_BUS_FMT_RGB888_2X12_BE, 119 119 .fmt = { 120 120 .fourcc = V4L2_PIX_FMT_RGB32, 121 121 .name = "RGB888/32bpp", ··· 124 124 .order = SOC_MBUS_ORDER_BE, 125 125 }, 126 126 }, { 127 - .code = V4L2_MBUS_FMT_RGB888_2X12_LE, 127 + .code = MEDIA_BUS_FMT_RGB888_2X12_LE, 128 128 .fmt = { 129 129 .fourcc = V4L2_PIX_FMT_RGB32, 130 130 .name = "RGB888/32bpp", ··· 133 133 .order = SOC_MBUS_ORDER_LE, 134 134 }, 135 135 }, { 136 - .code = V4L2_MBUS_FMT_SBGGR8_1X8, 136 + .code = MEDIA_BUS_FMT_SBGGR8_1X8, 137 137 .fmt = { 138 138 .fourcc = V4L2_PIX_FMT_SBGGR8, 139 139 .name = "Bayer 8 BGGR", ··· 143 143 .layout = SOC_MBUS_LAYOUT_PACKED, 144 144 }, 145 145 }, { 146 - .code = V4L2_MBUS_FMT_SBGGR10_1X10, 146 + .code = MEDIA_BUS_FMT_SBGGR10_1X10, 147 147 .fmt = { 148 148 .fourcc = V4L2_PIX_FMT_SBGGR10, 149 149 .name = "Bayer 10 BGGR", ··· 153 153 .layout = SOC_MBUS_LAYOUT_PACKED, 154 154 }, 155 155 }, { 156 - .code = V4L2_MBUS_FMT_Y8_1X8, 156 + .code = MEDIA_BUS_FMT_Y8_1X8, 157 157 .fmt = { 158 158 .fourcc = V4L2_PIX_FMT_GREY, 159 159 .name = "Grey", ··· 163 163 .layout = SOC_MBUS_LAYOUT_PACKED, 164 164 }, 165 165 }, { 166 - .code = V4L2_MBUS_FMT_Y10_1X10, 166 + .code = MEDIA_BUS_FMT_Y10_1X10, 167 167 .fmt = { 168 168 .fourcc = V4L2_PIX_FMT_Y10, 169 169 .name = "Grey 10bit", ··· 173 173 .layout = SOC_MBUS_LAYOUT_PACKED, 174 174 }, 175 175 }, { 176 - .code = V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, 176 + .code = MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, 177 177 .fmt = { 178 178 .fourcc = V4L2_PIX_FMT_SBGGR10, 179 179 .name = "Bayer 10 BGGR", ··· 183 183 .layout = SOC_MBUS_LAYOUT_PACKED, 184 184 }, 185 185 }, { 186 - .code = V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE, 186 + .code = MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE, 187 187 .fmt = { 188 188 .fourcc = V4L2_PIX_FMT_SBGGR10, 189 189 .name = "Bayer 10 BGGR", ··· 193 193 .layout = SOC_MBUS_LAYOUT_PACKED, 194 194 }, 195 195 }, { 196 - .code = V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE, 196 + .code = MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE, 197 197 .fmt = { 198 198 .fourcc = V4L2_PIX_FMT_SBGGR10, 199 199 .name = "Bayer 10 BGGR", ··· 203 203 .layout = SOC_MBUS_LAYOUT_PACKED, 204 204 }, 205 205 }, { 206 - .code = V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE, 206 + .code = MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE, 207 207 .fmt = { 208 208 .fourcc = V4L2_PIX_FMT_SBGGR10, 209 209 .name = "Bayer 10 BGGR", ··· 213 213 .layout = SOC_MBUS_LAYOUT_PACKED, 214 214 }, 215 215 }, { 216 - .code = V4L2_MBUS_FMT_JPEG_1X8, 216 + .code = MEDIA_BUS_FMT_JPEG_1X8, 217 217 .fmt = { 218 218 .fourcc = V4L2_PIX_FMT_JPEG, 219 219 .name = "JPEG", ··· 223 223 .layout = SOC_MBUS_LAYOUT_PACKED, 224 224 }, 225 225 }, { 226 - .code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE, 226 + .code = MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE, 227 227 .fmt = { 228 228 .fourcc = V4L2_PIX_FMT_RGB444, 229 229 .name = "RGB444", ··· 233 233 .layout = SOC_MBUS_LAYOUT_PACKED, 234 234 }, 235 235 }, { 236 - .code = V4L2_MBUS_FMT_YUYV8_1_5X8, 236 + .code = MEDIA_BUS_FMT_YUYV8_1_5X8, 237 237 .fmt = { 238 238 .fourcc = V4L2_PIX_FMT_YUV420, 239 239 .name = "YUYV 4:2:0", ··· 243 243 .layout = SOC_MBUS_LAYOUT_PACKED, 244 244 }, 245 245 }, { 246 - .code = V4L2_MBUS_FMT_YVYU8_1_5X8, 246 + .code = MEDIA_BUS_FMT_YVYU8_1_5X8, 247 247 .fmt = { 248 248 .fourcc = V4L2_PIX_FMT_YVU420, 249 249 .name = "YVYU 4:2:0", ··· 253 253 .layout = SOC_MBUS_LAYOUT_PACKED, 254 254 }, 255 255 }, { 256 - .code = V4L2_MBUS_FMT_UYVY8_1X16, 256 + .code = MEDIA_BUS_FMT_UYVY8_1X16, 257 257 .fmt = { 258 258 .fourcc = V4L2_PIX_FMT_UYVY, 259 259 .name = "UYVY 16bit", ··· 263 263 .layout = SOC_MBUS_LAYOUT_PACKED, 264 264 }, 265 265 }, { 266 - .code = V4L2_MBUS_FMT_VYUY8_1X16, 266 + .code = MEDIA_BUS_FMT_VYUY8_1X16, 267 267 .fmt = { 268 268 .fourcc = V4L2_PIX_FMT_VYUY, 269 269 .name = "VYUY 16bit", ··· 273 273 .layout = SOC_MBUS_LAYOUT_PACKED, 274 274 }, 275 275 }, { 276 - .code = V4L2_MBUS_FMT_YUYV8_1X16, 276 + .code = MEDIA_BUS_FMT_YUYV8_1X16, 277 277 .fmt = { 278 278 .fourcc = V4L2_PIX_FMT_YUYV, 279 279 .name = "YUYV 16bit", ··· 283 283 .layout = SOC_MBUS_LAYOUT_PACKED, 284 284 }, 285 285 }, { 286 - .code = V4L2_MBUS_FMT_YVYU8_1X16, 286 + .code = MEDIA_BUS_FMT_YVYU8_1X16, 287 287 .fmt = { 288 288 .fourcc = V4L2_PIX_FMT_YVYU, 289 289 .name = "YVYU 16bit", ··· 293 293 .layout = SOC_MBUS_LAYOUT_PACKED, 294 294 }, 295 295 }, { 296 - .code = V4L2_MBUS_FMT_SGRBG8_1X8, 296 + .code = MEDIA_BUS_FMT_SGRBG8_1X8, 297 297 .fmt = { 298 298 .fourcc = V4L2_PIX_FMT_SGRBG8, 299 299 .name = "Bayer 8 GRBG", ··· 303 303 .layout = SOC_MBUS_LAYOUT_PACKED, 304 304 }, 305 305 }, { 306 - .code = V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8, 306 + .code = MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8, 307 307 .fmt = { 308 308 .fourcc = V4L2_PIX_FMT_SGRBG10DPCM8, 309 309 .name = "Bayer 10 BGGR DPCM 8", ··· 313 313 .layout = SOC_MBUS_LAYOUT_PACKED, 314 314 }, 315 315 }, { 316 - .code = V4L2_MBUS_FMT_SGBRG10_1X10, 316 + .code = MEDIA_BUS_FMT_SGBRG10_1X10, 317 317 .fmt = { 318 318 .fourcc = V4L2_PIX_FMT_SGBRG10, 319 319 .name = "Bayer 10 GBRG", ··· 323 323 .layout = SOC_MBUS_LAYOUT_PACKED, 324 324 }, 325 325 }, { 326 - .code = V4L2_MBUS_FMT_SGRBG10_1X10, 326 + .code = MEDIA_BUS_FMT_SGRBG10_1X10, 327 327 .fmt = { 328 328 .fourcc = V4L2_PIX_FMT_SGRBG10, 329 329 .name = "Bayer 10 GRBG", ··· 333 333 .layout = SOC_MBUS_LAYOUT_PACKED, 334 334 }, 335 335 }, { 336 - .code = V4L2_MBUS_FMT_SRGGB10_1X10, 336 + .code = MEDIA_BUS_FMT_SRGGB10_1X10, 337 337 .fmt = { 338 338 .fourcc = V4L2_PIX_FMT_SRGGB10, 339 339 .name = "Bayer 10 RGGB", ··· 343 343 .layout = SOC_MBUS_LAYOUT_PACKED, 344 344 }, 345 345 }, { 346 - .code = V4L2_MBUS_FMT_SBGGR12_1X12, 346 + .code = MEDIA_BUS_FMT_SBGGR12_1X12, 347 347 .fmt = { 348 348 .fourcc = V4L2_PIX_FMT_SBGGR12, 349 349 .name = "Bayer 12 BGGR", ··· 353 353 .layout = SOC_MBUS_LAYOUT_PACKED, 354 354 }, 355 355 }, { 356 - .code = V4L2_MBUS_FMT_SGBRG12_1X12, 356 + .code = MEDIA_BUS_FMT_SGBRG12_1X12, 357 357 .fmt = { 358 358 .fourcc = V4L2_PIX_FMT_SGBRG12, 359 359 .name = "Bayer 12 GBRG", ··· 363 363 .layout = SOC_MBUS_LAYOUT_PACKED, 364 364 }, 365 365 }, { 366 - .code = V4L2_MBUS_FMT_SGRBG12_1X12, 366 + .code = MEDIA_BUS_FMT_SGRBG12_1X12, 367 367 .fmt = { 368 368 .fourcc = V4L2_PIX_FMT_SGRBG12, 369 369 .name = "Bayer 12 GRBG", ··· 373 373 .layout = SOC_MBUS_LAYOUT_PACKED, 374 374 }, 375 375 }, { 376 - .code = V4L2_MBUS_FMT_SRGGB12_1X12, 376 + .code = MEDIA_BUS_FMT_SRGGB12_1X12, 377 377 .fmt = { 378 378 .fourcc = V4L2_PIX_FMT_SRGGB12, 379 379 .name = "Bayer 12 RGGB", ··· 458 458 EXPORT_SYMBOL(soc_mbus_image_size); 459 459 460 460 const struct soc_mbus_pixelfmt *soc_mbus_find_fmtdesc( 461 - enum v4l2_mbus_pixelcode code, 461 + u32 code, 462 462 const struct soc_mbus_lookup *lookup, 463 463 int n) 464 464 { ··· 473 473 EXPORT_SYMBOL(soc_mbus_find_fmtdesc); 474 474 475 475 const struct soc_mbus_pixelfmt *soc_mbus_get_fmtdesc( 476 - enum v4l2_mbus_pixelcode code) 476 + u32 code) 477 477 { 478 478 return soc_mbus_find_fmtdesc(code, mbus_fmt, ARRAY_SIZE(mbus_fmt)); 479 479 }
+4 -4
drivers/media/platform/via-camera.c
··· 101 101 */ 102 102 struct v4l2_pix_format sensor_format; 103 103 struct v4l2_pix_format user_format; 104 - enum v4l2_mbus_pixelcode mbus_code; 104 + u32 mbus_code; 105 105 }; 106 106 107 107 /* ··· 143 143 __u8 *desc; 144 144 __u32 pixelformat; 145 145 int bpp; /* Bytes per pixel */ 146 - enum v4l2_mbus_pixelcode mbus_code; 146 + u32 mbus_code; 147 147 } via_formats[] = { 148 148 { 149 149 .desc = "YUYV 4:2:2", 150 150 .pixelformat = V4L2_PIX_FMT_YUYV, 151 - .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 151 + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 152 152 .bpp = 2, 153 153 }, 154 154 /* RGB444 and Bayer should be doable, but have never been ··· 849 849 .sizeimage = VGA_WIDTH * VGA_HEIGHT * 2, 850 850 }; 851 851 852 - static const enum v4l2_mbus_pixelcode via_def_mbus_code = V4L2_MBUS_FMT_YUYV8_2X8; 852 + static const u32 via_def_mbus_code = MEDIA_BUS_FMT_YUYV8_2X8; 853 853 854 854 static int viacam_enum_fmt_vid_cap(struct file *filp, void *priv, 855 855 struct v4l2_fmtdesc *fmt)
+7 -7
drivers/media/platform/vsp1/vsp1_bru.c
··· 187 187 struct v4l2_subdev_mbus_code_enum *code) 188 188 { 189 189 static const unsigned int codes[] = { 190 - V4L2_MBUS_FMT_ARGB8888_1X32, 191 - V4L2_MBUS_FMT_AYUV8_1X32, 190 + MEDIA_BUS_FMT_ARGB8888_1X32, 191 + MEDIA_BUS_FMT_AYUV8_1X32, 192 192 }; 193 193 struct v4l2_mbus_framefmt *format; 194 194 ··· 215 215 if (fse->index) 216 216 return -EINVAL; 217 217 218 - if (fse->code != V4L2_MBUS_FMT_ARGB8888_1X32 && 219 - fse->code != V4L2_MBUS_FMT_AYUV8_1X32) 218 + if (fse->code != MEDIA_BUS_FMT_ARGB8888_1X32 && 219 + fse->code != MEDIA_BUS_FMT_AYUV8_1X32) 220 220 return -EINVAL; 221 221 222 222 fse->min_width = BRU_MIN_SIZE; ··· 261 261 switch (pad) { 262 262 case BRU_PAD_SINK(0): 263 263 /* Default to YUV if the requested format is not supported. */ 264 - if (fmt->code != V4L2_MBUS_FMT_ARGB8888_1X32 && 265 - fmt->code != V4L2_MBUS_FMT_AYUV8_1X32) 266 - fmt->code = V4L2_MBUS_FMT_AYUV8_1X32; 264 + if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 && 265 + fmt->code != MEDIA_BUS_FMT_AYUV8_1X32) 266 + fmt->code = MEDIA_BUS_FMT_AYUV8_1X32; 267 267 break; 268 268 269 269 default:
+6 -6
drivers/media/platform/vsp1/vsp1_hsit.c
··· 70 70 71 71 if ((code->pad == HSIT_PAD_SINK && !hsit->inverse) | 72 72 (code->pad == HSIT_PAD_SOURCE && hsit->inverse)) 73 - code->code = V4L2_MBUS_FMT_ARGB8888_1X32; 73 + code->code = MEDIA_BUS_FMT_ARGB8888_1X32; 74 74 else 75 - code->code = V4L2_MBUS_FMT_AHSV8888_1X32; 75 + code->code = MEDIA_BUS_FMT_AHSV8888_1X32; 76 76 77 77 return 0; 78 78 } ··· 136 136 return 0; 137 137 } 138 138 139 - format->code = hsit->inverse ? V4L2_MBUS_FMT_AHSV8888_1X32 140 - : V4L2_MBUS_FMT_ARGB8888_1X32; 139 + format->code = hsit->inverse ? MEDIA_BUS_FMT_AHSV8888_1X32 140 + : MEDIA_BUS_FMT_ARGB8888_1X32; 141 141 format->width = clamp_t(unsigned int, fmt->format.width, 142 142 HSIT_MIN_SIZE, HSIT_MAX_SIZE); 143 143 format->height = clamp_t(unsigned int, fmt->format.height, ··· 151 151 format = vsp1_entity_get_pad_format(&hsit->entity, fh, HSIT_PAD_SOURCE, 152 152 fmt->which); 153 153 *format = fmt->format; 154 - format->code = hsit->inverse ? V4L2_MBUS_FMT_ARGB8888_1X32 155 - : V4L2_MBUS_FMT_AHSV8888_1X32; 154 + format->code = hsit->inverse ? MEDIA_BUS_FMT_ARGB8888_1X32 155 + : MEDIA_BUS_FMT_AHSV8888_1X32; 156 156 157 157 return 0; 158 158 }
+5 -5
drivers/media/platform/vsp1/vsp1_lif.c
··· 78 78 struct v4l2_subdev_mbus_code_enum *code) 79 79 { 80 80 static const unsigned int codes[] = { 81 - V4L2_MBUS_FMT_ARGB8888_1X32, 82 - V4L2_MBUS_FMT_AYUV8_1X32, 81 + MEDIA_BUS_FMT_ARGB8888_1X32, 82 + MEDIA_BUS_FMT_AYUV8_1X32, 83 83 }; 84 84 85 85 if (code->pad == LIF_PAD_SINK) { ··· 147 147 struct v4l2_mbus_framefmt *format; 148 148 149 149 /* Default to YUV if the requested format is not supported. */ 150 - if (fmt->format.code != V4L2_MBUS_FMT_ARGB8888_1X32 && 151 - fmt->format.code != V4L2_MBUS_FMT_AYUV8_1X32) 152 - fmt->format.code = V4L2_MBUS_FMT_AYUV8_1X32; 150 + if (fmt->format.code != MEDIA_BUS_FMT_ARGB8888_1X32 && 151 + fmt->format.code != MEDIA_BUS_FMT_AYUV8_1X32) 152 + fmt->format.code = MEDIA_BUS_FMT_AYUV8_1X32; 153 153 154 154 format = vsp1_entity_get_pad_format(&lif->entity, fh, fmt->pad, 155 155 fmt->which);
+7 -7
drivers/media/platform/vsp1/vsp1_lut.c
··· 86 86 struct v4l2_subdev_mbus_code_enum *code) 87 87 { 88 88 static const unsigned int codes[] = { 89 - V4L2_MBUS_FMT_ARGB8888_1X32, 90 - V4L2_MBUS_FMT_AHSV8888_1X32, 91 - V4L2_MBUS_FMT_AYUV8_1X32, 89 + MEDIA_BUS_FMT_ARGB8888_1X32, 90 + MEDIA_BUS_FMT_AHSV8888_1X32, 91 + MEDIA_BUS_FMT_AYUV8_1X32, 92 92 }; 93 93 struct v4l2_mbus_framefmt *format; 94 94 ··· 158 158 struct v4l2_mbus_framefmt *format; 159 159 160 160 /* Default to YUV if the requested format is not supported. */ 161 - if (fmt->format.code != V4L2_MBUS_FMT_ARGB8888_1X32 && 162 - fmt->format.code != V4L2_MBUS_FMT_AHSV8888_1X32 && 163 - fmt->format.code != V4L2_MBUS_FMT_AYUV8_1X32) 164 - fmt->format.code = V4L2_MBUS_FMT_AYUV8_1X32; 161 + if (fmt->format.code != MEDIA_BUS_FMT_ARGB8888_1X32 && 162 + fmt->format.code != MEDIA_BUS_FMT_AHSV8888_1X32 && 163 + fmt->format.code != MEDIA_BUS_FMT_AYUV8_1X32) 164 + fmt->format.code = MEDIA_BUS_FMT_AYUV8_1X32; 165 165 166 166 format = vsp1_entity_get_pad_format(&lut->entity, fh, fmt->pad, 167 167 fmt->which);
+5 -5
drivers/media/platform/vsp1/vsp1_rwpf.c
··· 29 29 struct v4l2_subdev_mbus_code_enum *code) 30 30 { 31 31 static const unsigned int codes[] = { 32 - V4L2_MBUS_FMT_ARGB8888_1X32, 33 - V4L2_MBUS_FMT_AYUV8_1X32, 32 + MEDIA_BUS_FMT_ARGB8888_1X32, 33 + MEDIA_BUS_FMT_AYUV8_1X32, 34 34 }; 35 35 36 36 if (code->index >= ARRAY_SIZE(codes)) ··· 103 103 struct v4l2_rect *crop; 104 104 105 105 /* Default to YUV if the requested format is not supported. */ 106 - if (fmt->format.code != V4L2_MBUS_FMT_ARGB8888_1X32 && 107 - fmt->format.code != V4L2_MBUS_FMT_AYUV8_1X32) 108 - fmt->format.code = V4L2_MBUS_FMT_AYUV8_1X32; 106 + if (fmt->format.code != MEDIA_BUS_FMT_ARGB8888_1X32 && 107 + fmt->format.code != MEDIA_BUS_FMT_AYUV8_1X32) 108 + fmt->format.code = MEDIA_BUS_FMT_AYUV8_1X32; 109 109 110 110 format = vsp1_entity_get_pad_format(&rwpf->entity, fh, fmt->pad, 111 111 fmt->which);
+6 -6
drivers/media/platform/vsp1/vsp1_sru.c
··· 139 139 input = &sru->entity.formats[SRU_PAD_SINK]; 140 140 output = &sru->entity.formats[SRU_PAD_SOURCE]; 141 141 142 - if (input->code == V4L2_MBUS_FMT_ARGB8888_1X32) 142 + if (input->code == MEDIA_BUS_FMT_ARGB8888_1X32) 143 143 ctrl0 = VI6_SRU_CTRL0_PARAM2 | VI6_SRU_CTRL0_PARAM3 144 144 | VI6_SRU_CTRL0_PARAM4; 145 145 else ··· 170 170 struct v4l2_subdev_mbus_code_enum *code) 171 171 { 172 172 static const unsigned int codes[] = { 173 - V4L2_MBUS_FMT_ARGB8888_1X32, 174 - V4L2_MBUS_FMT_AYUV8_1X32, 173 + MEDIA_BUS_FMT_ARGB8888_1X32, 174 + MEDIA_BUS_FMT_AYUV8_1X32, 175 175 }; 176 176 struct v4l2_mbus_framefmt *format; 177 177 ··· 248 248 switch (pad) { 249 249 case SRU_PAD_SINK: 250 250 /* Default to YUV if the requested format is not supported. */ 251 - if (fmt->code != V4L2_MBUS_FMT_ARGB8888_1X32 && 252 - fmt->code != V4L2_MBUS_FMT_AYUV8_1X32) 253 - fmt->code = V4L2_MBUS_FMT_AYUV8_1X32; 251 + if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 && 252 + fmt->code != MEDIA_BUS_FMT_AYUV8_1X32) 253 + fmt->code = MEDIA_BUS_FMT_AYUV8_1X32; 254 254 255 255 fmt->width = clamp(fmt->width, SRU_MIN_SIZE, SRU_MAX_SIZE); 256 256 fmt->height = clamp(fmt->height, SRU_MIN_SIZE, SRU_MAX_SIZE);
+5 -5
drivers/media/platform/vsp1/vsp1_uds.c
··· 173 173 struct v4l2_subdev_mbus_code_enum *code) 174 174 { 175 175 static const unsigned int codes[] = { 176 - V4L2_MBUS_FMT_ARGB8888_1X32, 177 - V4L2_MBUS_FMT_AYUV8_1X32, 176 + MEDIA_BUS_FMT_ARGB8888_1X32, 177 + MEDIA_BUS_FMT_AYUV8_1X32, 178 178 }; 179 179 180 180 if (code->pad == UDS_PAD_SINK) { ··· 246 246 switch (pad) { 247 247 case UDS_PAD_SINK: 248 248 /* Default to YUV if the requested format is not supported. */ 249 - if (fmt->code != V4L2_MBUS_FMT_ARGB8888_1X32 && 250 - fmt->code != V4L2_MBUS_FMT_AYUV8_1X32) 251 - fmt->code = V4L2_MBUS_FMT_AYUV8_1X32; 249 + if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 && 250 + fmt->code != MEDIA_BUS_FMT_AYUV8_1X32) 251 + fmt->code = MEDIA_BUS_FMT_AYUV8_1X32; 252 252 253 253 fmt->width = clamp(fmt->width, UDS_MIN_SIZE, UDS_MAX_SIZE); 254 254 fmt->height = clamp(fmt->height, UDS_MIN_SIZE, UDS_MAX_SIZE);
+21 -21
drivers/media/platform/vsp1/vsp1_video.c
··· 48 48 */ 49 49 50 50 static const struct vsp1_format_info vsp1_video_formats[] = { 51 - { V4L2_PIX_FMT_RGB332, V4L2_MBUS_FMT_ARGB8888_1X32, 51 + { V4L2_PIX_FMT_RGB332, MEDIA_BUS_FMT_ARGB8888_1X32, 52 52 VI6_FMT_RGB_332, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 53 53 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 54 54 1, { 8, 0, 0 }, false, false, 1, 1, false }, 55 - { V4L2_PIX_FMT_ARGB444, V4L2_MBUS_FMT_ARGB8888_1X32, 55 + { V4L2_PIX_FMT_ARGB444, MEDIA_BUS_FMT_ARGB8888_1X32, 56 56 VI6_FMT_ARGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 57 57 VI6_RPF_DSWAP_P_WDS, 58 58 1, { 16, 0, 0 }, false, false, 1, 1, true }, 59 - { V4L2_PIX_FMT_XRGB444, V4L2_MBUS_FMT_ARGB8888_1X32, 59 + { V4L2_PIX_FMT_XRGB444, MEDIA_BUS_FMT_ARGB8888_1X32, 60 60 VI6_FMT_XRGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 61 61 VI6_RPF_DSWAP_P_WDS, 62 62 1, { 16, 0, 0 }, false, false, 1, 1, true }, 63 - { V4L2_PIX_FMT_ARGB555, V4L2_MBUS_FMT_ARGB8888_1X32, 63 + { V4L2_PIX_FMT_ARGB555, MEDIA_BUS_FMT_ARGB8888_1X32, 64 64 VI6_FMT_ARGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 65 65 VI6_RPF_DSWAP_P_WDS, 66 66 1, { 16, 0, 0 }, false, false, 1, 1, true }, 67 - { V4L2_PIX_FMT_XRGB555, V4L2_MBUS_FMT_ARGB8888_1X32, 67 + { V4L2_PIX_FMT_XRGB555, MEDIA_BUS_FMT_ARGB8888_1X32, 68 68 VI6_FMT_XRGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 69 69 VI6_RPF_DSWAP_P_WDS, 70 70 1, { 16, 0, 0 }, false, false, 1, 1, false }, 71 - { V4L2_PIX_FMT_RGB565, V4L2_MBUS_FMT_ARGB8888_1X32, 71 + { V4L2_PIX_FMT_RGB565, MEDIA_BUS_FMT_ARGB8888_1X32, 72 72 VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 73 73 VI6_RPF_DSWAP_P_WDS, 74 74 1, { 16, 0, 0 }, false, false, 1, 1, false }, 75 - { V4L2_PIX_FMT_BGR24, V4L2_MBUS_FMT_ARGB8888_1X32, 75 + { V4L2_PIX_FMT_BGR24, MEDIA_BUS_FMT_ARGB8888_1X32, 76 76 VI6_FMT_BGR_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 77 77 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 78 78 1, { 24, 0, 0 }, false, false, 1, 1, false }, 79 - { V4L2_PIX_FMT_RGB24, V4L2_MBUS_FMT_ARGB8888_1X32, 79 + { V4L2_PIX_FMT_RGB24, MEDIA_BUS_FMT_ARGB8888_1X32, 80 80 VI6_FMT_RGB_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 81 81 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 82 82 1, { 24, 0, 0 }, false, false, 1, 1, false }, 83 - { V4L2_PIX_FMT_ABGR32, V4L2_MBUS_FMT_ARGB8888_1X32, 83 + { V4L2_PIX_FMT_ABGR32, MEDIA_BUS_FMT_ARGB8888_1X32, 84 84 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS, 85 85 1, { 32, 0, 0 }, false, false, 1, 1, true }, 86 - { V4L2_PIX_FMT_XBGR32, V4L2_MBUS_FMT_ARGB8888_1X32, 86 + { V4L2_PIX_FMT_XBGR32, MEDIA_BUS_FMT_ARGB8888_1X32, 87 87 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS, 88 88 1, { 32, 0, 0 }, false, false, 1, 1, false }, 89 - { V4L2_PIX_FMT_ARGB32, V4L2_MBUS_FMT_ARGB8888_1X32, 89 + { V4L2_PIX_FMT_ARGB32, MEDIA_BUS_FMT_ARGB8888_1X32, 90 90 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 91 91 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 92 92 1, { 32, 0, 0 }, false, false, 1, 1, true }, 93 - { V4L2_PIX_FMT_XRGB32, V4L2_MBUS_FMT_ARGB8888_1X32, 93 + { V4L2_PIX_FMT_XRGB32, MEDIA_BUS_FMT_ARGB8888_1X32, 94 94 VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 95 95 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 96 96 1, { 32, 0, 0 }, false, false, 1, 1, false }, 97 - { V4L2_PIX_FMT_UYVY, V4L2_MBUS_FMT_AYUV8_1X32, 97 + { V4L2_PIX_FMT_UYVY, MEDIA_BUS_FMT_AYUV8_1X32, 98 98 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 99 99 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 100 100 1, { 16, 0, 0 }, false, false, 2, 1, false }, 101 - { V4L2_PIX_FMT_VYUY, V4L2_MBUS_FMT_AYUV8_1X32, 101 + { V4L2_PIX_FMT_VYUY, MEDIA_BUS_FMT_AYUV8_1X32, 102 102 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 103 103 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 104 104 1, { 16, 0, 0 }, false, true, 2, 1, false }, 105 - { V4L2_PIX_FMT_YUYV, V4L2_MBUS_FMT_AYUV8_1X32, 105 + { V4L2_PIX_FMT_YUYV, MEDIA_BUS_FMT_AYUV8_1X32, 106 106 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 107 107 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 108 108 1, { 16, 0, 0 }, true, false, 2, 1, false }, 109 - { V4L2_PIX_FMT_YVYU, V4L2_MBUS_FMT_AYUV8_1X32, 109 + { V4L2_PIX_FMT_YVYU, MEDIA_BUS_FMT_AYUV8_1X32, 110 110 VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 111 111 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 112 112 1, { 16, 0, 0 }, true, true, 2, 1, false }, 113 - { V4L2_PIX_FMT_NV12M, V4L2_MBUS_FMT_AYUV8_1X32, 113 + { V4L2_PIX_FMT_NV12M, MEDIA_BUS_FMT_AYUV8_1X32, 114 114 VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 115 115 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 116 116 2, { 8, 16, 0 }, false, false, 2, 2, false }, 117 - { V4L2_PIX_FMT_NV21M, V4L2_MBUS_FMT_AYUV8_1X32, 117 + { V4L2_PIX_FMT_NV21M, MEDIA_BUS_FMT_AYUV8_1X32, 118 118 VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 119 119 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 120 120 2, { 8, 16, 0 }, false, true, 2, 2, false }, 121 - { V4L2_PIX_FMT_NV16M, V4L2_MBUS_FMT_AYUV8_1X32, 121 + { V4L2_PIX_FMT_NV16M, MEDIA_BUS_FMT_AYUV8_1X32, 122 122 VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 123 123 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 124 124 2, { 8, 16, 0 }, false, false, 2, 1, false }, 125 - { V4L2_PIX_FMT_NV61M, V4L2_MBUS_FMT_AYUV8_1X32, 125 + { V4L2_PIX_FMT_NV61M, MEDIA_BUS_FMT_AYUV8_1X32, 126 126 VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 127 127 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 128 128 2, { 8, 16, 0 }, false, true, 2, 1, false }, 129 - { V4L2_PIX_FMT_YUV420M, V4L2_MBUS_FMT_AYUV8_1X32, 129 + { V4L2_PIX_FMT_YUV420M, MEDIA_BUS_FMT_AYUV8_1X32, 130 130 VI6_FMT_Y_U_V_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS | 131 131 VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS, 132 132 3, { 8, 8, 8 }, false, false, 2, 2, false },
+1 -1
include/media/davinci/vpbe.h
··· 63 63 * output basis. If per mode is needed, we may have to move this to 64 64 * mode_info structure 65 65 */ 66 - enum v4l2_mbus_pixelcode if_params; 66 + u32 if_params; 67 67 }; 68 68 69 69 /* encoder configuration info */
+2 -3
include/media/davinci/vpbe_venc.h
··· 30 30 #define VENC_SECOND_FIELD BIT(2) 31 31 32 32 struct venc_platform_data { 33 - int (*setup_pinmux)(enum v4l2_mbus_pixelcode if_type, 34 - int field); 33 + int (*setup_pinmux)(u32 if_type, int field); 35 34 int (*setup_clock)(enum vpbe_enc_timings_type type, 36 35 unsigned int pixclock); 37 - int (*setup_if_config)(enum v4l2_mbus_pixelcode pixcode); 36 + int (*setup_if_config)(u32 pixcode); 38 37 /* Number of LCD outputs supported */ 39 38 int num_lcd_outputs; 40 39 struct vpbe_if_params *lcd_if_params;
+1 -1
include/media/exynos-fimc.h
··· 101 101 * @flags: flags indicating which operation mode format applies to 102 102 */ 103 103 struct fimc_fmt { 104 - enum v4l2_mbus_pixelcode mbus_code; 104 + u32 mbus_code; 105 105 char *name; 106 106 u32 fourcc; 107 107 u32 color;
+1 -1
include/media/soc_camera.h
··· 296 296 * format setup. 297 297 */ 298 298 struct soc_camera_format_xlate { 299 - enum v4l2_mbus_pixelcode code; 299 + u32 code; 300 300 const struct soc_mbus_pixelfmt *host_fmt; 301 301 }; 302 302
+3 -3
include/media/soc_mediabus.h
··· 91 91 * @fmt: pixel format description 92 92 */ 93 93 struct soc_mbus_lookup { 94 - enum v4l2_mbus_pixelcode code; 94 + u32 code; 95 95 struct soc_mbus_pixelfmt fmt; 96 96 }; 97 97 98 98 const struct soc_mbus_pixelfmt *soc_mbus_find_fmtdesc( 99 - enum v4l2_mbus_pixelcode code, 99 + u32 code, 100 100 const struct soc_mbus_lookup *lookup, 101 101 int n); 102 102 const struct soc_mbus_pixelfmt *soc_mbus_get_fmtdesc( 103 - enum v4l2_mbus_pixelcode code); 103 + u32 code); 104 104 s32 soc_mbus_bytes_per_line(u32 width, const struct soc_mbus_pixelfmt *mf); 105 105 s32 soc_mbus_image_size(const struct soc_mbus_pixelfmt *mf, 106 106 u32 bytes_per_line, u32 height);