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dt-bindings: devfreq: tegra30-actmon: Convert to schema

Convert NVIDIA Tegra ACTMON binding to schema.

Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>

authored by

Dmitry Osipenko and committed by
Chanwoo Choi
271ca53c 1ad4f329

+121 -57
-57
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-actmon.txt
··· 1 - NVIDIA Tegra Activity Monitor 2 - 3 - The activity monitor block collects statistics about the behaviour of other 4 - components in the system. This information can be used to derive the rate at 5 - which the external memory needs to be clocked in order to serve all requests 6 - from the monitored clients. 7 - 8 - Required properties: 9 - - compatible: should be "nvidia,tegra<chip>-actmon" 10 - - reg: offset and length of the register set for the device 11 - - interrupts: standard interrupt property 12 - - clocks: Must contain a phandle and clock specifier pair for each entry in 13 - clock-names. See ../../clock/clock-bindings.txt for details. 14 - - clock-names: Must include the following entries: 15 - - actmon 16 - - emc 17 - - resets: Must contain an entry for each entry in reset-names. See 18 - ../../reset/reset.txt for details. 19 - - reset-names: Must include the following entries: 20 - - actmon 21 - - operating-points-v2: See ../bindings/opp/opp.txt for details. 22 - - interconnects: Should contain entries for memory clients sitting on 23 - MC->EMC memory interconnect path. 24 - - interconnect-names: Should include name of the interconnect path for each 25 - interconnect entry. Consult TRM documentation for 26 - information about available memory clients, see MEMORY 27 - CONTROLLER section. 28 - 29 - For each opp entry in 'operating-points-v2' table: 30 - - opp-supported-hw: bitfield indicating SoC speedo ID mask 31 - - opp-peak-kBps: peak bandwidth of the memory channel 32 - 33 - Example: 34 - dfs_opp_table: opp-table { 35 - compatible = "operating-points-v2"; 36 - 37 - opp@12750000 { 38 - opp-hz = /bits/ 64 <12750000>; 39 - opp-supported-hw = <0x000F>; 40 - opp-peak-kBps = <51000>; 41 - }; 42 - ... 43 - }; 44 - 45 - actmon@6000c800 { 46 - compatible = "nvidia,tegra124-actmon"; 47 - reg = <0x0 0x6000c800 0x0 0x400>; 48 - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 49 - clocks = <&tegra_car TEGRA124_CLK_ACTMON>, 50 - <&tegra_car TEGRA124_CLK_EMC>; 51 - clock-names = "actmon", "emc"; 52 - resets = <&tegra_car 119>; 53 - reset-names = "actmon"; 54 - operating-points-v2 = <&dfs_opp_table>; 55 - interconnects = <&mc TEGRA124_MC_MPCORER &emc>; 56 - interconnect-names = "cpu"; 57 - };
+121
Documentation/devicetree/bindings/devfreq/nvidia,tegra30-actmon.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/devfreq/nvidia,tegra30-actmon.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: NVIDIA Tegra30 Activity Monitor 8 + 9 + maintainers: 10 + - Dmitry Osipenko <digetx@gmail.com> 11 + - Jon Hunter <jonathanh@nvidia.com> 12 + - Thierry Reding <thierry.reding@gmail.com> 13 + 14 + description: | 15 + The activity monitor block collects statistics about the behaviour of other 16 + components in the system. This information can be used to derive the rate at 17 + which the external memory needs to be clocked in order to serve all requests 18 + from the monitored clients. 19 + 20 + properties: 21 + compatible: 22 + enum: 23 + - nvidia,tegra30-actmon 24 + - nvidia,tegra114-actmon 25 + - nvidia,tegra124-actmon 26 + - nvidia,tegra210-actmon 27 + 28 + reg: 29 + maxItems: 1 30 + 31 + clocks: 32 + maxItems: 2 33 + 34 + clock-names: 35 + items: 36 + - const: actmon 37 + - const: emc 38 + 39 + resets: 40 + maxItems: 1 41 + 42 + reset-names: 43 + items: 44 + - const: actmon 45 + 46 + interrupts: 47 + maxItems: 1 48 + 49 + interconnects: 50 + minItems: 1 51 + maxItems: 12 52 + 53 + interconnect-names: 54 + minItems: 1 55 + maxItems: 12 56 + description: 57 + Should include name of the interconnect path for each interconnect 58 + entry. Consult TRM documentation for information about available 59 + memory clients, see MEMORY CONTROLLER and ACTIVITY MONITOR sections. 60 + 61 + operating-points-v2: 62 + description: 63 + Should contain freqs and voltages and opp-supported-hw property, which 64 + is a bitfield indicating SoC speedo ID mask. 65 + 66 + required: 67 + - compatible 68 + - reg 69 + - clocks 70 + - clock-names 71 + - resets 72 + - reset-names 73 + - interrupts 74 + - interconnects 75 + - interconnect-names 76 + - operating-points-v2 77 + 78 + additionalProperties: false 79 + 80 + examples: 81 + - | 82 + #include <dt-bindings/memory/tegra30-mc.h> 83 + 84 + mc: memory-controller@7000f000 { 85 + compatible = "nvidia,tegra30-mc"; 86 + reg = <0x7000f000 0x400>; 87 + clocks = <&clk 32>; 88 + clock-names = "mc"; 89 + 90 + interrupts = <0 77 4>; 91 + 92 + #iommu-cells = <1>; 93 + #reset-cells = <1>; 94 + #interconnect-cells = <1>; 95 + }; 96 + 97 + emc: external-memory-controller@7000f400 { 98 + compatible = "nvidia,tegra30-emc"; 99 + reg = <0x7000f400 0x400>; 100 + interrupts = <0 78 4>; 101 + clocks = <&clk 57>; 102 + 103 + nvidia,memory-controller = <&mc>; 104 + operating-points-v2 = <&dvfs_opp_table>; 105 + power-domains = <&domain>; 106 + 107 + #interconnect-cells = <0>; 108 + }; 109 + 110 + actmon@6000c800 { 111 + compatible = "nvidia,tegra30-actmon"; 112 + reg = <0x6000c800 0x400>; 113 + interrupts = <0 45 4>; 114 + clocks = <&clk 119>, <&clk 57>; 115 + clock-names = "actmon", "emc"; 116 + resets = <&rst 119>; 117 + reset-names = "actmon"; 118 + operating-points-v2 = <&dvfs_opp_table>; 119 + interconnects = <&mc TEGRA30_MC_MPCORER &emc>; 120 + interconnect-names = "cpu-read"; 121 + };