Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ASoC: tegra: tegra20_ac97: Convert to use GPIO descriptors

The Tegra20 AC97 driver is using the legacy GPIO APIs in
<linux/of_gpio.h> and <linux/gpio.h> to obtain GPIOs for reset
and sync.

Convert it over and fix the polarity error on the RESET line
in the process: this reset line is clearly active low. Just
fix the one in-tree device tree site using it at the same
time.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://msgid.link/r/20231214-gpio-descriptors-sound-misc-v1-4-e3004176bd8b@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Linus Walleij and committed by
Mark Brown
26e91f61 4504f633

+28 -31
+1 -1
arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi
··· 446 446 tegra_ac97: ac97@70002000 { 447 447 status = "okay"; 448 448 nvidia,codec-reset-gpio = 449 - <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_HIGH>; 449 + <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; 450 450 nvidia,codec-sync-gpio = 451 451 <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>; 452 452 };
+25 -28
sound/soc/tegra/tegra20_ac97.c
··· 12 12 #include <linux/clk.h> 13 13 #include <linux/delay.h> 14 14 #include <linux/device.h> 15 - #include <linux/gpio.h> 15 + #include <linux/gpio/consumer.h> 16 16 #include <linux/io.h> 17 17 #include <linux/jiffies.h> 18 18 #include <linux/module.h> 19 19 #include <linux/of.h> 20 - #include <linux/of_gpio.h> 21 20 #include <linux/platform_device.h> 22 21 #include <linux/regmap.h> 23 22 #include <linux/reset.h> ··· 38 39 u32 readback; 39 40 unsigned long timeout; 40 41 41 - /* reset line is not driven by DAC pad group, have to toggle GPIO */ 42 - gpio_set_value(workdata->reset_gpio, 0); 42 + /* 43 + * The reset line is not driven by DAC pad group, have to toggle GPIO. 44 + * The RESET line is active low but this is abstracted by the GPIO 45 + * library. 46 + */ 47 + gpiod_set_value(workdata->reset_gpio, 1); 43 48 udelay(2); 44 49 45 - gpio_set_value(workdata->reset_gpio, 1); 50 + gpiod_set_value(workdata->reset_gpio, 0); 46 51 udelay(2); 47 52 48 53 timeout = jiffies + msecs_to_jiffies(100); ··· 69 66 * the controller cmd is not working, have to toggle sync line 70 67 * manually. 71 68 */ 72 - gpio_request(workdata->sync_gpio, "codec-sync"); 73 - 74 - gpio_direction_output(workdata->sync_gpio, 1); 75 - 69 + gpiod_direction_output(workdata->sync_gpio, 1); 76 70 udelay(2); 77 - gpio_set_value(workdata->sync_gpio, 0); 71 + gpiod_set_value(workdata->sync_gpio, 0); 78 72 udelay(2); 79 - gpio_free(workdata->sync_gpio); 80 73 81 74 timeout = jiffies + msecs_to_jiffies(100); 82 75 ··· 341 342 goto err_clk_put; 342 343 } 343 344 344 - ac97->reset_gpio = of_get_named_gpio(pdev->dev.of_node, 345 - "nvidia,codec-reset-gpio", 0); 346 - if (gpio_is_valid(ac97->reset_gpio)) { 347 - ret = devm_gpio_request_one(&pdev->dev, ac97->reset_gpio, 348 - GPIOF_OUT_INIT_HIGH, "codec-reset"); 349 - if (ret) { 350 - dev_err(&pdev->dev, "could not get codec-reset GPIO\n"); 351 - goto err_clk_put; 352 - } 353 - } else { 354 - dev_err(&pdev->dev, "no codec-reset GPIO supplied\n"); 355 - ret = -EINVAL; 345 + /* Obtain RESET de-asserted */ 346 + ac97->reset_gpio = devm_gpiod_get(&pdev->dev, 347 + "nvidia,codec-reset", 348 + GPIOD_OUT_LOW); 349 + if (IS_ERR(ac97->reset_gpio)) { 350 + ret = PTR_ERR(ac97->reset_gpio); 351 + dev_err(&pdev->dev, "no RESET GPIO supplied: %d\n", ret); 356 352 goto err_clk_put; 357 353 } 354 + gpiod_set_consumer_name(ac97->reset_gpio, "codec-reset"); 358 355 359 - ac97->sync_gpio = of_get_named_gpio(pdev->dev.of_node, 360 - "nvidia,codec-sync-gpio", 0); 361 - if (!gpio_is_valid(ac97->sync_gpio)) { 362 - dev_err(&pdev->dev, "no codec-sync GPIO supplied\n"); 363 - ret = -EINVAL; 356 + ac97->sync_gpio = devm_gpiod_get(&pdev->dev, 357 + "nvidia,codec-sync", 358 + GPIOD_OUT_LOW); 359 + if (IS_ERR(ac97->sync_gpio)) { 360 + ret = PTR_ERR(ac97->sync_gpio); 361 + dev_err(&pdev->dev, "no codec-sync GPIO supplied: %d\n", ret); 364 362 goto err_clk_put; 365 363 } 364 + gpiod_set_consumer_name(ac97->sync_gpio, "codec-sync"); 366 365 367 366 ac97->capture_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_RX1; 368 367 ac97->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+2 -2
sound/soc/tegra/tegra20_ac97.h
··· 80 80 struct snd_dmaengine_dai_dma_data playback_dma_data; 81 81 struct reset_control *reset; 82 82 struct regmap *regmap; 83 - int reset_gpio; 84 - int sync_gpio; 83 + struct gpio_desc *reset_gpio; 84 + struct gpio_desc *sync_gpio; 85 85 }; 86 86 #endif /* __TEGRA20_AC97_H__ */