Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

pinctrl: tegra: clear park bit for all pins

Parking bits might not be cleared by the bootloader properly (if for
instance it doesn't use the device configured by that pin). Clear
the park bits for all the pins during pinctrl probe.

This is present on T210 platforms but not earlier ones, so for earlier
generations, set parked_reg = -1 to disable.

The park bit is used to prevent glitching when reprogramming pinctrl
registers.

Based on work by:
Shravani Dingari <shravanid@nvidia.com>

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Rhyland Klein and committed by
Linus Walleij
26e6aaaf 6ba20a00

+37
+18
drivers/pinctrl/tegra/pinctrl-tegra.c
··· 625 625 .owner = THIS_MODULE, 626 626 }; 627 627 628 + static void tegra_pinctrl_clear_parked_bits(struct tegra_pmx *pmx) 629 + { 630 + int i = 0; 631 + const struct tegra_pingroup *g; 632 + u32 val; 633 + 634 + for (i = 0; i < pmx->soc->ngroups; ++i) { 635 + if (pmx->soc->groups[i].parked_reg >= 0) { 636 + g = &pmx->soc->groups[i]; 637 + val = pmx_readl(pmx, g->parked_bank, g->parked_reg); 638 + val &= ~(1 << g->parked_bit); 639 + pmx_writel(pmx, val, g->parked_bank, g->parked_reg); 640 + } 641 + } 642 + } 643 + 628 644 static bool gpio_node_has_range(void) 629 645 { 630 646 struct device_node *np; ··· 740 724 dev_err(&pdev->dev, "Couldn't register pinctrl driver\n"); 741 725 return PTR_ERR(pmx->pctl); 742 726 } 727 + 728 + tegra_pinctrl_clear_parked_bits(pmx); 743 729 744 730 if (!gpio_node_has_range()) 745 731 pinctrl_add_gpio_range(pmx->pctl, &tegra_pinctrl_gpio_range);
+6
drivers/pinctrl/tegra/pinctrl-tegra.h
··· 93 93 * @tri_reg: Tri-state register offset. 94 94 * @tri_bank: Tri-state register bank. 95 95 * @tri_bit: Tri-state register bit. 96 + * @parked_reg: Parked register offset. -1 if unsupported. 97 + * @parked_bank: Parked register bank. 0 if unsupported. 98 + * @parked_bit: Parked register bit. 0 if unsupported. 96 99 * @einput_bit: Enable-input register bit. 97 100 * @odrain_bit: Open-drain register bit. 98 101 * @lock_bit: Lock register bit. ··· 138 135 s16 pupd_reg; 139 136 s16 tri_reg; 140 137 s16 drv_reg; 138 + s16 parked_reg; 141 139 u32 mux_bank:2; 142 140 u32 pupd_bank:2; 143 141 u32 tri_bank:2; 144 142 u32 drv_bank:2; 143 + u32 parked_bank:2; 145 144 s32 mux_bit:6; 146 145 s32 pupd_bit:6; 147 146 s32 tri_bit:6; 147 + s32 parked_bit:6; 148 148 s32 einput_bit:6; 149 149 s32 odrain_bit:6; 150 150 s32 lock_bit:6;
+2
drivers/pinctrl/tegra/pinctrl-tegra114.c
··· 1578 1578 .lock_bit = 7, \ 1579 1579 .ioreset_bit = PINGROUP_BIT_##ior(8), \ 1580 1580 .rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9), \ 1581 + .parked_reg = -1, \ 1581 1582 .drv_reg = -1, \ 1582 1583 } 1583 1584 ··· 1599 1598 .rcv_sel_bit = -1, \ 1600 1599 .drv_reg = DRV_PINGROUP_REG(r), \ 1601 1600 .drv_bank = 0, \ 1601 + .parked_reg = -1, \ 1602 1602 .hsm_bit = hsm_b, \ 1603 1603 .schmitt_bit = schmitt_b, \ 1604 1604 .lpmd_bit = lpmd_b, \
+2
drivers/pinctrl/tegra/pinctrl-tegra124.c
··· 1747 1747 .lock_bit = 7, \ 1748 1748 .ioreset_bit = PINGROUP_BIT_##ior(8), \ 1749 1749 .rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9), \ 1750 + .parked_reg = -1, \ 1750 1751 .drv_reg = -1, \ 1751 1752 } 1752 1753 ··· 1768 1767 .rcv_sel_bit = -1, \ 1769 1768 .drv_reg = DRV_PINGROUP_REG(r), \ 1770 1769 .drv_bank = 0, \ 1770 + .parked_reg = -1, \ 1771 1771 .hsm_bit = hsm_b, \ 1772 1772 .schmitt_bit = schmitt_b, \ 1773 1773 .lpmd_bit = lpmd_b, \
+3
drivers/pinctrl/tegra/pinctrl-tegra20.c
··· 1994 1994 .tri_reg = ((tri_r) - TRISTATE_REG_A), \ 1995 1995 .tri_bank = 0, \ 1996 1996 .tri_bit = tri_b, \ 1997 + .parked_reg = -1, \ 1997 1998 .einput_bit = -1, \ 1998 1999 .odrain_bit = -1, \ 1999 2000 .lock_bit = -1, \ ··· 2014 2013 .pupd_bank = 2, \ 2015 2014 .pupd_bit = pupd_b, \ 2016 2015 .drv_reg = -1, \ 2016 + .parked_reg = -1, \ 2017 2017 } 2018 2018 2019 2019 /* Pin groups for drive strength registers (configurable version) */ ··· 2030 2028 .tri_reg = -1, \ 2031 2029 .drv_reg = ((r) - PINGROUP_REG_A), \ 2032 2030 .drv_bank = 3, \ 2031 + .parked_reg = -1, \ 2033 2032 .hsm_bit = hsm_b, \ 2034 2033 .schmitt_bit = schmitt_b, \ 2035 2034 .lpmd_bit = lpmd_b, \
+4
drivers/pinctrl/tegra/pinctrl-tegra210.c
··· 1310 1310 .lock_bit = 7, \ 1311 1311 .ioreset_bit = -1, \ 1312 1312 .rcv_sel_bit = PINGROUP_BIT_##e_io_hv(10), \ 1313 + .parked_reg = PINGROUP_REG(r), \ 1314 + .parked_bank = 1, \ 1315 + .parked_bit = 5, \ 1313 1316 .hsm_bit = PINGROUP_BIT_##hsm(9), \ 1314 1317 .schmitt_bit = 12, \ 1315 1318 .drvtype_bit = PINGROUP_BIT_##drvtype(13), \ ··· 1345 1342 .rcv_sel_bit = -1, \ 1346 1343 .drv_reg = DRV_PINGROUP_REG(r), \ 1347 1344 .drv_bank = 0, \ 1345 + .parked_reg = -1, \ 1348 1346 .hsm_bit = -1, \ 1349 1347 .schmitt_bit = -1, \ 1350 1348 .lpmd_bit = -1, \
+2
drivers/pinctrl/tegra/pinctrl-tegra30.c
··· 2139 2139 .lock_bit = 7, \ 2140 2140 .ioreset_bit = PINGROUP_BIT_##ior(8), \ 2141 2141 .rcv_sel_bit = -1, \ 2142 + .parked_reg = -1, \ 2142 2143 .drv_reg = -1, \ 2143 2144 } 2144 2145 ··· 2160 2159 .rcv_sel_bit = -1, \ 2161 2160 .drv_reg = DRV_PINGROUP_REG(r), \ 2162 2161 .drv_bank = 0, \ 2162 + .parked_reg = -1, \ 2163 2163 .hsm_bit = hsm_b, \ 2164 2164 .schmitt_bit = schmitt_b, \ 2165 2165 .lpmd_bit = lpmd_b, \