Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: ti: dm814: add clkctrl clock data

Add data for dm814 clkctrl clocks, and register it within the clkctrl
driver.

Signed-off-by: Tero Kristo <t-kristo@ti.com>

+42
+37
drivers/clk/ti/clk-814x.c
··· 9 9 #include <linux/clk-provider.h> 10 10 #include <linux/clk/ti.h> 11 11 #include <linux/of_platform.h> 12 + #include <dt-bindings/clock/dm814.h> 12 13 13 14 #include "clock.h" 15 + 16 + static const struct omap_clkctrl_reg_data dm814_default_clkctrl_regs[] __initconst = { 17 + { DM814_USB_OTG_HS_CLKCTRL, NULL, CLKF_SW_SUP, "pll260dcoclkldo" }, 18 + { 0 }, 19 + }; 20 + 21 + static const struct omap_clkctrl_reg_data dm814_alwon_clkctrl_regs[] __initconst = { 22 + { DM814_UART1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" }, 23 + { DM814_UART2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" }, 24 + { DM814_UART3_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" }, 25 + { DM814_GPIO1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk6_ck" }, 26 + { DM814_GPIO2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk6_ck" }, 27 + { DM814_I2C1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" }, 28 + { DM814_I2C2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" }, 29 + { DM814_WD_TIMER_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "sysclk18_ck" }, 30 + { DM814_MCSPI1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk10_ck" }, 31 + { DM814_GPMC_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk6_ck" }, 32 + { DM814_CPGMAC0_CLKCTRL, NULL, CLKF_SW_SUP, "cpsw_125mhz_gclk" }, 33 + { DM814_MPU_CLKCTRL, NULL, CLKF_SW_SUP, "mpu_ck" }, 34 + { DM814_RTC_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "sysclk18_ck" }, 35 + { DM814_TPCC_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" }, 36 + { DM814_TPTC0_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" }, 37 + { DM814_TPTC1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" }, 38 + { DM814_TPTC2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" }, 39 + { DM814_TPTC3_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk4_ck" }, 40 + { DM814_MMC1_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk8_ck" }, 41 + { DM814_MMC2_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk8_ck" }, 42 + { DM814_MMC3_CLKCTRL, NULL, CLKF_SW_SUP, "sysclk8_ck" }, 43 + { 0 }, 44 + }; 45 + 46 + const struct omap_clkctrl_data dm814_clkctrl_data[] __initconst = { 47 + { 0x48180500, dm814_default_clkctrl_regs }, 48 + { 0x48181400, dm814_alwon_clkctrl_regs }, 49 + { 0 }, 50 + }; 14 51 15 52 static struct ti_dt_clk dm814_clks[] = { 16 53 DT_CLK(NULL, "timer_sys_ck", "devosc_ck"),
+4
drivers/clk/ti/clkctrl.c
··· 466 466 if (of_machine_is_compatible("ti,am438x")) 467 467 data = am438x_clkctrl_data; 468 468 #endif 469 + #ifdef CONFIG_SOC_TI81XX 470 + if (of_machine_is_compatible("ti,dm814")) 471 + data = dm814_clkctrl_data; 472 + #endif 469 473 470 474 while (data->addr) { 471 475 if (addr == data->addr)
+1
drivers/clk/ti/clock.h
··· 236 236 extern const struct omap_clkctrl_data am3_clkctrl_data[]; 237 237 extern const struct omap_clkctrl_data am4_clkctrl_data[]; 238 238 extern const struct omap_clkctrl_data am438x_clkctrl_data[]; 239 + extern const struct omap_clkctrl_data dm814_clkctrl_data[]; 239 240 240 241 #define CLKF_SW_SUP BIT(0) 241 242 #define CLKF_HW_SUP BIT(1)