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ARM: dts: NSP: Add Ax stepping modifications
While uncommon, some Ax NSP SoCs exist in the wild. This stepping
requires a modified secondary CPU boot-reg and removal of DMA coherency
properties. Without these modifications, the secondary CPU will be
inactive and many peripherals will exhibit undefined behaviour.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
authored by
Matthew Hagan
and committed by
Florian Fainelli
2698fbb4
f509d4a7
+70
+70
arch/arm/boot/dts/bcm-nsp-ax.dtsi
+70
arch/arm/boot/dts/bcm-nsp-ax.dtsi
···
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Broadcom Northstar Plus Ax stepping-specific bindings.
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* Notable differences from B0+ are the secondary-boot-reg and
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* lack of DMA coherency.
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*/
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&cpu1 {
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secondary-boot-reg = <0xffff042c>;
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};
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&dma {
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/delete-property/ dma-coherent;
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};
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&sdio {
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/delete-property/ dma-coherent;
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};
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&amac0 {
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/delete-property/ dma-coherent;
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};
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&amac1 {
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/delete-property/ dma-coherent;
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};
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&amac2 {
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/delete-property/ dma-coherent;
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};
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&ehci0 {
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/delete-property/ dma-coherent;
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};
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&mailbox {
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/delete-property/ dma-coherent;
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};
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&xhci {
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/delete-property/ dma-coherent;
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};
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&ehci0 {
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/delete-property/ dma-coherent;
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};
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&ohci0 {
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/delete-property/ dma-coherent;
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};
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&i2c0 {
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/delete-property/ dma-coherent;
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};
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&sata {
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/delete-property/ dma-coherent;
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};
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&pcie0 {
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/delete-property/ dma-coherent;
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};
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&pcie1 {
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/delete-property/ dma-coherent;
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};
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&pcie2 {
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/delete-property/ dma-coherent;
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};