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kernel
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linux
sh: clock div6 helper code
This patch adds div6 clock helper code. The div6 clocks
are simply 6-bit divide-by-n modules where n is 1 to 64.
Needed for vclk on sh7722, sh7723, sh7343 and sh7366.
sh7724 needs this even more for vclk, fclka, fclkb,
irdaclk and spuclk.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
authored by
Magnus Damm
and committed by
Paul Mundt
2693e274
a50de78d
+75
-6
+10
arch/sh/include/asm/clock.h
+10
arch/sh/include/asm/clock.h
···
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int sh_clk_div4_register(struct clk *clks, int nr,
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struct clk_div_mult_table *table);
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#define SH_CLK_DIV6(_name, _parent, _reg, _flags) \
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{ \
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.name = _name, \
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.parent = _parent, \
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.enable_reg = (void __iomem *)_reg, \
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.flags = _flags, \
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}
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int sh_clk_div6_register(struct clk *clks, int nr);
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#endif /* __ASM_SH_CLOCK_H */
+65
-6
arch/sh/kernel/cpu/clock-cpg.c
+65
-6
arch/sh/kernel/cpu/clock-cpg.c
···
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return ret;
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}
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static long sh_clk_div_round_rate(struct clk *clk, unsigned long rate)
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{
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return clk_rate_table_round(clk, clk->freq_table, rate);
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}
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static int sh_clk_div6_divisors[64] = {
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1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
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17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,
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33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
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49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64
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};
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static struct clk_div_mult_table sh_clk_div6_table = {
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.divisors = sh_clk_div6_divisors,
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.nr_divisors = ARRAY_SIZE(sh_clk_div6_divisors),
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};
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static unsigned long sh_clk_div6_recalc(struct clk *clk)
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{
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struct clk_div_mult_table *table = &sh_clk_div6_table;
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unsigned int idx;
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clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
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table, NULL);
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idx = __raw_readl(clk->enable_reg) & 0x003f;
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return clk->freq_table[idx].frequency;
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}
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static struct clk_ops sh_clk_div6_clk_ops = {
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.recalc = sh_clk_div6_recalc,
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.round_rate = sh_clk_div_round_rate,
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};
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int __init sh_clk_div6_register(struct clk *clks, int nr)
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{
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struct clk *clkp;
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void *freq_table;
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int nr_divs = sh_clk_div6_table.nr_divisors;
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int freq_table_size = sizeof(struct cpufreq_frequency_table);
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int ret = 0;
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int k;
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freq_table_size *= (nr_divs + 1);
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freq_table = alloc_bootmem(freq_table_size * nr);
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if (!freq_table)
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return -ENOMEM;
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for (k = 0; !ret && (k < nr); k++) {
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clkp = clks + k;
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clkp->ops = &sh_clk_div6_clk_ops;
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clkp->id = -1;
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clkp->freq_table = freq_table + (k * freq_table_size);
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clkp->freq_table[nr_divs].frequency = CPUFREQ_TABLE_END;
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ret = clk_register(clkp);
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}
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return ret;
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}
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static unsigned long sh_clk_div4_recalc(struct clk *clk)
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{
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struct clk_div_mult_table *table = clk->priv;
···
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return clk->freq_table[idx].frequency;
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}
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static long sh_clk_div4_round_rate(struct clk *clk, unsigned long rate)
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{
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return clk_rate_table_round(clk, clk->freq_table, rate);
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}
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static struct clk_ops sh_clk_div4_clk_ops = {
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.recalc = sh_clk_div4_recalc,
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.round_rate = sh_clk_div4_round_rate,
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.round_rate = sh_clk_div_round_rate,
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};
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int __init sh_clk_div4_register(struct clk *clks, int nr,