tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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ARM: dts: exynos: Add missing CPU clocks to secondary CPUs on Exynos542x

Secondary CPUs should have the same information in DeviceTree as booting
CPU from both correctness point of view and for possible hotplug
scenarios.

Suggested-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>

Krzysztof Kozlowski 265e83d6 672f3319

+13 -1
+6
arch/arm/boot/dts/exynos5420-cpus.dtsi
··· 38 38 device_type = "cpu"; 39 39 compatible = "arm,cortex-a15"; 40 40 reg = <0x1>; 41 + clocks = <&clock CLK_ARM_CLK>; 41 42 clock-frequency = <1800000000>; 42 43 cci-control-port = <&cci_control1>; 43 44 operating-points-v2 = <&cluster_a15_opp_table>; ··· 50 49 device_type = "cpu"; 51 50 compatible = "arm,cortex-a15"; 52 51 reg = <0x2>; 52 + clocks = <&clock CLK_ARM_CLK>; 53 53 clock-frequency = <1800000000>; 54 54 cci-control-port = <&cci_control1>; 55 55 operating-points-v2 = <&cluster_a15_opp_table>; ··· 62 60 device_type = "cpu"; 63 61 compatible = "arm,cortex-a15"; 64 62 reg = <0x3>; 63 + clocks = <&clock CLK_ARM_CLK>; 65 64 clock-frequency = <1800000000>; 66 65 cci-control-port = <&cci_control1>; 67 66 operating-points-v2 = <&cluster_a15_opp_table>; ··· 86 83 device_type = "cpu"; 87 84 compatible = "arm,cortex-a7"; 88 85 reg = <0x101>; 86 + clocks = <&clock CLK_KFC_CLK>; 89 87 clock-frequency = <1000000000>; 90 88 cci-control-port = <&cci_control0>; 91 89 operating-points-v2 = <&cluster_a7_opp_table>; ··· 98 94 device_type = "cpu"; 99 95 compatible = "arm,cortex-a7"; 100 96 reg = <0x102>; 97 + clocks = <&clock CLK_KFC_CLK>; 101 98 clock-frequency = <1000000000>; 102 99 cci-control-port = <&cci_control0>; 103 100 operating-points-v2 = <&cluster_a7_opp_table>; ··· 110 105 device_type = "cpu"; 111 106 compatible = "arm,cortex-a7"; 112 107 reg = <0x103>; 108 + clocks = <&clock CLK_KFC_CLK>; 113 109 clock-frequency = <1000000000>; 114 110 cci-control-port = <&cci_control0>; 115 111 operating-points-v2 = <&cluster_a7_opp_table>;
+7 -1
arch/arm/boot/dts/exynos5422-cpus.dtsi
··· 37 37 device_type = "cpu"; 38 38 compatible = "arm,cortex-a7"; 39 39 reg = <0x101>; 40 + clocks = <&clock CLK_KFC_CLK>; 40 41 clock-frequency = <1000000000>; 41 42 cci-control-port = <&cci_control0>; 42 43 operating-points-v2 = <&cluster_a7_opp_table>; ··· 49 48 device_type = "cpu"; 50 49 compatible = "arm,cortex-a7"; 51 50 reg = <0x102>; 51 + clocks = <&clock CLK_KFC_CLK>; 52 52 clock-frequency = <1000000000>; 53 53 cci-control-port = <&cci_control0>; 54 54 operating-points-v2 = <&cluster_a7_opp_table>; ··· 61 59 device_type = "cpu"; 62 60 compatible = "arm,cortex-a7"; 63 61 reg = <0x103>; 62 + clocks = <&clock CLK_KFC_CLK>; 64 63 clock-frequency = <1000000000>; 65 64 cci-control-port = <&cci_control0>; 66 65 operating-points-v2 = <&cluster_a7_opp_table>; ··· 72 69 cpu4: cpu@0 { 73 70 device_type = "cpu"; 74 71 compatible = "arm,cortex-a15"; 75 - clocks = <&clock CLK_ARM_CLK>; 76 72 reg = <0x0>; 73 + clocks = <&clock CLK_ARM_CLK>; 77 74 clock-frequency = <1800000000>; 78 75 cci-control-port = <&cci_control1>; 79 76 operating-points-v2 = <&cluster_a15_opp_table>; ··· 85 82 device_type = "cpu"; 86 83 compatible = "arm,cortex-a15"; 87 84 reg = <0x1>; 85 + clocks = <&clock CLK_ARM_CLK>; 88 86 clock-frequency = <1800000000>; 89 87 cci-control-port = <&cci_control1>; 90 88 operating-points-v2 = <&cluster_a15_opp_table>; ··· 97 93 device_type = "cpu"; 98 94 compatible = "arm,cortex-a15"; 99 95 reg = <0x2>; 96 + clocks = <&clock CLK_ARM_CLK>; 100 97 clock-frequency = <1800000000>; 101 98 cci-control-port = <&cci_control1>; 102 99 operating-points-v2 = <&cluster_a15_opp_table>; ··· 109 104 device_type = "cpu"; 110 105 compatible = "arm,cortex-a15"; 111 106 reg = <0x3>; 107 + clocks = <&clock CLK_ARM_CLK>; 112 108 clock-frequency = <1800000000>; 113 109 cci-control-port = <&cci_control1>; 114 110 operating-points-v2 = <&cluster_a15_opp_table>;