Merge tag 'x86-hyperv-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 Hyper-V update from Ingo Molnar:
"A single commit harmonizing the x86 and ARM64 Hyper-V constants
namespace"

* tag 'x86-hyperv-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/hyperv: Remove aliases with X64 in their name

+19 -52
+4 -4
arch/x86/hyperv/hv_init.c
··· 148 148 * Check for required features and priviliges to make TSC frequency 149 149 * change notifications work. 150 150 */ 151 - return ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS && 151 + return ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS && 152 152 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE && 153 - ms_hyperv.features & HV_X64_ACCESS_REENLIGHTENMENT; 153 + ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT; 154 154 } 155 155 156 156 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_reenlightenment) ··· 330 330 return; 331 331 332 332 /* Absolutely required MSRs */ 333 - required_msrs = HV_X64_MSR_HYPERCALL_AVAILABLE | 334 - HV_X64_MSR_VP_INDEX_AVAILABLE; 333 + required_msrs = HV_MSR_HYPERCALL_AVAILABLE | 334 + HV_MSR_VP_INDEX_AVAILABLE; 335 335 336 336 if ((ms_hyperv.features & required_msrs) != required_msrs) 337 337 return;
+1 -1
arch/x86/hyperv/hv_spinlock.c
··· 66 66 { 67 67 if (!hv_pvspin || !apic || 68 68 !(ms_hyperv.hints & HV_X64_CLUSTER_IPI_RECOMMENDED) || 69 - !(ms_hyperv.features & HV_X64_MSR_GUEST_IDLE_AVAILABLE)) { 69 + !(ms_hyperv.features & HV_MSR_GUEST_IDLE_AVAILABLE)) { 70 70 pr_info("PV spinlocks disabled\n"); 71 71 return; 72 72 }
-33
arch/x86/include/asm/hyperv-tlfs.h
··· 28 28 #define HYPERV_CPUID_MAX 0x4000ffff 29 29 30 30 /* 31 - * Aliases for Group A features that have X64 in the name. 32 - * On x86/x64 these are HYPERV_CPUID_FEATURES.EAX bits. 33 - */ 34 - 35 - #define HV_X64_MSR_VP_RUNTIME_AVAILABLE \ 36 - HV_MSR_VP_RUNTIME_AVAILABLE 37 - #define HV_X64_MSR_SYNIC_AVAILABLE \ 38 - HV_MSR_SYNIC_AVAILABLE 39 - #define HV_X64_MSR_APIC_ACCESS_AVAILABLE \ 40 - HV_MSR_APIC_ACCESS_AVAILABLE 41 - #define HV_X64_MSR_HYPERCALL_AVAILABLE \ 42 - HV_MSR_HYPERCALL_AVAILABLE 43 - #define HV_X64_MSR_VP_INDEX_AVAILABLE \ 44 - HV_MSR_VP_INDEX_AVAILABLE 45 - #define HV_X64_MSR_RESET_AVAILABLE \ 46 - HV_MSR_RESET_AVAILABLE 47 - #define HV_X64_MSR_GUEST_IDLE_AVAILABLE \ 48 - HV_MSR_GUEST_IDLE_AVAILABLE 49 - #define HV_X64_ACCESS_FREQUENCY_MSRS \ 50 - HV_ACCESS_FREQUENCY_MSRS 51 - #define HV_X64_ACCESS_REENLIGHTENMENT \ 52 - HV_ACCESS_REENLIGHTENMENT 53 - #define HV_X64_ACCESS_TSC_INVARIANT \ 54 - HV_ACCESS_TSC_INVARIANT 55 - 56 - /* 57 - * Aliases for Group B features that have X64 in the name. 58 - * On x86/x64 these are HYPERV_CPUID_FEATURES.EBX bits. 59 - */ 60 - #define HV_X64_POST_MESSAGES HV_POST_MESSAGES 61 - #define HV_X64_SIGNAL_EVENTS HV_SIGNAL_EVENTS 62 - 63 - /* 64 31 * Group D Features. The bit assignments are custom to each architecture. 65 32 * On x86/x64 these are HYPERV_CPUID_FEATURES.EDX bits. 66 33 */
+4 -4
arch/x86/kernel/cpu/mshyperv.c
··· 248 248 hv_host_info_edx >> 24, hv_host_info_edx & 0xFFFFFF); 249 249 } 250 250 251 - if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS && 251 + if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS && 252 252 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { 253 253 x86_platform.calibrate_tsc = hv_get_tsc_khz; 254 254 x86_platform.calibrate_cpu = hv_get_tsc_khz; ··· 270 270 crash_kexec_post_notifiers = true; 271 271 272 272 #ifdef CONFIG_X86_LOCAL_APIC 273 - if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS && 273 + if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS && 274 274 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { 275 275 /* 276 276 * Get the APIC frequency. ··· 296 296 machine_ops.shutdown = hv_machine_shutdown; 297 297 machine_ops.crash_shutdown = hv_machine_crash_shutdown; 298 298 #endif 299 - if (ms_hyperv.features & HV_X64_ACCESS_TSC_INVARIANT) { 299 + if (ms_hyperv.features & HV_ACCESS_TSC_INVARIANT) { 300 300 wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, 0x1); 301 301 setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); 302 302 } else { ··· 330 330 alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_hyperv_callback); 331 331 332 332 /* Setup the IDT for reenlightenment notifications */ 333 - if (ms_hyperv.features & HV_X64_ACCESS_REENLIGHTENMENT) { 333 + if (ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT) { 334 334 alloc_intr_gate(HYPERV_REENLIGHTENMENT_VECTOR, 335 335 asm_sysvec_hyperv_reenlightenment); 336 336 }
+10 -10
arch/x86/kvm/hyperv.c
··· 2000 2000 break; 2001 2001 2002 2002 case HYPERV_CPUID_FEATURES: 2003 - ent->eax |= HV_X64_MSR_VP_RUNTIME_AVAILABLE; 2003 + ent->eax |= HV_MSR_VP_RUNTIME_AVAILABLE; 2004 2004 ent->eax |= HV_MSR_TIME_REF_COUNT_AVAILABLE; 2005 - ent->eax |= HV_X64_MSR_SYNIC_AVAILABLE; 2005 + ent->eax |= HV_MSR_SYNIC_AVAILABLE; 2006 2006 ent->eax |= HV_MSR_SYNTIMER_AVAILABLE; 2007 - ent->eax |= HV_X64_MSR_APIC_ACCESS_AVAILABLE; 2008 - ent->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE; 2009 - ent->eax |= HV_X64_MSR_VP_INDEX_AVAILABLE; 2010 - ent->eax |= HV_X64_MSR_RESET_AVAILABLE; 2007 + ent->eax |= HV_MSR_APIC_ACCESS_AVAILABLE; 2008 + ent->eax |= HV_MSR_HYPERCALL_AVAILABLE; 2009 + ent->eax |= HV_MSR_VP_INDEX_AVAILABLE; 2010 + ent->eax |= HV_MSR_RESET_AVAILABLE; 2011 2011 ent->eax |= HV_MSR_REFERENCE_TSC_AVAILABLE; 2012 - ent->eax |= HV_X64_ACCESS_FREQUENCY_MSRS; 2013 - ent->eax |= HV_X64_ACCESS_REENLIGHTENMENT; 2012 + ent->eax |= HV_ACCESS_FREQUENCY_MSRS; 2013 + ent->eax |= HV_ACCESS_REENLIGHTENMENT; 2014 2014 2015 - ent->ebx |= HV_X64_POST_MESSAGES; 2016 - ent->ebx |= HV_X64_SIGNAL_EVENTS; 2015 + ent->ebx |= HV_POST_MESSAGES; 2016 + ent->ebx |= HV_SIGNAL_EVENTS; 2017 2017 2018 2018 ent->edx |= HV_FEATURE_FREQUENCY_MSRS_AVAILABLE; 2019 2019 ent->edx |= HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE;