tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
i2c: designware: Fix spelling typos in the comments
Fix spelling typos in the comments with help of `codespell`.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
authored by
Andy Shevchenko
and committed by
Wolfram Sang
24d3fdc8
d816f216
+8
-8
+1
-1
drivers/i2c/busses/i2c-designware-baytrail.c
+1
-1
drivers/i2c/busses/i2c-designware-baytrail.c
+4
-4
drivers/i2c/busses/i2c-designware-common.c
+4
-4
drivers/i2c/busses/i2c-designware-common.c
···
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i2c_dw_release_lock(dev);
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if (reg == swab32(DW_IC_COMP_TYPE_VALUE)) {
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-
/* Configure register endianess access */
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+
/* Configure register endianness access */
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dev->flags |= ACCESS_SWAP;
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} else if (reg == (DW_IC_COMP_TYPE_VALUE & 0x0000ffff)) {
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/* Configure register access mode 16bit */
···
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/*
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* Workaround for avoiding TX arbitration lost in case I2C
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* slave pulls SDA down "too quickly" after falling egde of
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+
* slave pulls SDA down "too quickly" after falling edge of
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* SCL by enabling non-zero SDA RX hold. Specification says it
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* extends incoming SDA low to high transition while SCL is
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* high but it apprears to help also above issue.
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* high but it appears to help also above issue.
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*/
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if (!(dev->sda_hold_time & DW_IC_SDA_HOLD_RX_MASK))
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dev->sda_hold_time |= 1 << DW_IC_SDA_HOLD_RX_SHIFT;
···
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/* Disable controller */
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__i2c_dw_disable(dev);
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-
/* Disable all interupts */
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+
/* Disable all interrupts */
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dw_writel(dev, 0, DW_IC_INTR_MASK);
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dw_readl(dev, DW_IC_CLR_INTR);
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}
+1
-1
drivers/i2c/busses/i2c-designware-master.c
+1
-1
drivers/i2c/busses/i2c-designware-master.c
···
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/*
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* The IC_INTR_STAT register just indicates "enabled" interrupts.
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* Ths unmasked raw version of interrupt status bits are available
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+
* The unmasked raw version of interrupt status bits is available
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* in the IC_RAW_INTR_STAT register.
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*
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* That is,
+1
-1
drivers/i2c/busses/i2c-designware-pcidrv.c
+1
-1
drivers/i2c/busses/i2c-designware-pcidrv.c
···
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static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
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{
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/*
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* On Intel Merrifield the user visible i2c busses are enumerated
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+
* On Intel Merrifield the user visible i2c buses are enumerated
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* [1..7]. So, we add 1 to shift the default range. Besides that the
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* first PCI slot provides 4 functions, that's why we have to add 0 to
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* the first slot and 4 to the next one.
+1
-1
drivers/i2c/busses/i2c-designware-slave.c
+1
-1
drivers/i2c/busses/i2c-designware-slave.c
···
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/*
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* The IC_INTR_STAT register just indicates "enabled" interrupts.
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* Ths unmasked raw version of interrupt status bits are available
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+
* The unmasked raw version of interrupt status bits is available
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* in the IC_RAW_INTR_STAT register.
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*
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* That is,