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ARM: OMAP1: Move dpll1 rates selection from config to runtime

For still better multi-OMAP1 support, expand omap1_rate_table with flags
for different SoC types and match them while selecting clock rates. The
idea is stolen from current omap24xx clock rate selection algorithm.

Since clkdev platform flag definitions are reused here, those had to be
expanded with one extra entry for OMAP1710 subtype, as this is the only
SoC for which we allow selection of the highest, 216 MHz rate.

Once done, remove no longer needed clock rate configure time options.

Tested on Amstrad Delta.

Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
[tony@atomide.com: updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>

authored by

Janusz Krzysztofik and committed by
Tony Lindgren 24ce2705 ee62e93a

+45 -100
-1
arch/arm/configs/omap1_defconfig
··· 48 48 CONFIG_MACH_NOKIA770=y 49 49 CONFIG_MACH_AMS_DELTA=y 50 50 CONFIG_MACH_OMAP_GENERIC=y 51 - CONFIG_OMAP_ARM_182MHZ=y 52 51 # CONFIG_ARM_THUMB is not set 53 52 CONFIG_PCCARD=y 54 53 CONFIG_OMAP_CF=y
-64
arch/arm/mach-omap1/Kconfig
··· 168 168 custom OMAP boards. Say Y here if you have a custom 169 169 board. 170 170 171 - comment "OMAP CPU Speed" 172 - depends on ARCH_OMAP1 173 - 174 - config OMAP_ARM_216MHZ 175 - bool "OMAP ARM 216 MHz CPU (1710 only)" 176 - depends on ARCH_OMAP1 && ARCH_OMAP16XX 177 - help 178 - Enable 216 MHz clock for OMAP1710 CPU. If unsure, say N. 179 - 180 - config OMAP_ARM_195MHZ 181 - bool "OMAP ARM 195 MHz CPU" 182 - depends on ARCH_OMAP1 && (ARCH_OMAP730 || ARCH_OMAP850) 183 - help 184 - Enable 195MHz clock for OMAP CPU. If unsure, say N. 185 - 186 - config OMAP_ARM_192MHZ 187 - bool "OMAP ARM 192 MHz CPU" 188 - depends on ARCH_OMAP1 && ARCH_OMAP16XX 189 - help 190 - Enable 192MHz clock for OMAP CPU. If unsure, say N. 191 - 192 - config OMAP_ARM_182MHZ 193 - bool "OMAP ARM 182 MHz CPU" 194 - depends on ARCH_OMAP1 && (ARCH_OMAP730 || ARCH_OMAP850) 195 - help 196 - Enable 182MHz clock for OMAP CPU. If unsure, say N. 197 - 198 - config OMAP_ARM_168MHZ 199 - bool "OMAP ARM 168 MHz CPU" 200 - depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) 201 - help 202 - Enable 168MHz clock for OMAP CPU. If unsure, say N. 203 - 204 - config OMAP_ARM_150MHZ 205 - bool "OMAP ARM 150 MHz CPU" 206 - depends on ARCH_OMAP1 && ARCH_OMAP15XX 207 - help 208 - Enable 150MHz clock for OMAP CPU. If unsure, say N. 209 - 210 - config OMAP_ARM_120MHZ 211 - bool "OMAP ARM 120 MHz CPU" 212 - depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) 213 - help 214 - Enable 120MHz clock for OMAP CPU. If unsure, say N. 215 - 216 - config OMAP_ARM_96MHZ 217 - bool "OMAP ARM 96 MHz CPU" 218 - depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) 219 - help 220 - Enable 96MHz clock for OMAP CPU. If unsure, say N. 221 - 222 - config OMAP_ARM_60MHZ 223 - bool "OMAP ARM 60 MHz CPU" 224 - depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) 225 - default y 226 - help 227 - Enable 60MHz clock for OMAP CPU. If unsure, say Y. 228 - 229 - config OMAP_ARM_30MHZ 230 - bool "OMAP ARM 30 MHz CPU" 231 - depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850) 232 - help 233 - Enable 30MHz clock for OMAP CPU. If unsure, say N. 234 - 235 171 endmenu 236 172 237 173 endif
+6
arch/arm/mach-omap1/clock.c
··· 197 197 ref_rate = ck_ref_p->rate; 198 198 199 199 for (ptr = omap1_rate_table; ptr->rate; ptr++) { 200 + if (!(ptr->flags & cpu_mask)) 201 + continue; 202 + 200 203 if (ptr->xtal != ref_rate) 201 204 continue; 202 205 ··· 293 290 highest_rate = -EINVAL; 294 291 295 292 for (ptr = omap1_rate_table; ptr->rate; ptr++) { 293 + if (!(ptr->flags & cpu_mask)) 294 + continue; 295 + 296 296 if (ptr->xtal != ref_rate) 297 297 continue; 298 298
+3
arch/arm/mach-omap1/clock.h
··· 111 111 extern const struct clkops clkops_uart_16xx; 112 112 extern const struct clkops clkops_generic; 113 113 114 + /* used for passing SoC type to omap1_{select,round_to}_table_rate() */ 115 + extern u32 cpu_mask; 116 + 114 117 #endif
+5 -1
arch/arm/mach-omap1/clock_data.c
··· 778 778 arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); 779 779 } 780 780 781 + u32 cpu_mask; 782 + 781 783 int __init omap1_clk_init(void) 782 784 { 783 785 struct omap_clk *c; 784 786 const struct omap_clock_config *info; 785 787 int crystal_type = 0; /* Default 12 MHz */ 786 - u32 reg, cpu_mask; 788 + u32 reg; 787 789 788 790 #ifdef CONFIG_DEBUG_LL 789 791 /* ··· 810 808 clk_preinit(c->lk.clk); 811 809 812 810 cpu_mask = 0; 811 + if (cpu_is_omap1710()) 812 + cpu_mask |= CK_1710; 813 813 if (cpu_is_omap16xx()) 814 814 cpu_mask |= CK_16XX; 815 815 if (cpu_is_omap1510())
+1
arch/arm/mach-omap1/opp.h
··· 21 21 unsigned long pll_rate; 22 22 __u16 ckctl_val; 23 23 __u16 dpllctl_val; 24 + u32 flags; 24 25 }; 25 26 26 27 extern struct mpu_rate omap1_rate_table[];
+29 -34
arch/arm/mach-omap1/opp_data.c
··· 10 10 * published by the Free Software Foundation. 11 11 */ 12 12 13 + #include <plat/clkdev_omap.h> 13 14 #include "opp.h" 14 15 15 16 /*------------------------------------------------------------------------- ··· 21 20 * NOTE: Comment order here is different from bits in CKCTL value: 22 21 * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv 23 22 */ 24 - #if defined(CONFIG_OMAP_ARM_216MHZ) 25 - { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */ 26 - #endif 27 - #if defined(CONFIG_OMAP_ARM_195MHZ) 28 - { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */ 29 - #endif 30 - #if defined(CONFIG_OMAP_ARM_192MHZ) 31 - { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */ 32 - { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */ 33 - { 96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */ 34 - { 48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */ 35 - { 24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */ 36 - #endif 37 - #if defined(CONFIG_OMAP_ARM_182MHZ) 38 - { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */ 39 - #endif 40 - #if defined(CONFIG_OMAP_ARM_168MHZ) 41 - { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */ 42 - #endif 43 - #if defined(CONFIG_OMAP_ARM_150MHZ) 44 - { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */ 45 - #endif 46 - #if defined(CONFIG_OMAP_ARM_120MHZ) 47 - { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */ 48 - #endif 49 - #if defined(CONFIG_OMAP_ARM_96MHZ) 50 - { 96000000, 12000000, 96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */ 51 - #endif 52 - #if defined(CONFIG_OMAP_ARM_60MHZ) 53 - { 60000000, 12000000, 60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */ 54 - #endif 55 - #if defined(CONFIG_OMAP_ARM_30MHZ) 56 - { 30000000, 12000000, 60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */ 57 - #endif 23 + { 216000000, 12000000, 216000000, 0x050d, 0x2910, /* 1/1/2/2/2/8 */ 24 + CK_1710 }, 25 + { 195000000, 13000000, 195000000, 0x050e, 0x2790, /* 1/1/2/2/4/8 */ 26 + CK_7XX }, 27 + { 192000000, 19200000, 192000000, 0x050f, 0x2510, /* 1/1/2/2/8/8 */ 28 + CK_16XX }, 29 + { 192000000, 12000000, 192000000, 0x050f, 0x2810, /* 1/1/2/2/8/8 */ 30 + CK_16XX }, 31 + { 96000000, 12000000, 192000000, 0x055f, 0x2810, /* 2/2/2/2/8/8 */ 32 + CK_16XX }, 33 + { 48000000, 12000000, 192000000, 0x0baf, 0x2810, /* 4/4/4/8/8/8 */ 34 + CK_16XX }, 35 + { 24000000, 12000000, 192000000, 0x0fff, 0x2810, /* 8/8/8/8/8/8 */ 36 + CK_16XX }, 37 + { 182000000, 13000000, 182000000, 0x050e, 0x2710, /* 1/1/2/2/4/8 */ 38 + CK_7XX }, 39 + { 168000000, 12000000, 168000000, 0x010f, 0x2710, /* 1/1/1/2/8/8 */ 40 + CK_16XX|CK_7XX }, 41 + { 150000000, 12000000, 150000000, 0x010a, 0x2cb0, /* 1/1/1/2/4/4 */ 42 + CK_1510 }, 43 + { 120000000, 12000000, 120000000, 0x010a, 0x2510, /* 1/1/1/2/4/4 */ 44 + CK_16XX|CK_1510|CK_310|CK_7XX }, 45 + { 96000000, 12000000, 96000000, 0x0005, 0x2410, /* 1/1/1/1/2/2 */ 46 + CK_16XX|CK_1510|CK_310|CK_7XX }, 47 + { 60000000, 12000000, 60000000, 0x0005, 0x2290, /* 1/1/1/1/2/2 */ 48 + CK_16XX|CK_1510|CK_310|CK_7XX }, 49 + { 30000000, 12000000, 60000000, 0x0555, 0x2290, /* 2/2/2/2/2/2 */ 50 + CK_16XX|CK_1510|CK_310|CK_7XX }, 58 51 { 0, 0, 0, 0, 0 }, 59 52 }; 60 53
+1
arch/arm/plat-omap/include/plat/clkdev_omap.h
··· 40 40 #define CK_443X (1 << 11) 41 41 #define CK_TI816X (1 << 12) 42 42 #define CK_446X (1 << 13) 43 + #define CK_1710 (1 << 15) /* 1710 extra for rate selection */ 43 44 44 45 45 46 #define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS)