Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

blackfin: scb: Add system crossbar init code.

If SCB exists in select blackfin cpu, developer can change the SCB
priority in kernel configuration.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Steven Miao <realmz6@gmail.com>

+1331
+21
arch/blackfin/include/asm/scb.h
··· 1 + /* 2 + * arch/blackfin/mach-common/scb-init.c - reprogram system cross bar priority 3 + * 4 + * Copyright 2012 Analog Devices Inc. 5 + * 6 + * Licensed under the GPL-2 or later. 7 + */ 8 + 9 + #define SCB_SLOT_OFFSET 24 10 + #define SCB_MI_MAX_SLOT 32 11 + 12 + struct scb_mi_prio { 13 + unsigned long scb_mi_arbr; 14 + unsigned long scb_mi_arbw; 15 + unsigned char scb_mi_slots; 16 + unsigned char scb_mi_prio[SCB_MI_MAX_SLOT]; 17 + }; 18 + 19 + extern struct scb_mi_prio scb_data[]; 20 + 21 + extern void init_scb(void);
+6
arch/blackfin/kernel/setup.c
··· 35 35 #ifdef CONFIG_BF60x 36 36 #include <mach/pm.h> 37 37 #endif 38 + #ifdef CONFIG_SCB_PRIORITY 39 + #include <asm/scb.h> 40 + #endif 38 41 39 42 u16 _bfin_swrst; 40 43 EXPORT_SYMBOL(_bfin_swrst); ··· 1104 1101 #endif 1105 1102 init_exception_vectors(); 1106 1103 bfin_cache_init(); /* Initialize caches for the boot CPU */ 1104 + #ifdef CONFIG_SCB_PRIORITY 1105 + init_scb(); 1106 + #endif 1107 1107 } 1108 1108 1109 1109 static int __init topology_init(void)
+1017
arch/blackfin/mach-bf609/Kconfig
··· 59 59 Divide the total number of interrupt priority levels into sub-levels. 60 60 There is 2 ^ (SEC_IRQ_PRIORITY_LEVELS + 1) different levels. 61 61 62 + 63 + comment "System Cross Bar Priority Assignment" 64 + 65 + config SCB_PRIORITY 66 + bool "Init System Cross Bar Priority" 67 + default n 68 + 69 + menuconfig SCB0_MI0 70 + bool "SCB0 Master Interface 0 (DDR)" 71 + default n 72 + depends on SCB_PRIORITY 73 + help 74 + The slave interface id of each slot should be set according following table. 75 + Core 0 -- 0 76 + Core 1 -- 2 77 + SCB1 -- 9 78 + SCB2 -- 10 79 + SCB3 -- 11 80 + SCB4 -- 12 81 + SCB5 -- 5 82 + SCB6 -- 6 83 + SCB7 -- 8 84 + SCB8 -- 7 85 + SCB9 -- 4 86 + USB -- 13 87 + 88 + if SCB0_MI0 89 + 90 + config SCB0_MI0_SLOT0 91 + int "Slot 0 slave interface id" 92 + default 0 93 + range 0 13 94 + 95 + config SCB0_MI0_SLOT1 96 + int "Slot 1 slave interface id" 97 + default 2 98 + range 0 13 99 + 100 + config SCB0_MI0_SLOT2 101 + int "Slot 2 slave interface id" 102 + default 4 103 + range 0 13 104 + 105 + config SCB0_MI0_SLOT3 106 + int "Slot 3 slave interface id" 107 + default 5 108 + range 0 13 109 + 110 + config SCB0_MI0_SLOT4 111 + int "Slot 4 slave interface id" 112 + default 6 113 + range 0 13 114 + 115 + config SCB0_MI0_SLOT5 116 + int "Slot 5 slave interface id" 117 + default 7 118 + range 0 13 119 + 120 + config SCB0_MI0_SLOT6 121 + int "Slot 6 slave interface id" 122 + default 8 123 + range 0 13 124 + 125 + config SCB0_MI0_SLOT7 126 + int "Slot 7 slave interface id" 127 + default 9 128 + range 0 13 129 + 130 + config SCB0_MI0_SLOT8 131 + int "Slot 8 slave interface id" 132 + default 10 133 + range 0 13 134 + 135 + config SCB0_MI0_SLOT9 136 + int "Slot 9 slave interface id" 137 + default 11 138 + range 0 13 139 + 140 + config SCB0_MI0_SLOT10 141 + int "Slot 10 slave interface id" 142 + default 13 143 + range 0 13 144 + 145 + config SCB0_MI0_SLOT11 146 + int "Slot 11 slave interface id" 147 + default 12 148 + range 0 13 149 + 150 + config SCB0_MI0_SLOT12 151 + int "Slot 12 slave interface id" 152 + default 0 153 + range 0 13 154 + 155 + config SCB0_MI0_SLOT13 156 + int "Slot 13 slave interface id" 157 + default 2 158 + range 0 13 159 + 160 + config SCB0_MI0_SLOT14 161 + int "Slot 14 slave interface id" 162 + default 4 163 + range 0 13 164 + 165 + config SCB0_MI0_SLOT15 166 + int "Slot 15 slave interface id" 167 + default 5 168 + range 0 13 169 + 170 + config SCB0_MI0_SLOT16 171 + int "Slot 16 slave interface id" 172 + default 6 173 + range 0 13 174 + 175 + config SCB0_MI0_SLOT17 176 + int "Slot 17 slave interface id" 177 + default 7 178 + range 0 13 179 + 180 + config SCB0_MI0_SLOT18 181 + int "Slot 18 slave interface id" 182 + default 8 183 + range 0 13 184 + 185 + config SCB0_MI0_SLOT19 186 + int "Slot 19 slave interface id" 187 + default 9 188 + range 0 13 189 + 190 + config SCB0_MI0_SLOT20 191 + int "Slot 20 slave interface id" 192 + default 10 193 + range 0 13 194 + 195 + config SCB0_MI0_SLOT21 196 + int "Slot 21 slave interface id" 197 + default 11 198 + range 0 13 199 + 200 + config SCB0_MI0_SLOT22 201 + int "Slot 22 slave interface id" 202 + default 13 203 + range 0 13 204 + 205 + config SCB0_MI0_SLOT23 206 + int "Slot 23 slave interface id" 207 + default 12 208 + range 0 13 209 + 210 + config SCB0_MI0_SLOT24 211 + int "Slot 24 slave interface id" 212 + default 0 213 + range 0 13 214 + 215 + config SCB0_MI0_SLOT25 216 + int "Slot 25 slave interface id" 217 + default 2 218 + range 0 13 219 + 220 + config SCB0_MI0_SLOT26 221 + int "Slot 26 slave interface id" 222 + default 4 223 + range 0 13 224 + 225 + config SCB0_MI0_SLOT27 226 + int "Slot 27 slave interface id" 227 + default 5 228 + range 0 13 229 + 230 + config SCB0_MI0_SLOT28 231 + int "Slot 28 slave interface id" 232 + default 6 233 + range 0 13 234 + 235 + config SCB0_MI0_SLOT29 236 + int "Slot 29 slave interface id" 237 + default 7 238 + range 0 13 239 + 240 + config SCB0_MI0_SLOT30 241 + int "Slot 30 slave interface id" 242 + default 8 243 + range 0 13 244 + 245 + config SCB0_MI0_SLOT31 246 + int "Slot 31 slave interface id" 247 + default 13 248 + range 0 13 249 + 250 + endif # SCB0_MI0 251 + 252 + menuconfig SCB0_MI1 253 + bool "SCB0 Master Interface 1 (SMC)" 254 + default n 255 + depends on SCB_PRIORITY 256 + help 257 + The slave interface id of each slot should be set according following table. 258 + Core 0 -- 0 259 + Core 1 -- 2 260 + SCB1 -- 9 261 + SCB2 -- 10 262 + SCB3 -- 11 263 + SCB4 -- 12 264 + SCB5 -- 5 265 + SCB6 -- 6 266 + SCB7 -- 8 267 + SCB8 -- 7 268 + SCB9 -- 4 269 + USB -- 13 270 + 271 + if SCB0_MI1 272 + 273 + config SCB0_MI1_SLOT0 274 + int "Slot 0 slave interface id" 275 + default 0 276 + range 0 13 277 + 278 + config SCB0_MI1_SLOT1 279 + int "Slot 1 slave interface id" 280 + default 2 281 + range 0 13 282 + 283 + config SCB0_MI1_SLOT2 284 + int "Slot 2 slave interface id" 285 + default 4 286 + range 0 13 287 + 288 + config SCB0_MI1_SLOT3 289 + int "Slot 3 slave interface id" 290 + default 5 291 + range 0 13 292 + 293 + config SCB0_MI1_SLOT4 294 + int "Slot 4 slave interface id" 295 + default 6 296 + range 0 13 297 + 298 + config SCB0_MI1_SLOT5 299 + int "Slot 5 slave interface id" 300 + default 7 301 + range 0 13 302 + 303 + config SCB0_MI1_SLOT6 304 + int "Slot 6 slave interface id" 305 + default 8 306 + range 0 13 307 + 308 + config SCB0_MI1_SLOT7 309 + int "Slot 7 slave interface id" 310 + default 9 311 + range 0 13 312 + 313 + config SCB0_MI1_SLOT8 314 + int "Slot 8 slave interface id" 315 + default 10 316 + range 0 13 317 + 318 + config SCB0_MI1_SLOT9 319 + int "Slot 9 slave interface id" 320 + default 11 321 + range 0 13 322 + 323 + config SCB0_MI1_SLOT10 324 + int "Slot 10 slave interface id" 325 + default 13 326 + range 0 13 327 + 328 + config SCB0_MI1_SLOT11 329 + int "Slot 11 slave interface id" 330 + default 12 331 + range 0 13 332 + 333 + config SCB0_MI1_SLOT12 334 + int "Slot 12 slave interface id" 335 + default 0 336 + range 0 13 337 + 338 + config SCB0_MI1_SLOT13 339 + int "Slot 13 slave interface id" 340 + default 2 341 + range 0 13 342 + 343 + config SCB0_MI1_SLOT14 344 + int "Slot 14 slave interface id" 345 + default 4 346 + range 0 13 347 + 348 + config SCB0_MI1_SLOT15 349 + int "Slot 15 slave interface id" 350 + default 5 351 + range 0 13 352 + 353 + config SCB0_MI1_SLOT16 354 + int "Slot 16 slave interface id" 355 + default 6 356 + range 0 13 357 + 358 + config SCB0_MI1_SLOT17 359 + int "Slot 17 slave interface id" 360 + default 7 361 + range 0 13 362 + 363 + config SCB0_MI1_SLOT18 364 + int "Slot 18 slave interface id" 365 + default 8 366 + range 0 13 367 + 368 + config SCB0_MI1_SLOT19 369 + int "Slot 19 slave interface id" 370 + default 9 371 + range 0 13 372 + 373 + config SCB0_MI1_SLOT20 374 + int "Slot 20 slave interface id" 375 + default 10 376 + range 0 13 377 + 378 + config SCB0_MI1_SLOT21 379 + int "Slot 21 slave interface id" 380 + default 11 381 + range 0 13 382 + 383 + config SCB0_MI1_SLOT22 384 + int "Slot 22 slave interface id" 385 + default 13 386 + range 0 13 387 + 388 + config SCB0_MI1_SLOT23 389 + int "Slot 23 slave interface id" 390 + default 12 391 + range 0 13 392 + 393 + config SCB0_MI1_SLOT24 394 + int "Slot 24 slave interface id" 395 + default 0 396 + range 0 13 397 + 398 + config SCB0_MI1_SLOT25 399 + int "Slot 25 slave interface id" 400 + default 2 401 + range 0 13 402 + 403 + config SCB0_MI1_SLOT26 404 + int "Slot 26 slave interface id" 405 + default 4 406 + range 0 13 407 + 408 + config SCB0_MI1_SLOT27 409 + int "Slot 27 slave interface id" 410 + default 5 411 + range 0 13 412 + 413 + config SCB0_MI1_SLOT28 414 + int "Slot 28 slave interface id" 415 + default 6 416 + range 0 13 417 + 418 + config SCB0_MI1_SLOT29 419 + int "Slot 29 slave interface id" 420 + default 7 421 + range 0 13 422 + 423 + config SCB0_MI1_SLOT30 424 + int "Slot 30 slave interface id" 425 + default 8 426 + range 0 13 427 + 428 + config SCB0_MI1_SLOT31 429 + int "Slot 31 slave interface id" 430 + default 13 431 + range 0 13 432 + 433 + endif # SCB0_MI1 434 + 435 + menuconfig SCB0_MI2 436 + bool "SCB0 Master Interface 2 (Data L2)" 437 + default n 438 + depends on SCB_PRIORITY 439 + help 440 + The slave interface id of each slot should be set according following table. 441 + Core 0 -- 0 442 + Core 1 -- 2 443 + SCB1 -- 9 444 + SCB2 -- 10 445 + SCB3 -- 11 446 + SCB4 -- 12 447 + SCB5 -- 5 448 + SCB6 -- 6 449 + SCB7 -- 8 450 + SCB8 -- 7 451 + SCB9 -- 4 452 + USB -- 13 453 + 454 + if SCB0_MI2 455 + 456 + config SCB0_MI2_SLOT0 457 + int "Slot 0 slave interface id" 458 + default 4 459 + range 0 13 460 + 461 + config SCB0_MI2_SLOT1 462 + int "Slot 1 slave interface id" 463 + default 5 464 + range 0 13 465 + 466 + config SCB0_MI2_SLOT2 467 + int "Slot 2 slave interface id" 468 + default 6 469 + range 0 13 470 + 471 + config SCB0_MI2_SLOT3 472 + int "Slot 3 slave interface id" 473 + default 7 474 + range 0 13 475 + 476 + config SCB0_MI2_SLOT4 477 + int "Slot 4 slave interface id" 478 + default 8 479 + range 0 13 480 + 481 + config SCB0_MI2_SLOT5 482 + int "Slot 5 slave interface id" 483 + default 9 484 + range 0 13 485 + 486 + config SCB0_MI2_SLOT6 487 + int "Slot 6 slave interface id" 488 + default 10 489 + range 0 13 490 + 491 + config SCB0_MI2_SLOT7 492 + int "Slot 7 slave interface id" 493 + default 11 494 + range 0 13 495 + 496 + config SCB0_MI2_SLOT8 497 + int "Slot 8 slave interface id" 498 + default 13 499 + range 0 13 500 + 501 + config SCB0_MI2_SLOT9 502 + int "Slot 9 slave interface id" 503 + default 12 504 + range 0 13 505 + 506 + config SCB0_MI2_SLOT10 507 + int "Slot 10 slave interface id" 508 + default 4 509 + range 0 13 510 + 511 + config SCB0_MI2_SLOT11 512 + int "Slot 11 slave interface id" 513 + default 5 514 + range 0 13 515 + 516 + config SCB0_MI2_SLOT12 517 + int "Slot 12 slave interface id" 518 + default 6 519 + range 0 13 520 + 521 + config SCB0_MI2_SLOT13 522 + int "Slot 13 slave interface id" 523 + default 7 524 + range 0 13 525 + 526 + config SCB0_MI2_SLOT14 527 + int "Slot 14 slave interface id" 528 + default 8 529 + range 0 13 530 + 531 + config SCB0_MI2_SLOT15 532 + int "Slot 15 slave interface id" 533 + default 9 534 + range 0 13 535 + 536 + config SCB0_MI2_SLOT16 537 + int "Slot 16 slave interface id" 538 + default 10 539 + range 0 13 540 + 541 + config SCB0_MI2_SLOT17 542 + int "Slot 17 slave interface id" 543 + default 11 544 + range 0 13 545 + 546 + config SCB0_MI2_SLOT18 547 + int "Slot 18 slave interface id" 548 + default 13 549 + range 0 13 550 + 551 + config SCB0_MI2_SLOT19 552 + int "Slot 19 slave interface id" 553 + default 12 554 + range 0 13 555 + 556 + config SCB0_MI2_SLOT20 557 + int "Slot 20 slave interface id" 558 + default 4 559 + range 0 13 560 + 561 + config SCB0_MI2_SLOT21 562 + int "Slot 21 slave interface id" 563 + default 5 564 + range 0 13 565 + 566 + config SCB0_MI2_SLOT22 567 + int "Slot 22 slave interface id" 568 + default 6 569 + range 0 13 570 + 571 + config SCB0_MI2_SLOT23 572 + int "Slot 23 slave interface id" 573 + default 7 574 + range 0 13 575 + 576 + config SCB0_MI2_SLOT24 577 + int "Slot 24 slave interface id" 578 + default 8 579 + range 0 13 580 + 581 + config SCB0_MI2_SLOT25 582 + int "Slot 25 slave interface id" 583 + default 9 584 + range 0 13 585 + 586 + config SCB0_MI2_SLOT26 587 + int "Slot 26 slave interface id" 588 + default 10 589 + range 0 13 590 + 591 + config SCB0_MI2_SLOT27 592 + int "Slot 27 slave interface id" 593 + default 11 594 + range 0 13 595 + 596 + config SCB0_MI2_SLOT28 597 + int "Slot 28 slave interface id" 598 + default 13 599 + range 0 13 600 + 601 + config SCB0_MI2_SLOT29 602 + int "Slot 29 slave interface id" 603 + default 12 604 + range 0 13 605 + 606 + config SCB0_MI2_SLOT30 607 + int "Slot 30 slave interface id" 608 + default 4 609 + range 0 13 610 + 611 + config SCB0_MI2_SLOT31 612 + int "Slot 31 slave interface id" 613 + default 7 614 + range 0 13 615 + 616 + endif # SCB0_MI2 617 + 618 + menuconfig SCB0_MI3 619 + bool "SCB0 Master Interface 3 (L1A)" 620 + default n 621 + depends on SCB_PRIORITY 622 + help 623 + The slave interface id of each slot should be set according following table. 624 + Core 0 -- 0 625 + Core 1 -- 2 626 + SCB1 -- 9 627 + SCB2 -- 10 628 + SCB3 -- 11 629 + SCB4 -- 12 630 + SCB5 -- 5 631 + SCB6 -- 6 632 + SCB7 -- 8 633 + SCB8 -- 7 634 + SCB9 -- 4 635 + USB -- 13 636 + 637 + if SCB0_MI3 638 + 639 + config SCB0_MI3_SLOT0 640 + int "Slot 0 slave interface id" 641 + default 4 642 + range 0 13 643 + 644 + config SCB0_MI3_SLOT1 645 + int "Slot 1 slave interface id" 646 + default 5 647 + range 0 13 648 + 649 + config SCB0_MI3_SLOT2 650 + int "Slot 2 slave interface id" 651 + default 6 652 + range 0 13 653 + 654 + config SCB0_MI3_SLOT3 655 + int "Slot 3 slave interface id" 656 + default 7 657 + range 0 13 658 + 659 + config SCB0_MI3_SLOT4 660 + int "Slot 4 slave interface id" 661 + default 8 662 + range 0 13 663 + 664 + config SCB0_MI3_SLOT5 665 + int "Slot 5 slave interface id" 666 + default 9 667 + range 0 13 668 + 669 + config SCB0_MI3_SLOT6 670 + int "Slot 6 slave interface id" 671 + default 10 672 + range 0 13 673 + 674 + config SCB0_MI3_SLOT7 675 + int "Slot 7 slave interface id" 676 + default 11 677 + range 0 13 678 + 679 + config SCB0_MI3_SLOT8 680 + int "Slot 8 slave interface id" 681 + default 13 682 + range 0 13 683 + 684 + config SCB0_MI3_SLOT9 685 + int "Slot 9 slave interface id" 686 + default 12 687 + range 0 13 688 + 689 + config SCB0_MI3_SLOT10 690 + int "Slot 10 slave interface id" 691 + default 4 692 + range 0 13 693 + 694 + config SCB0_MI3_SLOT11 695 + int "Slot 11 slave interface id" 696 + default 5 697 + range 0 13 698 + 699 + config SCB0_MI3_SLOT12 700 + int "Slot 12 slave interface id" 701 + default 6 702 + range 0 13 703 + 704 + config SCB0_MI3_SLOT13 705 + int "Slot 13 slave interface id" 706 + default 7 707 + range 0 13 708 + 709 + config SCB0_MI3_SLOT14 710 + int "Slot 14 slave interface id" 711 + default 8 712 + range 0 13 713 + 714 + config SCB0_MI3_SLOT15 715 + int "Slot 15 slave interface id" 716 + default 9 717 + range 0 13 718 + 719 + config SCB0_MI3_SLOT16 720 + int "Slot 16 slave interface id" 721 + default 10 722 + range 0 13 723 + 724 + config SCB0_MI3_SLOT17 725 + int "Slot 17 slave interface id" 726 + default 11 727 + range 0 13 728 + 729 + config SCB0_MI3_SLOT18 730 + int "Slot 18 slave interface id" 731 + default 13 732 + range 0 13 733 + 734 + config SCB0_MI3_SLOT19 735 + int "Slot 19 slave interface id" 736 + default 12 737 + range 0 13 738 + 739 + config SCB0_MI3_SLOT20 740 + int "Slot 20 slave interface id" 741 + default 4 742 + range 0 13 743 + 744 + config SCB0_MI3_SLOT21 745 + int "Slot 21 slave interface id" 746 + default 5 747 + range 0 13 748 + 749 + config SCB0_MI3_SLOT22 750 + int "Slot 22 slave interface id" 751 + default 6 752 + range 0 13 753 + 754 + config SCB0_MI3_SLOT23 755 + int "Slot 23 slave interface id" 756 + default 7 757 + range 0 13 758 + 759 + config SCB0_MI3_SLOT24 760 + int "Slot 24 slave interface id" 761 + default 8 762 + range 0 13 763 + 764 + config SCB0_MI3_SLOT25 765 + int "Slot 25 slave interface id" 766 + default 9 767 + range 0 13 768 + 769 + config SCB0_MI3_SLOT26 770 + int "Slot 26 slave interface id" 771 + default 10 772 + range 0 13 773 + 774 + config SCB0_MI3_SLOT27 775 + int "Slot 27 slave interface id" 776 + default 11 777 + range 0 13 778 + 779 + config SCB0_MI3_SLOT28 780 + int "Slot 28 slave interface id" 781 + default 13 782 + range 0 13 783 + 784 + config SCB0_MI3_SLOT29 785 + int "Slot 29 slave interface id" 786 + default 12 787 + range 0 13 788 + 789 + config SCB0_MI3_SLOT30 790 + int "Slot 30 slave interface id" 791 + default 4 792 + range 0 13 793 + 794 + config SCB0_MI3_SLOT31 795 + int "Slot 31 slave interface id" 796 + default 7 797 + range 0 13 798 + 799 + endif # SCB0_MI3 800 + 801 + menuconfig SCB0_MI4 802 + bool "SCB0 Master Interface 4 (L1B)" 803 + default n 804 + depends on SCB_PRIORITY 805 + help 806 + The slave interface id of each slot should be set according following table. 807 + Core 0 -- 0 808 + Core 1 -- 2 809 + SCB1 -- 9 810 + SCB2 -- 10 811 + SCB3 -- 11 812 + SCB4 -- 12 813 + SCB5 -- 5 814 + SCB6 -- 6 815 + SCB7 -- 8 816 + SCB8 -- 7 817 + SCB9 -- 4 818 + USB -- 13 819 + 820 + if SCB0_MI4 821 + 822 + config SCB0_MI4_SLOT0 823 + int "Slot 0 slave interface id" 824 + default 4 825 + range 0 13 826 + 827 + config SCB0_MI4_SLOT1 828 + int "Slot 1 slave interface id" 829 + default 5 830 + range 0 13 831 + 832 + config SCB0_MI4_SLOT2 833 + int "Slot 2 slave interface id" 834 + default 6 835 + range 0 13 836 + 837 + config SCB0_MI4_SLOT3 838 + int "Slot 3 slave interface id" 839 + default 7 840 + range 0 13 841 + 842 + config SCB0_MI4_SLOT4 843 + int "Slot 4 slave interface id" 844 + default 8 845 + range 0 13 846 + 847 + config SCB0_MI4_SLOT5 848 + int "Slot 5 slave interface id" 849 + default 9 850 + range 0 13 851 + 852 + config SCB0_MI4_SLOT6 853 + int "Slot 6 slave interface id" 854 + default 10 855 + range 0 13 856 + 857 + config SCB0_MI4_SLOT7 858 + int "Slot 7 slave interface id" 859 + default 11 860 + range 0 13 861 + 862 + config SCB0_MI4_SLOT8 863 + int "Slot 8 slave interface id" 864 + default 13 865 + range 0 13 866 + 867 + config SCB0_MI4_SLOT9 868 + int "Slot 9 slave interface id" 869 + default 12 870 + range 0 13 871 + 872 + config SCB0_MI4_SLOT10 873 + int "Slot 10 slave interface id" 874 + default 4 875 + range 0 13 876 + 877 + config SCB0_MI4_SLOT11 878 + int "Slot 11 slave interface id" 879 + default 5 880 + range 0 13 881 + 882 + config SCB0_MI4_SLOT12 883 + int "Slot 12 slave interface id" 884 + default 6 885 + range 0 13 886 + 887 + config SCB0_MI4_SLOT13 888 + int "Slot 13 slave interface id" 889 + default 7 890 + range 0 13 891 + 892 + config SCB0_MI4_SLOT14 893 + int "Slot 14 slave interface id" 894 + default 8 895 + range 0 13 896 + 897 + config SCB0_MI4_SLOT15 898 + int "Slot 15 slave interface id" 899 + default 9 900 + range 0 13 901 + 902 + config SCB0_MI4_SLOT16 903 + int "Slot 16 slave interface id" 904 + default 10 905 + range 0 13 906 + 907 + config SCB0_MI4_SLOT17 908 + int "Slot 17 slave interface id" 909 + default 11 910 + range 0 13 911 + 912 + config SCB0_MI4_SLOT18 913 + int "Slot 18 slave interface id" 914 + default 13 915 + range 0 13 916 + 917 + config SCB0_MI4_SLOT19 918 + int "Slot 19 slave interface id" 919 + default 12 920 + range 0 13 921 + 922 + config SCB0_MI4_SLOT20 923 + int "Slot 20 slave interface id" 924 + default 4 925 + range 0 13 926 + 927 + config SCB0_MI4_SLOT21 928 + int "Slot 21 slave interface id" 929 + default 5 930 + range 0 13 931 + 932 + config SCB0_MI4_SLOT22 933 + int "Slot 22 slave interface id" 934 + default 6 935 + range 0 13 936 + 937 + config SCB0_MI4_SLOT23 938 + int "Slot 23 slave interface id" 939 + default 7 940 + range 0 13 941 + 942 + config SCB0_MI4_SLOT24 943 + int "Slot 24 slave interface id" 944 + default 8 945 + range 0 13 946 + 947 + config SCB0_MI4_SLOT25 948 + int "Slot 25 slave interface id" 949 + default 9 950 + range 0 13 951 + 952 + config SCB0_MI4_SLOT26 953 + int "Slot 26 slave interface id" 954 + default 10 955 + range 0 13 956 + 957 + config SCB0_MI4_SLOT27 958 + int "Slot 27 slave interface id" 959 + default 11 960 + range 0 13 961 + 962 + config SCB0_MI4_SLOT28 963 + int "Slot 28 slave interface id" 964 + default 13 965 + range 0 13 966 + 967 + config SCB0_MI4_SLOT29 968 + int "Slot 29 slave interface id" 969 + default 12 970 + range 0 13 971 + 972 + config SCB0_MI4_SLOT30 973 + int "Slot 30 slave interface id" 974 + default 4 975 + range 0 13 976 + 977 + config SCB0_MI4_SLOT31 978 + int "Slot 31 slave interface id" 979 + default 7 980 + range 0 13 981 + 982 + endif # SCB0_MI4 983 + 984 + menuconfig SCB0_MI5 985 + bool "SCB0 Master Interface 5 (SMMR)" 986 + default n 987 + depends on SCB_PRIORITY 988 + help 989 + The slave interface id of each slot should be set according following table. 990 + MMR0 -- 1 991 + MMR1 -- 3 992 + SCB2 -- 10 993 + SCB4 -- 12 994 + 995 + if SCB0_MI5 996 + 997 + config SCB0_MI5_SLOT0 998 + int "Slot 0 slave interface id" 999 + default 1 1000 + range 0 13 1001 + 1002 + config SCB0_MI5_SLOT1 1003 + int "Slot 1 slave interface id" 1004 + default 3 1005 + range 0 13 1006 + 1007 + config SCB0_MI5_SLOT2 1008 + int "Slot 2 slave interface id" 1009 + default 10 1010 + range 0 13 1011 + 1012 + config SCB0_MI5_SLOT3 1013 + int "Slot 3 slave interface id" 1014 + default 12 1015 + range 0 13 1016 + 1017 + config SCB0_MI5_SLOT4 1018 + int "Slot 4 slave interface id" 1019 + default 1 1020 + range 0 13 1021 + 1022 + config SCB0_MI5_SLOT5 1023 + int "Slot 5 slave interface id" 1024 + default 3 1025 + range 0 13 1026 + 1027 + config SCB0_MI5_SLOT6 1028 + int "Slot 6 slave interface id" 1029 + default 10 1030 + range 0 13 1031 + 1032 + config SCB0_MI5_SLOT7 1033 + int "Slot 7 slave interface id" 1034 + default 12 1035 + range 0 13 1036 + 1037 + config SCB0_MI5_SLOT8 1038 + int "Slot 8 slave interface id" 1039 + default 1 1040 + range 0 13 1041 + 1042 + config SCB0_MI5_SLOT9 1043 + int "Slot 9 slave interface id" 1044 + default 3 1045 + range 0 13 1046 + 1047 + config SCB0_MI5_SLOT10 1048 + int "Slot 10 slave interface id" 1049 + default 10 1050 + range 0 13 1051 + 1052 + config SCB0_MI5_SLOT11 1053 + int "Slot 11 slave interface id" 1054 + default 12 1055 + range 0 13 1056 + 1057 + config SCB0_MI5_SLOT12 1058 + int "Slot 12 slave interface id" 1059 + default 1 1060 + range 0 13 1061 + 1062 + config SCB0_MI5_SLOT13 1063 + int "Slot 13 slave interface id" 1064 + default 3 1065 + range 0 13 1066 + 1067 + config SCB0_MI5_SLOT14 1068 + int "Slot 14 slave interface id" 1069 + default 10 1070 + range 0 13 1071 + 1072 + config SCB0_MI5_SLOT15 1073 + int "Slot 15 slave interface id" 1074 + default 12 1075 + range 0 13 1076 + 1077 + endif # SCB0_MI5 1078 + 62 1079 endmenu 63 1080 64 1081 endif
+1
arch/blackfin/mach-bf609/Makefile
··· 4 4 5 5 obj-y := dma.o clock.o ints-priority.o 6 6 obj-$(CONFIG_PM) += pm.o dpm.o 7 + obj-$(CONFIG_SCB_PRIORITY) += scb.o
+232
arch/blackfin/mach-bf609/scb.c
··· 1 + /* 2 + * arch/blackfin/mach-common/scb-init.c - reprogram system cross bar priority 3 + * 4 + * Copyright 2012 Analog Devices Inc. 5 + * 6 + * Licensed under the GPL-2 or later. 7 + */ 8 + 9 + #include <asm/blackfin.h> 10 + #include <asm/scb.h> 11 + 12 + struct scb_mi_prio scb_data[] = { 13 + #ifdef CONFIG_SCB0_MI0 14 + { REG_SCB0_ARBR0, REG_SCB0_ARBW0, 32, { 15 + CONFIG_SCB0_MI0_SLOT0, 16 + CONFIG_SCB0_MI0_SLOT1, 17 + CONFIG_SCB0_MI0_SLOT2, 18 + CONFIG_SCB0_MI0_SLOT3, 19 + CONFIG_SCB0_MI0_SLOT4, 20 + CONFIG_SCB0_MI0_SLOT5, 21 + CONFIG_SCB0_MI0_SLOT6, 22 + CONFIG_SCB0_MI0_SLOT7, 23 + CONFIG_SCB0_MI0_SLOT8, 24 + CONFIG_SCB0_MI0_SLOT9, 25 + CONFIG_SCB0_MI0_SLOT10, 26 + CONFIG_SCB0_MI0_SLOT11, 27 + CONFIG_SCB0_MI0_SLOT12, 28 + CONFIG_SCB0_MI0_SLOT13, 29 + CONFIG_SCB0_MI0_SLOT14, 30 + CONFIG_SCB0_MI0_SLOT15, 31 + CONFIG_SCB0_MI0_SLOT16, 32 + CONFIG_SCB0_MI0_SLOT17, 33 + CONFIG_SCB0_MI0_SLOT18, 34 + CONFIG_SCB0_MI0_SLOT19, 35 + CONFIG_SCB0_MI0_SLOT20, 36 + CONFIG_SCB0_MI0_SLOT21, 37 + CONFIG_SCB0_MI0_SLOT22, 38 + CONFIG_SCB0_MI0_SLOT23, 39 + CONFIG_SCB0_MI0_SLOT24, 40 + CONFIG_SCB0_MI0_SLOT25, 41 + CONFIG_SCB0_MI0_SLOT26, 42 + CONFIG_SCB0_MI0_SLOT27, 43 + CONFIG_SCB0_MI0_SLOT28, 44 + CONFIG_SCB0_MI0_SLOT29, 45 + CONFIG_SCB0_MI0_SLOT30, 46 + CONFIG_SCB0_MI0_SLOT31 47 + }, 48 + }, 49 + #endif 50 + #ifdef CONFIG_SCB0_MI1 51 + { REG_SCB0_ARBR1, REG_SCB0_ARBW1, 32, { 52 + CONFIG_SCB0_MI1_SLOT0, 53 + CONFIG_SCB0_MI1_SLOT1, 54 + CONFIG_SCB0_MI1_SLOT2, 55 + CONFIG_SCB0_MI1_SLOT3, 56 + CONFIG_SCB0_MI1_SLOT4, 57 + CONFIG_SCB0_MI1_SLOT5, 58 + CONFIG_SCB0_MI1_SLOT6, 59 + CONFIG_SCB0_MI1_SLOT7, 60 + CONFIG_SCB0_MI1_SLOT8, 61 + CONFIG_SCB0_MI1_SLOT9, 62 + CONFIG_SCB0_MI1_SLOT10, 63 + CONFIG_SCB0_MI1_SLOT11, 64 + CONFIG_SCB0_MI1_SLOT12, 65 + CONFIG_SCB0_MI1_SLOT13, 66 + CONFIG_SCB0_MI1_SLOT14, 67 + CONFIG_SCB0_MI1_SLOT15, 68 + CONFIG_SCB0_MI1_SLOT16, 69 + CONFIG_SCB0_MI1_SLOT17, 70 + CONFIG_SCB0_MI1_SLOT18, 71 + CONFIG_SCB0_MI1_SLOT19, 72 + CONFIG_SCB0_MI1_SLOT20, 73 + CONFIG_SCB0_MI1_SLOT21, 74 + CONFIG_SCB0_MI1_SLOT22, 75 + CONFIG_SCB0_MI1_SLOT23, 76 + CONFIG_SCB0_MI1_SLOT24, 77 + CONFIG_SCB0_MI1_SLOT25, 78 + CONFIG_SCB0_MI1_SLOT26, 79 + CONFIG_SCB0_MI1_SLOT27, 80 + CONFIG_SCB0_MI1_SLOT28, 81 + CONFIG_SCB0_MI1_SLOT29, 82 + CONFIG_SCB0_MI1_SLOT30, 83 + CONFIG_SCB0_MI1_SLOT31 84 + }, 85 + }, 86 + #endif 87 + #ifdef CONFIG_SCB0_MI2 88 + { REG_SCB0_ARBR2, REG_SCB0_ARBW2, 32, { 89 + CONFIG_SCB0_MI2_SLOT0, 90 + CONFIG_SCB0_MI2_SLOT1, 91 + CONFIG_SCB0_MI2_SLOT2, 92 + CONFIG_SCB0_MI2_SLOT3, 93 + CONFIG_SCB0_MI2_SLOT4, 94 + CONFIG_SCB0_MI2_SLOT5, 95 + CONFIG_SCB0_MI2_SLOT6, 96 + CONFIG_SCB0_MI2_SLOT7, 97 + CONFIG_SCB0_MI2_SLOT8, 98 + CONFIG_SCB0_MI2_SLOT9, 99 + CONFIG_SCB0_MI2_SLOT10, 100 + CONFIG_SCB0_MI2_SLOT11, 101 + CONFIG_SCB0_MI2_SLOT12, 102 + CONFIG_SCB0_MI2_SLOT13, 103 + CONFIG_SCB0_MI2_SLOT14, 104 + CONFIG_SCB0_MI2_SLOT15, 105 + CONFIG_SCB0_MI2_SLOT16, 106 + CONFIG_SCB0_MI2_SLOT17, 107 + CONFIG_SCB0_MI2_SLOT18, 108 + CONFIG_SCB0_MI2_SLOT19, 109 + CONFIG_SCB0_MI2_SLOT20, 110 + CONFIG_SCB0_MI2_SLOT21, 111 + CONFIG_SCB0_MI2_SLOT22, 112 + CONFIG_SCB0_MI2_SLOT23, 113 + CONFIG_SCB0_MI2_SLOT24, 114 + CONFIG_SCB0_MI2_SLOT25, 115 + CONFIG_SCB0_MI2_SLOT26, 116 + CONFIG_SCB0_MI2_SLOT27, 117 + CONFIG_SCB0_MI2_SLOT28, 118 + CONFIG_SCB0_MI2_SLOT29, 119 + CONFIG_SCB0_MI2_SLOT30, 120 + CONFIG_SCB0_MI2_SLOT31 121 + }, 122 + }, 123 + #endif 124 + #ifdef CONFIG_SCB0_MI3 125 + { REG_SCB0_ARBR3, REG_SCB0_ARBW3, 32, { 126 + CONFIG_SCB0_MI3_SLOT0, 127 + CONFIG_SCB0_MI3_SLOT1, 128 + CONFIG_SCB0_MI3_SLOT2, 129 + CONFIG_SCB0_MI3_SLOT3, 130 + CONFIG_SCB0_MI3_SLOT4, 131 + CONFIG_SCB0_MI3_SLOT5, 132 + CONFIG_SCB0_MI3_SLOT6, 133 + CONFIG_SCB0_MI3_SLOT7, 134 + CONFIG_SCB0_MI3_SLOT8, 135 + CONFIG_SCB0_MI3_SLOT9, 136 + CONFIG_SCB0_MI3_SLOT10, 137 + CONFIG_SCB0_MI3_SLOT11, 138 + CONFIG_SCB0_MI3_SLOT12, 139 + CONFIG_SCB0_MI3_SLOT13, 140 + CONFIG_SCB0_MI3_SLOT14, 141 + CONFIG_SCB0_MI3_SLOT15, 142 + CONFIG_SCB0_MI3_SLOT16, 143 + CONFIG_SCB0_MI3_SLOT17, 144 + CONFIG_SCB0_MI3_SLOT18, 145 + CONFIG_SCB0_MI3_SLOT19, 146 + CONFIG_SCB0_MI3_SLOT20, 147 + CONFIG_SCB0_MI3_SLOT21, 148 + CONFIG_SCB0_MI3_SLOT22, 149 + CONFIG_SCB0_MI3_SLOT23, 150 + CONFIG_SCB0_MI3_SLOT24, 151 + CONFIG_SCB0_MI3_SLOT25, 152 + CONFIG_SCB0_MI3_SLOT26, 153 + CONFIG_SCB0_MI3_SLOT27, 154 + CONFIG_SCB0_MI3_SLOT28, 155 + CONFIG_SCB0_MI3_SLOT29, 156 + CONFIG_SCB0_MI3_SLOT30, 157 + CONFIG_SCB0_MI3_SLOT31 158 + }, 159 + }, 160 + #endif 161 + #ifdef CONFIG_SCB0_MI4 162 + { REG_SCB0_ARBR4, REG_SCB4_ARBW0, 32, { 163 + CONFIG_SCB0_MI4_SLOT0, 164 + CONFIG_SCB0_MI4_SLOT1, 165 + CONFIG_SCB0_MI4_SLOT2, 166 + CONFIG_SCB0_MI4_SLOT3, 167 + CONFIG_SCB0_MI4_SLOT4, 168 + CONFIG_SCB0_MI4_SLOT5, 169 + CONFIG_SCB0_MI4_SLOT6, 170 + CONFIG_SCB0_MI4_SLOT7, 171 + CONFIG_SCB0_MI4_SLOT8, 172 + CONFIG_SCB0_MI4_SLOT9, 173 + CONFIG_SCB0_MI4_SLOT10, 174 + CONFIG_SCB0_MI4_SLOT11, 175 + CONFIG_SCB0_MI4_SLOT12, 176 + CONFIG_SCB0_MI4_SLOT13, 177 + CONFIG_SCB0_MI4_SLOT14, 178 + CONFIG_SCB0_MI4_SLOT15, 179 + CONFIG_SCB0_MI4_SLOT16, 180 + CONFIG_SCB0_MI4_SLOT17, 181 + CONFIG_SCB0_MI4_SLOT18, 182 + CONFIG_SCB0_MI4_SLOT19, 183 + CONFIG_SCB0_MI4_SLOT20, 184 + CONFIG_SCB0_MI4_SLOT21, 185 + CONFIG_SCB0_MI4_SLOT22, 186 + CONFIG_SCB0_MI4_SLOT23, 187 + CONFIG_SCB0_MI4_SLOT24, 188 + CONFIG_SCB0_MI4_SLOT25, 189 + CONFIG_SCB0_MI4_SLOT26, 190 + CONFIG_SCB0_MI4_SLOT27, 191 + CONFIG_SCB0_MI4_SLOT28, 192 + CONFIG_SCB0_MI4_SLOT29, 193 + CONFIG_SCB0_MI4_SLOT30, 194 + CONFIG_SCB0_MI4_SLOT31 195 + }, 196 + }, 197 + #endif 198 + #ifdef CONFIG_SCB0_MI5 199 + { REG_SCB0_ARBR5, REG_SCB0_ARBW5, 16, { 200 + CONFIG_SCB0_MI5_SLOT0, 201 + CONFIG_SCB0_MI5_SLOT1, 202 + CONFIG_SCB0_MI5_SLOT2, 203 + CONFIG_SCB0_MI5_SLOT3, 204 + CONFIG_SCB0_MI5_SLOT4, 205 + CONFIG_SCB0_MI5_SLOT5, 206 + CONFIG_SCB0_MI5_SLOT6, 207 + CONFIG_SCB0_MI5_SLOT7, 208 + CONFIG_SCB0_MI5_SLOT8, 209 + CONFIG_SCB0_MI5_SLOT9, 210 + CONFIG_SCB0_MI5_SLOT10, 211 + CONFIG_SCB0_MI5_SLOT11, 212 + CONFIG_SCB0_MI5_SLOT12, 213 + CONFIG_SCB0_MI5_SLOT13, 214 + CONFIG_SCB0_MI5_SLOT14, 215 + CONFIG_SCB0_MI5_SLOT15, 216 + }, 217 + }, 218 + #endif 219 + /* 220 + { REG_SCB1_ARBR0, REG_SCB1_ARBW0, scb1_mi0, 20 }, 221 + { REG_SCB2_ARBR0, REG_SCB2_ARBW0, scb2_mi0, 10 }, 222 + { REG_SCB3_ARBR0, REG_SCB3_ARBW0, scb3_mi0, 16 }, 223 + { REG_SCB4_ARBR0, REG_SCB4_ARBW0, scb4_mi0, 16 }, 224 + { REG_SCB5_ARBR0, REG_SCB5_ARBW0, scb5_mi0, 8 }, 225 + { REG_SCB6_ARBR0, REG_SCB6_ARBW0, scb6_mi0, 4 }, 226 + { REG_SCB7_ARBR0, REG_SCB7_ARBW0, scb7_mi0, 6 }, 227 + { REG_SCB8_ARBR0, REG_SCB8_ARBW0, scb8_mi0, 8 }, 228 + { REG_SCB9_ARBR0, REG_SCB9_ARBW0, scb9_mi0, 10 }, 229 + { REG_SCB10_ARBR0, REG_SCB10_ARBW0, scb20_mi0, 16 }, 230 + */ 231 + { 0, } 232 + };
+1
arch/blackfin/mach-common/Makefile
··· 10 10 ifneq ($(CONFIG_BF60x),y) 11 11 obj-$(CONFIG_PM) += dpmc_modes.o 12 12 endif 13 + obj-$(CONFIG_SCB_PRIORITY) += scb-init.o 13 14 obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o 14 15 obj-$(CONFIG_SMP) += smp.o 15 16 obj-$(CONFIG_BFIN_KERNEL_CLOCK) += clocks-init.o
+53
arch/blackfin/mach-common/scb-init.c
··· 1 + /* 2 + * arch/blackfin/mach-common/scb-init.c - reprogram system cross bar priority 3 + * 4 + * Copyright 2012 Analog Devices Inc. 5 + * 6 + * Licensed under the GPL-2 or later. 7 + */ 8 + 9 + #include <linux/init.h> 10 + #include <linux/errno.h> 11 + #include <linux/kernel.h> 12 + #include <asm/scb.h> 13 + 14 + __attribute__((l1_text)) 15 + inline void scb_mi_write(unsigned long scb_mi_arbw, unsigned int slots, 16 + unsigned char *scb_mi_prio) 17 + { 18 + unsigned int i; 19 + 20 + for (i = 0; i < slots; ++i) 21 + bfin_write32(scb_mi_arbw, (i << SCB_SLOT_OFFSET) | scb_mi_prio[i]); 22 + } 23 + 24 + __attribute__((l1_text)) 25 + inline void scb_mi_read(unsigned long scb_mi_arbw, unsigned int slots, 26 + unsigned char *scb_mi_prio) 27 + { 28 + unsigned int i; 29 + 30 + for (i = 0; i < slots; ++i) { 31 + bfin_write32(scb_mi_arbw, (0xFF << SCB_SLOT_OFFSET) | i); 32 + scb_mi_prio[i] = bfin_read32(scb_mi_arbw); 33 + } 34 + } 35 + 36 + __attribute__((l1_text)) 37 + void init_scb(void) 38 + { 39 + unsigned int i, j; 40 + unsigned char scb_tmp_prio[32]; 41 + 42 + pr_info("Init System Crossbar\n"); 43 + for (i = 0; scb_data[i].scb_mi_arbr > 0; ++i) { 44 + 45 + scb_mi_write(scb_data[i].scb_mi_arbw, scb_data[i].scb_mi_slots, scb_data[i].scb_mi_prio); 46 + 47 + pr_debug("scb priority at 0x%lx:\n", scb_data[i].scb_mi_arbr); 48 + scb_mi_read(scb_data[i].scb_mi_arbw, scb_data[i].scb_mi_slots, scb_tmp_prio); 49 + for (j = 0; j < scb_data[i].scb_mi_slots; ++j) 50 + pr_debug("slot %d = %d\n", j, scb_tmp_prio[j]); 51 + } 52 + 53 + }