Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

iio: adc: exynos_adc: add support for s3c64xx adc

The ADC in s3c64xx is almost the same as exynosv1, but
has a different 'select' method. Adding this here will be
helpful to move over the existing s3c64xx platform from the
legacy plat-samsung/adc driver to the new exynos-adc.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>

authored by

Arnd Bergmann and committed by
Jonathan Cameron
249535d8 44d6f2ef

+29 -1
+2
Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
··· 16 16 future controllers. 17 17 Must be "samsung,exynos3250-adc" for 18 18 controllers compatible with ADC of Exynos3250. 19 + Must be "samsung,s3c6410-adc" for 20 + the ADC in s3c6410 and compatibles 19 21 - reg: Contains ADC register address range (base address and 20 22 length) and the address of the phy enable register. 21 23 - interrupts: Contains the interrupt information for the timer. The
+27 -1
drivers/iio/adc/exynos_adc.c
··· 40 40 #include <linux/iio/machine.h> 41 41 #include <linux/iio/driver.h> 42 42 43 - /* EXYNOS4412/5250 ADC_V1 registers definitions */ 43 + /* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */ 44 44 #define ADC_V1_CON(x) ((x) + 0x00) 45 45 #define ADC_V1_DLY(x) ((x) + 0x08) 46 46 #define ADC_V1_DATX(x) ((x) + 0x0C) ··· 60 60 #define ADC_V1_CON_PRSCEN (1u << 14) 61 61 #define ADC_V1_CON_PRSCLV(x) (((x) & 0xFF) << 6) 62 62 #define ADC_V1_CON_STANDBY (1u << 2) 63 + 64 + /* Bit definitions for S3C2410 ADC */ 65 + #define ADC_S3C2410_CON_SELMUX(x) (((x) & 7) << 3) 63 66 64 67 /* Bit definitions for ADC_V2 */ 65 68 #define ADC_V2_CON1_SOFT_RESET (1u << 2) ··· 220 217 .start_conv = exynos_adc_v1_start_conv, 221 218 }; 222 219 220 + static void exynos_adc_s3c64xx_start_conv(struct exynos_adc *info, 221 + unsigned long addr) 222 + { 223 + u32 con1; 224 + 225 + con1 = readl(ADC_V1_CON(info->regs)); 226 + con1 &= ~ADC_S3C2410_CON_SELMUX(0x7); 227 + con1 |= ADC_S3C2410_CON_SELMUX(addr); 228 + writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs)); 229 + } 230 + 231 + static struct exynos_adc_data const exynos_adc_s3c64xx_data = { 232 + .num_channels = MAX_ADC_V1_CHANNELS, 233 + 234 + .init_hw = exynos_adc_v1_init_hw, 235 + .exit_hw = exynos_adc_v1_exit_hw, 236 + .clear_irq = exynos_adc_v1_clear_irq, 237 + .start_conv = exynos_adc_s3c64xx_start_conv, 238 + }; 239 + 223 240 static void exynos_adc_v2_init_hw(struct exynos_adc *info) 224 241 { 225 242 u32 con1, con2; ··· 308 285 309 286 static const struct of_device_id exynos_adc_match[] = { 310 287 { 288 + .compatible = "samsung,s3c6410-adc", 289 + .data = &exynos_adc_s3c64xx_data, 290 + }, { 311 291 .compatible = "samsung,exynos-adc-v1", 312 292 .data = &exynos_adc_v1_data, 313 293 }, {