Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

mtd: rawnand: ams-delta: Push inversion handling to gpiolib

Let platforms take care of declaring correct GPIO pin polarity so we
can just ask a GPIO line to be asserted or deasserted and gpiolib deals
with the rest depending on how the platform is configured.

Inspired by similar changes to regulator drivers by Linus Walleij
<linus.walleij@linaro.org>, thanks!

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200212003929.6682-7-jmkrzyszt@gmail.com

authored by

Janusz Krzysztofik and committed by
Miquel Raynal
241008ed 2cef3d4c

+19 -15
+8 -4
arch/arm/mach-omap1/board-ams-delta.c
··· 341 341 .table = { 342 342 GPIO_LOOKUP(OMAP_GPIO_LABEL, AMS_DELTA_GPIO_PIN_NAND_RB, "rdy", 343 343 0), 344 - GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_NCE, "nce", 0), 345 - GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_NRE, "nre", 0), 346 - GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_NWP, "nwp", 0), 347 - GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_NWE, "nwe", 0), 344 + GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_NCE, "nce", 345 + GPIO_ACTIVE_LOW), 346 + GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_NRE, "nre", 347 + GPIO_ACTIVE_LOW), 348 + GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_NWP, "nwp", 349 + GPIO_ACTIVE_LOW), 350 + GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_NWE, "nwe", 351 + GPIO_ACTIVE_LOW), 348 352 GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_ALE, "ale", 0), 349 353 GPIO_LOOKUP(LATCH2_LABEL, LATCH2_PIN_NAND_CLE, "cle", 0), 350 354 GPIO_LOOKUP_IDX(OMAP_MPUIO_LABEL, 0, "data", 0, 0),
+11 -11
drivers/mtd/nand/raw/ams-delta.c
··· 44 44 45 45 static void ams_delta_write_commit(struct ams_delta_nand *priv) 46 46 { 47 - gpiod_set_value(priv->gpiod_nwe, 0); 48 - ndelay(40); 49 47 gpiod_set_value(priv->gpiod_nwe, 1); 48 + ndelay(40); 49 + gpiod_set_value(priv->gpiod_nwe, 0); 50 50 } 51 51 52 52 static void ams_delta_io_write(struct ams_delta_nand *priv, u8 byte) ··· 81 81 struct gpio_descs *data_gpiods = priv->data_gpiods; 82 82 DECLARE_BITMAP(values, BITS_PER_TYPE(res)) = { 0, }; 83 83 84 - gpiod_set_value(priv->gpiod_nre, 0); 84 + gpiod_set_value(priv->gpiod_nre, 1); 85 85 ndelay(40); 86 86 87 87 gpiod_get_raw_array_value(data_gpiods->ndescs, data_gpiods->desc, 88 88 data_gpiods->info, values); 89 89 90 - gpiod_set_value(priv->gpiod_nre, 1); 90 + gpiod_set_value(priv->gpiod_nre, 0); 91 91 92 92 res = values[0]; 93 93 return res; ··· 129 129 130 130 static void ams_delta_ctrl_cs(struct ams_delta_nand *priv, bool assert) 131 131 { 132 - gpiod_set_value(priv->gpiod_nce, assert ? 0 : 1); 132 + gpiod_set_value(priv->gpiod_nce, assert); 133 133 } 134 134 135 135 static int ams_delta_exec_op(struct nand_chip *this, ··· 237 237 platform_set_drvdata(pdev, priv); 238 238 239 239 /* Set chip enabled but write protected */ 240 - priv->gpiod_nwp = devm_gpiod_get(&pdev->dev, "nwp", GPIOD_OUT_LOW); 240 + priv->gpiod_nwp = devm_gpiod_get(&pdev->dev, "nwp", GPIOD_OUT_HIGH); 241 241 if (IS_ERR(priv->gpiod_nwp)) { 242 242 err = PTR_ERR(priv->gpiod_nwp); 243 243 dev_err(&pdev->dev, "NWP GPIO request failed (%d)\n", err); 244 244 return err; 245 245 } 246 246 247 - priv->gpiod_nce = devm_gpiod_get(&pdev->dev, "nce", GPIOD_OUT_HIGH); 247 + priv->gpiod_nce = devm_gpiod_get(&pdev->dev, "nce", GPIOD_OUT_LOW); 248 248 if (IS_ERR(priv->gpiod_nce)) { 249 249 err = PTR_ERR(priv->gpiod_nce); 250 250 dev_err(&pdev->dev, "NCE GPIO request failed (%d)\n", err); 251 251 return err; 252 252 } 253 253 254 - priv->gpiod_nre = devm_gpiod_get(&pdev->dev, "nre", GPIOD_OUT_HIGH); 254 + priv->gpiod_nre = devm_gpiod_get(&pdev->dev, "nre", GPIOD_OUT_LOW); 255 255 if (IS_ERR(priv->gpiod_nre)) { 256 256 err = PTR_ERR(priv->gpiod_nre); 257 257 dev_err(&pdev->dev, "NRE GPIO request failed (%d)\n", err); 258 258 return err; 259 259 } 260 260 261 - priv->gpiod_nwe = devm_gpiod_get(&pdev->dev, "nwe", GPIOD_OUT_HIGH); 261 + priv->gpiod_nwe = devm_gpiod_get(&pdev->dev, "nwe", GPIOD_OUT_LOW); 262 262 if (IS_ERR(priv->gpiod_nwe)) { 263 263 err = PTR_ERR(priv->gpiod_nwe); 264 264 dev_err(&pdev->dev, "NWE GPIO request failed (%d)\n", err); ··· 303 303 * chip detection/initialization. 304 304 */ 305 305 /* Release write protection */ 306 - gpiod_set_value(priv->gpiod_nwp, 1); 306 + gpiod_set_value(priv->gpiod_nwp, 0); 307 307 308 308 /* Scan to find existence of the device */ 309 309 err = nand_scan(this, 1); ··· 332 332 struct mtd_info *mtd = nand_to_mtd(&priv->nand_chip); 333 333 334 334 /* Apply write protection */ 335 - gpiod_set_value(priv->gpiod_nwp, 0); 335 + gpiod_set_value(priv->gpiod_nwp, 1); 336 336 337 337 /* Unregister device */ 338 338 nand_release(mtd_to_nand(mtd));