Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

cpufreq: intel_pstate: Allow model specific EPPs

The current implementation allows model specific EPP override for
balanced_performance. Add feature to allow model specific EPP for all
predefined EPP strings. For example for some CPU models, even changing
performance EPP has benefits

Use a mask of EPPs as driver_data instead of just balanced_performance.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

authored by

Srinivas Pandruvada and committed by
Rafael J. Wysocki
240a8da6 4615ac90

+35 -6
+35 -6
drivers/cpufreq/intel_pstate.c
··· 25 25 #include <linux/acpi.h> 26 26 #include <linux/vmalloc.h> 27 27 #include <linux/pm_qos.h> 28 + #include <linux/bitfield.h> 28 29 #include <trace/events/power.h> 29 30 30 31 #include <asm/cpu.h> ··· 3402 3401 return !!(value & 0x1); 3403 3402 } 3404 3403 3405 - static const struct x86_cpu_id intel_epp_balance_perf[] = { 3404 + #define POWERSAVE_MASK GENMASK(7, 0) 3405 + #define BALANCE_POWER_MASK GENMASK(15, 8) 3406 + #define BALANCE_PERFORMANCE_MASK GENMASK(23, 16) 3407 + #define PERFORMANCE_MASK GENMASK(31, 24) 3408 + 3409 + #define HWP_SET_EPP_VALUES(powersave, balance_power, balance_perf, performance) \ 3410 + (FIELD_PREP_CONST(POWERSAVE_MASK, powersave) |\ 3411 + FIELD_PREP_CONST(BALANCE_POWER_MASK, balance_power) |\ 3412 + FIELD_PREP_CONST(BALANCE_PERFORMANCE_MASK, balance_perf) |\ 3413 + FIELD_PREP_CONST(PERFORMANCE_MASK, performance)) 3414 + 3415 + #define HWP_SET_DEF_BALANCE_PERF_EPP(balance_perf) \ 3416 + (HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE, HWP_EPP_BALANCE_POWERSAVE,\ 3417 + balance_perf, HWP_EPP_PERFORMANCE)) 3418 + 3419 + static const struct x86_cpu_id intel_epp_default[] = { 3406 3420 /* 3407 3421 * Set EPP value as 102, this is the max suggested EPP 3408 3422 * which can result in one core turbo frequency for 3409 3423 * AlderLake Mobile CPUs. 3410 3424 */ 3411 - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, 102), 3412 - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, 32), 3425 + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, HWP_SET_DEF_BALANCE_PERF_EPP(102)), 3426 + X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)), 3413 3427 {} 3414 3428 }; 3415 3429 ··· 3522 3506 intel_pstate_sysfs_expose_params(); 3523 3507 3524 3508 if (hwp_active) { 3525 - const struct x86_cpu_id *id = x86_match_cpu(intel_epp_balance_perf); 3509 + const struct x86_cpu_id *id = x86_match_cpu(intel_epp_default); 3526 3510 const struct x86_cpu_id *hybrid_id = x86_match_cpu(intel_hybrid_scaling_factor); 3527 3511 3528 - if (id) 3529 - epp_values[EPP_INDEX_BALANCE_PERFORMANCE] = id->driver_data; 3512 + if (id) { 3513 + epp_values[EPP_INDEX_POWERSAVE] = 3514 + FIELD_GET(POWERSAVE_MASK, id->driver_data); 3515 + epp_values[EPP_INDEX_BALANCE_POWERSAVE] = 3516 + FIELD_GET(BALANCE_POWER_MASK, id->driver_data); 3517 + epp_values[EPP_INDEX_BALANCE_PERFORMANCE] = 3518 + FIELD_GET(BALANCE_PERFORMANCE_MASK, id->driver_data); 3519 + epp_values[EPP_INDEX_PERFORMANCE] = 3520 + FIELD_GET(PERFORMANCE_MASK, id->driver_data); 3521 + pr_debug("Updated EPPs powersave:%x balanced power:%x balanced perf:%x performance:%x\n", 3522 + epp_values[EPP_INDEX_POWERSAVE], 3523 + epp_values[EPP_INDEX_BALANCE_POWERSAVE], 3524 + epp_values[EPP_INDEX_BALANCE_PERFORMANCE], 3525 + epp_values[EPP_INDEX_PERFORMANCE]); 3526 + } 3530 3527 3531 3528 if (hybrid_id) { 3532 3529 hybrid_scaling_factor = hybrid_id->driver_data;