sh: Handle unaligned 16-bit instructions on SH-2A.

This adds some sanity checking in the unaligned instruction handler to
verify the instruction size, which enables basic support for 16-bit
fixups on SH-2A parts.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

+8 -3
+8 -3
arch/sh/kernel/traps_32.c
··· 452 u_int rm; 453 int ret, index; 454 455 index = (instruction>>8)&15; /* 0x0F00 */ 456 rm = regs->regs[index]; 457 ··· 625 626 se_user += 1; 627 628 - #ifndef CONFIG_CPU_SH2A 629 set_fs(USER_DS); 630 - if (copy_from_user(&instruction, (u16 *)(regs->pc & ~1), 2)) { 631 set_fs(oldfs); 632 goto uspace_segv; 633 } ··· 639 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", 640 current->comm, current->pid, (void *)regs->pc, 641 instruction); 642 - #endif 643 644 if (se_usermode & 2) 645 goto fixup;
··· 452 u_int rm; 453 int ret, index; 454 455 + /* 456 + * XXX: We can't handle mixed 16/32-bit instructions yet 457 + */ 458 + if (instruction_size(instruction) != 2) 459 + return -EINVAL; 460 + 461 index = (instruction>>8)&15; /* 0x0F00 */ 462 rm = regs->regs[index]; 463 ··· 619 620 se_user += 1; 621 622 set_fs(USER_DS); 623 + if (copy_from_user(&instruction, (insn_size_t *)(regs->pc & ~1), 624 + sizeof(instruction))) { 625 set_fs(oldfs); 626 goto uspace_segv; 627 } ··· 633 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", 634 current->comm, current->pid, (void *)regs->pc, 635 instruction); 636 637 if (se_usermode & 2) 638 goto fixup;