Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: i2c: adjust indentation in DTS example to coding style

Bindings coding style expects 2- or 4-space indentation in the DTS
example. Correct files having something odd (6- or 8-space) to 4-space
while re-ordering few properties according to DTS coding style (the
first property should be compatible, then reg/ranges). No functional
impact.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>

authored by

Krzysztof Kozlowski and committed by
Andi Shyti
2362c730 a95ab3d2

+152 -152
+14 -14
Documentation/devicetree/bindings/i2c/brcm,brcmstb-i2c.yaml
··· 76 76 77 77 examples: 78 78 - | 79 - bsca: i2c@f0406200 { 80 - clock-frequency = <390000>; 81 - compatible = "brcm,brcmstb-i2c"; 82 - interrupt-parent = <&irq0_intc>; 83 - reg = <0xf0406200 0x58>; 84 - interrupts = <0x18>; 85 - interrupt-names = "upg_bsca"; 86 - }; 79 + bsca: i2c@f0406200 { 80 + compatible = "brcm,brcmstb-i2c"; 81 + reg = <0xf0406200 0x58>; 82 + clock-frequency = <390000>; 83 + interrupt-parent = <&irq0_intc>; 84 + interrupts = <0x18>; 85 + interrupt-names = "upg_bsca"; 86 + }; 87 87 88 88 - | 89 - ddc0: i2c@7ef04500 { 90 - compatible = "brcm,bcm2711-hdmi-i2c"; 91 - reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>; 92 - reg-names = "bsc", "auto-i2c"; 93 - clock-frequency = <390000>; 94 - }; 89 + ddc0: i2c@7ef04500 { 90 + compatible = "brcm,bcm2711-hdmi-i2c"; 91 + reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>; 92 + reg-names = "bsc", "auto-i2c"; 93 + clock-frequency = <390000>; 94 + }; 95 95 96 96 ...
+53 -53
Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml
··· 109 109 // Example for a bus to be demuxed. It contains various I2C clients for 110 110 // HDMI, so the bus is named "i2c-hdmi": 111 111 i2chdmi: i2c-mux3 { 112 - compatible = "i2c-demux-pinctrl"; 113 - i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>; 114 - i2c-bus-name = "i2c-hdmi"; 115 - #address-cells = <1>; 116 - #size-cells = <0>; 112 + compatible = "i2c-demux-pinctrl"; 113 + i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>; 114 + i2c-bus-name = "i2c-hdmi"; 115 + #address-cells = <1>; 116 + #size-cells = <0>; 117 117 118 - ak4643: codec@12 { 119 - compatible = "asahi-kasei,ak4643"; 120 - #sound-dai-cells = <0>; 121 - reg = <0x12>; 118 + ak4643: codec@12 { 119 + compatible = "asahi-kasei,ak4643"; 120 + #sound-dai-cells = <0>; 121 + reg = <0x12>; 122 + }; 123 + 124 + composite-in@20 { 125 + compatible = "adi,adv7180"; 126 + reg = <0x20>; 127 + 128 + port { 129 + adv7180: endpoint { 130 + bus-width = <8>; 131 + remote-endpoint = <&vin1ep0>; 132 + }; 122 133 }; 134 + }; 123 135 124 - composite-in@20 { 125 - compatible = "adi,adv7180"; 126 - reg = <0x20>; 136 + hdmi@39 { 137 + compatible = "adi,adv7511w"; 138 + reg = <0x39>; 139 + interrupt-parent = <&gpio1>; 140 + interrupts = <15 IRQ_TYPE_LEVEL_LOW>; 141 + clocks = <&cec_clock>; 142 + clock-names = "cec"; 127 143 128 - port { 129 - adv7180: endpoint { 130 - bus-width = <8>; 131 - remote-endpoint = <&vin1ep0>; 132 - }; 144 + avdd-supply = <&fixedregulator1v8>; 145 + dvdd-supply = <&fixedregulator1v8>; 146 + pvdd-supply = <&fixedregulator1v8>; 147 + dvdd-3v-supply = <&fixedregulator3v3>; 148 + bgvdd-supply = <&fixedregulator1v8>; 149 + 150 + adi,input-depth = <8>; 151 + adi,input-colorspace = "rgb"; 152 + adi,input-clock = "1x"; 153 + 154 + ports { 155 + #address-cells = <1>; 156 + #size-cells = <0>; 157 + 158 + port@0 { 159 + reg = <0>; 160 + adv7511_in: endpoint { 161 + remote-endpoint = <&lvds0_out>; 133 162 }; 134 - }; 163 + }; 135 164 136 - hdmi@39 { 137 - compatible = "adi,adv7511w"; 138 - reg = <0x39>; 139 - interrupt-parent = <&gpio1>; 140 - interrupts = <15 IRQ_TYPE_LEVEL_LOW>; 141 - clocks = <&cec_clock>; 142 - clock-names = "cec"; 143 - 144 - avdd-supply = <&fixedregulator1v8>; 145 - dvdd-supply = <&fixedregulator1v8>; 146 - pvdd-supply = <&fixedregulator1v8>; 147 - dvdd-3v-supply = <&fixedregulator3v3>; 148 - bgvdd-supply = <&fixedregulator1v8>; 149 - 150 - adi,input-depth = <8>; 151 - adi,input-colorspace = "rgb"; 152 - adi,input-clock = "1x"; 153 - 154 - ports { 155 - #address-cells = <1>; 156 - #size-cells = <0>; 157 - 158 - port@0 { 159 - reg = <0>; 160 - adv7511_in: endpoint { 161 - remote-endpoint = <&lvds0_out>; 162 - }; 163 - }; 164 - 165 - port@1 { 166 - reg = <1>; 167 - adv7511_out: endpoint { 168 - remote-endpoint = <&hdmi_con_out>; 169 - }; 170 - }; 165 + port@1 { 166 + reg = <1>; 167 + adv7511_out: endpoint { 168 + remote-endpoint = <&hdmi_con_out>; 171 169 }; 170 + }; 172 171 }; 172 + }; 173 173 };
+7 -7
Documentation/devicetree/bindings/i2c/renesas,iic-emev2.yaml
··· 44 44 #include <dt-bindings/interrupt-controller/arm-gic.h> 45 45 46 46 iic0: i2c@e0070000 { 47 - #address-cells = <1>; 48 - #size-cells = <0>; 49 - compatible = "renesas,iic-emev2"; 50 - reg = <0xe0070000 0x28>; 51 - interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>; 52 - clocks = <&iic0_sclk>; 53 - clock-names = "sclk"; 47 + compatible = "renesas,iic-emev2"; 48 + reg = <0xe0070000 0x28>; 49 + interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>; 50 + clocks = <&iic0_sclk>; 51 + clock-names = "sclk"; 52 + #address-cells = <1>; 53 + #size-cells = <0>; 54 54 };
+10 -10
Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml
··· 153 153 #include <dt-bindings/power/r8a7791-sysc.h> 154 154 155 155 i2c0: i2c@e6508000 { 156 - #address-cells = <1>; 157 - #size-cells = <0>; 158 - compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; 159 - reg = <0xe6508000 0x40>; 160 - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 161 - clock-frequency = <400000>; 162 - clocks = <&cpg CPG_MOD 931>; 163 - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 164 - resets = <&cpg 931>; 165 - i2c-scl-internal-delay-ns = <6>; 156 + compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; 157 + reg = <0xe6508000 0x40>; 158 + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 159 + clock-frequency = <400000>; 160 + clocks = <&cpg CPG_MOD 931>; 161 + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 162 + resets = <&cpg 931>; 163 + i2c-scl-internal-delay-ns = <6>; 164 + #address-cells = <1>; 165 + #size-cells = <0>; 166 166 };
+17 -17
Documentation/devicetree/bindings/i2c/renesas,riic.yaml
··· 97 97 #include <dt-bindings/interrupt-controller/arm-gic.h> 98 98 99 99 i2c0: i2c@fcfee000 { 100 - compatible = "renesas,riic-r7s72100", "renesas,riic-rz"; 101 - reg = <0xfcfee000 0x44>; 102 - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 103 - <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>, 104 - <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>, 105 - <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, 106 - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, 107 - <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, 108 - <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, 109 - <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 110 - interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali", 111 - "tmoi"; 112 - clocks = <&mstp9_clks R7S72100_CLK_I2C0>; 113 - clock-frequency = <100000>; 114 - power-domains = <&cpg_clocks>; 115 - #address-cells = <1>; 116 - #size-cells = <0>; 100 + compatible = "renesas,riic-r7s72100", "renesas,riic-rz"; 101 + reg = <0xfcfee000 0x44>; 102 + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 103 + <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>, 104 + <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>, 105 + <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, 106 + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, 107 + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, 108 + <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, 109 + <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 110 + interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali", 111 + "tmoi"; 112 + clocks = <&mstp9_clks R7S72100_CLK_I2C0>; 113 + clock-frequency = <100000>; 114 + power-domains = <&cpg_clocks>; 115 + #address-cells = <1>; 116 + #size-cells = <0>; 117 117 };
+12 -12
Documentation/devicetree/bindings/i2c/renesas,rmobile-iic.yaml
··· 134 134 #include <dt-bindings/power/r8a7790-sysc.h> 135 135 136 136 iic0: i2c@e6500000 { 137 - compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", 138 - "renesas,rmobile-iic"; 139 - reg = <0xe6500000 0x425>; 140 - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 141 - clocks = <&cpg CPG_MOD 318>; 142 - clock-frequency = <400000>; 143 - dmas = <&dmac0 0x61>, <&dmac0 0x62>, <&dmac1 0x61>, <&dmac1 0x62>; 144 - dma-names = "tx", "rx", "tx", "rx"; 145 - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 146 - resets = <&cpg 318>; 147 - #address-cells = <1>; 148 - #size-cells = <0>; 137 + compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", 138 + "renesas,rmobile-iic"; 139 + reg = <0xe6500000 0x425>; 140 + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 141 + clocks = <&cpg CPG_MOD 318>; 142 + clock-frequency = <400000>; 143 + dmas = <&dmac0 0x61>, <&dmac0 0x62>, <&dmac1 0x61>, <&dmac1 0x62>; 144 + dma-names = "tx", "rx", "tx", "rx"; 145 + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 146 + resets = <&cpg 318>; 147 + #address-cells = <1>; 148 + #size-cells = <0>; 149 149 };
+33 -33
Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml
··· 145 145 #include <dt-bindings/mfd/stm32f7-rcc.h> 146 146 #include <dt-bindings/clock/stm32fx-clock.h> 147 147 //Example 1 (with st,stm32f4-i2c compatible) 148 - i2c@40005400 { 149 - compatible = "st,stm32f4-i2c"; 150 - #address-cells = <1>; 151 - #size-cells = <0>; 152 - reg = <0x40005400 0x400>; 153 - interrupts = <31>, 154 - <32>; 155 - resets = <&rcc 277>; 156 - clocks = <&rcc 0 149>; 157 - }; 148 + i2c@40005400 { 149 + compatible = "st,stm32f4-i2c"; 150 + reg = <0x40005400 0x400>; 151 + interrupts = <31>, 152 + <32>; 153 + resets = <&rcc 277>; 154 + clocks = <&rcc 0 149>; 155 + #address-cells = <1>; 156 + #size-cells = <0>; 157 + }; 158 158 159 159 - | 160 160 #include <dt-bindings/mfd/stm32f7-rcc.h> 161 161 #include <dt-bindings/clock/stm32fx-clock.h> 162 162 //Example 2 (with st,stm32f7-i2c compatible) 163 - i2c@40005800 { 164 - compatible = "st,stm32f7-i2c"; 165 - #address-cells = <1>; 166 - #size-cells = <0>; 167 - reg = <0x40005800 0x400>; 168 - interrupts = <31>, 169 - <32>; 170 - resets = <&rcc STM32F7_APB1_RESET(I2C1)>; 171 - clocks = <&rcc 1 CLK_I2C1>; 172 - }; 163 + i2c@40005800 { 164 + compatible = "st,stm32f7-i2c"; 165 + reg = <0x40005800 0x400>; 166 + interrupts = <31>, 167 + <32>; 168 + resets = <&rcc STM32F7_APB1_RESET(I2C1)>; 169 + clocks = <&rcc 1 CLK_I2C1>; 170 + #address-cells = <1>; 171 + #size-cells = <0>; 172 + }; 173 173 174 174 - | 175 175 #include <dt-bindings/mfd/stm32f7-rcc.h> ··· 178 178 #include <dt-bindings/interrupt-controller/arm-gic.h> 179 179 #include <dt-bindings/clock/stm32mp1-clks.h> 180 180 #include <dt-bindings/reset/stm32mp1-resets.h> 181 - i2c@40013000 { 182 - compatible = "st,stm32mp15-i2c"; 183 - #address-cells = <1>; 184 - #size-cells = <0>; 185 - reg = <0x40013000 0x400>; 186 - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 187 - <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 188 - clocks = <&rcc I2C2_K>; 189 - resets = <&rcc I2C2_R>; 190 - i2c-scl-rising-time-ns = <185>; 191 - i2c-scl-falling-time-ns = <20>; 192 - st,syscfg-fmp = <&syscfg 0x4 0x2>; 193 - }; 181 + i2c@40013000 { 182 + compatible = "st,stm32mp15-i2c"; 183 + reg = <0x40013000 0x400>; 184 + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 185 + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 186 + clocks = <&rcc I2C2_K>; 187 + resets = <&rcc I2C2_R>; 188 + i2c-scl-rising-time-ns = <185>; 189 + i2c-scl-falling-time-ns = <20>; 190 + st,syscfg-fmp = <&syscfg 0x4 0x2>; 191 + #address-cells = <1>; 192 + #size-cells = <0>; 193 + };
+6 -6
Documentation/devicetree/bindings/i2c/ti,omap4-i2c.yaml
··· 82 82 #include <dt-bindings/interrupt-controller/arm-gic.h> 83 83 84 84 main_i2c0: i2c@2000000 { 85 - compatible = "ti,j721e-i2c", "ti,omap4-i2c"; 86 - reg = <0x2000000 0x100>; 87 - interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; 88 - #address-cells = <1>; 89 - #size-cells = <0>; 90 - }; 85 + compatible = "ti,j721e-i2c", "ti,omap4-i2c"; 86 + reg = <0x2000000 0x100>; 87 + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; 88 + #address-cells = <1>; 89 + #size-cells = <0>; 90 + };