Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

stmmac: update driver documentation

Recently many changes have been done inside the driver
so this patch updates the driver's doc for example reviewing
information for the rx and tx processes that are managed
by napi method, adding new information for missing glue-logic files
etc.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Giuseppe CAVALLARO and committed by
David S. Miller
233b36cf 355a901e

+65 -67
+65 -67
Documentation/networking/stmmac.txt
··· 1 1 STMicroelectronics 10/100/1000 Synopsys Ethernet driver 2 2 3 - Copyright (C) 2007-2013 STMicroelectronics Ltd 3 + Copyright (C) 2007-2014 STMicroelectronics Ltd 4 4 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 5 5 6 6 This is the driver for the MAC 10/100/1000 on-chip Ethernet controllers 7 7 (Synopsys IP blocks). 8 8 9 - Currently this network device driver is for all STM embedded MAC/GMAC 9 + Currently this network device driver is for all STi embedded MAC/GMAC 10 10 (i.e. 7xxx/5xxx SoCs), SPEAr (arm), Loongson1B (mips) and XLINX XC2V3000 11 11 FF1152AMT0221 D1215994A VIRTEX FPGA board. 12 12 ··· 21 21 The kernel configuration option is STMMAC_ETH: 22 22 Device Drivers ---> Network device support ---> Ethernet (1000 Mbit) ---> 23 23 STMicroelectronics 10/100/1000 Ethernet driver (STMMAC_ETH) 24 + 25 + CONFIG_STMMAC_PLATFORM: is to enable the platform driver. 26 + CONFIG_STMMAC_PCI: is to enable the pci driver. 24 27 25 28 2) Driver parameters list: 26 29 debug: message level (0: no output, 16: all); ··· 48 45 The xmit method is invoked when the kernel needs to transmit a packet; it sets 49 46 the descriptors in the ring and informs the DMA engine that there is a packet 50 47 ready to be transmitted. 51 - Once the controller has finished transmitting the packet, an interrupt is 52 - triggered; So the driver will be able to release the socket buffers. 53 48 By default, the driver sets the NETIF_F_SG bit in the features field of the 54 - net_device structure enabling the scatter/gather feature. 49 + net_device structure enabling the scatter-gather feature. This is true on 50 + chips and configurations where the checksum can be done in hardware. 51 + Once the controller has finished transmitting the packet, napi will be 52 + scheduled to release the transmit resources. 55 53 56 54 4.2) Receive process 57 55 When one or more packets are received, an interrupt happens. The interrupts ··· 62 58 to be done, and it exits. 63 59 Then the poll method will be scheduled at some future point. 64 60 The incoming packets are stored, by the DMA, in a list of pre-allocated socket 65 - buffers in order to avoid the memcpy (Zero-copy). 61 + buffers in order to avoid the memcpy (zero-copy). 66 62 67 63 4.3) Interrupt Mitigation 68 64 The driver is able to mitigate the number of its DMA interrupts 69 65 using NAPI for the reception on chips older than the 3.50. 70 66 New chips have an HW RX-Watchdog used for this mitigation. 71 - 72 - On Tx-side, the mitigation schema is based on a SW timer that calls the 73 - tx function (stmmac_tx) to reclaim the resource after transmitting the 74 - frames. 75 - Also there is another parameter (like a threshold) used to program 76 - the descriptors avoiding to set the interrupt on completion bit in 77 - when the frame is sent (xmit). 78 - 79 67 Mitigation parameters can be tuned by ethtool. 80 68 81 69 4.4) WOL ··· 75 79 GMAC core. 76 80 77 81 4.5) DMA descriptors 78 - Driver handles both normal and enhanced descriptors. The latter has been only 82 + Driver handles both normal and alternate descriptors. The latter has been only 79 83 tested on DWC Ether MAC 10/100/1000 Universal version 3.41a and later. 80 84 81 85 STMMAC supports DMA descriptor to operate both in dual buffer (RING) ··· 87 91 the list, hence creating the explicit chaining in the descriptor itself, 88 92 whereas such explicit chaining is not possible in RING mode. 89 93 94 + 4.5.1) Extended descriptors 95 + The extended descriptors give us information about the Ethernet payload 96 + when it is carrying PTP packets or TCP/UDP/ICMP over IP. 97 + These are not available on GMAC Synopsys chips older than the 3.50. 98 + At probe time the driver will decide if these can be actually used. 99 + This support also is mandatory for PTPv2 because the extra descriptors 100 + are used for saving the hardware timestamps and Extended Status. 101 + 90 102 4.6) Ethtool support 91 - Ethtool is supported. Driver statistics and internal errors can be taken using: 92 - ethtool -S ethX command. It is possible to dump registers etc. 103 + Ethtool is supported. 104 + 105 + For example, driver statistics (including RMON), internal errors can be taken 106 + using: 107 + # ethtool -S ethX command 93 108 94 109 4.7) Jumbo and Segmentation Offloading 95 110 Jumbo frames are supported and tested for the GMAC. ··· 108 101 LRO is not supported. 109 102 110 103 4.8) Physical 111 - The driver is compatible with PAL to work with PHY and GPHY devices. 104 + The driver is compatible with Physical Abstraction Layer to be connected with 105 + PHY and GPHY devices. 112 106 113 107 4.9) Platform information 114 - Several driver's information can be passed through the platform 115 - These are included in the include/linux/stmmac.h header file 116 - and detailed below as well: 108 + Several information can be passed through the platform and device-tree. 117 109 118 110 struct plat_stmmacenet_data { 119 111 char *phy_bus_name; ··· 131 125 int force_sf_dma_mode; 132 126 int force_thresh_dma_mode; 133 127 int riwt_off; 128 + int max_speed; 129 + int maxmtu; 134 130 void (*fix_mac_speed)(void *priv, unsigned int speed); 135 131 void (*bus_setup)(void __iomem *ioaddr); 136 132 void *(*setup)(struct platform_device *pdev); 133 + void (*free)(struct platform_device *pdev, void *priv); 137 134 int (*init)(struct platform_device *pdev, void *priv); 138 135 void (*exit)(struct platform_device *pdev, void *priv); 139 136 void *custom_cfg; 140 137 void *custom_data; 141 138 void *bsp_priv; 142 - }; 139 + }; 143 140 144 141 Where: 145 142 o phy_bus_name: phy bus name to attach to the stmmac. ··· 267 258 by using the stmmac_mdio_bus_data structure (to provide the id, the 268 259 reset procedure etc). 269 260 270 - 4.10) List of source files: 271 - o Kconfig 272 - o Makefile 273 - o stmmac_main.c: main network device driver; 274 - o stmmac_mdio.c: mdio functions; 275 - o stmmac_pci: PCI driver; 276 - o stmmac_platform.c: platform driver 277 - o stmmac_ethtool.c: ethtool support; 278 - o stmmac_timer.[ch]: timer code used for mitigating the driver dma interrupts 279 - (only tested on ST40 platforms based); 261 + Note that, starting from new chips, where it is available the HW capability 262 + register, many configurations are discovered at run-time for example to 263 + understand if EEE, HW csum, PTP, enhanced descriptor etc are actually 264 + available. As strategy adopted in this driver, the information from the HW 265 + capability register can replace what has been passed from the platform. 266 + 267 + 4.10) Device-tree support. 268 + 269 + Please see the following document: 270 + Documentation/devicetree/bindings/net/stmmac.txt 271 + 272 + and the stmmac_of_data structure inside the include/linux/stmmac.h header file. 273 + 274 + 4.11) This is a summary of the content of some relevant files: 275 + o stmmac_main.c: to implement the main network device driver; 276 + o stmmac_mdio.c: to provide mdio functions; 277 + o stmmac_pci: this the PCI driver; 278 + o stmmac_platform.c: this the platform driver (OF supported) 279 + o stmmac_ethtool.c: to implement the ethtool support; 280 280 o stmmac.h: private driver structure; 281 281 o common.h: common definitions and VFTs; 282 282 o descs.h: descriptor structure definitions; 283 - o dwmac1000_core.c: GMAC core functions; 284 - o dwmac1000_dma.c: dma functions for the GMAC chip; 285 - o dwmac1000.h: specific header file for the GMAC; 286 - o dwmac100_core: MAC 100 core and dma code; 287 - o dwmac100_dma.c: dma functions for the MAC chip; 283 + o dwmac1000_core.c: dwmac GiGa core functions; 284 + o dwmac1000_dma.c: dma functions for the GMAC chip; 285 + o dwmac1000.h: specific header file for the dwmac GiGa; 286 + o dwmac100_core: dwmac 100 core code; 287 + o dwmac100_dma.c: dma functions for the dwmac 100 chip; 288 288 o dwmac1000.h: specific header file for the MAC; 289 - o dwmac_lib.c: generic DMA functions shared among chips; 289 + o dwmac_lib.c: generic DMA functions; 290 290 o enh_desc.c: functions for handling enhanced descriptors; 291 291 o norm_desc.c: functions for handling normal descriptors; 292 292 o chain_mode.c/ring_mode.c:: functions to manage RING/CHAINED modes; 293 293 o mmc_core.c/mmc.h: Management MAC Counters; 294 - o stmmac_hwtstamp.c: HW timestamp support for PTP 295 - o stmmac_ptp.c: PTP 1588 clock 294 + o stmmac_hwtstamp.c: HW timestamp support for PTP; 295 + o stmmac_ptp.c: PTP 1588 clock; 296 + o dwmac-<XXX>.c: these are for the platform glue-logic file; e.g. dwmac-sti.c 297 + for STMicroelectronics SoCs. 296 298 297 299 5) Debug Information 298 300 ··· 318 298 (that shows the Management counters (MMC) if supported) 319 299 or sees the MAC/DMA registers: e.g. using: ethtool -d ethX 320 300 321 - Compiling the Kernel with CONFIG_DEBUG_FS and enabling the 322 - STMMAC_DEBUG_FS option the driver will export the following 301 + Compiling the Kernel with CONFIG_DEBUG_FS the driver will export the following 323 302 debugfs entries: 324 303 325 304 /sys/kernel/debug/stmmaceth/descriptors_status 326 305 To show the DMA TX/RX descriptor rings 327 306 328 - Developer can also use the "debug" module parameter to get 329 - further debug information. 330 - 331 - In the end, there are other macros (that cannot be enabled 332 - via menuconfig) to turn-on the RX/TX DMA debugging, 333 - specific MAC core debug printk etc. Others to enable the 334 - debug in the TX and RX processes. 335 - All these are only useful during the developing stage 336 - and should never enabled inside the code for general usage. 337 - In fact, these can generate an huge amount of debug messages. 307 + Developer can also use the "debug" module parameter to get further debug 308 + information (please see: NETIF Msg Level). 338 309 339 310 6) Energy Efficient Ethernet 340 311 ··· 348 337 that enable and disable the LPI mode when there is nothing to be 349 338 transmitted. 350 339 351 - 7) Extended descriptors 352 - The extended descriptors give us information about the receive Ethernet payload 353 - when it is carrying PTP packets or TCP/UDP/ICMP over IP. 354 - These are not available on GMAC Synopsys chips older than the 3.50. 355 - At probe time the driver will decide if these can be actually used. 356 - This support also is mandatory for PTPv2 because the extra descriptors 6 and 7 357 - are used for saving the hardware timestamps. 358 - 359 - 8) Precision Time Protocol (PTP) 340 + 7) Precision Time Protocol (PTP) 360 341 The driver supports the IEEE 1588-2002, Precision Time Protocol (PTP), 361 342 which enables precise synchronization of clocks in measurement and 362 343 control systems implemented with technologies such as network ··· 358 355 Timestamps, new GMAC cores support the advanced timestamp features. 359 356 IEEE 1588-2008 that can be enabled when configure the Kernel. 360 357 361 - 9) SGMII/RGMII supports 358 + 8) SGMII/RGMII supports 362 359 New GMAC devices provide own way to manage RGMII/SGMII. 363 360 This information is available at run-time by looking at the 364 361 HW capability register. This means that the stmmac can manage ··· 367 364 restart the ANE, verify Full/Half duplex mode and Speed. 368 365 Also thanks to these registers it is possible to look at the 369 366 Auto-negotiated Link Parter Ability. 370 - 371 - 10) TODO: 372 - o XGMAC is not supported. 373 - o Complete the TBI & RTBI support. 374 - o extend VLAN support for 3.70a SYNP GMAC.