Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

MIPS: ath79: Use a helper function to get system clock rates

The ath79 platform uses similar code to get the
rate of various clocks during init. Separate the
similar code into a new helper function and use
that to avoid code duplication.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5778/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

Gabor Juhos and committed by
Ralf Baechle
23107802 837f036c

+25 -11
+16
arch/mips/ath79/clock.c
··· 400 400 (ath79_ref_clk.rate / 1000) % 1000); 401 401 } 402 402 403 + unsigned long __init 404 + ath79_get_sys_clk_rate(const char *id) 405 + { 406 + struct clk *clk; 407 + unsigned long rate; 408 + 409 + clk = clk_get(NULL, id); 410 + if (IS_ERR(clk)) 411 + panic("unable to get %s clock, err=%d", id, (int) PTR_ERR(clk)); 412 + 413 + rate = clk_get_rate(clk); 414 + clk_put(clk); 415 + 416 + return rate; 417 + } 418 + 403 419 /* 404 420 * Linux clock API 405 421 */
+2
arch/mips/ath79/common.h
··· 21 21 #define ATH79_MEM_SIZE_MAX (128 * 1024 * 1024) 22 22 23 23 void ath79_clocks_init(void); 24 + unsigned long ath79_get_sys_clk_rate(const char *id); 25 + 24 26 void ath79_ddr_wb_flush(unsigned int reg); 25 27 26 28 void ath79_gpio_function_enable(u32 mask);
+4 -6
arch/mips/ath79/dev-common.c
··· 81 81 82 82 void __init ath79_register_uart(void) 83 83 { 84 - struct clk *clk; 84 + unsigned long uart_clk_rate; 85 85 86 - clk = clk_get(NULL, "uart"); 87 - if (IS_ERR(clk)) 88 - panic("unable to get UART clock, err=%ld", PTR_ERR(clk)); 86 + uart_clk_rate = ath79_get_sys_clk_rate("uart"); 89 87 90 88 if (soc_is_ar71xx() || 91 89 soc_is_ar724x() || 92 90 soc_is_ar913x() || 93 91 soc_is_ar934x() || 94 92 soc_is_qca955x()) { 95 - ath79_uart_data[0].uartclk = clk_get_rate(clk); 93 + ath79_uart_data[0].uartclk = uart_clk_rate; 96 94 platform_device_register(&ath79_uart_device); 97 95 } else if (soc_is_ar933x()) { 98 - ar933x_uart_data.uartclk = clk_get_rate(clk); 96 + ar933x_uart_data.uartclk = uart_clk_rate; 99 97 platform_device_register(&ar933x_uart_device); 100 98 } else { 101 99 BUG();
+3 -5
arch/mips/ath79/setup.c
··· 209 209 210 210 void __init plat_time_init(void) 211 211 { 212 - struct clk *clk; 212 + unsigned long cpu_clk_rate; 213 213 214 - clk = clk_get(NULL, "cpu"); 215 - if (IS_ERR(clk)) 216 - panic("unable to get CPU clock, err=%ld", PTR_ERR(clk)); 214 + cpu_clk_rate = ath79_get_sys_clk_rate("cpu"); 217 215 218 - mips_hpt_frequency = clk_get_rate(clk) / 2; 216 + mips_hpt_frequency = cpu_clk_rate / 2; 219 217 } 220 218 221 219 static int __init ath79_setup(void)