Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

powerpc/fsl: Add PCI node in device tree of bsc9132qds

Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>

authored by

Harninder Rai and committed by
Scott Wood
230dd605 7aa1aa6e

+44
+15
arch/powerpc/boot/dts/fsl/bsc9132qds.dts
··· 29 29 soc: soc@ff700000 { 30 30 ranges = <0x0 0x0 0xff700000 0x100000>; 31 31 }; 32 + 33 + pci0: pcie@ff70a000 { 34 + reg = <0 0xff70a000 0 0x1000>; 35 + ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x20000000 36 + 0x1000000 0x0 0x00000000 0 0xc0010000 0x0 0x10000>; 37 + pcie@0 { 38 + ranges = <0x2000000 0x0 0x90000000 39 + 0x2000000 0x0 0x90000000 40 + 0x0 0x20000000 41 + 42 + 0x1000000 0x0 0x0 43 + 0x1000000 0x0 0x0 44 + 0x0 0x100000>; 45 + }; 46 + }; 32 47 }; 33 48 34 49 /include/ "bsc9132qds.dtsi"
+28
arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
··· 40 40 interrupts = <16 2 0 0 20 2 0 0>; 41 41 }; 42 42 43 + /* controller at 0xa000 */ 44 + &pci0 { 45 + compatible = "fsl,bsc9132-pcie", "fsl,qoriq-pcie-v2.2"; 46 + device_type = "pci"; 47 + #size-cells = <2>; 48 + #address-cells = <3>; 49 + bus-range = <0 255>; 50 + interrupts = <16 2 0 0>; 51 + 52 + pcie@0 { 53 + reg = <0 0 0 0 0>; 54 + #interrupt-cells = <1>; 55 + #size-cells = <2>; 56 + #address-cells = <3>; 57 + device_type = "pci"; 58 + interrupts = <16 2 0 0>; 59 + interrupt-map-mask = <0xf800 0 0 7>; 60 + 61 + interrupt-map = < 62 + /* IDSEL 0x0 */ 63 + 0000 0x0 0x0 0x1 &mpic 0x0 0x2 0x0 0x0 64 + 0000 0x0 0x0 0x2 &mpic 0x1 0x2 0x0 0x0 65 + 0000 0x0 0x0 0x3 &mpic 0x2 0x2 0x0 0x0 66 + 0000 0x0 0x0 0x4 &mpic 0x3 0x2 0x0 0x0 67 + >; 68 + }; 69 + }; 70 + 43 71 &soc { 44 72 #address-cells = <1>; 45 73 #size-cells = <1>;
+1
arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
··· 45 45 serial0 = &serial0; 46 46 ethernet0 = &enet0; 47 47 ethernet1 = &enet1; 48 + pci0 = &pci0; 48 49 }; 49 50 50 51 cpus {