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linux
[ARM] vfp: make fpexc bit names less verbose
Use the fpexc abbreviated names instead of long verbose names
for fpexc bits.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
authored by
Russell King
and committed by
Russell King
228adef1
21d1ca04
+14
-14
+6
-6
arch/arm/vfp/vfphw.S
+6
-6
arch/arm/vfp/vfphw.S
···
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VFPFMRX r1, FPEXC @ Is the VFP enabled?
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DBGSTR1 "fpexc %08x", r1
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-
tst r1, #FPEXC_ENABLE
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tst r1, #FPEXC_EN
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bne look_for_VFP_exceptions @ VFP is already enabled
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DBGSTR1 "enable %x", r10
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ldr r3, last_VFP_context_address
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orr r1, r1, #FPEXC_ENABLE @ user FPEXC has the enable bit set
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orr r1, r1, #FPEXC_EN @ user FPEXC has the enable bit set
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ldr r4, [r3, r11, lsl #2] @ last_VFP_context pointer
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bic r5, r1, #FPEXC_EXCEPTION @ make sure exceptions are disabled
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bic r5, r1, #FPEXC_EX @ make sure exceptions are disabled
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cmp r4, r10
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beq check_for_exception @ we are returning to the same
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@ process, so the registers are
···
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VFPFMXR FPSCR, r5 @ restore status
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check_for_exception:
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tst r1, #FPEXC_EXCEPTION
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tst r1, #FPEXC_EX
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bne process_exception @ might as well handle the pending
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@ exception before retrying branch
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@ out before setting an FPEXC that
···
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look_for_VFP_exceptions:
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tst r1, #FPEXC_EXCEPTION
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tst r1, #FPEXC_EX
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bne process_exception
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VFPFMRX r5, FPSCR
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tst r5, #FPSCR_IXE @ IXE doesn't set FPEXC_EXCEPTION !
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tst r5, #FPSCR_IXE @ IXE doesn't set FPEXC_EX !
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bne process_exception
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@ Fall into hand on to next handler - appropriate coproc instr
+6
-6
arch/arm/vfp/vfpmodule.c
+6
-6
arch/arm/vfp/vfpmodule.c
···
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* case the thread migrates to a different CPU. The
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* restoring is done lazily.
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*/
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if ((fpexc & FPEXC_ENABLE) && last_VFP_context[cpu]) {
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if ((fpexc & FPEXC_EN) && last_VFP_context[cpu]) {
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vfp_save_state(last_VFP_context[cpu], fpexc);
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last_VFP_context[cpu]->hard.cpu = cpu;
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}
···
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* Always disable VFP so we can lazily save/restore the
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* old state.
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*/
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fmxr(FPEXC, fpexc & ~FPEXC_ENABLE);
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fmxr(FPEXC, fpexc & ~FPEXC_EN);
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return NOTIFY_DONE;
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}
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···
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*/
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memset(vfp, 0, sizeof(union vfp_state));
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vfp->hard.fpexc = FPEXC_ENABLE;
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vfp->hard.fpexc = FPEXC_EN;
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vfp->hard.fpscr = FPSCR_ROUND_NEAREST;
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/*
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* Disable VFP to ensure we initialise it first.
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*/
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fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE);
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fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
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}
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/* flush and release case: Per-thread VFP cleanup. */
···
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/*
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* Enable access to the VFP so we can handle the bounce.
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*/
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fmxr(FPEXC, fpexc & ~(FPEXC_EXCEPTION|FPEXC_INV|FPEXC_UFC|FPEXC_IOC));
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fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_INV|FPEXC_UFC|FPEXC_IOC));
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orig_fpscr = fpscr = fmrx(FPSCR);
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···
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/*
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* Modify fpscr to indicate the number of iterations remaining
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*/
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if (fpexc & FPEXC_EXCEPTION) {
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if (fpexc & FPEXC_EX) {
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u32 len;
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len = fpexc + (1 << FPEXC_LENGTH_BIT);
+2
-2
include/asm-arm/vfp.h
+2
-2
include/asm-arm/vfp.h