Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Revert "ARM: sa1100: Refactor mcp-sa11x0 to use platform resources."

This reverts commit af9081ae64b941d32239b947882cd59ba855c5db.

This revert is necessary to revert 5dd7bf59e0e8563265b3e5b33276099ef628fcc7.

+53 -176
-11
arch/arm/mach-sa1100/assabet.c
··· 253 253 sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources, 254 254 ARRAY_SIZE(assabet_flash_resources)); 255 255 sa11x0_register_irda(&assabet_irda_data); 256 - 257 - /* 258 - * Setup the PPC unit correctly. 259 - */ 260 - PPDR &= ~PPC_RXD4; 261 - PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; 262 - PSDR |= PPC_RXD4; 263 - PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 264 - PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 265 - 266 - ASSABET_BCR_set(ASSABET_BCR_CODEC_RST); 267 256 sa11x0_register_mcp(&assabet_mcp_data); 268 257 } 269 258
-10
arch/arm/mach-sa1100/cerf.c
··· 131 131 { 132 132 platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices)); 133 133 sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1); 134 - 135 - /* 136 - * Setup the PPC unit correctly. 137 - */ 138 - PPDR &= ~PPC_RXD4; 139 - PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; 140 - PSDR |= PPC_RXD4; 141 - PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 142 - PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 143 - 144 134 sa11x0_register_mcp(&cerf_mcp_data); 145 135 } 146 136
-10
arch/arm/mach-sa1100/collie.c
··· 357 357 358 358 sa11x0_register_mtd(&collie_flash_data, collie_flash_resources, 359 359 ARRAY_SIZE(collie_flash_resources)); 360 - 361 - /* 362 - * Setup the PPC unit correctly. 363 - */ 364 - PPDR &= ~PPC_RXD4; 365 - PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; 366 - PSDR |= PPC_RXD4; 367 - PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 368 - PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 369 - 370 360 sa11x0_register_mcp(&collie_mcp_data); 371 361 372 362 sharpsl_save_param();
+1 -6
arch/arm/mach-sa1100/generic.c
··· 217 217 static struct resource sa11x0mcp_resources[] = { 218 218 [0] = { 219 219 .start = __PREG(Ser4MCCR0), 220 - .end = __PREG(Ser4MCCR0) + 0x1C - 1, 220 + .end = __PREG(Ser4MCCR0) + 0xffff, 221 221 .flags = IORESOURCE_MEM, 222 222 }, 223 223 [1] = { 224 - .start = __PREG(Ser4MCCR1), 225 - .end = __PREG(Ser4MCCR1) + 0x4 - 1, 226 - .flags = IORESOURCE_MEM, 227 - }, 228 - [2] = { 229 224 .start = IRQ_Ser4MCP, 230 225 .end = IRQ_Ser4MCP, 231 226 .flags = IORESOURCE_IRQ,
-9
arch/arm/mach-sa1100/lart.c
··· 29 29 30 30 static void __init lart_init(void) 31 31 { 32 - /* 33 - * Setup the PPC unit correctly. 34 - */ 35 - PPDR &= ~PPC_RXD4; 36 - PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; 37 - PSDR |= PPC_RXD4; 38 - PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 39 - PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 40 - 41 32 sa11x0_register_mcp(&lart_mcp_data); 42 33 } 43 34
-10
arch/arm/mach-sa1100/shannon.c
··· 61 61 static void __init shannon_init(void) 62 62 { 63 63 sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1); 64 - 65 - /* 66 - * Setup the PPC unit correctly. 67 - */ 68 - PPDR &= ~PPC_RXD4; 69 - PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; 70 - PSDR |= PPC_RXD4; 71 - PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 72 - PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 73 - 74 64 sa11x0_register_mcp(&shannon_mcp_data); 75 65 } 76 66
-10
arch/arm/mach-sa1100/simpad.c
··· 384 384 385 385 sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources, 386 386 ARRAY_SIZE(simpad_flash_resources)); 387 - 388 - /* 389 - * Setup the PPC unit correctly. 390 - */ 391 - PPDR &= ~PPC_RXD4; 392 - PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; 393 - PSDR |= PPC_RXD4; 394 - PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 395 - PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 396 - 397 387 sa11x0_register_mcp(&simpad_mcp_data); 398 388 399 389 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
+52 -110
drivers/mfd/mcp-sa11x0.c
··· 19 19 #include <linux/spinlock.h> 20 20 #include <linux/platform_device.h> 21 21 #include <linux/mfd/mcp.h> 22 - #include <linux/io.h> 23 22 24 23 #include <mach/dma.h> 25 24 #include <mach/hardware.h> ··· 26 27 #include <asm/system.h> 27 28 #include <mach/mcp.h> 28 29 29 - /* Register offsets */ 30 - #define MCCR0 0x00 31 - #define MCDR0 0x08 32 - #define MCDR1 0x0C 33 - #define MCDR2 0x10 34 - #define MCSR 0x18 35 - #define MCCR1 0x00 30 + #include <mach/assabet.h> 31 + 36 32 37 33 struct mcp_sa11x0 { 38 - u32 mccr0; 39 - u32 mccr1; 40 - unsigned char *mccr0_base; 41 - unsigned char *mccr1_base; 34 + u32 mccr0; 35 + u32 mccr1; 42 36 }; 43 37 44 38 #define priv(mcp) ((struct mcp_sa11x0 *)mcp_priv(mcp)) ··· 39 47 static void 40 48 mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor) 41 49 { 42 - struct mcp_sa11x0 *priv = priv(mcp); 50 + unsigned int mccr0; 43 51 44 52 divisor /= 32; 45 53 46 - priv->mccr0 &= ~0x00007f00; 47 - priv->mccr0 |= divisor << 8; 48 - __raw_writel(priv->mccr0, priv->mccr0_base + MCCR0); 54 + mccr0 = Ser4MCCR0 & ~0x00007f00; 55 + mccr0 |= divisor << 8; 56 + Ser4MCCR0 = mccr0; 49 57 } 50 58 51 59 static void 52 60 mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor) 53 61 { 54 - struct mcp_sa11x0 *priv = priv(mcp); 62 + unsigned int mccr0; 55 63 56 64 divisor /= 32; 57 65 58 - priv->mccr0 &= ~0x0000007f; 59 - priv->mccr0 |= divisor; 60 - __raw_writel(priv->mccr0, priv->mccr0_base + MCCR0); 66 + mccr0 = Ser4MCCR0 & ~0x0000007f; 67 + mccr0 |= divisor; 68 + Ser4MCCR0 = mccr0; 61 69 } 62 70 63 71 /* ··· 71 79 { 72 80 int ret = -ETIME; 73 81 int i; 74 - u32 mcpreg; 75 - struct mcp_sa11x0 *priv = priv(mcp); 76 82 77 - mcpreg = reg << 17 | MCDR2_Wr | (val & 0xffff); 78 - __raw_writel(mcpreg, priv->mccr0_base + MCDR2); 83 + Ser4MCDR2 = reg << 17 | MCDR2_Wr | (val & 0xffff); 79 84 80 85 for (i = 0; i < 2; i++) { 81 86 udelay(mcp->rw_timeout); 82 - mcpreg = __raw_readl(priv->mccr0_base + MCSR); 83 - if (mcpreg & MCSR_CWC) { 87 + if (Ser4MCSR & MCSR_CWC) { 84 88 ret = 0; 85 89 break; 86 90 } ··· 97 109 { 98 110 int ret = -ETIME; 99 111 int i; 100 - u32 mcpreg; 101 - struct mcp_sa11x0 *priv = priv(mcp); 102 112 103 - mcpreg = reg << 17 | MCDR2_Rd; 104 - __raw_writel(mcpreg, priv->mccr0_base + MCDR2); 113 + Ser4MCDR2 = reg << 17 | MCDR2_Rd; 105 114 106 115 for (i = 0; i < 2; i++) { 107 116 udelay(mcp->rw_timeout); 108 - mcpreg = __raw_readl(priv->mccr0_base + MCSR); 109 - if (mcpreg & MCSR_CRC) { 110 - ret = __raw_readl(priv->mccr0_base + MCDR2) 111 - & 0xffff; 117 + if (Ser4MCSR & MCSR_CRC) { 118 + ret = Ser4MCDR2 & 0xffff; 112 119 break; 113 120 } 114 121 } ··· 116 133 117 134 static void mcp_sa11x0_enable(struct mcp *mcp) 118 135 { 119 - struct mcp_sa11x0 *priv = priv(mcp); 120 - 121 - __raw_writel(-1, priv->mccr0_base + MCSR); 122 - priv->mccr0 |= MCCR0_MCE; 123 - __raw_writel(priv->mccr0, priv->mccr0_base + MCCR0); 136 + Ser4MCSR = -1; 137 + Ser4MCCR0 |= MCCR0_MCE; 124 138 } 125 139 126 140 static void mcp_sa11x0_disable(struct mcp *mcp) 127 141 { 128 - struct mcp_sa11x0 *priv = priv(mcp); 129 - 130 - priv->mccr0 &= ~MCCR0_MCE; 131 - __raw_writel(priv->mccr0, priv->mccr0_base + MCCR0); 142 + Ser4MCCR0 &= ~MCCR0_MCE; 132 143 } 133 144 134 145 /* ··· 142 165 struct mcp_plat_data *data = pdev->dev.platform_data; 143 166 struct mcp *mcp; 144 167 int ret; 145 - struct mcp_sa11x0 *priv; 146 - struct resource *res_mem0, *res_mem1; 147 - u32 size0, size1; 148 168 149 169 if (!data) 150 170 return -ENODEV; ··· 149 175 if (!data->codec) 150 176 return -ENODEV; 151 177 152 - res_mem0 = platform_get_resource(pdev, IORESOURCE_MEM, 0); 153 - if (!res_mem0) 154 - return -ENODEV; 155 - size0 = res_mem0->end - res_mem0->start + 1; 156 - 157 - res_mem1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); 158 - if (!res_mem1) 159 - return -ENODEV; 160 - size1 = res_mem1->end - res_mem1->start + 1; 161 - 162 - if (!request_mem_region(res_mem0->start, size0, "sa11x0-mcp")) 178 + if (!request_mem_region(0x80060000, 0x60, "sa11x0-mcp")) 163 179 return -EBUSY; 164 - 165 - if (!request_mem_region(res_mem1->start, size1, "sa11x0-mcp")) { 166 - ret = -EBUSY; 167 - goto release; 168 - } 169 180 170 181 mcp = mcp_host_alloc(&pdev->dev, sizeof(struct mcp_sa11x0)); 171 182 if (!mcp) { 172 183 ret = -ENOMEM; 173 - goto release2; 184 + goto release; 174 185 } 175 - 176 - priv = priv(mcp); 177 186 178 187 mcp->owner = THIS_MODULE; 179 188 mcp->ops = &mcp_sa11x0; 180 189 mcp->sclk_rate = data->sclk_rate; 181 - mcp->dma_audio_rd = DDAR_DevAdd(res_mem0->start + MCDR0) 182 - + DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev; 183 - mcp->dma_audio_wr = DDAR_DevAdd(res_mem0->start + MCDR0) 184 - + DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev; 185 - mcp->dma_telco_rd = DDAR_DevAdd(res_mem0->start + MCDR1) 186 - + DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev; 187 - mcp->dma_telco_wr = DDAR_DevAdd(res_mem0->start + MCDR1) 188 - + DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev; 190 + mcp->dma_audio_rd = DMA_Ser4MCP0Rd; 191 + mcp->dma_audio_wr = DMA_Ser4MCP0Wr; 192 + mcp->dma_telco_rd = DMA_Ser4MCP1Rd; 193 + mcp->dma_telco_wr = DMA_Ser4MCP1Wr; 189 194 mcp->codec = data->codec; 190 195 191 196 platform_set_drvdata(pdev, mcp); 197 + 198 + if (machine_is_assabet()) { 199 + ASSABET_BCR_set(ASSABET_BCR_CODEC_RST); 200 + } 201 + 202 + /* 203 + * Setup the PPC unit correctly. 204 + */ 205 + PPDR &= ~PPC_RXD4; 206 + PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM; 207 + PSDR |= PPC_RXD4; 208 + PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 209 + PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM); 192 210 193 211 /* 194 212 * Initialise device. Note that we initially 195 213 * set the sampling rate to minimum. 196 214 */ 197 - priv->mccr0_base = ioremap(res_mem0->start, size0); 198 - priv->mccr1_base = ioremap(res_mem1->start, size1); 199 - 200 - __raw_writel(-1, priv->mccr0_base + MCSR); 201 - priv->mccr1 = data->mccr1; 202 - priv->mccr0 = data->mccr0 | 0x7f7f; 203 - __raw_writel(priv->mccr0, priv->mccr0_base + MCCR0); 204 - __raw_writel(priv->mccr1, priv->mccr1_base + MCCR1); 215 + Ser4MCSR = -1; 216 + Ser4MCCR1 = data->mccr1; 217 + Ser4MCCR0 = data->mccr0 | 0x7f7f; 205 218 206 219 /* 207 220 * Calculate the read/write timeout (us) from the bit clock ··· 202 241 if (ret == 0) 203 242 goto out; 204 243 205 - release2: 206 - release_mem_region(res_mem1->start, size1); 207 244 release: 208 - release_mem_region(res_mem0->start, size0); 245 + release_mem_region(0x80060000, 0x60); 209 246 platform_set_drvdata(pdev, NULL); 210 247 211 248 out: 212 249 return ret; 213 250 } 214 251 215 - static int mcp_sa11x0_remove(struct platform_device *pdev) 252 + static int mcp_sa11x0_remove(struct platform_device *dev) 216 253 { 217 - struct mcp *mcp = platform_get_drvdata(pdev); 218 - struct mcp_sa11x0 *priv = priv(mcp); 219 - struct resource *res_mem; 220 - u32 size; 254 + struct mcp *mcp = platform_get_drvdata(dev); 221 255 222 - platform_set_drvdata(pdev, NULL); 256 + platform_set_drvdata(dev, NULL); 223 257 mcp_host_unregister(mcp); 258 + release_mem_region(0x80060000, 0x60); 224 259 225 - res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 226 - if (res_mem) { 227 - size = res_mem->end - res_mem->start + 1; 228 - release_mem_region(res_mem->start, size); 229 - } 230 - res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); 231 - if (res_mem) { 232 - size = res_mem->end - res_mem->start + 1; 233 - release_mem_region(res_mem->start, size); 234 - } 235 - iounmap(priv->mccr0_base); 236 - iounmap(priv->mccr1_base); 237 260 return 0; 238 261 } 239 262 240 263 static int mcp_sa11x0_suspend(struct platform_device *dev, pm_message_t state) 241 264 { 242 265 struct mcp *mcp = platform_get_drvdata(dev); 243 - struct mcp_sa11x0 *priv = priv(mcp); 244 - u32 mccr0; 245 266 246 - mccr0 = priv->mccr0 & ~MCCR0_MCE; 247 - __raw_writel(mccr0, priv->mccr0_base + MCCR0); 267 + priv(mcp)->mccr0 = Ser4MCCR0; 268 + priv(mcp)->mccr1 = Ser4MCCR1; 269 + Ser4MCCR0 &= ~MCCR0_MCE; 248 270 249 271 return 0; 250 272 } ··· 235 291 static int mcp_sa11x0_resume(struct platform_device *dev) 236 292 { 237 293 struct mcp *mcp = platform_get_drvdata(dev); 238 - struct mcp_sa11x0 *priv = priv(mcp); 239 294 240 - __raw_writel(priv->mccr0, priv->mccr0_base + MCCR0); 241 - __raw_writel(priv->mccr1, priv->mccr1_base + MCCR1); 295 + Ser4MCCR1 = priv(mcp)->mccr1; 296 + Ser4MCCR0 = priv(mcp)->mccr0; 242 297 243 298 return 0; 244 299 } ··· 254 311 .resume = mcp_sa11x0_resume, 255 312 .driver = { 256 313 .name = "sa11x0-mcp", 257 - .owner = THIS_MODULE, 258 314 }, 259 315 }; 260 316