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kernel os linux

dt-bindings: serial: example cleanup

Adjust example DTS indentation to match recommended style of 4-spaces
and use lower-case hex for address in reg. No functional change.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230124091916.45054-10-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Krzysztof Kozlowski and committed by
Greg Kroah-Hartman
2115a84d eec2c477

+91 -91
+9 -9
Documentation/devicetree/bindings/serial/8250_omap.yaml
··· 104 104 105 105 examples: 106 106 - | 107 - serial@49042000 { 108 - compatible = "ti,omap3-uart"; 109 - reg = <0x49042000 0x400>; 110 - interrupts = <80>; 111 - dmas = <&sdma 81 &sdma 82>; 112 - dma-names = "tx", "rx"; 113 - ti,hwmods = "uart4"; 114 - clock-frequency = <48000000>; 115 - }; 107 + serial@49042000 { 108 + compatible = "ti,omap3-uart"; 109 + reg = <0x49042000 0x400>; 110 + interrupts = <80>; 111 + dmas = <&sdma 81 &sdma 82>; 112 + dma-names = "tx", "rx"; 113 + ti,hwmods = "uart4"; 114 + clock-frequency = <48000000>; 115 + };
+5 -5
Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
··· 77 77 examples: 78 78 - | 79 79 serial@84c0 { 80 - compatible = "amlogic,meson-gx-uart"; 81 - reg = <0x84c0 0x14>; 82 - interrupts = <26>; 83 - clocks = <&xtal>, <&pclk>, <&xtal>; 84 - clock-names = "xtal", "pclk", "baud"; 80 + compatible = "amlogic,meson-gx-uart"; 81 + reg = <0x84c0 0x14>; 82 + interrupts = <26>; 83 + clocks = <&xtal>, <&pclk>, <&xtal>; 84 + clock-names = "xtal", "pclk", "baud"; 85 85 };
+5 -5
Documentation/devicetree/bindings/serial/cdns,uart.yaml
··· 69 69 examples: 70 70 - | 71 71 uart0: serial@e0000000 { 72 - compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 73 - clocks = <&clkc 23>, <&clkc 40>; 74 - clock-names = "uart_clk", "pclk"; 75 - reg = <0xE0000000 0x1000>; 76 - interrupts = <0 27 4>; 72 + compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 73 + clocks = <&clkc 23>, <&clkc 40>; 74 + clock-names = "uart_clk", "pclk"; 75 + reg = <0xe0000000 0x1000>; 76 + interrupts = <0 27 4>; 77 77 };
+5 -5
Documentation/devicetree/bindings/serial/renesas,em-uart.yaml
··· 66 66 - | 67 67 #include <dt-bindings/interrupt-controller/arm-gic.h> 68 68 uart0: serial@e1020000 { 69 - compatible = "renesas,em-uart"; 70 - reg = <0xe1020000 0x38>; 71 - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 72 - clocks = <&usia_u0_sclk>; 73 - clock-names = "sclk"; 69 + compatible = "renesas,em-uart"; 70 + reg = <0xe1020000 0x38>; 71 + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 72 + clocks = <&usia_u0_sclk>; 73 + clock-names = "sclk"; 74 74 };
+13 -13
Documentation/devicetree/bindings/serial/renesas,hscif.yaml
··· 131 131 #include <dt-bindings/interrupt-controller/arm-gic.h> 132 132 #include <dt-bindings/power/r8a7795-sysc.h> 133 133 aliases { 134 - serial1 = &hscif1; 134 + serial1 = &hscif1; 135 135 }; 136 136 137 137 hscif1: serial@e6550000 { 138 - compatible = "renesas,hscif-r8a7795", "renesas,rcar-gen3-hscif", 139 - "renesas,hscif"; 140 - reg = <0xe6550000 96>; 141 - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 142 - clocks = <&cpg CPG_MOD 519>, <&cpg CPG_CORE R8A7795_CLK_S3D1>, 143 - <&scif_clk>; 144 - clock-names = "fck", "brg_int", "scif_clk"; 145 - dmas = <&dmac1 0x33>, <&dmac1 0x32>, <&dmac2 0x33>, <&dmac2 0x32>; 146 - dma-names = "tx", "rx", "tx", "rx"; 147 - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 148 - resets = <&cpg 519>; 149 - uart-has-rtscts; 138 + compatible = "renesas,hscif-r8a7795", "renesas,rcar-gen3-hscif", 139 + "renesas,hscif"; 140 + reg = <0xe6550000 96>; 141 + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 142 + clocks = <&cpg CPG_MOD 519>, <&cpg CPG_CORE R8A7795_CLK_S3D1>, 143 + <&scif_clk>; 144 + clock-names = "fck", "brg_int", "scif_clk"; 145 + dmas = <&dmac1 0x33>, <&dmac1 0x32>, <&dmac2 0x33>, <&dmac2 0x32>; 146 + dma-names = "tx", "rx", "tx", "rx"; 147 + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 148 + resets = <&cpg 519>; 149 + uart-has-rtscts; 150 150 };
+12 -12
Documentation/devicetree/bindings/serial/renesas,sci.yaml
··· 91 91 #include <dt-bindings/interrupt-controller/arm-gic.h> 92 92 93 93 aliases { 94 - serial0 = &sci0; 94 + serial0 = &sci0; 95 95 }; 96 96 97 97 sci0: serial@1004d000 { 98 - compatible = "renesas,r9a07g044-sci", "renesas,sci"; 99 - reg = <0x1004d000 0x400>; 100 - interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 101 - <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 102 - <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 103 - <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 104 - interrupt-names = "eri", "rxi", "txi", "tei"; 105 - clocks = <&cpg CPG_MOD R9A07G044_SCI0_CLKP>; 106 - clock-names = "fck"; 107 - power-domains = <&cpg>; 108 - resets = <&cpg R9A07G044_SCI0_RST>; 98 + compatible = "renesas,r9a07g044-sci", "renesas,sci"; 99 + reg = <0x1004d000 0x400>; 100 + interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 101 + <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 102 + <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 103 + <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 104 + interrupt-names = "eri", "rxi", "txi", "tei"; 105 + clocks = <&cpg CPG_MOD R9A07G044_SCI0_CLKP>; 106 + clock-names = "fck"; 107 + power-domains = <&cpg>; 108 + resets = <&cpg R9A07G044_SCI0_RST>; 109 109 };
+12 -12
Documentation/devicetree/bindings/serial/renesas,scif.yaml
··· 180 180 #include <dt-bindings/interrupt-controller/arm-gic.h> 181 181 #include <dt-bindings/power/r8a7791-sysc.h> 182 182 aliases { 183 - serial0 = &scif0; 183 + serial0 = &scif0; 184 184 }; 185 185 186 186 scif0: serial@e6e60000 { 187 - compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", 188 - "renesas,scif"; 189 - reg = <0xe6e60000 64>; 190 - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 191 - clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 192 - <&scif_clk>; 193 - clock-names = "fck", "brg_int", "scif_clk"; 194 - dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>; 195 - dma-names = "tx", "rx", "tx", "rx"; 196 - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 197 - resets = <&cpg 721>; 187 + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", 188 + "renesas,scif"; 189 + reg = <0xe6e60000 64>; 190 + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 191 + clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 192 + <&scif_clk>; 193 + clock-names = "fck", "brg_int", "scif_clk"; 194 + dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>; 195 + dma-names = "tx", "rx", "tx", "rx"; 196 + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 197 + resets = <&cpg 721>; 198 198 };
+11 -11
Documentation/devicetree/bindings/serial/renesas,scifa.yaml
··· 95 95 #include <dt-bindings/interrupt-controller/arm-gic.h> 96 96 #include <dt-bindings/power/r8a7790-sysc.h> 97 97 aliases { 98 - serial0 = &scifa0; 98 + serial0 = &scifa0; 99 99 }; 100 100 101 101 scifa0: serial@e6c40000 { 102 - compatible = "renesas,scifa-r8a7790", "renesas,rcar-gen2-scifa", 103 - "renesas,scifa"; 104 - reg = <0xe6c40000 64>; 105 - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 106 - clocks = <&cpg CPG_MOD 204>; 107 - clock-names = "fck"; 108 - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 109 - resets = <&cpg 204>; 110 - dmas = <&dmac0 0x21>, <&dmac0 0x22>, <&dmac1 0x21>, <&dmac1 0x22>; 111 - dma-names = "tx", "rx", "tx", "rx"; 102 + compatible = "renesas,scifa-r8a7790", "renesas,rcar-gen2-scifa", 103 + "renesas,scifa"; 104 + reg = <0xe6c40000 64>; 105 + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 106 + clocks = <&cpg CPG_MOD 204>; 107 + clock-names = "fck"; 108 + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 109 + resets = <&cpg 204>; 110 + dmas = <&dmac0 0x21>, <&dmac0 0x22>, <&dmac1 0x21>, <&dmac1 0x22>; 111 + dma-names = "tx", "rx", "tx", "rx"; 112 112 };
+6 -6
Documentation/devicetree/bindings/serial/renesas,scifb.yaml
··· 94 94 #include <dt-bindings/clock/r8a7740-clock.h> 95 95 #include <dt-bindings/interrupt-controller/arm-gic.h> 96 96 scifb: serial@e6c30000 { 97 - compatible = "renesas,scifb-r8a7740", "renesas,scifb"; 98 - reg = <0xe6c30000 0x100>; 99 - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 100 - clocks = <&mstp2_clks R8A7740_CLK_SCIFB>; 101 - clock-names = "fck"; 102 - power-domains = <&pd_a3sp>; 97 + compatible = "renesas,scifb-r8a7740", "renesas,scifb"; 98 + reg = <0xe6c30000 0x100>; 99 + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 100 + clocks = <&mstp2_clks R8A7740_CLK_SCIFB>; 101 + clock-names = "fck"; 102 + power-domains = <&pd_a3sp>; 103 103 };
+8 -8
Documentation/devicetree/bindings/serial/serial.yaml
··· 141 141 examples: 142 142 - | 143 143 serial@1234 { 144 - compatible = "ns16550a"; 145 - reg = <0x1234 0x20>; 146 - interrupts = <1>; 144 + compatible = "ns16550a"; 145 + reg = <0x1234 0x20>; 146 + interrupts = <1>; 147 147 148 - bluetooth { 149 - compatible = "brcm,bcm4330-bt"; 150 - interrupt-parent = <&gpio>; 151 - interrupts = <10>; 152 - }; 148 + bluetooth { 149 + compatible = "brcm,bcm4330-bt"; 150 + interrupt-parent = <&gpio>; 151 + interrupts = <10>; 152 + }; 153 153 };
+3 -3
Documentation/devicetree/bindings/serial/sifive-serial.yaml
··· 53 53 54 54 examples: 55 55 - | 56 - #include <dt-bindings/clock/sifive-fu540-prci.h> 57 - serial@10010000 { 56 + #include <dt-bindings/clock/sifive-fu540-prci.h> 57 + serial@10010000 { 58 58 compatible = "sifive,fu540-c000-uart", "sifive,uart0"; 59 59 interrupt-parent = <&plic0>; 60 60 interrupts = <80>; 61 61 reg = <0x10010000 0x1000>; 62 62 clocks = <&prci FU540_PRCI_CLK_TLCLK>; 63 - }; 63 + }; 64 64 65 65 ...
+2 -2
Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml
··· 76 76 77 77 examples: 78 78 - | 79 - serial@800c0000 { 79 + serial@800c0000 { 80 80 compatible = "xlnx,xps-uartlite-1.00.a"; 81 81 reg = <0x800c0000 0x10000>; 82 82 interrupts = <0x0 0x6e 0x1>; ··· 84 84 current-speed = <115200>; 85 85 xlnx,data-bits = <8>; 86 86 xlnx,use-parity = <0>; 87 - }; 87 + }; 88 88 ...