Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

mtd: nand: Add a few more timings to nand_sdr_timings

Add the tR_max, tBERS_max, tPROG_max and tCCS_min timings to the
nand_sdr_timings struct.
Assign default/safe values for the statically defined timings, and
extract them from the ONFI parameter table if the NAND is ONFI
compliant.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>

+33 -1
+25 -1
drivers/mtd/nand/nand_timings.c
··· 18 18 { 19 19 .type = NAND_SDR_IFACE, 20 20 .timings.sdr = { 21 + .tCCS_min = 500000, 22 + .tR_max = 200000000, 21 23 .tADL_min = 400000, 22 24 .tALH_min = 20000, 23 25 .tALS_min = 50000, ··· 60 58 { 61 59 .type = NAND_SDR_IFACE, 62 60 .timings.sdr = { 61 + .tCCS_min = 500000, 62 + .tR_max = 200000000, 63 63 .tADL_min = 400000, 64 64 .tALH_min = 10000, 65 65 .tALS_min = 25000, ··· 102 98 { 103 99 .type = NAND_SDR_IFACE, 104 100 .timings.sdr = { 101 + .tCCS_min = 500000, 102 + .tR_max = 200000000, 105 103 .tADL_min = 400000, 106 104 .tALH_min = 10000, 107 105 .tALS_min = 15000, ··· 144 138 { 145 139 .type = NAND_SDR_IFACE, 146 140 .timings.sdr = { 141 + .tCCS_min = 500000, 142 + .tR_max = 200000000, 147 143 .tADL_min = 400000, 148 144 .tALH_min = 5000, 149 145 .tALS_min = 10000, ··· 186 178 { 187 179 .type = NAND_SDR_IFACE, 188 180 .timings.sdr = { 181 + .tCCS_min = 500000, 182 + .tR_max = 200000000, 189 183 .tADL_min = 400000, 190 184 .tALH_min = 5000, 191 185 .tALS_min = 10000, ··· 228 218 { 229 219 .type = NAND_SDR_IFACE, 230 220 .timings.sdr = { 221 + .tCCS_min = 500000, 222 + .tR_max = 200000000, 231 223 .tADL_min = 400000, 232 224 .tALH_min = 5000, 233 225 .tALS_min = 10000, ··· 302 290 *iface = onfi_sdr_timings[timing_mode]; 303 291 304 292 /* 305 - * TODO: initialize timings that cannot be deduced from timing mode: 293 + * Initialize timings that cannot be deduced from timing mode: 306 294 * tR, tPROG, tCCS, ... 307 295 * These information are part of the ONFI parameter page. 308 296 */ 297 + if (chip->onfi_version) { 298 + struct nand_onfi_params *params = &chip->onfi_params; 299 + struct nand_sdr_timings *timings = &iface->timings.sdr; 300 + 301 + /* microseconds -> picoseconds */ 302 + timings->tPROG_max = 1000000UL * le16_to_cpu(params->t_prog); 303 + timings->tBERS_max = 1000000UL * le16_to_cpu(params->t_bers); 304 + timings->tR_max = 1000000UL * le16_to_cpu(params->t_r); 305 + 306 + /* nanoseconds -> picoseconds */ 307 + timings->tCCS_min = 1000UL * le16_to_cpu(params->t_ccs); 308 + } 309 309 310 310 return 0; 311 311 }
+8
include/linux/mtd/nand.h
··· 584 584 * 585 585 * All these timings are expressed in picoseconds. 586 586 * 587 + * @tBERS_max: Block erase time 588 + * @tCCS_min: Change column setup time 589 + * @tPROG_max: Page program time 590 + * @tR_max: Page read time 587 591 * @tALH_min: ALE hold time 588 592 * @tADL_min: ALE to data loading time 589 593 * @tALS_min: ALE setup time ··· 625 621 * @tWW_min: WP# transition to WE# low 626 622 */ 627 623 struct nand_sdr_timings { 624 + u32 tBERS_max; 625 + u32 tCCS_min; 626 + u32 tPROG_max; 627 + u32 tR_max; 628 628 u32 tALH_min; 629 629 u32 tADL_min; 630 630 u32 tALS_min;