drm/msm/dp: replace DRM_DEBUG_DP marco with drm_dbg_dp

+33 -17

drivers/gpu/drm/msm/dp/dp_audio.c

··· 26 26 struct dp_audio_private { 27 27 struct platform_device *audio_pdev; 28 28 struct platform_device *pdev; 29 + struct drm_device *drm_dev; 29 30 struct dp_catalog *catalog; 30 31 struct dp_panel *panel; 31 32 ··· 137 136 parity_byte = dp_audio_calculate_parity(new_value); 138 137 value |= ((new_value << HEADER_BYTE_1_BIT) 139 138 | (parity_byte << PARITY_BYTE_1_BIT)); 140 - DRM_DEBUG_DP("Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", 139 + drm_dbg_dp(audio->drm_dev, 140 + "Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", 141 141 value, parity_byte); 142 142 dp_audio_set_header(catalog, value, 143 143 DP_AUDIO_SDP_STREAM, DP_AUDIO_SDP_HEADER_1); ··· 150 148 parity_byte = dp_audio_calculate_parity(new_value); 151 149 value |= ((new_value << HEADER_BYTE_2_BIT) 152 150 | (parity_byte << PARITY_BYTE_2_BIT)); 153 - DRM_DEBUG_DP("Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", 151 + drm_dbg_dp(audio->drm_dev, 152 + "Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", 154 153 value, parity_byte); 155 154 156 155 dp_audio_set_header(catalog, value, ··· 165 162 parity_byte = dp_audio_calculate_parity(new_value); 166 163 value |= ((new_value << HEADER_BYTE_3_BIT) 167 164 | (parity_byte << PARITY_BYTE_3_BIT)); 168 - DRM_DEBUG_DP("Header Byte 3: value = 0x%x, parity_byte = 0x%x\n", 165 + drm_dbg_dp(audio->drm_dev, 166 + "Header Byte 3: value = 0x%x, parity_byte = 0x%x\n", 169 167 value, parity_byte); 170 168 171 169 dp_audio_set_header(catalog, value, ··· 187 183 parity_byte = dp_audio_calculate_parity(new_value); 188 184 value |= ((new_value << HEADER_BYTE_1_BIT) 189 185 | (parity_byte << PARITY_BYTE_1_BIT)); 190 - DRM_DEBUG_DP("Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", 191 - value, parity_byte); 186 + drm_dbg_dp(audio->drm_dev, 187 + "Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", 188 + value, parity_byte); 192 189 dp_audio_set_header(catalog, value, 193 190 DP_AUDIO_SDP_TIMESTAMP, DP_AUDIO_SDP_HEADER_1); 194 191 ··· 201 196 parity_byte = dp_audio_calculate_parity(new_value); 202 197 value |= ((new_value << HEADER_BYTE_2_BIT) 203 198 | (parity_byte << PARITY_BYTE_2_BIT)); 204 - DRM_DEBUG_DP("Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", 199 + drm_dbg_dp(audio->drm_dev, 200 + "Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", 205 201 value, parity_byte); 206 202 dp_audio_set_header(catalog, value, 207 203 DP_AUDIO_SDP_TIMESTAMP, DP_AUDIO_SDP_HEADER_2); ··· 215 209 parity_byte = dp_audio_calculate_parity(new_value); 216 210 value |= ((new_value << HEADER_BYTE_3_BIT) 217 211 | (parity_byte << PARITY_BYTE_3_BIT)); 218 - DRM_DEBUG_DP("Header Byte 3: value = 0x%x, parity_byte = 0x%x\n", 212 + drm_dbg_dp(audio->drm_dev, 213 + "Header Byte 3: value = 0x%x, parity_byte = 0x%x\n", 219 214 value, parity_byte); 220 215 dp_audio_set_header(catalog, value, 221 216 DP_AUDIO_SDP_TIMESTAMP, DP_AUDIO_SDP_HEADER_3); ··· 236 229 parity_byte = dp_audio_calculate_parity(new_value); 237 230 value |= ((new_value << HEADER_BYTE_1_BIT) 238 231 | (parity_byte << PARITY_BYTE_1_BIT)); 239 - DRM_DEBUG_DP("Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", 232 + drm_dbg_dp(audio->drm_dev, 233 + "Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", 240 234 value, parity_byte); 241 235 dp_audio_set_header(catalog, value, 242 236 DP_AUDIO_SDP_INFOFRAME, DP_AUDIO_SDP_HEADER_1); ··· 250 242 parity_byte = dp_audio_calculate_parity(new_value); 251 243 value |= ((new_value << HEADER_BYTE_2_BIT) 252 244 | (parity_byte << PARITY_BYTE_2_BIT)); 253 - DRM_DEBUG_DP("Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", 245 + drm_dbg_dp(audio->drm_dev, 246 + "Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", 254 247 value, parity_byte); 255 248 dp_audio_set_header(catalog, value, 256 249 DP_AUDIO_SDP_INFOFRAME, DP_AUDIO_SDP_HEADER_2); ··· 264 255 parity_byte = dp_audio_calculate_parity(new_value); 265 256 value |= ((new_value << HEADER_BYTE_3_BIT) 266 257 | (parity_byte << PARITY_BYTE_3_BIT)); 267 - DRM_DEBUG_DP("Header Byte 3: value = 0x%x, parity_byte = 0x%x\n", 258 + drm_dbg_dp(audio->drm_dev, 259 + "Header Byte 3: value = 0x%x, parity_byte = 0x%x\n", 268 260 new_value, parity_byte); 269 261 dp_audio_set_header(catalog, value, 270 262 DP_AUDIO_SDP_INFOFRAME, DP_AUDIO_SDP_HEADER_3); ··· 285 275 parity_byte = dp_audio_calculate_parity(new_value); 286 276 value |= ((new_value << HEADER_BYTE_1_BIT) 287 277 | (parity_byte << PARITY_BYTE_1_BIT)); 288 - DRM_DEBUG_DP("Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", 278 + drm_dbg_dp(audio->drm_dev, 279 + "Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", 289 280 value, parity_byte); 290 281 dp_audio_set_header(catalog, value, 291 282 DP_AUDIO_SDP_COPYMANAGEMENT, DP_AUDIO_SDP_HEADER_1); ··· 299 288 parity_byte = dp_audio_calculate_parity(new_value); 300 289 value |= ((new_value << HEADER_BYTE_2_BIT) 301 290 | (parity_byte << PARITY_BYTE_2_BIT)); 302 - DRM_DEBUG_DP("Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", 291 + drm_dbg_dp(audio->drm_dev, 292 + "Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", 303 293 value, parity_byte); 304 294 dp_audio_set_header(catalog, value, 305 295 DP_AUDIO_SDP_COPYMANAGEMENT, DP_AUDIO_SDP_HEADER_2); ··· 313 301 parity_byte = dp_audio_calculate_parity(new_value); 314 302 value |= ((new_value << HEADER_BYTE_3_BIT) 315 303 | (parity_byte << PARITY_BYTE_3_BIT)); 316 - DRM_DEBUG_DP("Header Byte 3: value = 0x%x, parity_byte = 0x%x\n", 304 + drm_dbg_dp(audio->drm_dev, 305 + "Header Byte 3: value = 0x%x, parity_byte = 0x%x\n", 317 306 value, parity_byte); 318 307 dp_audio_set_header(catalog, value, 319 308 DP_AUDIO_SDP_COPYMANAGEMENT, DP_AUDIO_SDP_HEADER_3); ··· 334 321 parity_byte = dp_audio_calculate_parity(new_value); 335 322 value |= ((new_value << HEADER_BYTE_1_BIT) 336 323 | (parity_byte << PARITY_BYTE_1_BIT)); 337 - DRM_DEBUG_DP("Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", 324 + drm_dbg_dp(audio->drm_dev, 325 + "Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", 338 326 value, parity_byte); 339 327 dp_audio_set_header(catalog, value, 340 328 DP_AUDIO_SDP_ISRC, DP_AUDIO_SDP_HEADER_1); ··· 348 334 parity_byte = dp_audio_calculate_parity(new_value); 349 335 value |= ((new_value << HEADER_BYTE_2_BIT) 350 336 | (parity_byte << PARITY_BYTE_2_BIT)); 351 - DRM_DEBUG_DP("Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", 337 + drm_dbg_dp(audio->drm_dev, 338 + "Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", 352 339 value, parity_byte); 353 340 dp_audio_set_header(catalog, value, 354 341 DP_AUDIO_SDP_ISRC, DP_AUDIO_SDP_HEADER_2); ··· 385 370 select = 3; 386 371 break; 387 372 default: 388 - DRM_DEBUG_DP("Unknown link rate\n"); 373 + drm_dbg_dp(audio->drm_dev, "Unknown link rate\n"); 389 374 select = 0; 390 375 break; 391 376 } ··· 410 395 safe_to_exit_level = 5; 411 396 break; 412 397 default: 413 - DRM_DEBUG_DP("setting the default safe_to_exit_level = %u\n", 398 + drm_dbg_dp(audio->drm_dev, 399 + "setting the default safe_to_exit_level = %u\n", 414 400 safe_to_exit_level); 415 401 safe_to_exit_level = 14; 416 402 break;

+20 -15

drivers/gpu/drm/msm/dp/dp_catalog.c

··· 49 49 50 50 struct dp_catalog_private { 51 51 struct device *dev; 52 + struct drm_device *drm_dev; 52 53 struct dp_io *io; 53 54 u32 (*audio_map)[DP_AUDIO_SDP_HEADER_MAX]; 54 55 struct dp_catalog dp_catalog; ··· 325 324 struct dp_catalog_private *catalog = container_of(dp_catalog, 326 325 struct dp_catalog_private, dp_catalog); 327 326 328 - DRM_DEBUG_DP("DP_CONFIGURATION_CTRL=0x%x\n", cfg); 327 + drm_dbg_dp(catalog->drm_dev, "DP_CONFIGURATION_CTRL=0x%x\n", cfg); 329 328 330 329 dp_write_link(catalog, REG_DP_CONFIGURATION_CTRL, cfg); 331 330 } ··· 353 352 struct dp_catalog_private *catalog = container_of(dp_catalog, 354 353 struct dp_catalog_private, dp_catalog); 355 354 356 - DRM_DEBUG_DP("enable=%d\n", enable); 355 + drm_dbg_dp(catalog->drm_dev, "enable=%d\n", enable); 357 356 if (enable) { 358 357 /* 359 358 * To make sure link reg writes happens before other operation, ··· 398 397 /* Configure clock to synchronous mode */ 399 398 misc_val |= DP_MISC0_SYNCHRONOUS_CLK; 400 399 401 - DRM_DEBUG_DP("misc settings = 0x%x\n", misc_val); 400 + drm_dbg_dp(catalog->drm_dev, "misc settings = 0x%x\n", misc_val); 402 401 dp_write_link(catalog, REG_DP_MISC1_MISC0, misc_val); 403 402 } 404 403 ··· 453 452 if (link_rate_hbr3 == rate) 454 453 nvid *= 3; 455 454 456 - DRM_DEBUG_DP("mvid=0x%x, nvid=0x%x\n", mvid, nvid); 455 + drm_dbg_dp(catalog->drm_dev, "mvid=0x%x, nvid=0x%x\n", mvid, nvid); 457 456 dp_write_link(catalog, REG_DP_SOFTWARE_MVID, mvid); 458 457 dp_write_link(catalog, REG_DP_SOFTWARE_NVID, nvid); 459 458 dp_write_p0(catalog, MMSS_DP_DSC_DTO, 0x0); ··· 468 467 struct dp_catalog_private, dp_catalog); 469 468 470 469 bit = BIT(state_bit - 1); 471 - DRM_DEBUG_DP("hw: bit=%d train=%d\n", bit, state_bit); 470 + drm_dbg_dp(catalog->drm_dev, "hw: bit=%d train=%d\n", bit, state_bit); 472 471 dp_catalog_ctrl_state_ctrl(dp_catalog, bit); 473 472 474 473 bit = BIT(state_bit - 1) << DP_MAINLINK_READY_LINK_TRAINING_SHIFT; ··· 576 575 577 576 config = (en ? config | intr_mask : config & ~intr_mask); 578 577 579 - DRM_DEBUG_DP("intr_mask=%#x config=%#x\n", intr_mask, config); 578 + drm_dbg_dp(catalog->drm_dev, "intr_mask=%#x config=%#x\n", 579 + intr_mask, config); 580 580 dp_write_aux(catalog, REG_DP_DP_HPD_INT_MASK, 581 581 config & DP_DP_HPD_INT_MASK); 582 582 } ··· 608 606 u32 status; 609 607 610 608 status = dp_read_aux(catalog, REG_DP_DP_HPD_INT_STATUS); 611 - DRM_DEBUG_DP("aux status: %#x\n", status); 609 + drm_dbg_dp(catalog->drm_dev, "aux status: %#x\n", status); 612 610 status >>= DP_DP_HPD_STATE_STATUS_BITS_SHIFT; 613 611 status &= DP_DP_HPD_STATE_STATUS_BITS_MASK; 614 612 ··· 684 682 /* Make sure to clear the current pattern before starting a new one */ 685 683 dp_write_link(catalog, REG_DP_STATE_CTRL, 0x0); 686 684 687 - DRM_DEBUG_DP("pattern: %#x\n", pattern); 685 + drm_dbg_dp(catalog->drm_dev, "pattern: %#x\n", pattern); 688 686 switch (pattern) { 689 687 case DP_PHY_TEST_PATTERN_D10_2: 690 688 dp_write_link(catalog, REG_DP_STATE_CTRL, ··· 745 743 DP_STATE_CTRL_LINK_TRAINING_PATTERN4); 746 744 break; 747 745 default: 748 - DRM_DEBUG_DP("No valid test pattern requested: %#x\n", pattern); 746 + drm_dbg_dp(catalog->drm_dev, 747 + "No valid test pattern requested: %#x\n", pattern); 749 748 break; 750 749 } 751 750 } ··· 853 850 DP_BIST_ENABLE_DPBIST_EN); 854 851 dp_write_p0(catalog, MMSS_DP_TIMING_ENGINE_EN, 855 852 DP_TIMING_ENGINE_EN_EN); 856 - DRM_DEBUG_DP("%s: enabled tpg\n", __func__); 853 + drm_dbg_dp(catalog->drm_dev, "%s: enabled tpg\n", __func__); 857 854 } 858 855 859 856 void dp_catalog_panel_tpg_disable(struct dp_catalog *dp_catalog) ··· 942 939 select = dp_catalog->audio_data; 943 940 acr_ctrl = select << 4 | BIT(31) | BIT(8) | BIT(14); 944 941 945 - DRM_DEBUG_DP("select: %#x, acr_ctrl: %#x\n", select, acr_ctrl); 942 + drm_dbg_dp(catalog->drm_dev, "select: %#x, acr_ctrl: %#x\n", 943 + select, acr_ctrl); 946 944 947 945 dp_write_link(catalog, MMSS_DP_AUDIO_ACR_CTRL, acr_ctrl); 948 946 } ··· 968 964 else 969 965 audio_ctrl &= ~BIT(0); 970 966 971 - DRM_DEBUG_DP("dp_audio_cfg = 0x%x\n", audio_ctrl); 967 + drm_dbg_dp(catalog->drm_dev, "dp_audio_cfg = 0x%x\n", audio_ctrl); 972 968 973 969 dp_write_link(catalog, MMSS_DP_AUDIO_CFG, audio_ctrl); 974 970 /* make sure audio engine is disabled */ ··· 999 995 /* AUDIO_INFOFRAME_SDP_EN */ 1000 996 sdp_cfg |= BIT(20); 1001 997 1002 - DRM_DEBUG_DP("sdp_cfg = 0x%x\n", sdp_cfg); 998 + drm_dbg_dp(catalog->drm_dev, "sdp_cfg = 0x%x\n", sdp_cfg); 1003 999 1004 1000 dp_write_link(catalog, MMSS_DP_SDP_CFG, sdp_cfg); 1005 1001 ··· 1009 1005 /* AUDIO_STREAM_HB3_REGSRC-> Do not use reg values */ 1010 1006 sdp_cfg2 &= ~BIT(1); 1011 1007 1012 - DRM_DEBUG_DP("sdp_cfg2 = 0x%x\n", sdp_cfg2); 1008 + drm_dbg_dp(catalog->drm_dev, "sdp_cfg2 = 0x%x\n", sdp_cfg2); 1013 1009 1014 1010 dp_write_link(catalog, MMSS_DP_SDP_CFG2, sdp_cfg2); 1015 1011 } ··· 1071 1067 mainlink_levels &= 0xFE0; 1072 1068 mainlink_levels |= safe_to_exit_level; 1073 1069 1074 - DRM_DEBUG_DP("mainlink_level = 0x%x, safe_to_exit_level = 0x%x\n", 1070 + drm_dbg_dp(catalog->drm_dev, 1071 + "mainlink_level = 0x%x, safe_to_exit_level = 0x%x\n", 1075 1072 mainlink_levels, safe_to_exit_level); 1076 1073 1077 1074 dp_write_link(catalog, REG_DP_MAINLINK_LEVELS, mainlink_levels);

+62 -52

drivers/gpu/drm/msm/dp/dp_ctrl.c

··· 69 69 70 70 struct dp_ctrl_private { 71 71 struct dp_ctrl dp_ctrl; 72 + struct drm_device *drm_dev; 72 73 struct device *dev; 73 74 struct drm_dp_aux *aux; 74 75 struct dp_panel *panel; ··· 114 113 IDLE_PATTERN_COMPLETION_TIMEOUT_JIFFIES)) 115 114 pr_warn("PUSH_IDLE pattern timedout\n"); 116 115 117 - DRM_DEBUG_DP("mainlink off done\n"); 116 + drm_dbg_dp(ctrl->drm_dev, "mainlink off\n"); 118 117 } 119 118 120 119 static void dp_ctrl_config_ctrl(struct dp_ctrl_private *ctrl) ··· 603 602 } 604 603 } 605 604 606 - static void _dp_ctrl_calc_tu(struct dp_tu_calc_input *in, 607 - struct dp_vc_tu_mapping_table *tu_table) 605 + static void _dp_ctrl_calc_tu(struct dp_ctrl_private *ctrl, 606 + struct dp_tu_calc_input *in, 607 + struct dp_vc_tu_mapping_table *tu_table) 608 608 { 609 609 struct tu_algo_data *tu; 610 610 int compare_result_1, compare_result_2; ··· 688 686 689 687 if (tu->dsc_en && compare_result_1 && compare_result_2) { 690 688 HBLANK_MARGIN += 4; 691 - DRM_DEBUG_DP("Info: increase HBLANK_MARGIN to %d\n", 692 - HBLANK_MARGIN); 689 + drm_dbg_dp(ctrl->drm_dev, 690 + "increase HBLANK_MARGIN to %d\n", HBLANK_MARGIN); 693 691 } 694 692 695 693 tu_size_calc: ··· 723 721 tu->n_tus += 1; 724 722 725 723 tu->even_distribution_legacy = tu->n_tus % tu->nlanes == 0 ? 1 : 0; 726 - DRM_DEBUG_DP("Info: n_sym = %d, num_of_tus = %d\n", 727 - tu->valid_boundary_link, tu->n_tus); 724 + 725 + drm_dbg_dp(ctrl->drm_dev, 726 + "n_sym = %d, num_of_tus = %d\n", 727 + tu->valid_boundary_link, tu->n_tus); 728 728 729 729 temp1_fp = drm_fixp_from_fraction(tu->tu_size_desired, 1); 730 730 temp2_fp = drm_fixp_mul(tu->original_ratio_fp, temp1_fp); ··· 919 915 tu_table->lower_boundary_count = tu->lower_boundary_count; 920 916 tu_table->tu_size_minus1 = tu->tu_size_minus1; 921 917 922 - DRM_DEBUG_DP("TU: valid_boundary_link: %d\n", 918 + drm_dbg_dp(ctrl->drm_dev, "TU: valid_boundary_link: %d\n", 923 919 tu_table->valid_boundary_link); 924 - DRM_DEBUG_DP("TU: delay_start_link: %d\n", 920 + drm_dbg_dp(ctrl->drm_dev, "TU: delay_start_link: %d\n", 925 921 tu_table->delay_start_link); 926 - DRM_DEBUG_DP("TU: boundary_moderation_en: %d\n", 922 + drm_dbg_dp(ctrl->drm_dev, "TU: boundary_moderation_en: %d\n", 927 923 tu_table->boundary_moderation_en); 928 - DRM_DEBUG_DP("TU: valid_lower_boundary_link: %d\n", 924 + drm_dbg_dp(ctrl->drm_dev, "TU: valid_lower_boundary_link: %d\n", 929 925 tu_table->valid_lower_boundary_link); 930 - DRM_DEBUG_DP("TU: upper_boundary_count: %d\n", 926 + drm_dbg_dp(ctrl->drm_dev, "TU: upper_boundary_count: %d\n", 931 927 tu_table->upper_boundary_count); 932 - DRM_DEBUG_DP("TU: lower_boundary_count: %d\n", 928 + drm_dbg_dp(ctrl->drm_dev, "TU: lower_boundary_count: %d\n", 933 929 tu_table->lower_boundary_count); 934 - DRM_DEBUG_DP("TU: tu_size_minus1: %d\n", tu_table->tu_size_minus1); 930 + drm_dbg_dp(ctrl->drm_dev, "TU: tu_size_minus1: %d\n", 931 + tu_table->tu_size_minus1); 935 932 936 933 kfree(tu); 937 934 } ··· 958 953 in.num_of_dsc_slices = 0; 959 954 in.compress_ratio = 100; 960 955 961 - _dp_ctrl_calc_tu(&in, tu_table); 956 + _dp_ctrl_calc_tu(ctrl, &in, tu_table); 962 957 } 963 958 964 959 static void dp_ctrl_setup_tr_unit(struct dp_ctrl_private *ctrl) ··· 1009 1004 u32 voltage_swing_level = link->phy_params.v_level; 1010 1005 u32 pre_emphasis_level = link->phy_params.p_level; 1011 1006 1012 - DRM_DEBUG_DP("voltage level: %d emphasis level: %d\n", voltage_swing_level, 1013 - pre_emphasis_level); 1007 + drm_dbg_dp(ctrl->drm_dev, 1008 + "voltage level: %d emphasis level: %d\n", 1009 + voltage_swing_level, pre_emphasis_level); 1014 1010 ret = dp_catalog_ctrl_update_vx_px(ctrl->catalog, 1015 1011 voltage_swing_level, pre_emphasis_level); 1016 1012 ··· 1019 1013 return ret; 1020 1014 1021 1015 if (voltage_swing_level >= DP_TRAIN_VOLTAGE_SWING_MAX) { 1022 - DRM_DEBUG_DP("max. voltage swing level reached %d\n", 1016 + drm_dbg_dp(ctrl->drm_dev, 1017 + "max. voltage swing level reached %d\n", 1023 1018 voltage_swing_level); 1024 1019 max_level_reached |= DP_TRAIN_MAX_SWING_REACHED; 1025 1020 } 1026 1021 1027 1022 if (pre_emphasis_level >= DP_TRAIN_PRE_EMPHASIS_MAX) { 1028 - DRM_DEBUG_DP("max. pre-emphasis level reached %d\n", 1023 + drm_dbg_dp(ctrl->drm_dev, 1024 + "max. pre-emphasis level reached %d\n", 1029 1025 pre_emphasis_level); 1030 1026 max_level_reached |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; 1031 1027 } ··· 1039 1031 buf[lane] = voltage_swing_level | pre_emphasis_level 1040 1032 | max_level_reached; 1041 1033 1042 - DRM_DEBUG_DP("sink: p|v=0x%x\n", voltage_swing_level 1043 - | pre_emphasis_level); 1034 + drm_dbg_dp(ctrl->drm_dev, "sink: p|v=0x%x\n", 1035 + voltage_swing_level | pre_emphasis_level); 1044 1036 ret = drm_dp_dpcd_write(ctrl->aux, DP_TRAINING_LANE0_SET, 1045 1037 buf, lane_cnt); 1046 1038 if (ret == lane_cnt) ··· 1055 1047 u8 buf; 1056 1048 int ret = 0; 1057 1049 1058 - DRM_DEBUG_DP("sink: pattern=%x\n", pattern); 1050 + drm_dbg_dp(ctrl->drm_dev, "sink: pattern=%x\n", pattern); 1059 1051 1060 1052 buf = pattern; 1061 1053 ··· 1126 1118 old_v_level = ctrl->link->phy_params.v_level; 1127 1119 } 1128 1120 1129 - DRM_DEBUG_DP("clock recovery not done, adjusting vx px\n"); 1130 - 1131 1121 dp_link_adjust_levels(ctrl->link, link_status); 1132 1122 ret = dp_ctrl_update_vx_px(ctrl); 1133 1123 if (ret) ··· 1156 1150 break; 1157 1151 } 1158 1152 1159 - if (!ret) 1160 - DRM_DEBUG_DP("new rate=0x%x\n", ctrl->link->link_params.rate); 1153 + if (!ret) { 1154 + drm_dbg_dp(ctrl->drm_dev, "new rate=0x%x\n", 1155 + ctrl->link->link_params.rate); 1156 + } 1161 1157 1162 1158 return ret; 1163 1159 } ··· 1278 1270 } 1279 1271 1280 1272 /* print success info as this is a result of user initiated action */ 1281 - DRM_DEBUG_DP("link training #1 successful\n"); 1273 + drm_dbg_dp(ctrl->drm_dev, "link training #1 successful\n"); 1282 1274 1283 1275 ret = dp_ctrl_link_train_2(ctrl, training_step); 1284 1276 if (ret) { ··· 1287 1279 } 1288 1280 1289 1281 /* print success info as this is a result of user initiated action */ 1290 - DRM_DEBUG_DP("link training #2 successful\n"); 1282 + drm_dbg_dp(ctrl->drm_dev, "link training #2 successful\n"); 1291 1283 1292 1284 end: 1293 1285 dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); ··· 1327 1319 cfg++; 1328 1320 } 1329 1321 1330 - DRM_DEBUG_DP("setting rate=%lu on clk=%s\n", rate, name); 1322 + drm_dbg_dp(ctrl->drm_dev, "setting rate=%lu on clk=%s\n", 1323 + rate, name); 1331 1324 1332 1325 if (num) 1333 1326 cfg->rate = rate; ··· 1358 1349 if (ret) 1359 1350 DRM_ERROR("Unable to start link clocks. ret=%d\n", ret); 1360 1351 1361 - DRM_DEBUG_DP("link rate=%d pixel_clk=%d\n", 1352 + drm_dbg_dp(ctrl->drm_dev, "link rate=%d pixel_clk=%d\n", 1362 1353 ctrl->link->link_params.rate, ctrl->dp_ctrl.pixel_rate); 1363 1354 1364 1355 return ret; ··· 1375 1366 if (ret) 1376 1367 DRM_ERROR("Unabled to start pixel clocks. ret=%d\n", ret); 1377 1368 1378 - DRM_DEBUG_DP("link rate=%d pixel_clk=%d\n", 1369 + drm_dbg_dp(ctrl->drm_dev, "link rate=%d pixel_clk=%d\n", 1379 1370 ctrl->link->link_params.rate, ctrl->dp_ctrl.pixel_rate); 1380 1371 1381 1372 return ret; ··· 1405 1396 1406 1397 dp_catalog_ctrl_phy_reset(ctrl->catalog); 1407 1398 phy_init(phy); 1408 - DRM_DEBUG_DP("phy=%p init=%d power_on=%d\n", 1399 + 1400 + drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", 1409 1401 phy, phy->init_count, phy->power_count); 1410 1402 } 1411 1403 ··· 1422 1412 1423 1413 dp_catalog_ctrl_phy_reset(ctrl->catalog); 1424 1414 phy_exit(phy); 1425 - DRM_DEBUG_DP("phy=%p init=%d power_on=%d\n", 1415 + drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", 1426 1416 phy, phy->init_count, phy->power_count); 1427 1417 } 1428 1418 ··· 1498 1488 phy_exit(phy); 1499 1489 phy_init(phy); 1500 1490 1501 - DRM_DEBUG_DP("phy=%p init=%d power_on=%d\n", 1491 + drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", 1502 1492 phy, phy->init_count, phy->power_count); 1503 1493 return 0; 1504 1494 } ··· 1533 1523 int ret = 0; 1534 1524 1535 1525 if (!ctrl->link->phy_params.phy_test_pattern_sel) { 1536 - DRM_DEBUG_DP("no test pattern selected by sink\n"); 1526 + drm_dbg_dp(ctrl->drm_dev, 1527 + "no test pattern selected by sink\n"); 1537 1528 return ret; 1538 1529 } 1539 1530 ··· 1564 1553 u32 pattern_sent = 0x0; 1565 1554 u32 pattern_requested = ctrl->link->phy_params.phy_test_pattern_sel; 1566 1555 1567 - DRM_DEBUG_DP("request: 0x%x\n", pattern_requested); 1556 + drm_dbg_dp(ctrl->drm_dev, "request: 0x%x\n", pattern_requested); 1568 1557 1569 1558 if (dp_catalog_ctrl_update_vx_px(ctrl->catalog, 1570 1559 ctrl->link->phy_params.v_level, ··· 1605 1594 success = false; 1606 1595 } 1607 1596 1608 - DRM_DEBUG_DP("%s: test->0x%x\n", success ? "success" : "failed", 1609 - pattern_requested); 1597 + drm_dbg_dp(ctrl->drm_dev, "%s: test->0x%x\n", 1598 + success ? "success" : "failed", pattern_requested); 1610 1599 return success; 1611 1600 } 1612 1601 ··· 1624 1613 sink_request = ctrl->link->sink_request; 1625 1614 1626 1615 if (sink_request & DP_TEST_LINK_PHY_TEST_PATTERN) { 1627 - DRM_DEBUG_DP("PHY_TEST_PATTERN request\n"); 1616 + drm_dbg_dp(ctrl->drm_dev, "PHY_TEST_PATTERN request\n"); 1628 1617 if (dp_ctrl_process_phy_test_request(ctrl)) { 1629 1618 DRM_ERROR("process phy_test_req failed\n"); 1630 1619 return; ··· 1696 1685 dp_power_clk_enable(ctrl->power, DP_CORE_PM, true); 1697 1686 1698 1687 if (ctrl->link->sink_request & DP_TEST_LINK_PHY_TEST_PATTERN) { 1699 - DRM_DEBUG_DP("using phy test link parameters\n"); 1688 + drm_dbg_dp(ctrl->drm_dev, 1689 + "using phy test link parameters\n"); 1700 1690 if (!ctrl->panel->dp_mode.drm_mode.clock) 1701 1691 ctrl->dp_ctrl.pixel_rate = phy_cts_pixel_clk_khz; 1702 1692 } else { ··· 1707 1695 ctrl->dp_ctrl.pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; 1708 1696 } 1709 1697 1710 - DRM_DEBUG_DP("rate=%d, num_lanes=%d, pixel_rate=%d\n", 1711 - ctrl->link->link_params.rate, 1712 - ctrl->link->link_params.num_lanes, ctrl->dp_ctrl.pixel_rate); 1698 + drm_dbg_dp(ctrl->drm_dev, "rate=%d, num_lanes=%d, pixel_rate=%d\n", 1699 + ctrl->link->link_params.rate, ctrl->link->link_params.num_lanes, 1700 + ctrl->dp_ctrl.pixel_rate); 1713 1701 1714 1702 ctrl->link->phy_params.p_level = 0; 1715 1703 ctrl->link->phy_params.v_level = 0; ··· 1827 1815 if (dp_ctrl->wide_bus_en) 1828 1816 ctrl->dp_ctrl.pixel_rate >>= 1; 1829 1817 1830 - DRM_DEBUG_DP("rate=%d, num_lanes=%d, pixel_rate=%d\n", 1818 + drm_dbg_dp(ctrl->drm_dev, "rate=%d, num_lanes=%d, pixel_rate=%d\n", 1831 1819 ctrl->link->link_params.rate, 1832 1820 ctrl->link->link_params.num_lanes, ctrl->dp_ctrl.pixel_rate); 1833 1821 ··· 1877 1865 return ret; 1878 1866 1879 1867 mainlink_ready = dp_catalog_ctrl_mainlink_ready(ctrl->catalog); 1880 - DRM_DEBUG_DP("mainlink %s\n", mainlink_ready ? "READY" : "NOT READY"); 1868 + drm_dbg_dp(ctrl->drm_dev, 1869 + "mainlink %s\n", mainlink_ready ? "READY" : "NOT READY"); 1881 1870 1882 1871 end: 1883 1872 return ret; ··· 1914 1901 return ret; 1915 1902 } 1916 1903 1917 - DRM_DEBUG_DP("Before, phy=%x init_count=%d power_on=%d\n", 1918 - (u32)(uintptr_t)phy, phy->init_count, phy->power_count); 1919 - 1920 1904 phy_power_off(phy); 1921 1905 1922 1906 /* aux channel down, reinit phy */ 1923 1907 phy_exit(phy); 1924 1908 phy_init(phy); 1925 1909 1926 - DRM_DEBUG_DP("phy=%p init=%d power_on=%d\n", 1910 + drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", 1927 1911 phy, phy->init_count, phy->power_count); 1928 1912 return ret; 1929 1913 } ··· 1953 1943 } 1954 1944 1955 1945 phy_power_off(phy); 1956 - DRM_DEBUG_DP("phy=%p init=%d power_on=%d\n", 1946 + drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", 1957 1947 phy, phy->init_count, phy->power_count); 1958 1948 1959 1949 return ret; ··· 1972 1962 isr = dp_catalog_ctrl_get_interrupt(ctrl->catalog); 1973 1963 1974 1964 if (isr & DP_CTRL_INTR_READY_FOR_VIDEO) { 1975 - DRM_DEBUG_DP("dp_video_ready\n"); 1965 + drm_dbg_dp(ctrl->drm_dev, "dp_video_ready\n"); 1976 1966 complete(&ctrl->video_comp); 1977 1967 } 1978 1968 1979 1969 if (isr & DP_CTRL_INTR_IDLE_PATTERN_SENT) { 1980 - DRM_DEBUG_DP("idle_patterns_sent\n"); 1970 + drm_dbg_dp(ctrl->drm_dev, "idle_patterns_sent\n"); 1981 1971 complete(&ctrl->idle_comp); 1982 1972 } 1983 1973 }

+40 -28

drivers/gpu/drm/msm/dp/dp_display.c

··· 86 86 bool hpd_irq_on; 87 87 bool audio_supported; 88 88 89 + struct drm_device *drm_dev; 89 90 struct platform_device *pdev; 90 91 struct dentry *root; 91 92 ··· 271 270 272 271 dp->dp_display.next_bridge = dp->parser->next_bridge; 273 272 273 + dp->drm_dev = drm; 274 274 dp->aux->drm_dev = drm; 275 275 rc = dp_aux_register(dp->aux); 276 276 if (rc) { ··· 317 315 318 316 static bool dp_display_is_sink_count_zero(struct dp_display_private *dp) 319 317 { 320 - DRM_DEBUG_DP("present=%#x sink_count=%d\n", dp->panel->dpcd[DP_DOWNSTREAMPORT_PRESENT], 318 + drm_dbg_dp(dp->drm_dev, "present=%#x sink_count=%d\n", 319 + dp->panel->dpcd[DP_DOWNSTREAMPORT_PRESENT], 321 320 dp->link->sink_count); 322 321 return dp_display_is_ds_bridge(dp->panel) && 323 322 (dp->link->sink_count == 0); ··· 341 338 { 342 339 if ((hpd && dp->dp_display.is_connected) || 343 340 (!hpd && !dp->dp_display.is_connected)) { 344 - DRM_DEBUG_DP("HPD already %s\n", (hpd ? "on" : "off")); 341 + drm_dbg_dp(dp->drm_dev, "HPD already %s\n", 342 + (hpd ? "on" : "off")); 345 343 return 0; 346 344 } 347 345 ··· 352 348 353 349 dp->dp_display.is_connected = hpd; 354 350 355 - DRM_DEBUG_DP("hpd=%d\n", hpd); 351 + drm_dbg_dp(dp->drm_dev, "type=%d hpd=%d\n", 352 + dp->dp_display.connector_type, hpd); 356 353 dp_display_send_hpd_event(&dp->dp_display); 357 354 358 355 return 0; ··· 401 396 402 397 static void dp_display_host_phy_init(struct dp_display_private *dp) 403 398 { 404 - DRM_DEBUG_DP("type=%d core_init=%d phy_init=%d\n", 399 + drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 405 400 dp->dp_display.connector_type, dp->core_initialized, 406 401 dp->phy_initialized); 407 402 ··· 413 408 414 409 static void dp_display_host_phy_exit(struct dp_display_private *dp) 415 410 { 416 - DRM_DEBUG_DP("type=%d core_init=%d phy_init=%d\n", 411 + drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 417 412 dp->dp_display.connector_type, dp->core_initialized, 418 413 dp->phy_initialized); 419 414 ··· 425 420 426 421 static void dp_display_host_init(struct dp_display_private *dp) 427 422 { 428 - DRM_DEBUG_DP("type=%d core_init=%d phy_init=%d\n", 423 + drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 429 424 dp->dp_display.connector_type, dp->core_initialized, 430 425 dp->phy_initialized); 431 426 ··· 437 432 438 433 static void dp_display_host_deinit(struct dp_display_private *dp) 439 434 { 440 - DRM_DEBUG_DP("type=%d core_init=%d phy_init=%d\n", 435 + drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", 441 436 dp->dp_display.connector_type, dp->core_initialized, 442 437 dp->phy_initialized); 443 438 ··· 478 473 int rc = 0; 479 474 480 475 if (dp_display_is_sink_count_zero(dp)) { 481 - DRM_DEBUG_DP("sink count is zero, nothing to do\n"); 476 + drm_dbg_dp(dp->drm_dev, "sink count is zero, nothing to do\n"); 482 477 if (dp->hpd_state != ST_DISCONNECTED) { 483 478 dp->hpd_state = ST_DISCONNECT_PENDING; 484 479 dp_add_event(dp, EV_USER_NOTIFICATION, false, 0); ··· 499 494 { 500 495 u32 sink_request = dp->link->sink_request; 501 496 502 - DRM_DEBUG_DP("%d\n", sink_request); 497 + drm_dbg_dp(dp->drm_dev, "%d\n", sink_request); 503 498 if (dp->hpd_state == ST_DISCONNECTED) { 504 499 if (sink_request & DP_LINK_STATUS_UPDATED) { 505 - DRM_DEBUG_DP("Disconnected sink_request: %d\n", sink_request); 500 + drm_dbg_dp(dp->drm_dev, "Disconnected sink_request: %d\n", 501 + sink_request); 506 502 DRM_ERROR("Disconnected, no DP_LINK_STATUS_UPDATED\n"); 507 503 return -EINVAL; 508 504 } ··· 527 521 rc = dp_link_process_request(dp->link); 528 522 if (!rc) { 529 523 sink_request = dp->link->sink_request; 530 - DRM_DEBUG_DP("hpd_state=%d sink_request=%d\n", dp->hpd_state, sink_request); 524 + drm_dbg_dp(dp->drm_dev, "hpd_state=%d sink_request=%d\n", 525 + dp->hpd_state, sink_request); 531 526 if (sink_request & DS_PORT_STATUS_CHANGED) 532 527 rc = dp_display_handle_port_ststus_changed(dp); 533 528 else ··· 551 544 mutex_lock(&dp->event_mutex); 552 545 553 546 state = dp->hpd_state; 554 - DRM_DEBUG_DP("Before, type=%d hpd_state=%d\n", 547 + drm_dbg_dp(dp->drm_dev, "Before, type=%d hpd_state=%d\n", 555 548 dp->dp_display.connector_type, state); 556 549 557 550 if (state == ST_DISPLAY_OFF || state == ST_SUSPENDED) { ··· 585 578 dp_catalog_hpd_config_intr(dp->catalog, 586 579 DP_DP_IRQ_HPD_INT_MASK | DP_DP_HPD_REPLUG_INT_MASK, true); 587 580 588 - DRM_DEBUG_DP("After, type=%d hpd_state=%d\n", 581 + drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n", 589 582 dp->dp_display.connector_type, state); 590 583 mutex_unlock(&dp->event_mutex); 591 584 ··· 605 598 state = dp->hpd_state; 606 599 if (state == ST_CONNECT_PENDING) { 607 600 dp->hpd_state = ST_CONNECTED; 608 - DRM_DEBUG_DP("type=%d\n", dp->dp_display.connector_type); 601 + drm_dbg_dp(dp->drm_dev, "type=%d\n", dp->dp_display.connector_type); 609 602 } 610 603 611 604 mutex_unlock(&dp->event_mutex); ··· 639 632 640 633 state = dp->hpd_state; 641 634 642 - DRM_DEBUG_DP("Before, type=%d hpd_state=%d\n", 635 + drm_dbg_dp(dp->drm_dev, "Before, type=%d hpd_state=%d\n", 643 636 dp->dp_display.connector_type, state); 644 637 645 638 /* disable irq_hpd/replug interrupts */ ··· 690 683 /* enable HDP plug interrupt to prepare for next plugin */ 691 684 dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_PLUG_INT_MASK, true); 692 685 693 - DRM_DEBUG_DP("After, type=%d hpd_state=%d\n", 686 + drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n", 694 687 dp->dp_display.connector_type, state); 695 688 696 689 /* uevent will complete disconnection part */ ··· 707 700 state = dp->hpd_state; 708 701 if (state == ST_DISCONNECT_PENDING) { 709 702 dp->hpd_state = ST_DISCONNECTED; 710 - DRM_DEBUG_DP("type=%d\n", dp->dp_display.connector_type); 703 + drm_dbg_dp(dp->drm_dev, "type=%d\n", dp->dp_display.connector_type); 711 704 } 712 705 713 706 mutex_unlock(&dp->event_mutex); ··· 723 716 724 717 /* irq_hpd can happen at either connected or disconnected state */ 725 718 state = dp->hpd_state; 726 - DRM_DEBUG_DP("Before, type=%d hpd_state=%d\n", 719 + drm_dbg_dp(dp->drm_dev, "Before, type=%d hpd_state=%d\n", 727 720 dp->dp_display.connector_type, state); 728 721 729 722 if (state == ST_DISPLAY_OFF || state == ST_SUSPENDED) { ··· 747 740 748 741 dp_display_usbpd_attention_cb(&dp->pdev->dev); 749 742 750 - DRM_DEBUG_DP("After, type=%d hpd_state=%d\n", 743 + drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n", 751 744 dp->dp_display.connector_type, state); 752 745 753 746 mutex_unlock(&dp->event_mutex); ··· 892 885 int rc = 0; 893 886 struct msm_dp *dp_display = &dp->dp_display; 894 887 895 - DRM_DEBUG_DP("sink_count=%d\n", dp->link->sink_count); 888 + drm_dbg_dp(dp->drm_dev, "sink_count=%d\n", dp->link->sink_count); 896 889 if (dp_display->power_on) { 897 - DRM_DEBUG_DP("Link already setup, return\n"); 890 + drm_dbg_dp(dp->drm_dev, "Link already setup, return\n"); 898 891 return 0; 899 892 } 900 893 ··· 959 952 960 953 dp_display->power_on = false; 961 954 962 - DRM_DEBUG_DP("sink count: %d\n", dp->link->sink_count); 955 + drm_dbg_dp(dp->drm_dev, "sink count: %d\n", dp->link->sink_count); 963 956 return 0; 964 957 } 965 958 ··· 1221 1214 hpd_isr_status = dp_catalog_hpd_get_intr_status(dp->catalog); 1222 1215 1223 1216 if (hpd_isr_status & 0x0F) { 1224 - DRM_DEBUG_DP("type=%d isr=0x%x\n", 1217 + drm_dbg_dp(dp->drm_dev, "type=%d isr=0x%x\n", 1225 1218 dp->dp_display.connector_type, hpd_isr_status); 1226 1219 /* hpd related interrupts */ 1227 1220 if (hpd_isr_status & DP_DP_HPD_PLUG_INT_MASK) ··· 1376 1369 1377 1370 mutex_lock(&dp->event_mutex); 1378 1371 1379 - DRM_DEBUG_DP("Before, type=%d core_inited=%d phy_inited=%d power_on=%d\n", 1372 + drm_dbg_dp(dp->drm_dev, 1373 + "Before, type=%d core_inited=%d phy_inited=%d power_on=%d\n", 1380 1374 dp->dp_display.connector_type, dp->core_initialized, 1381 1375 dp->phy_initialized, dp_display->power_on); 1382 1376 ··· 1418 1410 dp_display_handle_plugged_change(dp_display, false); 1419 1411 } 1420 1412 1421 - DRM_DEBUG_DP("After, type=%d sink_count=%d is_connected=%d \ 1422 - core_inited=%d phy_inited=%d power_on=%d\n", 1413 + drm_dbg_dp(dp->drm_dev, 1414 + "After, type=%d sink=%d conn=%d core_init=%d phy_init=%d power=%d\n", 1423 1415 dp->dp_display.connector_type, dp->link->sink_count, 1424 1416 dp->dp_display.is_connected, dp->core_initialized, 1425 1417 dp->phy_initialized, dp_display->power_on); ··· 1439 1431 1440 1432 mutex_lock(&dp->event_mutex); 1441 1433 1442 - DRM_DEBUG_DP("Before, type=%d core_inited=%d phy_inited=%d power_on=%d\n", 1434 + drm_dbg_dp(dp->drm_dev, 1435 + "Before, type=%d core_inited=%d phy_inited=%d power_on=%d\n", 1443 1436 dp->dp_display.connector_type, dp->core_initialized, 1444 1437 dp->phy_initialized, dp_display->power_on); 1445 1438 ··· 1455 1446 1456 1447 dp->hpd_state = ST_SUSPENDED; 1457 1448 1458 - DRM_DEBUG_DP("After, type=%d core_inited=%d phy_inited=%d power_on=%d\n", 1449 + drm_dbg_dp(dp->drm_dev, 1450 + "After, type=%d core_inited=%d phy_inited=%d power_on=%d\n", 1459 1451 dp->dp_display.connector_type, dp->core_initialized, 1460 1452 dp->phy_initialized, dp_display->power_on); 1461 1453 ··· 1653 1643 /* completed connection */ 1654 1644 dp_display->hpd_state = ST_CONNECTED; 1655 1645 1646 + drm_dbg_dp(dp->drm_dev, "type=%d Done\n", dp->connector_type); 1656 1647 mutex_unlock(&dp_display->event_mutex); 1657 1648 } 1658 1649 ··· 1697 1686 dp_display->hpd_state = ST_DISPLAY_OFF; 1698 1687 } 1699 1688 1689 + drm_dbg_dp(dp->drm_dev, "type=%d Done\n", dp->connector_type); 1700 1690 mutex_unlock(&dp_display->event_mutex); 1701 1691 } 1702 1692

+2 -2

drivers/gpu/drm/msm/dp/dp_drm.c

··· 24 24 25 25 dp = to_dp_bridge(bridge)->dp_display; 26 26 27 - DRM_DEBUG_DP("is_connected = %s\n", 27 + drm_dbg_dp(dp->drm_dev, "is_connected = %s\n", 28 28 (dp->is_connected) ? "true" : "false"); 29 29 30 30 return (dp->is_connected) ? connector_status_connected : ··· 81 81 drm_mode_probed_add(connector, m); 82 82 } 83 83 } else { 84 - DRM_DEBUG_DP("No sink connected\n"); 84 + drm_dbg_dp(connector->dev, "No sink connected\n"); 85 85 } 86 86 kfree(dp_mode); 87 87 return rc;

+61 -42

drivers/gpu/drm/msm/dp/dp_link.c

··· 36 36 struct dp_link_private { 37 37 u32 prev_sink_count; 38 38 struct device *dev; 39 + struct drm_device *drm_dev; 39 40 struct drm_dp_aux *aux; 40 41 struct dp_link dp_link; 41 42 ··· 129 128 goto exit; 130 129 131 130 req->test_audio_period_ch_1 = ret; 132 - DRM_DEBUG_DP("test_audio_period_ch_1 = 0x%x\n", ret); 131 + drm_dbg_dp(link->drm_dev, "test_audio_period_ch_1 = 0x%x\n", ret); 133 132 134 133 ret = dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH2); 135 134 if (ret == -EINVAL) 136 135 goto exit; 137 136 138 137 req->test_audio_period_ch_2 = ret; 139 - DRM_DEBUG_DP("test_audio_period_ch_2 = 0x%x\n", ret); 138 + drm_dbg_dp(link->drm_dev, "test_audio_period_ch_2 = 0x%x\n", ret); 140 139 141 140 /* TEST_AUDIO_PERIOD_CH_3 (Byte 0x275) */ 142 141 ret = dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH3); ··· 144 143 goto exit; 145 144 146 145 req->test_audio_period_ch_3 = ret; 147 - DRM_DEBUG_DP("test_audio_period_ch_3 = 0x%x\n", ret); 146 + drm_dbg_dp(link->drm_dev, "test_audio_period_ch_3 = 0x%x\n", ret); 148 147 149 148 ret = dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH4); 150 149 if (ret == -EINVAL) 151 150 goto exit; 152 151 153 152 req->test_audio_period_ch_4 = ret; 154 - DRM_DEBUG_DP("test_audio_period_ch_4 = 0x%x\n", ret); 153 + drm_dbg_dp(link->drm_dev, "test_audio_period_ch_4 = 0x%x\n", ret); 155 154 156 155 ret = dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH5); 157 156 if (ret == -EINVAL) 158 157 goto exit; 159 158 160 159 req->test_audio_period_ch_5 = ret; 161 - DRM_DEBUG_DP("test_audio_period_ch_5 = 0x%x\n", ret); 160 + drm_dbg_dp(link->drm_dev, "test_audio_period_ch_5 = 0x%x\n", ret); 162 161 163 162 ret = dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH6); 164 163 if (ret == -EINVAL) 165 164 goto exit; 166 165 167 166 req->test_audio_period_ch_6 = ret; 168 - DRM_DEBUG_DP("test_audio_period_ch_6 = 0x%x\n", ret); 167 + drm_dbg_dp(link->drm_dev, "test_audio_period_ch_6 = 0x%x\n", ret); 169 168 170 169 ret = dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH7); 171 170 if (ret == -EINVAL) 172 171 goto exit; 173 172 174 173 req->test_audio_period_ch_7 = ret; 175 - DRM_DEBUG_DP("test_audio_period_ch_7 = 0x%x\n", ret); 174 + drm_dbg_dp(link->drm_dev, "test_audio_period_ch_7 = 0x%x\n", ret); 176 175 177 176 ret = dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH8); 178 177 if (ret == -EINVAL) 179 178 goto exit; 180 179 181 180 req->test_audio_period_ch_8 = ret; 182 - DRM_DEBUG_DP("test_audio_period_ch_8 = 0x%x\n", ret); 181 + drm_dbg_dp(link->drm_dev, "test_audio_period_ch_8 = 0x%x\n", ret); 183 182 exit: 184 183 return ret; 185 184 } ··· 206 205 } 207 206 208 207 link->dp_link.test_audio.test_audio_pattern_type = data; 209 - DRM_DEBUG_DP("audio pattern type = 0x%x\n", data); 208 + drm_dbg_dp(link->drm_dev, "audio pattern type = 0x%x\n", data); 210 209 exit: 211 210 return ret; 212 211 } ··· 247 246 248 247 link->dp_link.test_audio.test_audio_sampling_rate = sampling_rate; 249 248 link->dp_link.test_audio.test_audio_channel_count = channel_count; 250 - DRM_DEBUG_DP("sampling_rate = 0x%x, channel_count = 0x%x\n", 251 - sampling_rate, channel_count); 249 + drm_dbg_dp(link->drm_dev, 250 + "sampling_rate = 0x%x, channel_count = 0x%x\n", 251 + sampling_rate, channel_count); 252 252 exit: 253 253 return ret; 254 254 } ··· 488 486 return ret; 489 487 } 490 488 491 - DRM_DEBUG_DP("link video pattern = 0x%x\n" 489 + drm_dbg_dp(link->drm_dev, 490 + "link video pattern = 0x%x\n" 492 491 "link dynamic range = 0x%x\n" 493 492 "link bit depth = 0x%x\n" 494 493 "TEST_H_TOTAL = %d, TEST_V_TOTAL = %d\n" ··· 546 543 } 547 544 548 545 link->request.test_link_rate = bp; 549 - DRM_DEBUG_DP("link rate = 0x%x\n", link->request.test_link_rate); 546 + drm_dbg_dp(link->drm_dev, "link rate = 0x%x\n", 547 + link->request.test_link_rate); 550 548 551 549 rlen = drm_dp_dpcd_readb(link->aux, DP_TEST_LANE_COUNT, &bp); 552 550 if (rlen < 0) { ··· 562 558 } 563 559 564 560 link->request.test_lane_count = bp; 565 - DRM_DEBUG_DP("lane count = 0x%x\n", link->request.test_lane_count); 561 + drm_dbg_dp(link->drm_dev, "lane count = 0x%x\n", 562 + link->request.test_lane_count); 566 563 return 0; 567 564 } 568 565 ··· 588 583 589 584 link->dp_link.phy_params.phy_test_pattern_sel = data & 0x07; 590 585 591 - DRM_DEBUG_DP("phy_test_pattern_sel = 0x%x\n", data); 586 + drm_dbg_dp(link->drm_dev, "phy_test_pattern_sel = 0x%x\n", data); 592 587 593 588 switch (data) { 594 589 case DP_PHY_TEST_PATTERN_SEL_MASK: ··· 644 639 return rlen; 645 640 } 646 641 647 - DRM_DEBUG_DP("device service irq vector = 0x%x\n", data); 642 + drm_dbg_dp(link->drm_dev, "device service irq vector = 0x%x\n", data); 648 643 649 644 if (!(data & DP_AUTOMATED_TEST_REQUEST)) { 650 - DRM_DEBUG_DP("no test requested\n"); 645 + drm_dbg_dp(link->drm_dev, "no test requested\n"); 651 646 return 0; 652 647 } 653 648 ··· 662 657 } 663 658 664 659 if (!data || (data == DP_TEST_LINK_FAUX_PATTERN)) { 665 - DRM_DEBUG_DP("link 0x%x not supported\n", data); 660 + drm_dbg_dp(link->drm_dev, "link 0x%x not supported\n", data); 666 661 goto end; 667 662 } 668 663 669 - DRM_DEBUG_DP("Test:(0x%x) requested\n", data); 664 + drm_dbg_dp(link->drm_dev, "Test:(0x%x) requested\n", data); 670 665 link->request.test_requested = data; 671 666 if (link->request.test_requested == DP_TEST_LINK_PHY_TEST_PATTERN) { 672 667 ret = dp_link_parse_phy_test_params(link); ··· 737 732 link->dp_link.sink_count = 738 733 DP_GET_SINK_COUNT(link->dp_link.sink_count); 739 734 740 - DRM_DEBUG_DP("sink_count = 0x%x, cp_ready = 0x%x\n", 741 - link->dp_link.sink_count, cp_ready); 735 + drm_dbg_dp(link->drm_dev, "sink_count = 0x%x, cp_ready = 0x%x\n", 736 + link->dp_link.sink_count, cp_ready); 742 737 return 0; 743 738 } 744 739 ··· 779 774 if (link->request.test_requested != DP_TEST_LINK_TRAINING) 780 775 return -EINVAL; 781 776 782 - DRM_DEBUG_DP("Test:0x%x link rate = 0x%x, lane count = 0x%x\n", 777 + drm_dbg_dp(link->drm_dev, 778 + "Test:0x%x link rate = 0x%x, lane count = 0x%x\n", 783 779 DP_TEST_LINK_TRAINING, 784 780 link->request.test_link_rate, 785 781 link->request.test_lane_count); ··· 858 852 859 853 static void dp_link_parse_vx_px(struct dp_link_private *link) 860 854 { 861 - DRM_DEBUG_DP("vx: 0=%d, 1=%d, 2=%d, 3=%d\n", 855 + drm_dbg_dp(link->drm_dev, "vx: 0=%d, 1=%d, 2=%d, 3=%d\n", 862 856 drm_dp_get_adjust_request_voltage(link->link_status, 0), 863 857 drm_dp_get_adjust_request_voltage(link->link_status, 1), 864 858 drm_dp_get_adjust_request_voltage(link->link_status, 2), 865 859 drm_dp_get_adjust_request_voltage(link->link_status, 3)); 866 860 867 - DRM_DEBUG_DP("px: 0=%d, 1=%d, 2=%d, 3=%d\n", 861 + drm_dbg_dp(link->drm_dev, "px: 0=%d, 1=%d, 2=%d, 3=%d\n", 868 862 drm_dp_get_adjust_request_pre_emphasis(link->link_status, 0), 869 863 drm_dp_get_adjust_request_pre_emphasis(link->link_status, 1), 870 864 drm_dp_get_adjust_request_pre_emphasis(link->link_status, 2), ··· 874 868 * Update the voltage and pre-emphasis levels as per DPCD request 875 869 * vector. 876 870 */ 877 - DRM_DEBUG_DP("Current: v_level = 0x%x, p_level = 0x%x\n", 871 + drm_dbg_dp(link->drm_dev, 872 + "Current: v_level = 0x%x, p_level = 0x%x\n", 878 873 link->dp_link.phy_params.v_level, 879 874 link->dp_link.phy_params.p_level); 880 875 link->dp_link.phy_params.v_level = ··· 885 878 886 879 link->dp_link.phy_params.p_level >>= DP_TRAIN_PRE_EMPHASIS_SHIFT; 887 880 888 - DRM_DEBUG_DP("Requested: v_level = 0x%x, p_level = 0x%x\n", 881 + drm_dbg_dp(link->drm_dev, 882 + "Requested: v_level = 0x%x, p_level = 0x%x\n", 889 883 link->dp_link.phy_params.v_level, 890 884 link->dp_link.phy_params.p_level); 891 885 } ··· 903 895 struct dp_link_private *link) 904 896 { 905 897 if (!(link->request.test_requested & DP_TEST_LINK_PHY_TEST_PATTERN)) { 906 - DRM_DEBUG_DP("no phy test\n"); 898 + drm_dbg_dp(link->drm_dev, "no phy test\n"); 907 899 return -EINVAL; 908 900 } 909 901 ··· 915 907 return -EINVAL; 916 908 } 917 909 918 - DRM_DEBUG_DP("Current: rate = 0x%x, lane count = 0x%x\n", 910 + drm_dbg_dp(link->drm_dev, 911 + "Current: rate = 0x%x, lane count = 0x%x\n", 919 912 link->dp_link.link_params.rate, 920 913 link->dp_link.link_params.num_lanes); 921 914 922 - DRM_DEBUG_DP("Requested: rate = 0x%x, lane count = 0x%x\n", 915 + drm_dbg_dp(link->drm_dev, 916 + "Requested: rate = 0x%x, lane count = 0x%x\n", 923 917 link->request.test_link_rate, 924 918 link->request.test_lane_count); 925 919 ··· 952 942 */ 953 943 static int dp_link_process_link_status_update(struct dp_link_private *link) 954 944 { 955 - bool channel_eq_done = drm_dp_channel_eq_ok(link->link_status, 956 - link->dp_link.link_params.num_lanes); 945 + bool channel_eq_done = drm_dp_channel_eq_ok(link->link_status, 946 + link->dp_link.link_params.num_lanes); 957 947 958 - bool clock_recovery_done = drm_dp_clock_recovery_ok(link->link_status, 959 - link->dp_link.link_params.num_lanes); 948 + bool clock_recovery_done = drm_dp_clock_recovery_ok(link->link_status, 949 + link->dp_link.link_params.num_lanes); 960 950 961 - DRM_DEBUG_DP("channel_eq_done = %d, clock_recovery_done = %d\n", 951 + drm_dbg_dp(link->drm_dev, 952 + "channel_eq_done = %d, clock_recovery_done = %d\n", 962 953 channel_eq_done, clock_recovery_done); 963 954 964 - if (channel_eq_done && clock_recovery_done) 965 - return -EINVAL; 955 + if (channel_eq_done && clock_recovery_done) 956 + return -EINVAL; 966 957 967 958 968 959 return 0; ··· 1069 1058 } 1070 1059 } 1071 1060 1072 - DRM_DEBUG_DP("sink request=%#x", dp_link->sink_request); 1061 + drm_dbg_dp(link->drm_dev, "sink request=%#x", 1062 + dp_link->sink_request); 1073 1063 return ret; 1074 1064 } 1075 1065 ··· 1102 1090 { 1103 1091 int i; 1104 1092 int v_max = 0, p_max = 0; 1093 + struct dp_link_private *link; 1105 1094 1106 1095 if (!dp_link) { 1107 1096 DRM_ERROR("invalid input\n"); 1108 1097 return -EINVAL; 1109 1098 } 1110 1099 1100 + link = container_of(dp_link, struct dp_link_private, dp_link); 1101 + 1111 1102 /* use the max level across lanes */ 1112 1103 for (i = 0; i < dp_link->link_params.num_lanes; i++) { 1113 1104 u8 data_v = drm_dp_get_adjust_request_voltage(link_status, i); 1114 1105 u8 data_p = drm_dp_get_adjust_request_pre_emphasis(link_status, 1115 1106 i); 1116 - DRM_DEBUG_DP("lane=%d req_vol_swing=%d req_pre_emphasis=%d\n", 1107 + drm_dbg_dp(link->drm_dev, 1108 + "lane=%d req_vol_swing=%d req_pre_emphasis=%d\n", 1117 1109 i, data_v, data_p); 1118 1110 if (v_max < data_v) 1119 1111 v_max = data_v; ··· 1133 1117 * the allowable range. 1134 1118 */ 1135 1119 if (dp_link->phy_params.v_level > DP_TRAIN_VOLTAGE_SWING_MAX) { 1136 - DRM_DEBUG_DP("Requested vSwingLevel=%d, change to %d\n", 1120 + drm_dbg_dp(link->drm_dev, 1121 + "Requested vSwingLevel=%d, change to %d\n", 1137 1122 dp_link->phy_params.v_level, 1138 1123 DP_TRAIN_VOLTAGE_SWING_MAX); 1139 1124 dp_link->phy_params.v_level = DP_TRAIN_VOLTAGE_SWING_MAX; 1140 1125 } 1141 1126 1142 1127 if (dp_link->phy_params.p_level > DP_TRAIN_PRE_EMPHASIS_MAX) { 1143 - DRM_DEBUG_DP("Requested preEmphasisLevel=%d, change to %d\n", 1128 + drm_dbg_dp(link->drm_dev, 1129 + "Requested preEmphasisLevel=%d, change to %d\n", 1144 1130 dp_link->phy_params.p_level, 1145 1131 DP_TRAIN_PRE_EMPHASIS_MAX); 1146 1132 dp_link->phy_params.p_level = DP_TRAIN_PRE_EMPHASIS_MAX; ··· 1151 1133 if ((dp_link->phy_params.p_level > DP_TRAIN_PRE_EMPHASIS_LVL_1) 1152 1134 && (dp_link->phy_params.v_level == 1153 1135 DP_TRAIN_VOLTAGE_SWING_LVL_2)) { 1154 - DRM_DEBUG_DP("Requested preEmphasisLevel=%d, change to %d\n", 1136 + drm_dbg_dp(link->drm_dev, 1137 + "Requested preEmphasisLevel=%d, change to %d\n", 1155 1138 dp_link->phy_params.p_level, 1156 1139 DP_TRAIN_PRE_EMPHASIS_LVL_1); 1157 1140 dp_link->phy_params.p_level = DP_TRAIN_PRE_EMPHASIS_LVL_1; 1158 1141 } 1159 1142 1160 - DRM_DEBUG_DP("adjusted: v_level=%d, p_level=%d\n", 1143 + drm_dbg_dp(link->drm_dev, "adjusted: v_level=%d, p_level=%d\n", 1161 1144 dp_link->phy_params.v_level, dp_link->phy_params.p_level); 1162 1145 1163 1146 return 0;

+29 -18

drivers/gpu/drm/msm/dp/dp_panel.c

··· 11 11 12 12 struct dp_panel_private { 13 13 struct device *dev; 14 + struct drm_device *drm_dev; 14 15 struct dp_panel dp_panel; 15 16 struct drm_dp_aux *aux; 16 17 struct dp_link *link; ··· 51 50 52 51 /* check for EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT */ 53 52 if (temp & BIT(7)) { 54 - DRM_DEBUG_DP("using EXTENDED_RECEIVER_CAPABILITY_FIELD\n"); 53 + drm_dbg_dp(panel->drm_dev, 54 + "using EXTENDED_RECEIVER_CAPABILITY_FIELD\n"); 55 55 offset = DPRX_EXTENDED_DPCD_FIELD; 56 56 } 57 57 ··· 82 80 if (link_info->rate >= (drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4))) 83 81 link_info->rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4); 84 82 85 - DRM_DEBUG_DP("version: %d.%d\n", major, minor); 86 - DRM_DEBUG_DP("link_rate=%d\n", link_info->rate); 87 - DRM_DEBUG_DP("lane_count=%d\n", link_info->num_lanes); 83 + drm_dbg_dp(panel->drm_dev, "version: %d.%d\n", major, minor); 84 + drm_dbg_dp(panel->drm_dev, "link_rate=%d\n", link_info->rate); 85 + drm_dbg_dp(panel->drm_dev, "lane_count=%d\n", link_info->num_lanes); 88 86 89 87 if (drm_dp_enhanced_frame_cap(dpcd)) 90 88 link_info->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING; ··· 222 220 } 223 221 224 222 if (panel->aux_cfg_update_done) { 225 - DRM_DEBUG_DP("read DPCD with updated AUX config\n"); 223 + drm_dbg_dp(panel->drm_dev, 224 + "read DPCD with updated AUX config\n"); 226 225 rc = dp_panel_read_dpcd(dp_panel); 227 226 bw_code = drm_dp_link_rate_to_bw_code(dp_panel->link_info.rate); 228 227 if (rc || !is_link_rate_valid(bw_code) || ··· 337 334 catalog = panel->catalog; 338 335 339 336 if (!panel->panel_on) { 340 - DRM_DEBUG_DP("DP panel not enabled, handle TPG on next on\n"); 337 + drm_dbg_dp(panel->drm_dev, 338 + "DP panel not enabled, handle TPG on next on\n"); 341 339 return; 342 340 } 343 341 ··· 347 343 return; 348 344 } 349 345 350 - DRM_DEBUG_DP("%s: calling catalog tpg_enable\n", __func__); 346 + drm_dbg_dp(panel->drm_dev, "calling catalog tpg_enable\n"); 351 347 dp_catalog_panel_tpg_enable(catalog, &panel->dp_panel.dp_mode.drm_mode); 352 348 } 353 349 ··· 373 369 catalog = panel->catalog; 374 370 drm_mode = &panel->dp_panel.dp_mode.drm_mode; 375 371 376 - DRM_DEBUG_DP("width=%d hporch= %d %d %d\n", 372 + drm_dbg_dp(panel->drm_dev, "width=%d hporch= %d %d %d\n", 377 373 drm_mode->hdisplay, drm_mode->htotal - drm_mode->hsync_end, 378 374 drm_mode->hsync_start - drm_mode->hdisplay, 379 375 drm_mode->hsync_end - drm_mode->hsync_start); 380 376 381 - DRM_DEBUG_DP("height=%d vporch= %d %d %d\n", 377 + drm_dbg_dp(panel->drm_dev, "height=%d vporch= %d %d %d\n", 382 378 drm_mode->vdisplay, drm_mode->vtotal - drm_mode->vsync_end, 383 379 drm_mode->vsync_start - drm_mode->vdisplay, 384 380 drm_mode->vsync_end - drm_mode->vsync_start); ··· 422 418 int dp_panel_init_panel_info(struct dp_panel *dp_panel) 423 419 { 424 420 struct drm_display_mode *drm_mode; 421 + struct dp_panel_private *panel; 425 422 426 423 drm_mode = &dp_panel->dp_mode.drm_mode; 424 + 425 + panel = container_of(dp_panel, struct dp_panel_private, dp_panel); 427 426 428 427 /* 429 428 * print resolution info as this is a result 430 429 * of user initiated action of cable connection 431 430 */ 432 - DRM_DEBUG_DP("SET NEW RESOLUTION:\n"); 433 - DRM_DEBUG_DP("%dx%d@%dfps\n", drm_mode->hdisplay, 434 - drm_mode->vdisplay, drm_mode_vrefresh(drm_mode)); 435 - DRM_DEBUG_DP("h_porches(back|front|width) = (%d|%d|%d)\n", 431 + drm_dbg_dp(panel->drm_dev, "SET NEW RESOLUTION:\n"); 432 + drm_dbg_dp(panel->drm_dev, "%dx%d@%dfps\n", 433 + drm_mode->hdisplay, drm_mode->vdisplay, drm_mode_vrefresh(drm_mode)); 434 + drm_dbg_dp(panel->drm_dev, 435 + "h_porches(back|front|width) = (%d|%d|%d)\n", 436 436 drm_mode->htotal - drm_mode->hsync_end, 437 437 drm_mode->hsync_start - drm_mode->hdisplay, 438 438 drm_mode->hsync_end - drm_mode->hsync_start); 439 - DRM_DEBUG_DP("v_porches(back|front|width) = (%d|%d|%d)\n", 439 + drm_dbg_dp(panel->drm_dev, 440 + "v_porches(back|front|width) = (%d|%d|%d)\n", 440 441 drm_mode->vtotal - drm_mode->vsync_end, 441 442 drm_mode->vsync_start - drm_mode->vdisplay, 442 443 drm_mode->vsync_end - drm_mode->vsync_start); 443 - DRM_DEBUG_DP("pixel clock (KHz)=(%d)\n", drm_mode->clock); 444 - DRM_DEBUG_DP("bpp = %d\n", dp_panel->dp_mode.bpp); 444 + drm_dbg_dp(panel->drm_dev, "pixel clock (KHz)=(%d)\n", 445 + drm_mode->clock); 446 + drm_dbg_dp(panel->drm_dev, "bpp = %d\n", dp_panel->dp_mode.bpp); 445 447 446 448 dp_panel->dp_mode.bpp = max_t(u32, 18, 447 - min_t(u32, dp_panel->dp_mode.bpp, 30)); 448 - DRM_DEBUG_DP("updated bpp = %d\n", dp_panel->dp_mode.bpp); 449 + min_t(u32, dp_panel->dp_mode.bpp, 30)); 450 + drm_dbg_dp(panel->drm_dev, "updated bpp = %d\n", 451 + dp_panel->dp_mode.bpp); 449 452 450 453 return 0; 451 454 }

-2

drivers/gpu/drm/msm/dp/dp_parser.c

··· 260 260 } 261 261 } 262 262 263 - DRM_DEBUG_DP("clock parsing successful\n"); 264 - 265 263 return 0; 266 264 } 267 265

+18 -7

drivers/gpu/drm/msm/dp/dp_power.c

··· 16 16 struct dp_parser *parser; 17 17 struct platform_device *pdev; 18 18 struct device *dev; 19 + struct drm_device *drm_dev; 19 20 struct clk *link_clk_src; 20 21 struct clk *pixel_provider; 21 22 struct clk *link_provider; ··· 209 208 210 209 int dp_power_clk_status(struct dp_power *dp_power, enum dp_pm_type pm_type) 211 210 { 212 - DRM_DEBUG_DP("core_clk_on=%d link_clk_on=%d stream_clk_on=%d\n", 211 + struct dp_power_private *power; 212 + 213 + power = container_of(dp_power, struct dp_power_private, dp_power); 214 + 215 + drm_dbg_dp(power->drm_dev, 216 + "core_clk_on=%d link_clk_on=%d stream_clk_on=%d\n", 213 217 dp_power->core_clks_on, dp_power->link_clks_on, dp_power->stream_clks_on); 214 218 215 219 if (pm_type == DP_CORE_PM) ··· 246 240 247 241 if (enable) { 248 242 if (pm_type == DP_CORE_PM && dp_power->core_clks_on) { 249 - DRM_DEBUG_DP("core clks already enabled\n"); 243 + drm_dbg_dp(power->drm_dev, 244 + "core clks already enabled\n"); 250 245 return 0; 251 246 } 252 247 253 248 if (pm_type == DP_CTRL_PM && dp_power->link_clks_on) { 254 - DRM_DEBUG_DP("links clks already enabled\n"); 249 + drm_dbg_dp(power->drm_dev, 250 + "links clks already enabled\n"); 255 251 return 0; 256 252 } 257 253 258 254 if (pm_type == DP_STREAM_PM && dp_power->stream_clks_on) { 259 - DRM_DEBUG_DP("pixel clks already enabled\n"); 255 + drm_dbg_dp(power->drm_dev, 256 + "pixel clks already enabled\n"); 260 257 return 0; 261 258 } 262 259 263 260 if ((pm_type == DP_CTRL_PM) && (!dp_power->core_clks_on)) { 264 - DRM_DEBUG_DP("Enable core clks before link clks\n"); 261 + drm_dbg_dp(power->drm_dev, 262 + "Enable core clks before link clks\n"); 265 263 266 264 rc = dp_power_clk_set_rate(power, DP_CORE_PM, enable); 267 265 if (rc) { ··· 292 282 else 293 283 dp_power->link_clks_on = enable; 294 284 295 - DRM_DEBUG_DP("%s clocks for %s\n", 285 + drm_dbg_dp(power->drm_dev, "%s clocks for %s\n", 296 286 enable ? "enable" : "disable", 297 287 dp_parser_pm_name(pm_type)); 298 - DRM_DEBUG_DP("strem_clks:%s link_clks:%s core_clks:%s\n", 288 + drm_dbg_dp(power->drm_dev, 289 + "strem_clks:%s link_clks:%s core_clks:%s\n", 299 290 dp_power->stream_clks_on ? "on" : "off", 300 291 dp_power->link_clks_on ? "on" : "off", 301 292 dp_power->core_clks_on ? "on" : "off");