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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amdkfd: add edc error interrupt handle for poison propogate mode
In poison progogate mode, when driver receive the edc error interrupt
from SQ, driver should kill the process by pasid which is using the
poison data, and then trigger GPU reset.
Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Dennis Li
and committed by
Alex Deucher
20161e51
611ed9a5
+122
-7
+122
-7
drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
+122
-7
drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
···
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#include "soc15_int.h"
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#include "kfd_device_queue_manager.h"
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#include "kfd_smi_events.h"
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#include "amdgpu.h"
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enum SQ_INTERRUPT_WORD_ENCODING {
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SQ_INTERRUPT_WORD_ENCODING_AUTO = 0x0,
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SQ_INTERRUPT_WORD_ENCODING_INST,
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SQ_INTERRUPT_WORD_ENCODING_ERROR,
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};
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enum SQ_INTERRUPT_ERROR_TYPE {
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SQ_INTERRUPT_ERROR_TYPE_EDC_FUE = 0x0,
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SQ_INTERRUPT_ERROR_TYPE_ILLEGAL_INST,
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SQ_INTERRUPT_ERROR_TYPE_MEMVIOL,
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SQ_INTERRUPT_ERROR_TYPE_EDC_FED,
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};
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/* SQ_INTERRUPT_WORD_AUTO_CTXID */
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__THREAD_TRACE__SHIFT 0
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__WLT__SHIFT 1
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__THREAD_TRACE_BUF_FULL__SHIFT 2
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__REG_TIMESTAMP__SHIFT 3
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__CMD_TIMESTAMP__SHIFT 4
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__HOST_CMD_OVERFLOW__SHIFT 5
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__HOST_REG_OVERFLOW__SHIFT 6
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__IMMED_OVERFLOW__SHIFT 7
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__THREAD_TRACE_UTC_ERROR__SHIFT 8
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__SE_ID__SHIFT 24
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__ENCODING__SHIFT 26
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__THREAD_TRACE_MASK 0x00000001
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__WLT_MASK 0x00000002
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__THREAD_TRACE_BUF_FULL_MASK 0x00000004
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__REG_TIMESTAMP_MASK 0x00000008
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__CMD_TIMESTAMP_MASK 0x00000010
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__HOST_CMD_OVERFLOW_MASK 0x00000020
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__HOST_REG_OVERFLOW_MASK 0x00000040
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__IMMED_OVERFLOW_MASK 0x00000080
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__THREAD_TRACE_UTC_ERROR_MASK 0x00000100
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__SE_ID_MASK 0x03000000
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#define SQ_INTERRUPT_WORD_AUTO_CTXID__ENCODING_MASK 0x0c000000
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/* SQ_INTERRUPT_WORD_WAVE_CTXID */
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__DATA__SHIFT 0
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__SH_ID__SHIFT 12
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__PRIV__SHIFT 13
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__WAVE_ID__SHIFT 14
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__SIMD_ID__SHIFT 18
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__CU_ID__SHIFT 20
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__SE_ID__SHIFT 24
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__ENCODING__SHIFT 26
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__DATA_MASK 0x00000fff
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__SH_ID_MASK 0x00001000
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__PRIV_MASK 0x00002000
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__WAVE_ID_MASK 0x0003c000
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__SIMD_ID_MASK 0x000c0000
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__CU_ID_MASK 0x00f00000
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__SE_ID_MASK 0x03000000
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#define SQ_INTERRUPT_WORD_WAVE_CTXID__ENCODING_MASK 0x0c000000
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#define KFD_CONTEXT_ID_GET_SQ_INT_DATA(ctx0, ctx1) \
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((ctx0 & 0xfff) | ((ctx0 >> 16) & 0xf000) | ((ctx1 << 16) & 0xff0000))
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#define KFD_SQ_INT_DATA__ERR_TYPE_MASK 0xF00000
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#define KFD_SQ_INT_DATA__ERR_TYPE__SHIFT 20
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static bool event_interrupt_isr_v9(struct kfd_dev *dev,
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const uint32_t *ih_ring_entry,
···
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const uint32_t *ih_ring_entry)
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{
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uint16_t source_id, client_id, pasid, vmid;
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uint32_t context_id;
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uint32_t context_id0, context_id1;
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uint32_t sq_intr_err, sq_int_data, encoding;
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source_id = SOC15_SOURCE_ID_FROM_IH_ENTRY(ih_ring_entry);
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client_id = SOC15_CLIENT_ID_FROM_IH_ENTRY(ih_ring_entry);
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pasid = SOC15_PASID_FROM_IH_ENTRY(ih_ring_entry);
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vmid = SOC15_VMID_FROM_IH_ENTRY(ih_ring_entry);
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context_id = SOC15_CONTEXT_ID0_FROM_IH_ENTRY(ih_ring_entry);
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context_id0 = SOC15_CONTEXT_ID0_FROM_IH_ENTRY(ih_ring_entry);
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context_id1 = SOC15_CONTEXT_ID1_FROM_IH_ENTRY(ih_ring_entry);
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if (client_id == SOC15_IH_CLIENTID_GRBM_CP ||
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client_id == SOC15_IH_CLIENTID_SE0SH ||
···
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client_id == SOC15_IH_CLIENTID_SE2SH ||
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client_id == SOC15_IH_CLIENTID_SE3SH) {
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if (source_id == SOC15_INTSRC_CP_END_OF_PIPE)
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kfd_signal_event_interrupt(pasid, context_id, 32);
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else if (source_id == SOC15_INTSRC_SQ_INTERRUPT_MSG)
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kfd_signal_event_interrupt(pasid, context_id & 0xffffff, 24);
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else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE)
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kfd_signal_event_interrupt(pasid, context_id0, 32);
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else if (source_id == SOC15_INTSRC_SQ_INTERRUPT_MSG) {
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sq_int_data = KFD_CONTEXT_ID_GET_SQ_INT_DATA(context_id0, context_id1);
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encoding = REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, ENCODING);
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switch (encoding) {
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case SQ_INTERRUPT_WORD_ENCODING_AUTO:
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pr_debug(
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"sq_intr: auto, se %d, ttrace %d, wlt %d, ttrac_buf_full %d, reg_tms %d, cmd_tms %d, host_cmd_ovf %d, host_reg_ovf %d, immed_ovf %d, ttrace_utc_err %d\n",
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, SE_ID),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, THREAD_TRACE),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, WLT),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, THREAD_TRACE_BUF_FULL),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, REG_TIMESTAMP),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, CMD_TIMESTAMP),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, HOST_CMD_OVERFLOW),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, HOST_REG_OVERFLOW),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, IMMED_OVERFLOW),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, THREAD_TRACE_UTC_ERROR));
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break;
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case SQ_INTERRUPT_WORD_ENCODING_INST:
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pr_debug("sq_intr: inst, se %d, data 0x%x, sh %d, priv %d, wave_id %d, simd_id %d, cu_id %d, intr_data 0x%x\n",
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, SE_ID),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, DATA),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, SH_ID),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, PRIV),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, WAVE_ID),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, SIMD_ID),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, CU_ID),
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sq_int_data);
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break;
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case SQ_INTERRUPT_WORD_ENCODING_ERROR:
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sq_intr_err = REG_GET_FIELD(sq_int_data, KFD_SQ_INT_DATA, ERR_TYPE);
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pr_warn("sq_intr: error, se %d, data 0x%x, sh %d, priv %d, wave_id %d, simd_id %d, cu_id %d, err_type %d\n",
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, SE_ID),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, DATA),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, SH_ID),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, PRIV),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, WAVE_ID),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, SIMD_ID),
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REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, CU_ID),
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sq_intr_err);
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if (sq_intr_err != SQ_INTERRUPT_ERROR_TYPE_ILLEGAL_INST &&
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sq_intr_err != SQ_INTERRUPT_ERROR_TYPE_MEMVIOL) {
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kfd_signal_hw_exception_event(pasid);
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amdgpu_amdkfd_gpu_reset(dev->kgd);
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return;
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}
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break;
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default:
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break;
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}
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kfd_signal_event_interrupt(pasid, context_id0 & 0xffffff, 24);
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} else if (source_id == SOC15_INTSRC_CP_BAD_OPCODE)
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kfd_signal_hw_exception_event(pasid);
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} else if (client_id == SOC15_IH_CLIENTID_SDMA0 ||
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client_id == SOC15_IH_CLIENTID_SDMA1 ||
···
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client_id == SOC15_IH_CLIENTID_SDMA6 ||
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client_id == SOC15_IH_CLIENTID_SDMA7) {
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if (source_id == SOC15_INTSRC_SDMA_TRAP)
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kfd_signal_event_interrupt(pasid, context_id & 0xfffffff, 28);
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kfd_signal_event_interrupt(pasid, context_id0 & 0xfffffff, 28);
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} else if (client_id == SOC15_IH_CLIENTID_VMC ||
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client_id == SOC15_IH_CLIENTID_VMC1 ||
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client_id == SOC15_IH_CLIENTID_UTCL2) {