···3535#include <drm/drm_crtc_helper.h>3636#include <drm/drm_edid.h>37373838+static void amdgpu_flip_wait_fence(struct amdgpu_device *adev,3939+ struct fence **f)4040+{4141+ struct amdgpu_fence *fence;4242+ long r;4343+4444+ if (*f == NULL)4545+ return;4646+4747+ fence = to_amdgpu_fence(*f);4848+ if (fence) {4949+ r = fence_wait(&fence->base, false);5050+ if (r == -EDEADLK) {5151+ up_read(&adev->exclusive_lock);5252+ r = amdgpu_gpu_reset(adev);5353+ down_read(&adev->exclusive_lock);5454+ }5555+ } else5656+ r = fence_wait(*f, false);5757+5858+ if (r)5959+ DRM_ERROR("failed to wait on page flip fence (%ld)!\n", r);6060+6161+ /* We continue with the page flip even if we failed to wait on6262+ * the fence, otherwise the DRM core and userspace will be6363+ * confused about which BO the CRTC is scanning out6464+ */6565+ fence_put(*f);6666+ *f = NULL;6767+}38683969static void amdgpu_flip_work_func(struct work_struct *__work)4070{···7444 struct amdgpu_crtc *amdgpuCrtc = adev->mode_info.crtcs[work->crtc_id];75457646 struct drm_crtc *crtc = &amdgpuCrtc->base;7777- struct amdgpu_fence *fence;7847 unsigned long flags;7979- int r;4848+ unsigned i;80498150 down_read(&adev->exclusive_lock);8282- if (work->fence) {8383- fence = to_amdgpu_fence(work->fence);8484- if (fence) {8585- r = fence_wait(&fence->base, false);8686- if (r == -EDEADLK) {8787- up_read(&adev->exclusive_lock);8888- r = amdgpu_gpu_reset(adev);8989- down_read(&adev->exclusive_lock);9090- }9191- } else9292- r = fence_wait(work->fence, false);9393-9494- if (r)9595- DRM_ERROR("failed to wait on page flip fence (%d)!\n", r);9696-9797- /* We continue with the page flip even if we failed to wait on9898- * the fence, otherwise the DRM core and userspace will be9999- * confused about which BO the CRTC is scanning out100100- */101101-102102- fence_put(work->fence);103103- work->fence = NULL;104104- }5151+ amdgpu_flip_wait_fence(adev, &work->excl);5252+ for (i = 0; i < work->shared_count; ++i)5353+ amdgpu_flip_wait_fence(adev, &work->shared[i]);1055410655 /* We borrow the event spin lock for protecting flip_status */10756 spin_lock_irqsave(&crtc->dev->event_lock, flags);···117108 DRM_ERROR("failed to reserve buffer after flip\n");118109119110 drm_gem_object_unreference_unlocked(&work->old_rbo->gem_base);111111+ kfree(work->shared);120112 kfree(work);121113}122114···137127 unsigned long flags;138128 u64 tiling_flags;139129 u64 base;140140- int r;130130+ int i, r;141131142132 work = kzalloc(sizeof *work, GFP_KERNEL);143133 if (work == NULL)···177167 goto cleanup;178168 }179169180180- work->fence = fence_get(reservation_object_get_excl(new_rbo->tbo.resv));170170+ r = reservation_object_get_fences_rcu(new_rbo->tbo.resv, &work->excl,171171+ &work->shared_count,172172+ &work->shared);173173+ if (unlikely(r != 0)) {174174+ amdgpu_bo_unreserve(new_rbo);175175+ DRM_ERROR("failed to get fences for buffer\n");176176+ goto cleanup;177177+ }178178+179179+ fence_get(work->excl);180180+ for (i = 0; i < work->shared_count; ++i)181181+ fence_get(work->shared[i]);182182+181183 amdgpu_bo_get_tiling_flags(new_rbo, &tiling_flags);182184 amdgpu_bo_unreserve(new_rbo);183185···234212235213cleanup:236214 drm_gem_object_unreference_unlocked(&work->old_rbo->gem_base);237237- fence_put(work->fence);215215+ fence_put(work->excl);216216+ for (i = 0; i < work->shared_count; ++i)217217+ fence_put(work->shared[i]);218218+ kfree(work->shared);238219 kfree(work);239220240221 return r;