Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'pm-5.19-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull more power management updates from Rafael Wysocki:
"These update the ARM cpufreq drivers and fix up the CPPC cpufreq
driver after recent changes, update the OPP code and PM documentation
and add power sequences support to the system reboot and power off
code.

Specifics:

- Add Tegra234 cpufreq support (Sumit Gupta)

- Clean up and enhance the Mediatek cpufreq driver (Wan Jiabing,
Rex-BC Chen, and Jia-Wei Chang)

- Fix up the CPPC cpufreq driver after recent changes (Zheng Bin,
Pierre Gondois)

- Minor update to dt-binding for Qcom's opp-v2-kryo-cpu (Yassine
Oudjana)

- Use list iterator only inside the list_for_each_entry loop
(Xiaomeng Tong, and Jakob Koschel)

- New APIs related to finding OPP based on interconnect bandwidth
(Krzysztof Kozlowski)

- Fix the missing of_node_put() in _bandwidth_supported() (Dan
Carpenter)

- Cleanups (Krzysztof Kozlowski, and Viresh Kumar)

- Add Out of Band mode description to the intel-speed-select utility
documentation (Srinivas Pandruvada)

- Add power sequences support to the system reboot and power off code
and make related platform-specific changes for multiple platforms
(Dmitry Osipenko, Geert Uytterhoeven)"

* tag 'pm-5.19-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (60 commits)
cpufreq: CPPC: Fix unused-function warning
cpufreq: CPPC: Fix build error without CONFIG_ACPI_CPPC_CPUFREQ_FIE
Documentation: admin-guide: PM: Add Out of Band mode
kernel/reboot: Change registration order of legacy power-off handler
m68k: virt: Switch to new sys-off handler API
kernel/reboot: Add devm_register_restart_handler()
kernel/reboot: Add devm_register_power_off_handler()
soc/tegra: pmc: Use sys-off handler API to power off Nexus 7 properly
reboot: Remove pm_power_off_prepare()
regulator: pfuze100: Use devm_register_sys_off_handler()
ACPI: power: Switch to sys-off handler API
memory: emif: Use kernel_can_power_off()
mips: Use do_kernel_power_off()
ia64: Use do_kernel_power_off()
x86: Use do_kernel_power_off()
sh: Use do_kernel_power_off()
m68k: Switch to new sys-off handler API
powerpc: Use do_kernel_power_off()
xen/x86: Use do_kernel_power_off()
parisc: Use do_kernel_power_off()
...

+1650 -553
+22
Documentation/admin-guide/pm/intel-speed-select.rst
··· 262 262 level 0 to 2800 MHz at performance level 4. As a result, any workload, which can 263 263 use fewer CPUs, can see a boost of 200 MHz compared to performance level 0. 264 264 265 + Changing performance level via BMC Interface 266 + ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 267 + 268 + It is possible to change SST-PP level using out of band (OOB) agent (Via some 269 + remote management console, through BMC "Baseboard Management Controller" 270 + interface). This mode is supported from the Sapphire Rapids processor 271 + generation. The kernel and tool change to support this mode is added to Linux 272 + kernel version 5.18. To enable this feature, kernel config 273 + "CONFIG_INTEL_HFI_THERMAL" is required. The minimum version of the tool 274 + is "v1.12" to support this feature, which is part of Linux kernel version 5.18. 275 + 276 + To support such configuration, this tool can be used as a daemon. Add 277 + a command line option --oob:: 278 + 279 + # intel-speed-select --oob 280 + Intel(R) Speed Select Technology 281 + Executing on CPU model:143[0x8f] 282 + OOB mode is enabled and will run as daemon 283 + 284 + In this mode the tool will online/offline CPUs based on the new performance 285 + level. 286 + 265 287 Check presence of other Intel(R) SST features 266 288 --------------------------------------------- 267 289
+52
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra-ccplex-cluster.yaml#" 5 + $schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 + 7 + title: NVIDIA Tegra CPU COMPLEX CLUSTER area device tree bindings 8 + 9 + maintainers: 10 + - Sumit Gupta <sumitg@nvidia.com> 11 + - Mikko Perttunen <mperttunen@nvidia.com> 12 + - Jon Hunter <jonathanh@nvidia.com> 13 + - Thierry Reding <thierry.reding@gmail.com> 14 + 15 + description: |+ 16 + The Tegra CPU COMPLEX CLUSTER area contains memory-mapped 17 + registers that initiate CPU frequency/voltage transitions. 18 + 19 + properties: 20 + $nodename: 21 + pattern: "ccplex@([0-9a-f]+)$" 22 + 23 + compatible: 24 + enum: 25 + - nvidia,tegra186-ccplex-cluster 26 + - nvidia,tegra234-ccplex-cluster 27 + 28 + reg: 29 + maxItems: 1 30 + 31 + nvidia,bpmp: 32 + $ref: '/schemas/types.yaml#/definitions/phandle' 33 + description: | 34 + Specifies the BPMP node that needs to be queried to get 35 + operating point data for all CPUs. 36 + 37 + additionalProperties: false 38 + 39 + required: 40 + - compatible 41 + - reg 42 + - nvidia,bpmp 43 + - status 44 + 45 + examples: 46 + - | 47 + ccplex@e000000 { 48 + compatible = "nvidia,tegra234-ccplex-cluster"; 49 + reg = <0x0e000000 0x5ffff>; 50 + nvidia,bpmp = <&bpmp>; 51 + status = "okay"; 52 + };
+7
Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt
··· 20 20 Vsram to fit SoC specific needs. When absent, the voltage scaling 21 21 flow is handled by hardware, hence no software "voltage tracking" is 22 22 needed. 23 + - mediatek,cci: 24 + Used to confirm the link status between cpufreq and mediatek cci. Because 25 + cpufreq and mediatek cci could share the same regulator in some MediaTek SoCs. 26 + To prevent the issue of high frequency and low voltage, we need to use this 27 + property to make sure mediatek cci is ready. 28 + For details of mediatek cci, please refer to 29 + Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml 23 30 - #cooling-cells: 24 31 For details, please refer to 25 32 Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml
+28 -32
Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
··· 17 17 the CPU frequencies subset and voltage value of each OPP varies based on 18 18 the silicon variant in use. 19 19 Qualcomm Technologies, Inc. Process Voltage Scaling Tables 20 - defines the voltage and frequency value based on the msm-id in SMEM 21 - and speedbin blown in the efuse combination. 22 - The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC 23 - to provide the OPP framework with required information (existing HW bitmap). 20 + defines the voltage and frequency value based on the speedbin blown in 21 + the efuse combination. 22 + The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide 23 + the OPP framework with required information (existing HW bitmap). 24 24 This is used to determine the voltage and frequency value for each OPP of 25 25 operating-points-v2 table when it is parsed by the OPP framework. 26 26 ··· 50 50 description: | 51 51 A single 32 bit bitmap value, representing compatible HW. 52 52 Bitmap: 53 - 0: MSM8996 V3, speedbin 0 54 - 1: MSM8996 V3, speedbin 1 55 - 2: MSM8996 V3, speedbin 2 56 - 3: unused 57 - 4: MSM8996 SG, speedbin 0 58 - 5: MSM8996 SG, speedbin 1 59 - 6: MSM8996 SG, speedbin 2 60 - 7-31: unused 61 - maximum: 0x77 53 + 0: MSM8996, speedbin 0 54 + 1: MSM8996, speedbin 1 55 + 2: MSM8996, speedbin 2 56 + 3-31: unused 57 + maximum: 0x7 62 58 63 59 clock-latency-ns: true 64 60 ··· 180 184 opp-307200000 { 181 185 opp-hz = /bits/ 64 <307200000>; 182 186 opp-microvolt = <905000 905000 1140000>; 183 - opp-supported-hw = <0x77>; 187 + opp-supported-hw = <0x7>; 188 + clock-latency-ns = <200000>; 189 + }; 190 + opp-1401600000 { 191 + opp-hz = /bits/ 64 <1401600000>; 192 + opp-microvolt = <1140000 905000 1140000>; 193 + opp-supported-hw = <0x5>; 184 194 clock-latency-ns = <200000>; 185 195 }; 186 196 opp-1593600000 { 187 197 opp-hz = /bits/ 64 <1593600000>; 188 198 opp-microvolt = <1140000 905000 1140000>; 189 - opp-supported-hw = <0x71>; 190 - clock-latency-ns = <200000>; 191 - }; 192 - opp-2188800000 { 193 - opp-hz = /bits/ 64 <2188800000>; 194 - opp-microvolt = <1140000 905000 1140000>; 195 - opp-supported-hw = <0x10>; 199 + opp-supported-hw = <0x1>; 196 200 clock-latency-ns = <200000>; 197 201 }; 198 202 }; ··· 205 209 opp-307200000 { 206 210 opp-hz = /bits/ 64 <307200000>; 207 211 opp-microvolt = <905000 905000 1140000>; 208 - opp-supported-hw = <0x77>; 212 + opp-supported-hw = <0x7>; 209 213 clock-latency-ns = <200000>; 210 214 }; 211 - opp-1593600000 { 212 - opp-hz = /bits/ 64 <1593600000>; 215 + opp-1804800000 { 216 + opp-hz = /bits/ 64 <1804800000>; 213 217 opp-microvolt = <1140000 905000 1140000>; 214 - opp-supported-hw = <0x70>; 218 + opp-supported-hw = <0x6>; 219 + clock-latency-ns = <200000>; 220 + }; 221 + opp-1900800000 { 222 + opp-hz = /bits/ 64 <1900800000>; 223 + opp-microvolt = <1140000 905000 1140000>; 224 + opp-supported-hw = <0x4>; 215 225 clock-latency-ns = <200000>; 216 226 }; 217 227 opp-2150400000 { 218 228 opp-hz = /bits/ 64 <2150400000>; 219 229 opp-microvolt = <1140000 905000 1140000>; 220 - opp-supported-hw = <0x31>; 221 - clock-latency-ns = <200000>; 222 - }; 223 - opp-2342400000 { 224 - opp-hz = /bits/ 64 <2342400000>; 225 - opp-microvolt = <1140000 905000 1140000>; 226 - opp-supported-hw = <0x10>; 230 + opp-supported-hw = <0x1>; 227 231 clock-latency-ns = <200000>; 228 232 }; 229 233 };
+1 -3
arch/arm/kernel/reboot.c
··· 116 116 { 117 117 local_irq_disable(); 118 118 smp_send_stop(); 119 - 120 - if (pm_power_off) 121 - pm_power_off(); 119 + do_kernel_power_off(); 122 120 } 123 121 124 122 /*
+1 -2
arch/arm64/kernel/process.c
··· 111 111 { 112 112 local_irq_disable(); 113 113 smp_send_stop(); 114 - if (pm_power_off) 115 - pm_power_off(); 114 + do_kernel_power_off(); 116 115 } 117 116 118 117 /*
+2 -4
arch/csky/kernel/power.c
··· 9 9 void machine_power_off(void) 10 10 { 11 11 local_irq_disable(); 12 - if (pm_power_off) 13 - pm_power_off(); 12 + do_kernel_power_off(); 14 13 asm volatile ("bkpt"); 15 14 } 16 15 17 16 void machine_halt(void) 18 17 { 19 18 local_irq_disable(); 20 - if (pm_power_off) 21 - pm_power_off(); 19 + do_kernel_power_off(); 22 20 asm volatile ("bkpt"); 23 21 } 24 22
+2 -2
arch/ia64/kernel/process.c
··· 19 19 #include <linux/module.h> 20 20 #include <linux/notifier.h> 21 21 #include <linux/personality.h> 22 + #include <linux/reboot.h> 22 23 #include <linux/sched.h> 23 24 #include <linux/sched/debug.h> 24 25 #include <linux/sched/hotplug.h> ··· 600 599 void 601 600 machine_power_off (void) 602 601 { 603 - if (pm_power_off) 604 - pm_power_off(); 602 + do_kernel_power_off(); 605 603 machine_halt(); 606 604 } 607 605
+2 -1
arch/m68k/emu/natfeat.c
··· 15 15 #include <linux/string.h> 16 16 #include <linux/kernel.h> 17 17 #include <linux/module.h> 18 + #include <linux/reboot.h> 18 19 #include <linux/io.h> 19 20 #include <asm/machdep.h> 20 21 #include <asm/natfeat.h> ··· 91 90 pr_info("NatFeats found (%s, %lu.%lu)\n", buf, version >> 16, 92 91 version & 0xffff); 93 92 94 - mach_power_off = nf_poweroff; 93 + register_platform_power_off(nf_poweroff); 95 94 }
-1
arch/m68k/include/asm/machdep.h
··· 23 23 extern int (*mach_set_rtc_pll)(struct rtc_pll_info *); 24 24 extern void (*mach_reset)( void ); 25 25 extern void (*mach_halt)( void ); 26 - extern void (*mach_power_off)( void ); 27 26 extern unsigned long (*mach_hd_init) (unsigned long, unsigned long); 28 27 extern void (*mach_hd_setup)(char *, int *); 29 28 extern void (*mach_heartbeat) (int);
+2 -3
arch/m68k/kernel/process.c
··· 67 67 68 68 void machine_power_off(void) 69 69 { 70 - if (mach_power_off) 71 - mach_power_off(); 70 + do_kernel_power_off(); 72 71 for (;;); 73 72 } 74 73 75 - void (*pm_power_off)(void) = machine_power_off; 74 + void (*pm_power_off)(void); 76 75 EXPORT_SYMBOL(pm_power_off); 77 76 78 77 void show_regs(struct pt_regs * regs)
-1
arch/m68k/kernel/setup_mm.c
··· 89 89 void (*mach_get_hardware_list) (struct seq_file *m); 90 90 void (*mach_reset)( void ); 91 91 void (*mach_halt)( void ); 92 - void (*mach_power_off)( void ); 93 92 #ifdef CONFIG_HEARTBEAT 94 93 void (*mach_heartbeat) (int); 95 94 EXPORT_SYMBOL(mach_heartbeat);
-1
arch/m68k/kernel/setup_no.c
··· 54 54 /* machine dependent reboot functions */ 55 55 void (*mach_reset)(void); 56 56 void (*mach_halt)(void); 57 - void (*mach_power_off)(void); 58 57 59 58 #ifdef CONFIG_M68000 60 59 #if defined(CONFIG_M68328)
+3 -1
arch/m68k/mac/config.c
··· 12 12 13 13 #include <linux/errno.h> 14 14 #include <linux/module.h> 15 + #include <linux/reboot.h> 15 16 #include <linux/types.h> 16 17 #include <linux/mm.h> 17 18 #include <linux/tty.h> ··· 141 140 mach_hwclk = mac_hwclk; 142 141 mach_reset = mac_reset; 143 142 mach_halt = mac_poweroff; 144 - mach_power_off = mac_poweroff; 145 143 #if IS_ENABLED(CONFIG_INPUT_M68K_BEEP) 146 144 mach_beep = mac_mksound; 147 145 #endif ··· 160 160 161 161 if (macintosh_config->ident == MAC_MODEL_IICI) 162 162 mach_l2_flush = via_l2_flush; 163 + 164 + register_platform_power_off(mac_poweroff); 163 165 } 164 166 165 167
+3 -1
arch/m68k/virt/config.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 3 + #include <linux/reboot.h> 3 4 #include <linux/serial_core.h> 4 5 #include <clocksource/timer-goldfish.h> 5 6 ··· 127 126 mach_get_model = virt_get_model; 128 127 mach_reset = virt_reset; 129 128 mach_halt = virt_halt; 130 - mach_power_off = virt_halt; 129 + 130 + register_platform_power_off(virt_halt); 131 131 }
+1 -2
arch/mips/kernel/reset.c
··· 114 114 115 115 void machine_power_off(void) 116 116 { 117 - if (pm_power_off) 118 - pm_power_off(); 117 + do_kernel_power_off(); 119 118 120 119 #ifdef CONFIG_SMP 121 120 preempt_disable();
+2 -2
arch/parisc/kernel/process.c
··· 26 26 #include <linux/module.h> 27 27 #include <linux/personality.h> 28 28 #include <linux/ptrace.h> 29 + #include <linux/reboot.h> 29 30 #include <linux/sched.h> 30 31 #include <linux/sched/debug.h> 31 32 #include <linux/sched/task.h> ··· 117 116 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_SHUTDOWN); 118 117 119 118 /* ipmi_poweroff may have been installed. */ 120 - if (pm_power_off) 121 - pm_power_off(); 119 + do_kernel_power_off(); 122 120 123 121 /* It seems we have no way to power the system off via 124 122 * software. The user has to press the button himself. */
+1 -3
arch/powerpc/kernel/setup-common.c
··· 161 161 void machine_power_off(void) 162 162 { 163 163 machine_shutdown(); 164 - if (pm_power_off) 165 - pm_power_off(); 166 - 164 + do_kernel_power_off(); 167 165 smp_send_stop(); 168 166 machine_hang(); 169 167 }
+1 -2
arch/powerpc/xmon/xmon.c
··· 1242 1242 } else if (cmd == 'h') { 1243 1243 ppc_md.halt(); 1244 1244 } else if (cmd == 'p') { 1245 - if (pm_power_off) 1246 - pm_power_off(); 1245 + do_kernel_power_off(); 1247 1246 } 1248 1247 } 1249 1248
+4 -8
arch/riscv/kernel/reset.c
··· 23 23 24 24 void machine_halt(void) 25 25 { 26 - if (pm_power_off != NULL) 27 - pm_power_off(); 28 - else 29 - default_power_off(); 26 + do_kernel_power_off(); 27 + default_power_off(); 30 28 } 31 29 32 30 void machine_power_off(void) 33 31 { 34 - if (pm_power_off != NULL) 35 - pm_power_off(); 36 - else 37 - default_power_off(); 32 + do_kernel_power_off(); 33 + default_power_off(); 38 34 }
+1 -2
arch/sh/kernel/reboot.c
··· 46 46 47 47 static void native_machine_power_off(void) 48 48 { 49 - if (pm_power_off) 50 - pm_power_off(); 49 + do_kernel_power_off(); 51 50 } 52 51 53 52 static void native_machine_halt(void)
+2 -2
arch/x86/kernel/reboot.c
··· 739 739 740 740 static void native_machine_power_off(void) 741 741 { 742 - if (pm_power_off) { 742 + if (kernel_can_power_off()) { 743 743 if (!reboot_force) 744 744 machine_shutdown(); 745 - pm_power_off(); 745 + do_kernel_power_off(); 746 746 } 747 747 /* A fallback in case there is no PM info available */ 748 748 tboot_shutdown(TB_SHUTDOWN_HALT);
+2 -2
arch/x86/xen/enlighten_pv.c
··· 30 30 #include <linux/pci.h> 31 31 #include <linux/gfp.h> 32 32 #include <linux/edd.h> 33 + #include <linux/reboot.h> 33 34 34 35 #include <xen/xen.h> 35 36 #include <xen/events.h> ··· 1070 1069 1071 1070 static void xen_machine_power_off(void) 1072 1071 { 1073 - if (pm_power_off) 1074 - pm_power_off(); 1072 + do_kernel_power_off(); 1075 1073 xen_reboot(SHUTDOWN_poweroff); 1076 1074 } 1077 1075
+12 -4
drivers/acpi/sleep.c
··· 1035 1035 static inline void acpi_sleep_hibernate_setup(void) {} 1036 1036 #endif /* !CONFIG_HIBERNATION */ 1037 1037 1038 - static void acpi_power_off_prepare(void) 1038 + static int acpi_power_off_prepare(struct sys_off_data *data) 1039 1039 { 1040 1040 /* Prepare to power off the system */ 1041 1041 acpi_sleep_prepare(ACPI_STATE_S5); 1042 1042 acpi_disable_all_gpes(); 1043 1043 acpi_os_wait_events_complete(); 1044 + return NOTIFY_DONE; 1044 1045 } 1045 1046 1046 - static void acpi_power_off(void) 1047 + static int acpi_power_off(struct sys_off_data *data) 1047 1048 { 1048 1049 /* acpi_sleep_prepare(ACPI_STATE_S5) should have already been called */ 1049 1050 pr_debug("%s called\n", __func__); 1050 1051 local_irq_disable(); 1051 1052 acpi_enter_sleep_state(ACPI_STATE_S5); 1053 + return NOTIFY_DONE; 1052 1054 } 1053 1055 1054 1056 int __init acpi_sleep_init(void) ··· 1069 1067 1070 1068 if (acpi_sleep_state_supported(ACPI_STATE_S5)) { 1071 1069 sleep_states[ACPI_STATE_S5] = 1; 1072 - pm_power_off_prepare = acpi_power_off_prepare; 1073 - pm_power_off = acpi_power_off; 1070 + 1071 + register_sys_off_handler(SYS_OFF_MODE_POWER_OFF_PREPARE, 1072 + SYS_OFF_PRIO_FIRMWARE, 1073 + acpi_power_off_prepare, NULL); 1074 + 1075 + register_sys_off_handler(SYS_OFF_MODE_POWER_OFF, 1076 + SYS_OFF_PRIO_FIRMWARE, 1077 + acpi_power_off, NULL); 1074 1078 } else { 1075 1079 acpi_no_s5 = true; 1076 1080 }
+10 -10
drivers/cpufreq/cppc_cpufreq.c
··· 61 61 } 62 62 }; 63 63 64 + static struct cpufreq_driver cppc_cpufreq_driver; 65 + 64 66 #ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIE 65 67 66 68 /* Frequency invariance support */ ··· 77 75 static DEFINE_PER_CPU(struct cppc_freq_invariance, cppc_freq_inv); 78 76 static struct kthread_worker *kworker_fie; 79 77 80 - static struct cpufreq_driver cppc_cpufreq_driver; 81 78 static unsigned int hisi_cppc_cpufreq_get_rate(unsigned int cpu); 82 79 static int cppc_perf_from_fbctrs(struct cppc_cpudata *cpu_data, 83 80 struct cppc_perf_fb_ctrs *fb_ctrs_t0, ··· 441 440 } 442 441 return cppc_get_transition_latency(cpu) / NSEC_PER_USEC; 443 442 } 443 + #else 444 + static unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu) 445 + { 446 + return cppc_get_transition_latency(cpu) / NSEC_PER_USEC; 447 + } 448 + #endif 449 + 450 + #if defined(CONFIG_ARM64) && defined(CONFIG_ENERGY_MODEL) 444 451 445 452 static DEFINE_PER_CPU(unsigned int, efficiency_class); 446 453 static void cppc_cpufreq_register_em(struct cpufreq_policy *policy); ··· 629 620 } 630 621 631 622 #else 632 - 633 - static unsigned int cppc_cpufreq_get_transition_delay_us(unsigned int cpu) 634 - { 635 - return cppc_get_transition_latency(cpu) / NSEC_PER_USEC; 636 - } 637 623 static int populate_efficiency_class(void) 638 624 { 639 625 return 0; 640 626 } 641 - static void cppc_cpufreq_register_em(struct cpufreq_policy *policy) 642 - { 643 - } 644 627 #endif 645 - 646 628 647 629 static struct cppc_cpudata *cppc_cpufreq_get_cpu_data(unsigned int cpu) 648 630 {
+413 -221
drivers/cpufreq/mediatek-cpufreq.c
··· 8 8 #include <linux/cpu.h> 9 9 #include <linux/cpufreq.h> 10 10 #include <linux/cpumask.h> 11 + #include <linux/minmax.h> 11 12 #include <linux/module.h> 12 13 #include <linux/of.h> 14 + #include <linux/of_platform.h> 13 15 #include <linux/platform_device.h> 14 16 #include <linux/pm_opp.h> 15 17 #include <linux/regulator/consumer.h> 16 - #include <linux/slab.h> 17 - #include <linux/thermal.h> 18 18 19 - #define MIN_VOLT_SHIFT (100000) 20 - #define MAX_VOLT_SHIFT (200000) 21 - #define MAX_VOLT_LIMIT (1150000) 22 - #define VOLT_TOL (10000) 19 + struct mtk_cpufreq_platform_data { 20 + int min_volt_shift; 21 + int max_volt_shift; 22 + int proc_max_volt; 23 + int sram_min_volt; 24 + int sram_max_volt; 25 + bool ccifreq_supported; 26 + }; 23 27 24 28 /* 25 29 * The struct mtk_cpu_dvfs_info holds necessary information for doing CPU DVFS ··· 39 35 struct mtk_cpu_dvfs_info { 40 36 struct cpumask cpus; 41 37 struct device *cpu_dev; 38 + struct device *cci_dev; 42 39 struct regulator *proc_reg; 43 40 struct regulator *sram_reg; 44 41 struct clk *cpu_clk; ··· 47 42 struct list_head list_head; 48 43 int intermediate_voltage; 49 44 bool need_voltage_tracking; 45 + int vproc_on_boot; 46 + int pre_vproc; 47 + /* Avoid race condition for regulators between notify and policy */ 48 + struct mutex reg_lock; 49 + struct notifier_block opp_nb; 50 + unsigned int opp_cpu; 51 + unsigned long current_freq; 52 + const struct mtk_cpufreq_platform_data *soc_data; 53 + int vtrack_max; 54 + bool ccifreq_bound; 50 55 }; 56 + 57 + static struct platform_device *cpufreq_pdev; 51 58 52 59 static LIST_HEAD(dvfs_info_list); 53 60 ··· 78 61 static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_dvfs_info *info, 79 62 int new_vproc) 80 63 { 64 + const struct mtk_cpufreq_platform_data *soc_data = info->soc_data; 81 65 struct regulator *proc_reg = info->proc_reg; 82 66 struct regulator *sram_reg = info->sram_reg; 83 - int old_vproc, old_vsram, new_vsram, vsram, vproc, ret; 67 + int pre_vproc, pre_vsram, new_vsram, vsram, vproc, ret; 68 + int retry = info->vtrack_max; 84 69 85 - old_vproc = regulator_get_voltage(proc_reg); 86 - if (old_vproc < 0) { 87 - pr_err("%s: invalid Vproc value: %d\n", __func__, old_vproc); 88 - return old_vproc; 70 + pre_vproc = regulator_get_voltage(proc_reg); 71 + if (pre_vproc < 0) { 72 + dev_err(info->cpu_dev, 73 + "invalid Vproc value: %d\n", pre_vproc); 74 + return pre_vproc; 89 75 } 90 - /* Vsram should not exceed the maximum allowed voltage of SoC. */ 91 - new_vsram = min(new_vproc + MIN_VOLT_SHIFT, MAX_VOLT_LIMIT); 92 76 93 - if (old_vproc < new_vproc) { 94 - /* 95 - * When scaling up voltages, Vsram and Vproc scale up step 96 - * by step. At each step, set Vsram to (Vproc + 200mV) first, 97 - * then set Vproc to (Vsram - 100mV). 98 - * Keep doing it until Vsram and Vproc hit target voltages. 99 - */ 100 - do { 101 - old_vsram = regulator_get_voltage(sram_reg); 102 - if (old_vsram < 0) { 103 - pr_err("%s: invalid Vsram value: %d\n", 104 - __func__, old_vsram); 105 - return old_vsram; 106 - } 107 - old_vproc = regulator_get_voltage(proc_reg); 108 - if (old_vproc < 0) { 109 - pr_err("%s: invalid Vproc value: %d\n", 110 - __func__, old_vproc); 111 - return old_vproc; 112 - } 77 + pre_vsram = regulator_get_voltage(sram_reg); 78 + if (pre_vsram < 0) { 79 + dev_err(info->cpu_dev, "invalid Vsram value: %d\n", pre_vsram); 80 + return pre_vsram; 81 + } 113 82 114 - vsram = min(new_vsram, old_vproc + MAX_VOLT_SHIFT); 83 + new_vsram = clamp(new_vproc + soc_data->min_volt_shift, 84 + soc_data->sram_min_volt, soc_data->sram_max_volt); 115 85 116 - if (vsram + VOLT_TOL >= MAX_VOLT_LIMIT) { 117 - vsram = MAX_VOLT_LIMIT; 86 + do { 87 + if (pre_vproc <= new_vproc) { 88 + vsram = clamp(pre_vproc + soc_data->max_volt_shift, 89 + soc_data->sram_min_volt, new_vsram); 90 + ret = regulator_set_voltage(sram_reg, vsram, 91 + soc_data->sram_max_volt); 118 92 119 - /* 120 - * If the target Vsram hits the maximum voltage, 121 - * try to set the exact voltage value first. 122 - */ 123 - ret = regulator_set_voltage(sram_reg, vsram, 124 - vsram); 125 - if (ret) 126 - ret = regulator_set_voltage(sram_reg, 127 - vsram - VOLT_TOL, 128 - vsram); 129 - 130 - vproc = new_vproc; 131 - } else { 132 - ret = regulator_set_voltage(sram_reg, vsram, 133 - vsram + VOLT_TOL); 134 - 135 - vproc = vsram - MIN_VOLT_SHIFT; 136 - } 137 93 if (ret) 138 94 return ret; 139 95 96 + if (vsram == soc_data->sram_max_volt || 97 + new_vsram == soc_data->sram_min_volt) 98 + vproc = new_vproc; 99 + else 100 + vproc = vsram - soc_data->min_volt_shift; 101 + 140 102 ret = regulator_set_voltage(proc_reg, vproc, 141 - vproc + VOLT_TOL); 103 + soc_data->proc_max_volt); 142 104 if (ret) { 143 - regulator_set_voltage(sram_reg, old_vsram, 144 - old_vsram); 105 + regulator_set_voltage(sram_reg, pre_vsram, 106 + soc_data->sram_max_volt); 145 107 return ret; 146 108 } 147 - } while (vproc < new_vproc || vsram < new_vsram); 148 - } else if (old_vproc > new_vproc) { 149 - /* 150 - * When scaling down voltages, Vsram and Vproc scale down step 151 - * by step. At each step, set Vproc to (Vsram - 200mV) first, 152 - * then set Vproc to (Vproc + 100mV). 153 - * Keep doing it until Vsram and Vproc hit target voltages. 154 - */ 155 - do { 156 - old_vproc = regulator_get_voltage(proc_reg); 157 - if (old_vproc < 0) { 158 - pr_err("%s: invalid Vproc value: %d\n", 159 - __func__, old_vproc); 160 - return old_vproc; 161 - } 162 - old_vsram = regulator_get_voltage(sram_reg); 163 - if (old_vsram < 0) { 164 - pr_err("%s: invalid Vsram value: %d\n", 165 - __func__, old_vsram); 166 - return old_vsram; 167 - } 168 - 169 - vproc = max(new_vproc, old_vsram - MAX_VOLT_SHIFT); 109 + } else if (pre_vproc > new_vproc) { 110 + vproc = max(new_vproc, 111 + pre_vsram - soc_data->max_volt_shift); 170 112 ret = regulator_set_voltage(proc_reg, vproc, 171 - vproc + VOLT_TOL); 113 + soc_data->proc_max_volt); 172 114 if (ret) 173 115 return ret; 174 116 175 117 if (vproc == new_vproc) 176 118 vsram = new_vsram; 177 119 else 178 - vsram = max(new_vsram, vproc + MIN_VOLT_SHIFT); 120 + vsram = max(new_vsram, 121 + vproc + soc_data->min_volt_shift); 179 122 180 - if (vsram + VOLT_TOL >= MAX_VOLT_LIMIT) { 181 - vsram = MAX_VOLT_LIMIT; 182 - 183 - /* 184 - * If the target Vsram hits the maximum voltage, 185 - * try to set the exact voltage value first. 186 - */ 187 - ret = regulator_set_voltage(sram_reg, vsram, 188 - vsram); 189 - if (ret) 190 - ret = regulator_set_voltage(sram_reg, 191 - vsram - VOLT_TOL, 192 - vsram); 193 - } else { 194 - ret = regulator_set_voltage(sram_reg, vsram, 195 - vsram + VOLT_TOL); 196 - } 197 - 123 + ret = regulator_set_voltage(sram_reg, vsram, 124 + soc_data->sram_max_volt); 198 125 if (ret) { 199 - regulator_set_voltage(proc_reg, old_vproc, 200 - old_vproc); 126 + regulator_set_voltage(proc_reg, pre_vproc, 127 + soc_data->proc_max_volt); 201 128 return ret; 202 129 } 203 - } while (vproc > new_vproc + VOLT_TOL || 204 - vsram > new_vsram + VOLT_TOL); 205 - } 130 + } 131 + 132 + pre_vproc = vproc; 133 + pre_vsram = vsram; 134 + 135 + if (--retry < 0) { 136 + dev_err(info->cpu_dev, 137 + "over loop count, failed to set voltage\n"); 138 + return -EINVAL; 139 + } 140 + } while (vproc != new_vproc || vsram != new_vsram); 206 141 207 142 return 0; 208 143 } 209 144 210 145 static int mtk_cpufreq_set_voltage(struct mtk_cpu_dvfs_info *info, int vproc) 211 146 { 147 + const struct mtk_cpufreq_platform_data *soc_data = info->soc_data; 148 + int ret; 149 + 212 150 if (info->need_voltage_tracking) 213 - return mtk_cpufreq_voltage_tracking(info, vproc); 151 + ret = mtk_cpufreq_voltage_tracking(info, vproc); 214 152 else 215 - return regulator_set_voltage(info->proc_reg, vproc, 216 - vproc + VOLT_TOL); 153 + ret = regulator_set_voltage(info->proc_reg, vproc, 154 + soc_data->proc_max_volt); 155 + if (!ret) 156 + info->pre_vproc = vproc; 157 + 158 + return ret; 159 + } 160 + 161 + static bool is_ccifreq_ready(struct mtk_cpu_dvfs_info *info) 162 + { 163 + struct device_link *sup_link; 164 + 165 + if (info->ccifreq_bound) 166 + return true; 167 + 168 + sup_link = device_link_add(info->cpu_dev, info->cci_dev, 169 + DL_FLAG_AUTOREMOVE_CONSUMER); 170 + if (!sup_link) { 171 + dev_err(info->cpu_dev, "cpu%d: sup_link is NULL\n", info->opp_cpu); 172 + return false; 173 + } 174 + 175 + if (sup_link->supplier->links.status != DL_DEV_DRIVER_BOUND) 176 + return false; 177 + 178 + info->ccifreq_bound = true; 179 + 180 + return true; 217 181 } 218 182 219 183 static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, ··· 206 208 struct mtk_cpu_dvfs_info *info = policy->driver_data; 207 209 struct device *cpu_dev = info->cpu_dev; 208 210 struct dev_pm_opp *opp; 209 - long freq_hz, old_freq_hz; 210 - int vproc, old_vproc, inter_vproc, target_vproc, ret; 211 + long freq_hz, pre_freq_hz; 212 + int vproc, pre_vproc, inter_vproc, target_vproc, ret; 211 213 212 214 inter_vproc = info->intermediate_voltage; 213 215 214 - old_freq_hz = clk_get_rate(cpu_clk); 215 - old_vproc = regulator_get_voltage(info->proc_reg); 216 - if (old_vproc < 0) { 217 - pr_err("%s: invalid Vproc value: %d\n", __func__, old_vproc); 218 - return old_vproc; 216 + pre_freq_hz = clk_get_rate(cpu_clk); 217 + 218 + mutex_lock(&info->reg_lock); 219 + 220 + if (unlikely(info->pre_vproc <= 0)) 221 + pre_vproc = regulator_get_voltage(info->proc_reg); 222 + else 223 + pre_vproc = info->pre_vproc; 224 + 225 + if (pre_vproc < 0) { 226 + dev_err(cpu_dev, "invalid Vproc value: %d\n", pre_vproc); 227 + ret = pre_vproc; 228 + goto out; 219 229 } 220 230 221 231 freq_hz = freq_table[index].frequency * 1000; 222 232 223 233 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_hz); 224 234 if (IS_ERR(opp)) { 225 - pr_err("cpu%d: failed to find OPP for %ld\n", 226 - policy->cpu, freq_hz); 227 - return PTR_ERR(opp); 235 + dev_err(cpu_dev, "cpu%d: failed to find OPP for %ld\n", 236 + policy->cpu, freq_hz); 237 + ret = PTR_ERR(opp); 238 + goto out; 228 239 } 229 240 vproc = dev_pm_opp_get_voltage(opp); 230 241 dev_pm_opp_put(opp); 231 242 232 243 /* 244 + * If MediaTek cci is supported but is not ready, we will use the value 245 + * of max(target cpu voltage, booting voltage) to prevent high freqeuncy 246 + * low voltage crash. 247 + */ 248 + if (info->soc_data->ccifreq_supported && !is_ccifreq_ready(info)) 249 + vproc = max(vproc, info->vproc_on_boot); 250 + 251 + /* 233 252 * If the new voltage or the intermediate voltage is higher than the 234 253 * current voltage, scale up voltage first. 235 254 */ 236 - target_vproc = (inter_vproc > vproc) ? inter_vproc : vproc; 237 - if (old_vproc < target_vproc) { 255 + target_vproc = max(inter_vproc, vproc); 256 + if (pre_vproc <= target_vproc) { 238 257 ret = mtk_cpufreq_set_voltage(info, target_vproc); 239 258 if (ret) { 240 - pr_err("cpu%d: failed to scale up voltage!\n", 241 - policy->cpu); 242 - mtk_cpufreq_set_voltage(info, old_vproc); 243 - return ret; 259 + dev_err(cpu_dev, 260 + "cpu%d: failed to scale up voltage!\n", policy->cpu); 261 + mtk_cpufreq_set_voltage(info, pre_vproc); 262 + goto out; 244 263 } 245 264 } 246 265 247 266 /* Reparent the CPU clock to intermediate clock. */ 248 267 ret = clk_set_parent(cpu_clk, info->inter_clk); 249 268 if (ret) { 250 - pr_err("cpu%d: failed to re-parent cpu clock!\n", 251 - policy->cpu); 252 - mtk_cpufreq_set_voltage(info, old_vproc); 253 - WARN_ON(1); 254 - return ret; 269 + dev_err(cpu_dev, 270 + "cpu%d: failed to re-parent cpu clock!\n", policy->cpu); 271 + mtk_cpufreq_set_voltage(info, pre_vproc); 272 + goto out; 255 273 } 256 274 257 275 /* Set the original PLL to target rate. */ 258 276 ret = clk_set_rate(armpll, freq_hz); 259 277 if (ret) { 260 - pr_err("cpu%d: failed to scale cpu clock rate!\n", 261 - policy->cpu); 278 + dev_err(cpu_dev, 279 + "cpu%d: failed to scale cpu clock rate!\n", policy->cpu); 262 280 clk_set_parent(cpu_clk, armpll); 263 - mtk_cpufreq_set_voltage(info, old_vproc); 264 - return ret; 281 + mtk_cpufreq_set_voltage(info, pre_vproc); 282 + goto out; 265 283 } 266 284 267 285 /* Set parent of CPU clock back to the original PLL. */ 268 286 ret = clk_set_parent(cpu_clk, armpll); 269 287 if (ret) { 270 - pr_err("cpu%d: failed to re-parent cpu clock!\n", 271 - policy->cpu); 288 + dev_err(cpu_dev, 289 + "cpu%d: failed to re-parent cpu clock!\n", policy->cpu); 272 290 mtk_cpufreq_set_voltage(info, inter_vproc); 273 - WARN_ON(1); 274 - return ret; 291 + goto out; 275 292 } 276 293 277 294 /* 278 295 * If the new voltage is lower than the intermediate voltage or the 279 296 * original voltage, scale down to the new voltage. 280 297 */ 281 - if (vproc < inter_vproc || vproc < old_vproc) { 298 + if (vproc < inter_vproc || vproc < pre_vproc) { 282 299 ret = mtk_cpufreq_set_voltage(info, vproc); 283 300 if (ret) { 284 - pr_err("cpu%d: failed to scale down voltage!\n", 285 - policy->cpu); 301 + dev_err(cpu_dev, 302 + "cpu%d: failed to scale down voltage!\n", policy->cpu); 286 303 clk_set_parent(cpu_clk, info->inter_clk); 287 - clk_set_rate(armpll, old_freq_hz); 304 + clk_set_rate(armpll, pre_freq_hz); 288 305 clk_set_parent(cpu_clk, armpll); 289 - return ret; 306 + goto out; 290 307 } 291 308 } 292 309 293 - return 0; 310 + info->current_freq = freq_hz; 311 + 312 + out: 313 + mutex_unlock(&info->reg_lock); 314 + 315 + return ret; 294 316 } 295 317 296 318 #define DYNAMIC_POWER "dynamic-power-coefficient" 297 319 320 + static int mtk_cpufreq_opp_notifier(struct notifier_block *nb, 321 + unsigned long event, void *data) 322 + { 323 + struct dev_pm_opp *opp = data; 324 + struct dev_pm_opp *new_opp; 325 + struct mtk_cpu_dvfs_info *info; 326 + unsigned long freq, volt; 327 + struct cpufreq_policy *policy; 328 + int ret = 0; 329 + 330 + info = container_of(nb, struct mtk_cpu_dvfs_info, opp_nb); 331 + 332 + if (event == OPP_EVENT_ADJUST_VOLTAGE) { 333 + freq = dev_pm_opp_get_freq(opp); 334 + 335 + mutex_lock(&info->reg_lock); 336 + if (info->current_freq == freq) { 337 + volt = dev_pm_opp_get_voltage(opp); 338 + ret = mtk_cpufreq_set_voltage(info, volt); 339 + if (ret) 340 + dev_err(info->cpu_dev, 341 + "failed to scale voltage: %d\n", ret); 342 + } 343 + mutex_unlock(&info->reg_lock); 344 + } else if (event == OPP_EVENT_DISABLE) { 345 + freq = dev_pm_opp_get_freq(opp); 346 + 347 + /* case of current opp item is disabled */ 348 + if (info->current_freq == freq) { 349 + freq = 1; 350 + new_opp = dev_pm_opp_find_freq_ceil(info->cpu_dev, 351 + &freq); 352 + if (IS_ERR(new_opp)) { 353 + dev_err(info->cpu_dev, 354 + "all opp items are disabled\n"); 355 + ret = PTR_ERR(new_opp); 356 + return notifier_from_errno(ret); 357 + } 358 + 359 + dev_pm_opp_put(new_opp); 360 + policy = cpufreq_cpu_get(info->opp_cpu); 361 + if (policy) { 362 + cpufreq_driver_target(policy, freq / 1000, 363 + CPUFREQ_RELATION_L); 364 + cpufreq_cpu_put(policy); 365 + } 366 + } 367 + } 368 + 369 + return notifier_from_errno(ret); 370 + } 371 + 372 + static struct device *of_get_cci(struct device *cpu_dev) 373 + { 374 + struct device_node *np; 375 + struct platform_device *pdev; 376 + 377 + np = of_parse_phandle(cpu_dev->of_node, "mediatek,cci", 0); 378 + if (IS_ERR_OR_NULL(np)) 379 + return NULL; 380 + 381 + pdev = of_find_device_by_node(np); 382 + of_node_put(np); 383 + if (IS_ERR_OR_NULL(pdev)) 384 + return NULL; 385 + 386 + return &pdev->dev; 387 + } 388 + 298 389 static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) 299 390 { 300 391 struct device *cpu_dev; 301 - struct regulator *proc_reg = ERR_PTR(-ENODEV); 302 - struct regulator *sram_reg = ERR_PTR(-ENODEV); 303 - struct clk *cpu_clk = ERR_PTR(-ENODEV); 304 - struct clk *inter_clk = ERR_PTR(-ENODEV); 305 392 struct dev_pm_opp *opp; 306 393 unsigned long rate; 307 394 int ret; 308 395 309 396 cpu_dev = get_cpu_device(cpu); 310 397 if (!cpu_dev) { 311 - pr_err("failed to get cpu%d device\n", cpu); 398 + dev_err(cpu_dev, "failed to get cpu%d device\n", cpu); 312 399 return -ENODEV; 313 400 } 401 + info->cpu_dev = cpu_dev; 314 402 315 - cpu_clk = clk_get(cpu_dev, "cpu"); 316 - if (IS_ERR(cpu_clk)) { 317 - if (PTR_ERR(cpu_clk) == -EPROBE_DEFER) 318 - pr_warn("cpu clk for cpu%d not ready, retry.\n", cpu); 319 - else 320 - pr_err("failed to get cpu clk for cpu%d\n", cpu); 321 - 322 - ret = PTR_ERR(cpu_clk); 323 - return ret; 403 + info->ccifreq_bound = false; 404 + if (info->soc_data->ccifreq_supported) { 405 + info->cci_dev = of_get_cci(info->cpu_dev); 406 + if (IS_ERR_OR_NULL(info->cci_dev)) { 407 + ret = PTR_ERR(info->cci_dev); 408 + dev_err(cpu_dev, "cpu%d: failed to get cci device\n", cpu); 409 + return -ENODEV; 410 + } 324 411 } 325 412 326 - inter_clk = clk_get(cpu_dev, "intermediate"); 327 - if (IS_ERR(inter_clk)) { 328 - if (PTR_ERR(inter_clk) == -EPROBE_DEFER) 329 - pr_warn("intermediate clk for cpu%d not ready, retry.\n", 330 - cpu); 331 - else 332 - pr_err("failed to get intermediate clk for cpu%d\n", 333 - cpu); 413 + info->cpu_clk = clk_get(cpu_dev, "cpu"); 414 + if (IS_ERR(info->cpu_clk)) { 415 + ret = PTR_ERR(info->cpu_clk); 416 + return dev_err_probe(cpu_dev, ret, 417 + "cpu%d: failed to get cpu clk\n", cpu); 418 + } 334 419 335 - ret = PTR_ERR(inter_clk); 420 + info->inter_clk = clk_get(cpu_dev, "intermediate"); 421 + if (IS_ERR(info->inter_clk)) { 422 + ret = PTR_ERR(info->inter_clk); 423 + dev_err_probe(cpu_dev, ret, 424 + "cpu%d: failed to get intermediate clk\n", cpu); 336 425 goto out_free_resources; 337 426 } 338 427 339 - proc_reg = regulator_get_optional(cpu_dev, "proc"); 340 - if (IS_ERR(proc_reg)) { 341 - if (PTR_ERR(proc_reg) == -EPROBE_DEFER) 342 - pr_warn("proc regulator for cpu%d not ready, retry.\n", 343 - cpu); 344 - else 345 - pr_err("failed to get proc regulator for cpu%d\n", 346 - cpu); 428 + info->proc_reg = regulator_get_optional(cpu_dev, "proc"); 429 + if (IS_ERR(info->proc_reg)) { 430 + ret = PTR_ERR(info->proc_reg); 431 + dev_err_probe(cpu_dev, ret, 432 + "cpu%d: failed to get proc regulator\n", cpu); 433 + goto out_free_resources; 434 + } 347 435 348 - ret = PTR_ERR(proc_reg); 436 + ret = regulator_enable(info->proc_reg); 437 + if (ret) { 438 + dev_warn(cpu_dev, "cpu%d: failed to enable vproc\n", cpu); 349 439 goto out_free_resources; 350 440 } 351 441 352 442 /* Both presence and absence of sram regulator are valid cases. */ 353 - sram_reg = regulator_get_exclusive(cpu_dev, "sram"); 443 + info->sram_reg = regulator_get_optional(cpu_dev, "sram"); 444 + if (IS_ERR(info->sram_reg)) 445 + info->sram_reg = NULL; 446 + else { 447 + ret = regulator_enable(info->sram_reg); 448 + if (ret) { 449 + dev_warn(cpu_dev, "cpu%d: failed to enable vsram\n", cpu); 450 + goto out_free_resources; 451 + } 452 + } 354 453 355 454 /* Get OPP-sharing information from "operating-points-v2" bindings */ 356 455 ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, &info->cpus); 357 456 if (ret) { 358 - pr_err("failed to get OPP-sharing information for cpu%d\n", 359 - cpu); 457 + dev_err(cpu_dev, 458 + "cpu%d: failed to get OPP-sharing information\n", cpu); 360 459 goto out_free_resources; 361 460 } 362 461 363 462 ret = dev_pm_opp_of_cpumask_add_table(&info->cpus); 364 463 if (ret) { 365 - pr_warn("no OPP table for cpu%d\n", cpu); 464 + dev_warn(cpu_dev, "cpu%d: no OPP table\n", cpu); 366 465 goto out_free_resources; 367 466 } 368 467 468 + ret = clk_prepare_enable(info->cpu_clk); 469 + if (ret) 470 + goto out_free_opp_table; 471 + 472 + ret = clk_prepare_enable(info->inter_clk); 473 + if (ret) 474 + goto out_disable_mux_clock; 475 + 476 + if (info->soc_data->ccifreq_supported) { 477 + info->vproc_on_boot = regulator_get_voltage(info->proc_reg); 478 + if (info->vproc_on_boot < 0) { 479 + dev_err(info->cpu_dev, 480 + "invalid Vproc value: %d\n", info->vproc_on_boot); 481 + goto out_disable_inter_clock; 482 + } 483 + } 484 + 369 485 /* Search a safe voltage for intermediate frequency. */ 370 - rate = clk_get_rate(inter_clk); 486 + rate = clk_get_rate(info->inter_clk); 371 487 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate); 372 488 if (IS_ERR(opp)) { 373 - pr_err("failed to get intermediate opp for cpu%d\n", cpu); 489 + dev_err(cpu_dev, "cpu%d: failed to get intermediate opp\n", cpu); 374 490 ret = PTR_ERR(opp); 375 - goto out_free_opp_table; 491 + goto out_disable_inter_clock; 376 492 } 377 493 info->intermediate_voltage = dev_pm_opp_get_voltage(opp); 378 494 dev_pm_opp_put(opp); 379 495 380 - info->cpu_dev = cpu_dev; 381 - info->proc_reg = proc_reg; 382 - info->sram_reg = IS_ERR(sram_reg) ? NULL : sram_reg; 383 - info->cpu_clk = cpu_clk; 384 - info->inter_clk = inter_clk; 496 + mutex_init(&info->reg_lock); 497 + info->current_freq = clk_get_rate(info->cpu_clk); 498 + 499 + info->opp_cpu = cpu; 500 + info->opp_nb.notifier_call = mtk_cpufreq_opp_notifier; 501 + ret = dev_pm_opp_register_notifier(cpu_dev, &info->opp_nb); 502 + if (ret) { 503 + dev_err(cpu_dev, "cpu%d: failed to register opp notifier\n", cpu); 504 + goto out_disable_inter_clock; 505 + } 385 506 386 507 /* 387 508 * If SRAM regulator is present, software "voltage tracking" is needed 388 509 * for this CPU power domain. 389 510 */ 390 - info->need_voltage_tracking = !IS_ERR(sram_reg); 511 + info->need_voltage_tracking = (info->sram_reg != NULL); 512 + 513 + /* 514 + * We assume min voltage is 0 and tracking target voltage using 515 + * min_volt_shift for each iteration. 516 + * The vtrack_max is 3 times of expeted iteration count. 517 + */ 518 + info->vtrack_max = 3 * DIV_ROUND_UP(max(info->soc_data->sram_max_volt, 519 + info->soc_data->proc_max_volt), 520 + info->soc_data->min_volt_shift); 391 521 392 522 return 0; 523 + 524 + out_disable_inter_clock: 525 + clk_disable_unprepare(info->inter_clk); 526 + 527 + out_disable_mux_clock: 528 + clk_disable_unprepare(info->cpu_clk); 393 529 394 530 out_free_opp_table: 395 531 dev_pm_opp_of_cpumask_remove_table(&info->cpus); 396 532 397 533 out_free_resources: 398 - if (!IS_ERR(proc_reg)) 399 - regulator_put(proc_reg); 400 - if (!IS_ERR(sram_reg)) 401 - regulator_put(sram_reg); 402 - if (!IS_ERR(cpu_clk)) 403 - clk_put(cpu_clk); 404 - if (!IS_ERR(inter_clk)) 405 - clk_put(inter_clk); 534 + if (regulator_is_enabled(info->proc_reg)) 535 + regulator_disable(info->proc_reg); 536 + if (info->sram_reg && regulator_is_enabled(info->sram_reg)) 537 + regulator_disable(info->sram_reg); 406 538 407 - return ret; 408 - } 409 - 410 - static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info) 411 - { 412 539 if (!IS_ERR(info->proc_reg)) 413 540 regulator_put(info->proc_reg); 414 541 if (!IS_ERR(info->sram_reg)) ··· 543 420 if (!IS_ERR(info->inter_clk)) 544 421 clk_put(info->inter_clk); 545 422 423 + return ret; 424 + } 425 + 426 + static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info) 427 + { 428 + if (!IS_ERR(info->proc_reg)) { 429 + regulator_disable(info->proc_reg); 430 + regulator_put(info->proc_reg); 431 + } 432 + if (!IS_ERR(info->sram_reg)) { 433 + regulator_disable(info->sram_reg); 434 + regulator_put(info->sram_reg); 435 + } 436 + if (!IS_ERR(info->cpu_clk)) { 437 + clk_disable_unprepare(info->cpu_clk); 438 + clk_put(info->cpu_clk); 439 + } 440 + if (!IS_ERR(info->inter_clk)) { 441 + clk_disable_unprepare(info->inter_clk); 442 + clk_put(info->inter_clk); 443 + } 444 + 546 445 dev_pm_opp_of_cpumask_remove_table(&info->cpus); 446 + dev_pm_opp_unregister_notifier(info->cpu_dev, &info->opp_nb); 547 447 } 548 448 549 449 static int mtk_cpufreq_init(struct cpufreq_policy *policy) ··· 578 432 info = mtk_cpu_dvfs_info_lookup(policy->cpu); 579 433 if (!info) { 580 434 pr_err("dvfs info for cpu%d is not initialized.\n", 581 - policy->cpu); 435 + policy->cpu); 582 436 return -EINVAL; 583 437 } 584 438 585 439 ret = dev_pm_opp_init_cpufreq_table(info->cpu_dev, &freq_table); 586 440 if (ret) { 587 - pr_err("failed to init cpufreq table for cpu%d: %d\n", 588 - policy->cpu, ret); 441 + dev_err(info->cpu_dev, 442 + "failed to init cpufreq table for cpu%d: %d\n", 443 + policy->cpu, ret); 589 444 return ret; 590 445 } 591 446 ··· 623 476 624 477 static int mtk_cpufreq_probe(struct platform_device *pdev) 625 478 { 479 + const struct mtk_cpufreq_platform_data *data; 626 480 struct mtk_cpu_dvfs_info *info, *tmp; 627 481 int cpu, ret; 482 + 483 + data = dev_get_platdata(&pdev->dev); 484 + if (!data) { 485 + dev_err(&pdev->dev, 486 + "failed to get mtk cpufreq platform data\n"); 487 + return -ENODEV; 488 + } 628 489 629 490 for_each_possible_cpu(cpu) { 630 491 info = mtk_cpu_dvfs_info_lookup(cpu); ··· 645 490 goto release_dvfs_info_list; 646 491 } 647 492 493 + info->soc_data = data; 648 494 ret = mtk_cpu_dvfs_info_init(info, cpu); 649 495 if (ret) { 650 496 dev_err(&pdev->dev, ··· 681 525 .probe = mtk_cpufreq_probe, 682 526 }; 683 527 528 + static const struct mtk_cpufreq_platform_data mt2701_platform_data = { 529 + .min_volt_shift = 100000, 530 + .max_volt_shift = 200000, 531 + .proc_max_volt = 1150000, 532 + .sram_min_volt = 0, 533 + .sram_max_volt = 1150000, 534 + .ccifreq_supported = false, 535 + }; 536 + 537 + static const struct mtk_cpufreq_platform_data mt8183_platform_data = { 538 + .min_volt_shift = 100000, 539 + .max_volt_shift = 200000, 540 + .proc_max_volt = 1150000, 541 + .sram_min_volt = 0, 542 + .sram_max_volt = 1150000, 543 + .ccifreq_supported = true, 544 + }; 545 + 546 + static const struct mtk_cpufreq_platform_data mt8186_platform_data = { 547 + .min_volt_shift = 100000, 548 + .max_volt_shift = 250000, 549 + .proc_max_volt = 1118750, 550 + .sram_min_volt = 850000, 551 + .sram_max_volt = 1118750, 552 + .ccifreq_supported = true, 553 + }; 554 + 684 555 /* List of machines supported by this driver */ 685 556 static const struct of_device_id mtk_cpufreq_machines[] __initconst = { 686 - { .compatible = "mediatek,mt2701", }, 687 - { .compatible = "mediatek,mt2712", }, 688 - { .compatible = "mediatek,mt7622", }, 689 - { .compatible = "mediatek,mt7623", }, 690 - { .compatible = "mediatek,mt8167", }, 691 - { .compatible = "mediatek,mt817x", }, 692 - { .compatible = "mediatek,mt8173", }, 693 - { .compatible = "mediatek,mt8176", }, 694 - { .compatible = "mediatek,mt8183", }, 695 - { .compatible = "mediatek,mt8365", }, 696 - { .compatible = "mediatek,mt8516", }, 697 - 557 + { .compatible = "mediatek,mt2701", .data = &mt2701_platform_data }, 558 + { .compatible = "mediatek,mt2712", .data = &mt2701_platform_data }, 559 + { .compatible = "mediatek,mt7622", .data = &mt2701_platform_data }, 560 + { .compatible = "mediatek,mt7623", .data = &mt2701_platform_data }, 561 + { .compatible = "mediatek,mt8167", .data = &mt2701_platform_data }, 562 + { .compatible = "mediatek,mt817x", .data = &mt2701_platform_data }, 563 + { .compatible = "mediatek,mt8173", .data = &mt2701_platform_data }, 564 + { .compatible = "mediatek,mt8176", .data = &mt2701_platform_data }, 565 + { .compatible = "mediatek,mt8183", .data = &mt8183_platform_data }, 566 + { .compatible = "mediatek,mt8186", .data = &mt8186_platform_data }, 567 + { .compatible = "mediatek,mt8365", .data = &mt2701_platform_data }, 568 + { .compatible = "mediatek,mt8516", .data = &mt2701_platform_data }, 698 569 { } 699 570 }; 700 571 MODULE_DEVICE_TABLE(of, mtk_cpufreq_machines); ··· 730 547 { 731 548 struct device_node *np; 732 549 const struct of_device_id *match; 733 - struct platform_device *pdev; 550 + const struct mtk_cpufreq_platform_data *data; 734 551 int err; 735 552 736 553 np = of_find_node_by_path("/"); ··· 743 560 pr_debug("Machine is not compatible with mtk-cpufreq\n"); 744 561 return -ENODEV; 745 562 } 563 + data = match->data; 746 564 747 565 err = platform_driver_register(&mtk_cpufreq_platdrv); 748 566 if (err) ··· 755 571 * and the device registration codes are put here to handle defer 756 572 * probing. 757 573 */ 758 - pdev = platform_device_register_simple("mtk-cpufreq", -1, NULL, 0); 759 - if (IS_ERR(pdev)) { 574 + cpufreq_pdev = platform_device_register_data(NULL, "mtk-cpufreq", -1, 575 + data, sizeof(*data)); 576 + if (IS_ERR(cpufreq_pdev)) { 760 577 pr_err("failed to register mtk-cpufreq platform device\n"); 761 578 platform_driver_unregister(&mtk_cpufreq_platdrv); 762 - return PTR_ERR(pdev); 579 + return PTR_ERR(cpufreq_pdev); 763 580 } 764 581 765 582 return 0; 766 583 } 767 - device_initcall(mtk_cpufreq_driver_init); 584 + module_init(mtk_cpufreq_driver_init) 585 + 586 + static void __exit mtk_cpufreq_driver_exit(void) 587 + { 588 + platform_device_unregister(cpufreq_pdev); 589 + platform_driver_unregister(&mtk_cpufreq_platdrv); 590 + } 591 + module_exit(mtk_cpufreq_driver_exit) 768 592 769 593 MODULE_DESCRIPTION("MediaTek CPUFreq driver"); 770 594 MODULE_AUTHOR("Pi-Cheng Chen <pi-cheng.chen@linaro.org>");
+209 -37
drivers/cpufreq/tegra194-cpufreq.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 /* 3 - * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved 3 + * Copyright (c) 2020 - 2022, NVIDIA CORPORATION. All rights reserved 4 4 */ 5 5 6 6 #include <linux/cpu.h> ··· 24 24 #define CPUFREQ_TBL_STEP_HZ (50 * KHZ * KHZ) 25 25 #define MAX_CNT ~0U 26 26 27 + #define NDIV_MASK 0x1FF 28 + 29 + #define CORE_OFFSET(cpu) (cpu * 8) 30 + #define CMU_CLKS_BASE 0x2000 31 + #define SCRATCH_FREQ_CORE_REG(data, cpu) (data->regs + CMU_CLKS_BASE + CORE_OFFSET(cpu)) 32 + 33 + #define MMCRAB_CLUSTER_BASE(cl) (0x30000 + (cl * 0x10000)) 34 + #define CLUSTER_ACTMON_BASE(data, cl) \ 35 + (data->regs + (MMCRAB_CLUSTER_BASE(cl) + data->soc->actmon_cntr_base)) 36 + #define CORE_ACTMON_CNTR_REG(data, cl, cpu) (CLUSTER_ACTMON_BASE(data, cl) + CORE_OFFSET(cpu)) 37 + 27 38 /* cpufreq transisition latency */ 28 39 #define TEGRA_CPUFREQ_TRANSITION_LATENCY (300 * 1000) /* unit in nanoseconds */ 29 40 ··· 44 33 CLUSTER2, 45 34 CLUSTER3, 46 35 MAX_CLUSTERS, 47 - }; 48 - 49 - struct tegra194_cpufreq_data { 50 - void __iomem *regs; 51 - size_t num_clusters; 52 - struct cpufreq_frequency_table **tables; 53 36 }; 54 37 55 38 struct tegra_cpu_ctr { ··· 57 52 struct tegra_cpu_ctr c; 58 53 }; 59 54 55 + struct tegra_cpufreq_ops { 56 + void (*read_counters)(struct tegra_cpu_ctr *c); 57 + void (*set_cpu_ndiv)(struct cpufreq_policy *policy, u64 ndiv); 58 + void (*get_cpu_cluster_id)(u32 cpu, u32 *cpuid, u32 *clusterid); 59 + int (*get_cpu_ndiv)(u32 cpu, u32 cpuid, u32 clusterid, u64 *ndiv); 60 + }; 61 + 62 + struct tegra_cpufreq_soc { 63 + struct tegra_cpufreq_ops *ops; 64 + int maxcpus_per_cluster; 65 + phys_addr_t actmon_cntr_base; 66 + }; 67 + 68 + struct tegra194_cpufreq_data { 69 + void __iomem *regs; 70 + size_t num_clusters; 71 + struct cpufreq_frequency_table **tables; 72 + const struct tegra_cpufreq_soc *soc; 73 + }; 74 + 60 75 static struct workqueue_struct *read_counters_wq; 61 76 62 - static void get_cpu_cluster(void *cluster) 77 + static void tegra_get_cpu_mpidr(void *mpidr) 63 78 { 64 - u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; 79 + *((u64 *)mpidr) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; 80 + } 65 81 66 - *((uint32_t *)cluster) = MPIDR_AFFINITY_LEVEL(mpidr, 1); 82 + static void tegra234_get_cpu_cluster_id(u32 cpu, u32 *cpuid, u32 *clusterid) 83 + { 84 + u64 mpidr; 85 + 86 + smp_call_function_single(cpu, tegra_get_cpu_mpidr, &mpidr, true); 87 + 88 + if (cpuid) 89 + *cpuid = MPIDR_AFFINITY_LEVEL(mpidr, 1); 90 + if (clusterid) 91 + *clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 2); 92 + } 93 + 94 + static int tegra234_get_cpu_ndiv(u32 cpu, u32 cpuid, u32 clusterid, u64 *ndiv) 95 + { 96 + struct tegra194_cpufreq_data *data = cpufreq_get_driver_data(); 97 + void __iomem *freq_core_reg; 98 + u64 mpidr_id; 99 + 100 + /* use physical id to get address of per core frequency register */ 101 + mpidr_id = (clusterid * data->soc->maxcpus_per_cluster) + cpuid; 102 + freq_core_reg = SCRATCH_FREQ_CORE_REG(data, mpidr_id); 103 + 104 + *ndiv = readl(freq_core_reg) & NDIV_MASK; 105 + 106 + return 0; 107 + } 108 + 109 + static void tegra234_set_cpu_ndiv(struct cpufreq_policy *policy, u64 ndiv) 110 + { 111 + struct tegra194_cpufreq_data *data = cpufreq_get_driver_data(); 112 + void __iomem *freq_core_reg; 113 + u32 cpu, cpuid, clusterid; 114 + u64 mpidr_id; 115 + 116 + for_each_cpu_and(cpu, policy->cpus, cpu_online_mask) { 117 + data->soc->ops->get_cpu_cluster_id(cpu, &cpuid, &clusterid); 118 + 119 + /* use physical id to get address of per core frequency register */ 120 + mpidr_id = (clusterid * data->soc->maxcpus_per_cluster) + cpuid; 121 + freq_core_reg = SCRATCH_FREQ_CORE_REG(data, mpidr_id); 122 + 123 + writel(ndiv, freq_core_reg); 124 + } 125 + } 126 + 127 + /* 128 + * This register provides access to two counter values with a single 129 + * 64-bit read. The counter values are used to determine the average 130 + * actual frequency a core has run at over a period of time. 131 + * [63:32] PLLP counter: Counts at fixed frequency (408 MHz) 132 + * [31:0] Core clock counter: Counts on every core clock cycle 133 + */ 134 + static void tegra234_read_counters(struct tegra_cpu_ctr *c) 135 + { 136 + struct tegra194_cpufreq_data *data = cpufreq_get_driver_data(); 137 + void __iomem *actmon_reg; 138 + u32 cpuid, clusterid; 139 + u64 val; 140 + 141 + data->soc->ops->get_cpu_cluster_id(c->cpu, &cpuid, &clusterid); 142 + actmon_reg = CORE_ACTMON_CNTR_REG(data, clusterid, cpuid); 143 + 144 + val = readq(actmon_reg); 145 + c->last_refclk_cnt = upper_32_bits(val); 146 + c->last_coreclk_cnt = lower_32_bits(val); 147 + udelay(US_DELAY); 148 + val = readq(actmon_reg); 149 + c->refclk_cnt = upper_32_bits(val); 150 + c->coreclk_cnt = lower_32_bits(val); 151 + } 152 + 153 + static struct tegra_cpufreq_ops tegra234_cpufreq_ops = { 154 + .read_counters = tegra234_read_counters, 155 + .get_cpu_cluster_id = tegra234_get_cpu_cluster_id, 156 + .get_cpu_ndiv = tegra234_get_cpu_ndiv, 157 + .set_cpu_ndiv = tegra234_set_cpu_ndiv, 158 + }; 159 + 160 + const struct tegra_cpufreq_soc tegra234_cpufreq_soc = { 161 + .ops = &tegra234_cpufreq_ops, 162 + .actmon_cntr_base = 0x9000, 163 + .maxcpus_per_cluster = 4, 164 + }; 165 + 166 + static void tegra194_get_cpu_cluster_id(u32 cpu, u32 *cpuid, u32 *clusterid) 167 + { 168 + u64 mpidr; 169 + 170 + smp_call_function_single(cpu, tegra_get_cpu_mpidr, &mpidr, true); 171 + 172 + if (cpuid) 173 + *cpuid = MPIDR_AFFINITY_LEVEL(mpidr, 0); 174 + if (clusterid) 175 + *clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1); 67 176 } 68 177 69 178 /* ··· 204 85 return nltbl->ref_clk_hz / KHZ * ndiv / (nltbl->pdiv * nltbl->mdiv); 205 86 } 206 87 88 + static void tegra194_read_counters(struct tegra_cpu_ctr *c) 89 + { 90 + u64 val; 91 + 92 + val = read_freq_feedback(); 93 + c->last_refclk_cnt = lower_32_bits(val); 94 + c->last_coreclk_cnt = upper_32_bits(val); 95 + udelay(US_DELAY); 96 + val = read_freq_feedback(); 97 + c->refclk_cnt = lower_32_bits(val); 98 + c->coreclk_cnt = upper_32_bits(val); 99 + } 100 + 207 101 static void tegra_read_counters(struct work_struct *work) 208 102 { 103 + struct tegra194_cpufreq_data *data = cpufreq_get_driver_data(); 209 104 struct read_counters_work *read_counters_work; 210 105 struct tegra_cpu_ctr *c; 211 - u64 val; 212 106 213 107 /* 214 108 * ref_clk_counter(32 bit counter) runs on constant clk, ··· 239 107 work); 240 108 c = &read_counters_work->c; 241 109 242 - val = read_freq_feedback(); 243 - c->last_refclk_cnt = lower_32_bits(val); 244 - c->last_coreclk_cnt = upper_32_bits(val); 245 - udelay(US_DELAY); 246 - val = read_freq_feedback(); 247 - c->refclk_cnt = lower_32_bits(val); 248 - c->coreclk_cnt = upper_32_bits(val); 110 + data->soc->ops->read_counters(c); 249 111 } 250 112 251 113 /* ··· 303 177 return (rate_mhz * KHZ); /* in KHz */ 304 178 } 305 179 306 - static void get_cpu_ndiv(void *ndiv) 180 + static void tegra194_get_cpu_ndiv_sysreg(void *ndiv) 307 181 { 308 182 u64 ndiv_val; 309 183 ··· 312 186 *(u64 *)ndiv = ndiv_val; 313 187 } 314 188 315 - static void set_cpu_ndiv(void *data) 189 + static int tegra194_get_cpu_ndiv(u32 cpu, u32 cpuid, u32 clusterid, u64 *ndiv) 316 190 { 317 - struct cpufreq_frequency_table *tbl = data; 318 - u64 ndiv_val = (u64)tbl->driver_data; 191 + int ret; 192 + 193 + ret = smp_call_function_single(cpu, tegra194_get_cpu_ndiv_sysreg, &ndiv, true); 194 + 195 + return ret; 196 + } 197 + 198 + static void tegra194_set_cpu_ndiv_sysreg(void *data) 199 + { 200 + u64 ndiv_val = *(u64 *)data; 319 201 320 202 asm volatile("msr s3_0_c15_c0_4, %0" : : "r" (ndiv_val)); 203 + } 204 + 205 + static void tegra194_set_cpu_ndiv(struct cpufreq_policy *policy, u64 ndiv) 206 + { 207 + on_each_cpu_mask(policy->cpus, tegra194_set_cpu_ndiv_sysreg, &ndiv, true); 321 208 } 322 209 323 210 static unsigned int tegra194_get_speed(u32 cpu) 324 211 { 325 212 struct tegra194_cpufreq_data *data = cpufreq_get_driver_data(); 326 213 struct cpufreq_frequency_table *pos; 214 + u32 cpuid, clusterid; 327 215 unsigned int rate; 328 216 u64 ndiv; 329 217 int ret; 330 - u32 cl; 331 218 332 - smp_call_function_single(cpu, get_cpu_cluster, &cl, true); 219 + data->soc->ops->get_cpu_cluster_id(cpu, &cpuid, &clusterid); 333 220 334 221 /* reconstruct actual cpu freq using counters */ 335 222 rate = tegra194_calculate_speed(cpu); 336 223 337 224 /* get last written ndiv value */ 338 - ret = smp_call_function_single(cpu, get_cpu_ndiv, &ndiv, true); 225 + ret = data->soc->ops->get_cpu_ndiv(cpu, cpuid, clusterid, &ndiv); 339 226 if (WARN_ON_ONCE(ret)) 340 227 return rate; 341 228 ··· 358 219 * to the last written ndiv value from freq_table. This is 359 220 * done to return consistent value. 360 221 */ 361 - cpufreq_for_each_valid_entry(pos, data->tables[cl]) { 222 + cpufreq_for_each_valid_entry(pos, data->tables[clusterid]) { 362 223 if (pos->driver_data != ndiv) 363 224 continue; 364 225 ··· 376 237 static int tegra194_cpufreq_init(struct cpufreq_policy *policy) 377 238 { 378 239 struct tegra194_cpufreq_data *data = cpufreq_get_driver_data(); 379 - u32 cpu; 380 - u32 cl; 240 + int maxcpus_per_cluster = data->soc->maxcpus_per_cluster; 241 + u32 start_cpu, cpu; 242 + u32 clusterid; 381 243 382 - smp_call_function_single(policy->cpu, get_cpu_cluster, &cl, true); 244 + data->soc->ops->get_cpu_cluster_id(policy->cpu, NULL, &clusterid); 383 245 384 - if (cl >= data->num_clusters || !data->tables[cl]) 246 + if (clusterid >= data->num_clusters || !data->tables[clusterid]) 385 247 return -EINVAL; 386 248 249 + start_cpu = rounddown(policy->cpu, maxcpus_per_cluster); 387 250 /* set same policy for all cpus in a cluster */ 388 - for (cpu = (cl * 2); cpu < ((cl + 1) * 2); cpu++) 389 - cpumask_set_cpu(cpu, policy->cpus); 390 - 391 - policy->freq_table = data->tables[cl]; 251 + for (cpu = start_cpu; cpu < (start_cpu + maxcpus_per_cluster); cpu++) { 252 + if (cpu_possible(cpu)) 253 + cpumask_set_cpu(cpu, policy->cpus); 254 + } 255 + policy->freq_table = data->tables[clusterid]; 392 256 policy->cpuinfo.transition_latency = TEGRA_CPUFREQ_TRANSITION_LATENCY; 393 257 394 258 return 0; ··· 401 259 unsigned int index) 402 260 { 403 261 struct cpufreq_frequency_table *tbl = policy->freq_table + index; 262 + struct tegra194_cpufreq_data *data = cpufreq_get_driver_data(); 404 263 405 264 /* 406 265 * Each core writes frequency in per core register. Then both cores 407 266 * in a cluster run at same frequency which is the maximum frequency 408 267 * request out of the values requested by both cores in that cluster. 409 268 */ 410 - on_each_cpu_mask(policy->cpus, set_cpu_ndiv, tbl, true); 269 + data->soc->ops->set_cpu_ndiv(policy, (u64)tbl->driver_data); 411 270 412 271 return 0; 413 272 } ··· 421 278 .get = tegra194_get_speed, 422 279 .init = tegra194_cpufreq_init, 423 280 .attr = cpufreq_generic_attr, 281 + }; 282 + 283 + static struct tegra_cpufreq_ops tegra194_cpufreq_ops = { 284 + .read_counters = tegra194_read_counters, 285 + .get_cpu_cluster_id = tegra194_get_cpu_cluster_id, 286 + .get_cpu_ndiv = tegra194_get_cpu_ndiv, 287 + .set_cpu_ndiv = tegra194_set_cpu_ndiv, 288 + }; 289 + 290 + const struct tegra_cpufreq_soc tegra194_cpufreq_soc = { 291 + .ops = &tegra194_cpufreq_ops, 292 + .maxcpus_per_cluster = 2, 424 293 }; 425 294 426 295 static void tegra194_cpufreq_free_resources(void) ··· 514 359 515 360 static int tegra194_cpufreq_probe(struct platform_device *pdev) 516 361 { 362 + const struct tegra_cpufreq_soc *soc; 517 363 struct tegra194_cpufreq_data *data; 518 364 struct tegra_bpmp *bpmp; 519 365 int err, i; ··· 523 367 if (!data) 524 368 return -ENOMEM; 525 369 370 + soc = of_device_get_match_data(&pdev->dev); 371 + 372 + if (soc->ops && soc->maxcpus_per_cluster) { 373 + data->soc = soc; 374 + } else { 375 + dev_err(&pdev->dev, "soc data missing\n"); 376 + return -EINVAL; 377 + } 378 + 526 379 data->num_clusters = MAX_CLUSTERS; 527 380 data->tables = devm_kcalloc(&pdev->dev, data->num_clusters, 528 381 sizeof(*data->tables), GFP_KERNEL); 529 382 if (!data->tables) 530 383 return -ENOMEM; 384 + 385 + if (soc->actmon_cntr_base) { 386 + /* mmio registers are used for frequency request and re-construction */ 387 + data->regs = devm_platform_ioremap_resource(pdev, 0); 388 + if (IS_ERR(data->regs)) 389 + return PTR_ERR(data->regs); 390 + } 531 391 532 392 platform_set_drvdata(pdev, data); 533 393 ··· 588 416 } 589 417 590 418 static const struct of_device_id tegra194_cpufreq_of_match[] = { 591 - { .compatible = "nvidia,tegra194-ccplex", }, 419 + { .compatible = "nvidia,tegra194-ccplex", .data = &tegra194_cpufreq_soc }, 420 + { .compatible = "nvidia,tegra234-ccplex-cluster", .data = &tegra234_cpufreq_soc }, 592 421 { /* sentinel */ } 593 422 }; 594 - MODULE_DEVICE_TABLE(of, tegra194_cpufreq_of_match); 595 423 596 424 static struct platform_driver tegra194_ccplex_driver = { 597 425 .driver = {
+1 -1
drivers/memory/emif.c
··· 630 630 dev_emerg(emif->dev, "SDRAM temperature exceeds operating limit.. Needs shut down!!!\n"); 631 631 632 632 /* If we have Power OFF ability, use it, else try restarting */ 633 - if (pm_power_off) { 633 + if (kernel_can_power_off()) { 634 634 kernel_power_off(); 635 635 } else { 636 636 WARN(1, "FIXME: NO pm_power_off!!! trying restart\n");
+227 -112
drivers/opp/core.c
··· 456 456 } 457 457 EXPORT_SYMBOL_GPL(dev_pm_opp_find_freq_exact); 458 458 459 - /** 460 - * dev_pm_opp_find_level_exact() - search for an exact level 461 - * @dev: device for which we do this operation 462 - * @level: level to search for 463 - * 464 - * Return: Searches for exact match in the opp table and returns pointer to the 465 - * matching opp if found, else returns ERR_PTR in case of error and should 466 - * be handled using IS_ERR. Error return values can be: 467 - * EINVAL: for bad pointer 468 - * ERANGE: no match found for search 469 - * ENODEV: if device not found in list of registered devices 470 - * 471 - * The callers are required to call dev_pm_opp_put() for the returned OPP after 472 - * use. 473 - */ 474 - struct dev_pm_opp *dev_pm_opp_find_level_exact(struct device *dev, 475 - unsigned int level) 476 - { 477 - struct opp_table *opp_table; 478 - struct dev_pm_opp *temp_opp, *opp = ERR_PTR(-ERANGE); 479 - 480 - opp_table = _find_opp_table(dev); 481 - if (IS_ERR(opp_table)) { 482 - int r = PTR_ERR(opp_table); 483 - 484 - dev_err(dev, "%s: OPP table not found (%d)\n", __func__, r); 485 - return ERR_PTR(r); 486 - } 487 - 488 - mutex_lock(&opp_table->lock); 489 - 490 - list_for_each_entry(temp_opp, &opp_table->opp_list, node) { 491 - if (temp_opp->level == level) { 492 - opp = temp_opp; 493 - 494 - /* Increment the reference count of OPP */ 495 - dev_pm_opp_get(opp); 496 - break; 497 - } 498 - } 499 - 500 - mutex_unlock(&opp_table->lock); 501 - dev_pm_opp_put_opp_table(opp_table); 502 - 503 - return opp; 504 - } 505 - EXPORT_SYMBOL_GPL(dev_pm_opp_find_level_exact); 506 - 507 - /** 508 - * dev_pm_opp_find_level_ceil() - search for an rounded up level 509 - * @dev: device for which we do this operation 510 - * @level: level to search for 511 - * 512 - * Return: Searches for rounded up match in the opp table and returns pointer 513 - * to the matching opp if found, else returns ERR_PTR in case of error and 514 - * should be handled using IS_ERR. Error return values can be: 515 - * EINVAL: for bad pointer 516 - * ERANGE: no match found for search 517 - * ENODEV: if device not found in list of registered devices 518 - * 519 - * The callers are required to call dev_pm_opp_put() for the returned OPP after 520 - * use. 521 - */ 522 - struct dev_pm_opp *dev_pm_opp_find_level_ceil(struct device *dev, 523 - unsigned int *level) 524 - { 525 - struct opp_table *opp_table; 526 - struct dev_pm_opp *temp_opp, *opp = ERR_PTR(-ERANGE); 527 - 528 - opp_table = _find_opp_table(dev); 529 - if (IS_ERR(opp_table)) { 530 - int r = PTR_ERR(opp_table); 531 - 532 - dev_err(dev, "%s: OPP table not found (%d)\n", __func__, r); 533 - return ERR_PTR(r); 534 - } 535 - 536 - mutex_lock(&opp_table->lock); 537 - 538 - list_for_each_entry(temp_opp, &opp_table->opp_list, node) { 539 - if (temp_opp->available && temp_opp->level >= *level) { 540 - opp = temp_opp; 541 - *level = opp->level; 542 - 543 - /* Increment the reference count of OPP */ 544 - dev_pm_opp_get(opp); 545 - break; 546 - } 547 - } 548 - 549 - mutex_unlock(&opp_table->lock); 550 - dev_pm_opp_put_opp_table(opp_table); 551 - 552 - return opp; 553 - } 554 - EXPORT_SYMBOL_GPL(dev_pm_opp_find_level_ceil); 555 - 556 459 static noinline struct dev_pm_opp *_find_freq_ceil(struct opp_table *opp_table, 557 460 unsigned long *freq) 558 461 { ··· 631 728 return opp; 632 729 } 633 730 EXPORT_SYMBOL_GPL(dev_pm_opp_find_freq_ceil_by_volt); 731 + 732 + /** 733 + * dev_pm_opp_find_level_exact() - search for an exact level 734 + * @dev: device for which we do this operation 735 + * @level: level to search for 736 + * 737 + * Return: Searches for exact match in the opp table and returns pointer to the 738 + * matching opp if found, else returns ERR_PTR in case of error and should 739 + * be handled using IS_ERR. Error return values can be: 740 + * EINVAL: for bad pointer 741 + * ERANGE: no match found for search 742 + * ENODEV: if device not found in list of registered devices 743 + * 744 + * The callers are required to call dev_pm_opp_put() for the returned OPP after 745 + * use. 746 + */ 747 + struct dev_pm_opp *dev_pm_opp_find_level_exact(struct device *dev, 748 + unsigned int level) 749 + { 750 + struct opp_table *opp_table; 751 + struct dev_pm_opp *temp_opp, *opp = ERR_PTR(-ERANGE); 752 + 753 + opp_table = _find_opp_table(dev); 754 + if (IS_ERR(opp_table)) { 755 + int r = PTR_ERR(opp_table); 756 + 757 + dev_err(dev, "%s: OPP table not found (%d)\n", __func__, r); 758 + return ERR_PTR(r); 759 + } 760 + 761 + mutex_lock(&opp_table->lock); 762 + 763 + list_for_each_entry(temp_opp, &opp_table->opp_list, node) { 764 + if (temp_opp->level == level) { 765 + opp = temp_opp; 766 + 767 + /* Increment the reference count of OPP */ 768 + dev_pm_opp_get(opp); 769 + break; 770 + } 771 + } 772 + 773 + mutex_unlock(&opp_table->lock); 774 + dev_pm_opp_put_opp_table(opp_table); 775 + 776 + return opp; 777 + } 778 + EXPORT_SYMBOL_GPL(dev_pm_opp_find_level_exact); 779 + 780 + /** 781 + * dev_pm_opp_find_level_ceil() - search for an rounded up level 782 + * @dev: device for which we do this operation 783 + * @level: level to search for 784 + * 785 + * Return: Searches for rounded up match in the opp table and returns pointer 786 + * to the matching opp if found, else returns ERR_PTR in case of error and 787 + * should be handled using IS_ERR. Error return values can be: 788 + * EINVAL: for bad pointer 789 + * ERANGE: no match found for search 790 + * ENODEV: if device not found in list of registered devices 791 + * 792 + * The callers are required to call dev_pm_opp_put() for the returned OPP after 793 + * use. 794 + */ 795 + struct dev_pm_opp *dev_pm_opp_find_level_ceil(struct device *dev, 796 + unsigned int *level) 797 + { 798 + struct opp_table *opp_table; 799 + struct dev_pm_opp *temp_opp, *opp = ERR_PTR(-ERANGE); 800 + 801 + opp_table = _find_opp_table(dev); 802 + if (IS_ERR(opp_table)) { 803 + int r = PTR_ERR(opp_table); 804 + 805 + dev_err(dev, "%s: OPP table not found (%d)\n", __func__, r); 806 + return ERR_PTR(r); 807 + } 808 + 809 + mutex_lock(&opp_table->lock); 810 + 811 + list_for_each_entry(temp_opp, &opp_table->opp_list, node) { 812 + if (temp_opp->available && temp_opp->level >= *level) { 813 + opp = temp_opp; 814 + *level = opp->level; 815 + 816 + /* Increment the reference count of OPP */ 817 + dev_pm_opp_get(opp); 818 + break; 819 + } 820 + } 821 + 822 + mutex_unlock(&opp_table->lock); 823 + dev_pm_opp_put_opp_table(opp_table); 824 + 825 + return opp; 826 + } 827 + EXPORT_SYMBOL_GPL(dev_pm_opp_find_level_ceil); 828 + 829 + /** 830 + * dev_pm_opp_find_bw_ceil() - Search for a rounded ceil bandwidth 831 + * @dev: device for which we do this operation 832 + * @freq: start bandwidth 833 + * @index: which bandwidth to compare, in case of OPPs with several values 834 + * 835 + * Search for the matching floor *available* OPP from a starting bandwidth 836 + * for a device. 837 + * 838 + * Return: matching *opp and refreshes *bw accordingly, else returns 839 + * ERR_PTR in case of error and should be handled using IS_ERR. Error return 840 + * values can be: 841 + * EINVAL: for bad pointer 842 + * ERANGE: no match found for search 843 + * ENODEV: if device not found in list of registered devices 844 + * 845 + * The callers are required to call dev_pm_opp_put() for the returned OPP after 846 + * use. 847 + */ 848 + struct dev_pm_opp *dev_pm_opp_find_bw_ceil(struct device *dev, 849 + unsigned int *bw, int index) 850 + { 851 + struct opp_table *opp_table; 852 + struct dev_pm_opp *temp_opp, *opp = ERR_PTR(-ERANGE); 853 + 854 + if (!dev || !bw) { 855 + dev_err(dev, "%s: Invalid argument bw=%p\n", __func__, bw); 856 + return ERR_PTR(-EINVAL); 857 + } 858 + 859 + opp_table = _find_opp_table(dev); 860 + if (IS_ERR(opp_table)) 861 + return ERR_CAST(opp_table); 862 + 863 + if (index >= opp_table->path_count) 864 + return ERR_PTR(-EINVAL); 865 + 866 + mutex_lock(&opp_table->lock); 867 + 868 + list_for_each_entry(temp_opp, &opp_table->opp_list, node) { 869 + if (temp_opp->available && temp_opp->bandwidth) { 870 + if (temp_opp->bandwidth[index].peak >= *bw) { 871 + opp = temp_opp; 872 + *bw = opp->bandwidth[index].peak; 873 + 874 + /* Increment the reference count of OPP */ 875 + dev_pm_opp_get(opp); 876 + break; 877 + } 878 + } 879 + } 880 + 881 + mutex_unlock(&opp_table->lock); 882 + dev_pm_opp_put_opp_table(opp_table); 883 + 884 + return opp; 885 + } 886 + EXPORT_SYMBOL_GPL(dev_pm_opp_find_bw_ceil); 887 + 888 + /** 889 + * dev_pm_opp_find_bw_floor() - Search for a rounded floor bandwidth 890 + * @dev: device for which we do this operation 891 + * @freq: start bandwidth 892 + * @index: which bandwidth to compare, in case of OPPs with several values 893 + * 894 + * Search for the matching floor *available* OPP from a starting bandwidth 895 + * for a device. 896 + * 897 + * Return: matching *opp and refreshes *bw accordingly, else returns 898 + * ERR_PTR in case of error and should be handled using IS_ERR. Error return 899 + * values can be: 900 + * EINVAL: for bad pointer 901 + * ERANGE: no match found for search 902 + * ENODEV: if device not found in list of registered devices 903 + * 904 + * The callers are required to call dev_pm_opp_put() for the returned OPP after 905 + * use. 906 + */ 907 + struct dev_pm_opp *dev_pm_opp_find_bw_floor(struct device *dev, 908 + unsigned int *bw, int index) 909 + { 910 + struct opp_table *opp_table; 911 + struct dev_pm_opp *temp_opp, *opp = ERR_PTR(-ERANGE); 912 + 913 + if (!dev || !bw) { 914 + dev_err(dev, "%s: Invalid argument bw=%p\n", __func__, bw); 915 + return ERR_PTR(-EINVAL); 916 + } 917 + 918 + opp_table = _find_opp_table(dev); 919 + if (IS_ERR(opp_table)) 920 + return ERR_CAST(opp_table); 921 + 922 + if (index >= opp_table->path_count) 923 + return ERR_PTR(-EINVAL); 924 + 925 + mutex_lock(&opp_table->lock); 926 + 927 + list_for_each_entry(temp_opp, &opp_table->opp_list, node) { 928 + if (temp_opp->available && temp_opp->bandwidth) { 929 + /* go to the next node, before choosing prev */ 930 + if (temp_opp->bandwidth[index].peak > *bw) 931 + break; 932 + opp = temp_opp; 933 + } 934 + } 935 + 936 + /* Increment the reference count of OPP */ 937 + if (!IS_ERR(opp)) 938 + dev_pm_opp_get(opp); 939 + mutex_unlock(&opp_table->lock); 940 + dev_pm_opp_put_opp_table(opp_table); 941 + 942 + if (!IS_ERR(opp)) 943 + *bw = opp->bandwidth[index].peak; 944 + 945 + return opp; 946 + } 947 + EXPORT_SYMBOL_GPL(dev_pm_opp_find_bw_floor); 634 948 635 949 static int _set_opp_voltage(struct device *dev, struct regulator *reg, 636 950 struct dev_pm_opp_supply *supply) ··· 1606 1486 */ 1607 1487 void dev_pm_opp_remove(struct device *dev, unsigned long freq) 1608 1488 { 1609 - struct dev_pm_opp *opp; 1489 + struct dev_pm_opp *opp = NULL, *iter; 1610 1490 struct opp_table *opp_table; 1611 - bool found = false; 1612 1491 1613 1492 opp_table = _find_opp_table(dev); 1614 1493 if (IS_ERR(opp_table)) ··· 1615 1496 1616 1497 mutex_lock(&opp_table->lock); 1617 1498 1618 - list_for_each_entry(opp, &opp_table->opp_list, node) { 1619 - if (opp->rate == freq) { 1620 - found = true; 1499 + list_for_each_entry(iter, &opp_table->opp_list, node) { 1500 + if (iter->rate == freq) { 1501 + opp = iter; 1621 1502 break; 1622 1503 } 1623 1504 } 1624 1505 1625 1506 mutex_unlock(&opp_table->lock); 1626 1507 1627 - if (found) { 1508 + if (opp) { 1628 1509 dev_pm_opp_put(opp); 1629 1510 1630 1511 /* Drop the reference taken by dev_pm_opp_add() */ ··· 2138 2019 for (i = 0; i < count; i++) { 2139 2020 reg = regulator_get_optional(dev, names[i]); 2140 2021 if (IS_ERR(reg)) { 2141 - ret = PTR_ERR(reg); 2142 - if (ret != -EPROBE_DEFER) 2143 - dev_err(dev, "%s: no regulator (%s) found: %d\n", 2144 - __func__, names[i], ret); 2022 + ret = dev_err_probe(dev, PTR_ERR(reg), 2023 + "%s: no regulator (%s) found\n", 2024 + __func__, names[i]); 2145 2025 goto free_regulators; 2146 2026 } 2147 2027 ··· 2286 2168 /* Find clk for the device */ 2287 2169 opp_table->clk = clk_get(dev, name); 2288 2170 if (IS_ERR(opp_table->clk)) { 2289 - ret = PTR_ERR(opp_table->clk); 2290 - if (ret != -EPROBE_DEFER) { 2291 - dev_err(dev, "%s: Couldn't find clock: %d\n", __func__, 2292 - ret); 2293 - } 2171 + ret = dev_err_probe(dev, PTR_ERR(opp_table->clk), 2172 + "%s: Couldn't find clock\n", __func__); 2294 2173 goto err; 2295 2174 } 2296 2175
+7 -3
drivers/opp/debugfs.c
··· 195 195 static void opp_migrate_dentry(struct opp_device *opp_dev, 196 196 struct opp_table *opp_table) 197 197 { 198 - struct opp_device *new_dev; 198 + struct opp_device *new_dev = NULL, *iter; 199 199 const struct device *dev; 200 200 struct dentry *dentry; 201 201 202 202 /* Look for next opp-dev */ 203 - list_for_each_entry(new_dev, &opp_table->dev_list, node) 204 - if (new_dev != opp_dev) 203 + list_for_each_entry(iter, &opp_table->dev_list, node) 204 + if (iter != opp_dev) { 205 + new_dev = iter; 205 206 break; 207 + } 208 + 209 + BUG_ON(!new_dev); 206 210 207 211 /* new_dev is guaranteed to be valid here */ 208 212 dev = new_dev->dev;
+1 -1
drivers/opp/of.c
··· 437 437 438 438 /* Checking only first OPP is sufficient */ 439 439 np = of_get_next_available_child(opp_np, NULL); 440 + of_node_put(opp_np); 440 441 if (!np) { 441 442 dev_err(dev, "OPP table empty\n"); 442 443 return -EINVAL; 443 444 } 444 - of_node_put(opp_np); 445 445 446 446 prop = of_find_property(np, "opp-peak-kBps", NULL); 447 447 of_node_put(np);
+17 -25
drivers/regulator/pfuze100-regulator.c
··· 10 10 #include <linux/of_device.h> 11 11 #include <linux/regulator/of_regulator.h> 12 12 #include <linux/platform_device.h> 13 + #include <linux/reboot.h> 13 14 #include <linux/regulator/driver.h> 14 15 #include <linux/regulator/machine.h> 15 16 #include <linux/regulator/pfuze100.h> ··· 572 571 return pfuze_matches[index].of_node; 573 572 } 574 573 575 - static struct pfuze_chip *syspm_pfuze_chip; 576 - 577 - static void pfuze_power_off_prepare(void) 574 + static int pfuze_power_off_prepare(struct sys_off_data *data) 578 575 { 576 + struct pfuze_chip *syspm_pfuze_chip = data->cb_data; 577 + 579 578 dev_info(syspm_pfuze_chip->dev, "Configure standby mode for power off"); 580 579 581 580 /* Switch from default mode: APS/APS to APS/Off */ ··· 610 609 regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN6VOL, 611 610 PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY, 612 611 PFUZE100_VGENxSTBY); 612 + 613 + return NOTIFY_DONE; 613 614 } 614 615 615 616 static int pfuze_power_off_prepare_init(struct pfuze_chip *pfuze_chip) 616 617 { 618 + int err; 619 + 617 620 if (pfuze_chip->chip_id != PFUZE100) { 618 621 dev_warn(pfuze_chip->dev, "Requested pm_power_off_prepare handler for not supported chip\n"); 619 622 return -ENODEV; 620 623 } 621 624 622 - if (pm_power_off_prepare) { 623 - dev_warn(pfuze_chip->dev, "pm_power_off_prepare is already registered.\n"); 624 - return -EBUSY; 625 + err = devm_register_sys_off_handler(pfuze_chip->dev, 626 + SYS_OFF_MODE_POWER_OFF_PREPARE, 627 + SYS_OFF_PRIO_DEFAULT, 628 + pfuze_power_off_prepare, 629 + pfuze_chip); 630 + if (err) { 631 + dev_err(pfuze_chip->dev, "failed to register sys-off handler: %d\n", 632 + err); 633 + return err; 625 634 } 626 - 627 - if (syspm_pfuze_chip) { 628 - dev_warn(pfuze_chip->dev, "syspm_pfuze_chip is already set.\n"); 629 - return -EBUSY; 630 - } 631 - 632 - syspm_pfuze_chip = pfuze_chip; 633 - pm_power_off_prepare = pfuze_power_off_prepare; 634 635 635 636 return 0; 636 637 } ··· 842 839 return 0; 843 840 } 844 841 845 - static int pfuze100_regulator_remove(struct i2c_client *client) 846 - { 847 - if (syspm_pfuze_chip) { 848 - syspm_pfuze_chip = NULL; 849 - pm_power_off_prepare = NULL; 850 - } 851 - 852 - return 0; 853 - } 854 - 855 842 static struct i2c_driver pfuze_driver = { 856 843 .driver = { 857 844 .name = "pfuze100-regulator", 858 845 .of_match_table = pfuze_dt_ids, 859 846 }, 860 847 .probe = pfuze100_regulator_probe, 861 - .remove = pfuze100_regulator_remove, 862 848 }; 863 849 module_i2c_driver(pfuze_driver); 864 850
+62 -25
drivers/soc/tegra/pmc.c
··· 39 39 #include <linux/platform_device.h> 40 40 #include <linux/pm_domain.h> 41 41 #include <linux/pm_opp.h> 42 + #include <linux/power_supply.h> 42 43 #include <linux/reboot.h> 43 44 #include <linux/regmap.h> 44 45 #include <linux/reset.h> ··· 109 108 #define PMC_USB_DEBOUNCE_DEL 0xec 110 109 #define PMC_USB_AO 0xf0 111 110 111 + #define PMC_SCRATCH37 0x130 112 112 #define PMC_SCRATCH41 0x140 113 113 114 114 #define PMC_WAKE2_MASK 0x160 ··· 1103 1101 .notifier_call = tegra_pmc_reboot_notify, 1104 1102 }; 1105 1103 1106 - static int tegra_pmc_restart_notify(struct notifier_block *this, 1107 - unsigned long action, void *data) 1104 + static void tegra_pmc_restart(void) 1108 1105 { 1109 1106 u32 value; 1110 1107 ··· 1111 1110 value = tegra_pmc_readl(pmc, PMC_CNTRL); 1112 1111 value |= PMC_CNTRL_MAIN_RST; 1113 1112 tegra_pmc_writel(pmc, value, PMC_CNTRL); 1113 + } 1114 + 1115 + static int tegra_pmc_restart_handler(struct sys_off_data *data) 1116 + { 1117 + tegra_pmc_restart(); 1114 1118 1115 1119 return NOTIFY_DONE; 1116 1120 } 1117 1121 1118 - static struct notifier_block tegra_pmc_restart_handler = { 1119 - .notifier_call = tegra_pmc_restart_notify, 1120 - .priority = 128, 1121 - }; 1122 + static int tegra_pmc_power_off_handler(struct sys_off_data *data) 1123 + { 1124 + /* 1125 + * Reboot Nexus 7 into special bootloader mode if USB cable is 1126 + * connected in order to display battery status and power off. 1127 + */ 1128 + if (of_machine_is_compatible("asus,grouper") && 1129 + power_supply_is_system_supplied()) { 1130 + const u32 go_to_charger_mode = 0xa5a55a5a; 1131 + 1132 + tegra_pmc_writel(pmc, go_to_charger_mode, PMC_SCRATCH37); 1133 + tegra_pmc_restart(); 1134 + } 1135 + 1136 + return NOTIFY_DONE; 1137 + } 1122 1138 1123 1139 static int powergate_show(struct seq_file *s, void *data) 1124 1140 { ··· 2898 2880 } 2899 2881 2900 2882 /* 2883 + * PMC should be last resort for restarting since it soft-resets 2884 + * CPU without resetting everything else. 2885 + */ 2886 + err = devm_register_reboot_notifier(&pdev->dev, 2887 + &tegra_pmc_reboot_notifier); 2888 + if (err) { 2889 + dev_err(&pdev->dev, "unable to register reboot notifier, %d\n", 2890 + err); 2891 + return err; 2892 + } 2893 + 2894 + err = devm_register_sys_off_handler(&pdev->dev, 2895 + SYS_OFF_MODE_RESTART, 2896 + SYS_OFF_PRIO_LOW, 2897 + tegra_pmc_restart_handler, NULL); 2898 + if (err) { 2899 + dev_err(&pdev->dev, "failed to register sys-off handler: %d\n", 2900 + err); 2901 + return err; 2902 + } 2903 + 2904 + /* 2905 + * PMC should be primary power-off method if it soft-resets CPU, 2906 + * asking bootloader to shutdown hardware. 2907 + */ 2908 + err = devm_register_sys_off_handler(&pdev->dev, 2909 + SYS_OFF_MODE_POWER_OFF, 2910 + SYS_OFF_PRIO_FIRMWARE, 2911 + tegra_pmc_power_off_handler, NULL); 2912 + if (err) { 2913 + dev_err(&pdev->dev, "failed to register sys-off handler: %d\n", 2914 + err); 2915 + return err; 2916 + } 2917 + 2918 + /* 2901 2919 * PCLK clock rate can't be retrieved using CLK API because it 2902 2920 * causes lockup if CPU enters LP2 idle state from some other 2903 2921 * CLK notifier, hence we're caching the rate's value locally. ··· 2964 2910 goto cleanup_sysfs; 2965 2911 } 2966 2912 2967 - err = devm_register_reboot_notifier(&pdev->dev, 2968 - &tegra_pmc_reboot_notifier); 2969 - if (err) { 2970 - dev_err(&pdev->dev, "unable to register reboot notifier, %d\n", 2971 - err); 2972 - goto cleanup_debugfs; 2973 - } 2974 - 2975 - err = register_restart_handler(&tegra_pmc_restart_handler); 2976 - if (err) { 2977 - dev_err(&pdev->dev, "unable to register restart handler, %d\n", 2978 - err); 2979 - goto cleanup_debugfs; 2980 - } 2981 - 2982 2913 err = tegra_pmc_pinctrl_init(pmc); 2983 2914 if (err) 2984 - goto cleanup_restart_handler; 2915 + goto cleanup_debugfs; 2985 2916 2986 2917 err = tegra_pmc_regmap_init(pmc); 2987 2918 if (err < 0) 2988 - goto cleanup_restart_handler; 2919 + goto cleanup_debugfs; 2989 2920 2990 2921 err = tegra_powergate_init(pmc, pdev->dev.of_node); 2991 2922 if (err < 0) ··· 2993 2954 2994 2955 cleanup_powergates: 2995 2956 tegra_powergate_remove_all(pdev->dev.of_node); 2996 - cleanup_restart_handler: 2997 - unregister_restart_handler(&tegra_pmc_restart_handler); 2998 2957 cleanup_debugfs: 2999 2958 debugfs_remove(pmc->debugfs); 3000 2959 cleanup_sysfs:
+7
include/linux/notifier.h
··· 150 150 extern int srcu_notifier_chain_register(struct srcu_notifier_head *nh, 151 151 struct notifier_block *nb); 152 152 153 + extern int atomic_notifier_chain_register_unique_prio( 154 + struct atomic_notifier_head *nh, struct notifier_block *nb); 155 + extern int blocking_notifier_chain_register_unique_prio( 156 + struct blocking_notifier_head *nh, struct notifier_block *nb); 157 + 153 158 extern int atomic_notifier_chain_unregister(struct atomic_notifier_head *nh, 154 159 struct notifier_block *nb); 155 160 extern int blocking_notifier_chain_unregister(struct blocking_notifier_head *nh, ··· 177 172 unsigned long val_up, unsigned long val_down, void *v); 178 173 extern int raw_notifier_call_chain_robust(struct raw_notifier_head *nh, 179 174 unsigned long val_up, unsigned long val_down, void *v); 175 + 176 + extern bool atomic_notifier_call_chain_is_empty(struct atomic_notifier_head *nh); 180 177 181 178 #define NOTIFY_DONE 0x0000 /* Don't care */ 182 179 #define NOTIFY_OK 0x0001 /* Suits me */
-1
include/linux/pm.h
··· 21 21 * Callbacks for platform drivers to implement. 22 22 */ 23 23 extern void (*pm_power_off)(void); 24 - extern void (*pm_power_off_prepare)(void); 25 24 26 25 struct device; /* we have a circular dep with device.h */ 27 26 #ifdef CONFIG_VT_CONSOLE_SLEEP
+30 -11
include/linux/pm_opp.h
··· 117 117 struct dev_pm_opp *dev_pm_opp_find_freq_exact(struct device *dev, 118 118 unsigned long freq, 119 119 bool available); 120 - struct dev_pm_opp *dev_pm_opp_find_level_exact(struct device *dev, 121 - unsigned int level); 122 - struct dev_pm_opp *dev_pm_opp_find_level_ceil(struct device *dev, 123 - unsigned int *level); 124 - 125 120 struct dev_pm_opp *dev_pm_opp_find_freq_floor(struct device *dev, 126 121 unsigned long *freq); 127 122 struct dev_pm_opp *dev_pm_opp_find_freq_ceil_by_volt(struct device *dev, 128 123 unsigned long u_volt); 129 124 125 + struct dev_pm_opp *dev_pm_opp_find_level_exact(struct device *dev, 126 + unsigned int level); 127 + struct dev_pm_opp *dev_pm_opp_find_level_ceil(struct device *dev, 128 + unsigned int *level); 129 + 130 130 struct dev_pm_opp *dev_pm_opp_find_freq_ceil(struct device *dev, 131 131 unsigned long *freq); 132 + 133 + struct dev_pm_opp *dev_pm_opp_find_bw_ceil(struct device *dev, 134 + unsigned int *bw, int index); 135 + 136 + struct dev_pm_opp *dev_pm_opp_find_bw_floor(struct device *dev, 137 + unsigned int *bw, int index); 138 + 132 139 void dev_pm_opp_put(struct dev_pm_opp *opp); 133 140 134 141 int dev_pm_opp_add(struct device *dev, unsigned long freq, ··· 250 243 return 0; 251 244 } 252 245 253 - static inline struct dev_pm_opp *dev_pm_opp_find_freq_exact(struct device *dev, 254 - unsigned long freq, bool available) 255 - { 256 - return ERR_PTR(-EOPNOTSUPP); 257 - } 258 - 259 246 static inline struct dev_pm_opp *dev_pm_opp_find_level_exact(struct device *dev, 260 247 unsigned int level) 261 248 { ··· 258 257 259 258 static inline struct dev_pm_opp *dev_pm_opp_find_level_ceil(struct device *dev, 260 259 unsigned int *level) 260 + { 261 + return ERR_PTR(-EOPNOTSUPP); 262 + } 263 + 264 + static inline struct dev_pm_opp *dev_pm_opp_find_freq_exact(struct device *dev, 265 + unsigned long freq, bool available) 261 266 { 262 267 return ERR_PTR(-EOPNOTSUPP); 263 268 } ··· 282 275 283 276 static inline struct dev_pm_opp *dev_pm_opp_find_freq_ceil(struct device *dev, 284 277 unsigned long *freq) 278 + { 279 + return ERR_PTR(-EOPNOTSUPP); 280 + } 281 + 282 + static inline struct dev_pm_opp *dev_pm_opp_find_bw_ceil(struct device *dev, 283 + unsigned int *bw, int index) 284 + { 285 + return ERR_PTR(-EOPNOTSUPP); 286 + } 287 + 288 + static inline struct dev_pm_opp *dev_pm_opp_find_bw_floor(struct device *dev, 289 + unsigned int *bw, int index) 285 290 { 286 291 return ERR_PTR(-EOPNOTSUPP); 287 292 }
+91
include/linux/reboot.h
··· 7 7 #include <uapi/linux/reboot.h> 8 8 9 9 struct device; 10 + struct sys_off_handler; 10 11 11 12 #define SYS_DOWN 0x0001 /* Notify of system down */ 12 13 #define SYS_RESTART SYS_DOWN ··· 63 62 struct pt_regs; 64 63 extern void machine_crash_shutdown(struct pt_regs *); 65 64 65 + void do_kernel_power_off(void); 66 + 67 + /* 68 + * sys-off handler API. 69 + */ 70 + 71 + /* 72 + * Standard sys-off priority levels. Users are expected to set priorities 73 + * relative to the standard levels. 74 + * 75 + * SYS_OFF_PRIO_PLATFORM: Use this for platform-level handlers. 76 + * 77 + * SYS_OFF_PRIO_LOW: Use this for handler of last resort. 78 + * 79 + * SYS_OFF_PRIO_DEFAULT: Use this for normal handlers. 80 + * 81 + * SYS_OFF_PRIO_HIGH: Use this for higher priority handlers. 82 + * 83 + * SYS_OFF_PRIO_FIRMWARE: Use this if handler uses firmware call. 84 + */ 85 + #define SYS_OFF_PRIO_PLATFORM -256 86 + #define SYS_OFF_PRIO_LOW -128 87 + #define SYS_OFF_PRIO_DEFAULT 0 88 + #define SYS_OFF_PRIO_HIGH 192 89 + #define SYS_OFF_PRIO_FIRMWARE 224 90 + 91 + enum sys_off_mode { 92 + /** 93 + * @SYS_OFF_MODE_POWER_OFF_PREPARE: 94 + * 95 + * Handlers prepare system to be powered off. Handlers are 96 + * allowed to sleep. 97 + */ 98 + SYS_OFF_MODE_POWER_OFF_PREPARE, 99 + 100 + /** 101 + * @SYS_OFF_MODE_POWER_OFF: 102 + * 103 + * Handlers power-off system. Handlers are disallowed to sleep. 104 + */ 105 + SYS_OFF_MODE_POWER_OFF, 106 + 107 + /** 108 + * @SYS_OFF_MODE_RESTART: 109 + * 110 + * Handlers restart system. Handlers are disallowed to sleep. 111 + */ 112 + SYS_OFF_MODE_RESTART, 113 + }; 114 + 115 + /** 116 + * struct sys_off_data - sys-off callback argument 117 + * 118 + * @mode: Mode ID. Currently used only by the sys-off restart mode, 119 + * see enum reboot_mode for the available modes. 120 + * @cb_data: User's callback data. 121 + * @cmd: Command string. Currently used only by the sys-off restart mode, 122 + * NULL otherwise. 123 + */ 124 + struct sys_off_data { 125 + int mode; 126 + void *cb_data; 127 + const char *cmd; 128 + }; 129 + 130 + struct sys_off_handler * 131 + register_sys_off_handler(enum sys_off_mode mode, 132 + int priority, 133 + int (*callback)(struct sys_off_data *data), 134 + void *cb_data); 135 + void unregister_sys_off_handler(struct sys_off_handler *handler); 136 + 137 + int devm_register_sys_off_handler(struct device *dev, 138 + enum sys_off_mode mode, 139 + int priority, 140 + int (*callback)(struct sys_off_data *data), 141 + void *cb_data); 142 + 143 + int devm_register_power_off_handler(struct device *dev, 144 + int (*callback)(struct sys_off_data *data), 145 + void *cb_data); 146 + 147 + int devm_register_restart_handler(struct device *dev, 148 + int (*callback)(struct sys_off_data *data), 149 + void *cb_data); 150 + 151 + int register_platform_power_off(void (*power_off)(void)); 152 + void unregister_platform_power_off(void (*power_off)(void)); 153 + 66 154 /* 67 155 * Architecture independent implemenations of sys_reboot commands. 68 156 */ ··· 160 70 extern void kernel_restart(char *cmd); 161 71 extern void kernel_halt(void); 162 72 extern void kernel_power_off(void); 73 + extern bool kernel_can_power_off(void); 163 74 164 75 void ctrl_alt_del(void); 165 76
+82 -19
kernel/notifier.c
··· 20 20 */ 21 21 22 22 static int notifier_chain_register(struct notifier_block **nl, 23 - struct notifier_block *n) 23 + struct notifier_block *n, 24 + bool unique_priority) 24 25 { 25 26 while ((*nl) != NULL) { 26 27 if (unlikely((*nl) == n)) { ··· 31 30 } 32 31 if (n->priority > (*nl)->priority) 33 32 break; 33 + if (n->priority == (*nl)->priority && unique_priority) 34 + return -EBUSY; 34 35 nl = &((*nl)->next); 35 36 } 36 37 n->next = *nl; ··· 147 144 int ret; 148 145 149 146 spin_lock_irqsave(&nh->lock, flags); 150 - ret = notifier_chain_register(&nh->head, n); 147 + ret = notifier_chain_register(&nh->head, n, false); 151 148 spin_unlock_irqrestore(&nh->lock, flags); 152 149 return ret; 153 150 } 154 151 EXPORT_SYMBOL_GPL(atomic_notifier_chain_register); 152 + 153 + /** 154 + * atomic_notifier_chain_register_unique_prio - Add notifier to an atomic notifier chain 155 + * @nh: Pointer to head of the atomic notifier chain 156 + * @n: New entry in notifier chain 157 + * 158 + * Adds a notifier to an atomic notifier chain if there is no other 159 + * notifier registered using the same priority. 160 + * 161 + * Returns 0 on success, %-EEXIST or %-EBUSY on error. 162 + */ 163 + int atomic_notifier_chain_register_unique_prio(struct atomic_notifier_head *nh, 164 + struct notifier_block *n) 165 + { 166 + unsigned long flags; 167 + int ret; 168 + 169 + spin_lock_irqsave(&nh->lock, flags); 170 + ret = notifier_chain_register(&nh->head, n, true); 171 + spin_unlock_irqrestore(&nh->lock, flags); 172 + return ret; 173 + } 174 + EXPORT_SYMBOL_GPL(atomic_notifier_chain_register_unique_prio); 155 175 156 176 /** 157 177 * atomic_notifier_chain_unregister - Remove notifier from an atomic notifier chain ··· 230 204 EXPORT_SYMBOL_GPL(atomic_notifier_call_chain); 231 205 NOKPROBE_SYMBOL(atomic_notifier_call_chain); 232 206 207 + /** 208 + * atomic_notifier_call_chain_is_empty - Check whether notifier chain is empty 209 + * @nh: Pointer to head of the atomic notifier chain 210 + * 211 + * Checks whether notifier chain is empty. 212 + * 213 + * Returns true is notifier chain is empty, false otherwise. 214 + */ 215 + bool atomic_notifier_call_chain_is_empty(struct atomic_notifier_head *nh) 216 + { 217 + return !rcu_access_pointer(nh->head); 218 + } 219 + 233 220 /* 234 221 * Blocking notifier chain routines. All access to the chain is 235 222 * synchronized by an rwsem. 236 223 */ 224 + 225 + static int __blocking_notifier_chain_register(struct blocking_notifier_head *nh, 226 + struct notifier_block *n, 227 + bool unique_priority) 228 + { 229 + int ret; 230 + 231 + /* 232 + * This code gets used during boot-up, when task switching is 233 + * not yet working and interrupts must remain disabled. At 234 + * such times we must not call down_write(). 235 + */ 236 + if (unlikely(system_state == SYSTEM_BOOTING)) 237 + return notifier_chain_register(&nh->head, n, unique_priority); 238 + 239 + down_write(&nh->rwsem); 240 + ret = notifier_chain_register(&nh->head, n, unique_priority); 241 + up_write(&nh->rwsem); 242 + return ret; 243 + } 237 244 238 245 /** 239 246 * blocking_notifier_chain_register - Add notifier to a blocking notifier chain ··· 281 222 int blocking_notifier_chain_register(struct blocking_notifier_head *nh, 282 223 struct notifier_block *n) 283 224 { 284 - int ret; 285 - 286 - /* 287 - * This code gets used during boot-up, when task switching is 288 - * not yet working and interrupts must remain disabled. At 289 - * such times we must not call down_write(). 290 - */ 291 - if (unlikely(system_state == SYSTEM_BOOTING)) 292 - return notifier_chain_register(&nh->head, n); 293 - 294 - down_write(&nh->rwsem); 295 - ret = notifier_chain_register(&nh->head, n); 296 - up_write(&nh->rwsem); 297 - return ret; 225 + return __blocking_notifier_chain_register(nh, n, false); 298 226 } 299 227 EXPORT_SYMBOL_GPL(blocking_notifier_chain_register); 228 + 229 + /** 230 + * blocking_notifier_chain_register_unique_prio - Add notifier to a blocking notifier chain 231 + * @nh: Pointer to head of the blocking notifier chain 232 + * @n: New entry in notifier chain 233 + * 234 + * Adds a notifier to an blocking notifier chain if there is no other 235 + * notifier registered using the same priority. 236 + * 237 + * Returns 0 on success, %-EEXIST or %-EBUSY on error. 238 + */ 239 + int blocking_notifier_chain_register_unique_prio(struct blocking_notifier_head *nh, 240 + struct notifier_block *n) 241 + { 242 + return __blocking_notifier_chain_register(nh, n, true); 243 + } 244 + EXPORT_SYMBOL_GPL(blocking_notifier_chain_register_unique_prio); 300 245 301 246 /** 302 247 * blocking_notifier_chain_unregister - Remove notifier from a blocking notifier chain ··· 404 341 int raw_notifier_chain_register(struct raw_notifier_head *nh, 405 342 struct notifier_block *n) 406 343 { 407 - return notifier_chain_register(&nh->head, n); 344 + return notifier_chain_register(&nh->head, n, false); 408 345 } 409 346 EXPORT_SYMBOL_GPL(raw_notifier_chain_register); 410 347 ··· 483 420 * such times we must not call mutex_lock(). 484 421 */ 485 422 if (unlikely(system_state == SYSTEM_BOOTING)) 486 - return notifier_chain_register(&nh->head, n); 423 + return notifier_chain_register(&nh->head, n, false); 487 424 488 425 mutex_lock(&nh->mutex); 489 - ret = notifier_chain_register(&nh->head, n); 426 + ret = notifier_chain_register(&nh->head, n, false); 490 427 mutex_unlock(&nh->mutex); 491 428 return ret; 492 429 }
+342 -8
kernel/reboot.c
··· 48 48 enum reboot_type reboot_type = BOOT_ACPI; 49 49 int reboot_force; 50 50 51 - /* 52 - * If set, this is used for preparing the system to power off. 53 - */ 51 + struct sys_off_handler { 52 + struct notifier_block nb; 53 + int (*sys_off_cb)(struct sys_off_data *data); 54 + void *cb_data; 55 + enum sys_off_mode mode; 56 + bool blocking; 57 + void *list; 58 + }; 54 59 55 - void (*pm_power_off_prepare)(void); 56 - EXPORT_SYMBOL_GPL(pm_power_off_prepare); 60 + /* 61 + * Temporary stub that prevents linkage failure while we're in process 62 + * of removing all uses of legacy pm_power_off() around the kernel. 63 + */ 64 + void __weak (*pm_power_off)(void); 57 65 58 66 /** 59 67 * emergency_restart - reboot the system ··· 289 281 } 290 282 EXPORT_SYMBOL_GPL(kernel_halt); 291 283 284 + /* 285 + * Notifier list for kernel code which wants to be called 286 + * to prepare system for power off. 287 + */ 288 + static BLOCKING_NOTIFIER_HEAD(power_off_prep_handler_list); 289 + 290 + /* 291 + * Notifier list for kernel code which wants to be called 292 + * to power off system. 293 + */ 294 + static ATOMIC_NOTIFIER_HEAD(power_off_handler_list); 295 + 296 + static int sys_off_notify(struct notifier_block *nb, 297 + unsigned long mode, void *cmd) 298 + { 299 + struct sys_off_handler *handler; 300 + struct sys_off_data data = {}; 301 + 302 + handler = container_of(nb, struct sys_off_handler, nb); 303 + data.cb_data = handler->cb_data; 304 + data.mode = mode; 305 + data.cmd = cmd; 306 + 307 + return handler->sys_off_cb(&data); 308 + } 309 + 310 + /** 311 + * register_sys_off_handler - Register sys-off handler 312 + * @mode: Sys-off mode 313 + * @priority: Handler priority 314 + * @callback: Callback function 315 + * @cb_data: Callback argument 316 + * 317 + * Registers system power-off or restart handler that will be invoked 318 + * at the step corresponding to the given sys-off mode. Handler's callback 319 + * should return NOTIFY_DONE to permit execution of the next handler in 320 + * the call chain or NOTIFY_STOP to break the chain (in error case for 321 + * example). 322 + * 323 + * Multiple handlers can be registered at the default priority level. 324 + * 325 + * Only one handler can be registered at the non-default priority level, 326 + * otherwise ERR_PTR(-EBUSY) is returned. 327 + * 328 + * Returns a new instance of struct sys_off_handler on success, or 329 + * an ERR_PTR()-encoded error code otherwise. 330 + */ 331 + struct sys_off_handler * 332 + register_sys_off_handler(enum sys_off_mode mode, 333 + int priority, 334 + int (*callback)(struct sys_off_data *data), 335 + void *cb_data) 336 + { 337 + struct sys_off_handler *handler; 338 + int err; 339 + 340 + handler = kzalloc(sizeof(*handler), GFP_KERNEL); 341 + if (!handler) 342 + return ERR_PTR(-ENOMEM); 343 + 344 + switch (mode) { 345 + case SYS_OFF_MODE_POWER_OFF_PREPARE: 346 + handler->list = &power_off_prep_handler_list; 347 + handler->blocking = true; 348 + break; 349 + 350 + case SYS_OFF_MODE_POWER_OFF: 351 + handler->list = &power_off_handler_list; 352 + break; 353 + 354 + case SYS_OFF_MODE_RESTART: 355 + handler->list = &restart_handler_list; 356 + break; 357 + 358 + default: 359 + kfree(handler); 360 + return ERR_PTR(-EINVAL); 361 + } 362 + 363 + handler->nb.notifier_call = sys_off_notify; 364 + handler->nb.priority = priority; 365 + handler->sys_off_cb = callback; 366 + handler->cb_data = cb_data; 367 + handler->mode = mode; 368 + 369 + if (handler->blocking) { 370 + if (priority == SYS_OFF_PRIO_DEFAULT) 371 + err = blocking_notifier_chain_register(handler->list, 372 + &handler->nb); 373 + else 374 + err = blocking_notifier_chain_register_unique_prio(handler->list, 375 + &handler->nb); 376 + } else { 377 + if (priority == SYS_OFF_PRIO_DEFAULT) 378 + err = atomic_notifier_chain_register(handler->list, 379 + &handler->nb); 380 + else 381 + err = atomic_notifier_chain_register_unique_prio(handler->list, 382 + &handler->nb); 383 + } 384 + 385 + if (err) { 386 + kfree(handler); 387 + return ERR_PTR(err); 388 + } 389 + 390 + return handler; 391 + } 392 + EXPORT_SYMBOL_GPL(register_sys_off_handler); 393 + 394 + /** 395 + * unregister_sys_off_handler - Unregister sys-off handler 396 + * @handler: Sys-off handler 397 + * 398 + * Unregisters given sys-off handler. 399 + */ 400 + void unregister_sys_off_handler(struct sys_off_handler *handler) 401 + { 402 + int err; 403 + 404 + if (!handler) 405 + return; 406 + 407 + if (handler->blocking) 408 + err = blocking_notifier_chain_unregister(handler->list, 409 + &handler->nb); 410 + else 411 + err = atomic_notifier_chain_unregister(handler->list, 412 + &handler->nb); 413 + 414 + /* sanity check, shall never happen */ 415 + WARN_ON(err); 416 + 417 + kfree(handler); 418 + } 419 + EXPORT_SYMBOL_GPL(unregister_sys_off_handler); 420 + 421 + static void devm_unregister_sys_off_handler(void *data) 422 + { 423 + struct sys_off_handler *handler = data; 424 + 425 + unregister_sys_off_handler(handler); 426 + } 427 + 428 + /** 429 + * devm_register_sys_off_handler - Register sys-off handler 430 + * @dev: Device that registers handler 431 + * @mode: Sys-off mode 432 + * @priority: Handler priority 433 + * @callback: Callback function 434 + * @cb_data: Callback argument 435 + * 436 + * Registers resource-managed sys-off handler. 437 + * 438 + * Returns zero on success, or error code on failure. 439 + */ 440 + int devm_register_sys_off_handler(struct device *dev, 441 + enum sys_off_mode mode, 442 + int priority, 443 + int (*callback)(struct sys_off_data *data), 444 + void *cb_data) 445 + { 446 + struct sys_off_handler *handler; 447 + 448 + handler = register_sys_off_handler(mode, priority, callback, cb_data); 449 + if (IS_ERR(handler)) 450 + return PTR_ERR(handler); 451 + 452 + return devm_add_action_or_reset(dev, devm_unregister_sys_off_handler, 453 + handler); 454 + } 455 + EXPORT_SYMBOL_GPL(devm_register_sys_off_handler); 456 + 457 + /** 458 + * devm_register_power_off_handler - Register power-off handler 459 + * @dev: Device that registers callback 460 + * @callback: Callback function 461 + * @cb_data: Callback's argument 462 + * 463 + * Registers resource-managed sys-off handler with a default priority 464 + * and using power-off mode. 465 + * 466 + * Returns zero on success, or error code on failure. 467 + */ 468 + int devm_register_power_off_handler(struct device *dev, 469 + int (*callback)(struct sys_off_data *data), 470 + void *cb_data) 471 + { 472 + return devm_register_sys_off_handler(dev, 473 + SYS_OFF_MODE_POWER_OFF, 474 + SYS_OFF_PRIO_DEFAULT, 475 + callback, cb_data); 476 + } 477 + EXPORT_SYMBOL_GPL(devm_register_power_off_handler); 478 + 479 + /** 480 + * devm_register_restart_handler - Register restart handler 481 + * @dev: Device that registers callback 482 + * @callback: Callback function 483 + * @cb_data: Callback's argument 484 + * 485 + * Registers resource-managed sys-off handler with a default priority 486 + * and using restart mode. 487 + * 488 + * Returns zero on success, or error code on failure. 489 + */ 490 + int devm_register_restart_handler(struct device *dev, 491 + int (*callback)(struct sys_off_data *data), 492 + void *cb_data) 493 + { 494 + return devm_register_sys_off_handler(dev, 495 + SYS_OFF_MODE_RESTART, 496 + SYS_OFF_PRIO_DEFAULT, 497 + callback, cb_data); 498 + } 499 + EXPORT_SYMBOL_GPL(devm_register_restart_handler); 500 + 501 + static struct sys_off_handler *platform_power_off_handler; 502 + 503 + static int platform_power_off_notify(struct sys_off_data *data) 504 + { 505 + void (*platform_power_power_off_cb)(void) = data->cb_data; 506 + 507 + platform_power_power_off_cb(); 508 + 509 + return NOTIFY_DONE; 510 + } 511 + 512 + /** 513 + * register_platform_power_off - Register platform-level power-off callback 514 + * @power_off: Power-off callback 515 + * 516 + * Registers power-off callback that will be called as last step 517 + * of the power-off sequence. This callback is expected to be invoked 518 + * for the last resort. Only one platform power-off callback is allowed 519 + * to be registered at a time. 520 + * 521 + * Returns zero on success, or error code on failure. 522 + */ 523 + int register_platform_power_off(void (*power_off)(void)) 524 + { 525 + struct sys_off_handler *handler; 526 + 527 + handler = register_sys_off_handler(SYS_OFF_MODE_POWER_OFF, 528 + SYS_OFF_PRIO_PLATFORM, 529 + platform_power_off_notify, 530 + power_off); 531 + if (IS_ERR(handler)) 532 + return PTR_ERR(handler); 533 + 534 + platform_power_off_handler = handler; 535 + 536 + return 0; 537 + } 538 + EXPORT_SYMBOL_GPL(register_platform_power_off); 539 + 540 + /** 541 + * unregister_platform_power_off - Unregister platform-level power-off callback 542 + * @power_off: Power-off callback 543 + * 544 + * Unregisters previously registered platform power-off callback. 545 + */ 546 + void unregister_platform_power_off(void (*power_off)(void)) 547 + { 548 + if (platform_power_off_handler && 549 + platform_power_off_handler->cb_data == power_off) { 550 + unregister_sys_off_handler(platform_power_off_handler); 551 + platform_power_off_handler = NULL; 552 + } 553 + } 554 + EXPORT_SYMBOL_GPL(unregister_platform_power_off); 555 + 556 + static int legacy_pm_power_off(struct sys_off_data *data) 557 + { 558 + if (pm_power_off) 559 + pm_power_off(); 560 + 561 + return NOTIFY_DONE; 562 + } 563 + 564 + static void do_kernel_power_off_prepare(void) 565 + { 566 + blocking_notifier_call_chain(&power_off_prep_handler_list, 0, NULL); 567 + } 568 + 569 + /** 570 + * do_kernel_power_off - Execute kernel power-off handler call chain 571 + * 572 + * Expected to be called as last step of the power-off sequence. 573 + * 574 + * Powers off the system immediately if a power-off handler function has 575 + * been registered. Otherwise does nothing. 576 + */ 577 + void do_kernel_power_off(void) 578 + { 579 + atomic_notifier_call_chain(&power_off_handler_list, 0, NULL); 580 + } 581 + 582 + /** 583 + * kernel_can_power_off - check whether system can be powered off 584 + * 585 + * Returns true if power-off handler is registered and system can be 586 + * powered off, false otherwise. 587 + */ 588 + bool kernel_can_power_off(void) 589 + { 590 + return !atomic_notifier_call_chain_is_empty(&power_off_handler_list); 591 + } 592 + EXPORT_SYMBOL_GPL(kernel_can_power_off); 593 + 292 594 /** 293 595 * kernel_power_off - power_off the system 294 596 * ··· 607 289 void kernel_power_off(void) 608 290 { 609 291 kernel_shutdown_prepare(SYSTEM_POWER_OFF); 610 - if (pm_power_off_prepare) 611 - pm_power_off_prepare(); 292 + do_kernel_power_off_prepare(); 612 293 migrate_to_reboot_cpu(); 613 294 syscore_shutdown(); 614 295 pr_emerg("Power down\n"); ··· 630 313 void __user *, arg) 631 314 { 632 315 struct pid_namespace *pid_ns = task_active_pid_ns(current); 316 + struct sys_off_handler *sys_off = NULL; 633 317 char buffer[256]; 634 318 int ret = 0; 635 319 ··· 655 337 if (ret) 656 338 return ret; 657 339 340 + /* 341 + * Register sys-off handlers for legacy PM callback. This allows 342 + * legacy PM callbacks temporary co-exist with the new sys-off API. 343 + * 344 + * TODO: Remove legacy handlers once all legacy PM users will be 345 + * switched to the sys-off based APIs. 346 + */ 347 + if (pm_power_off) { 348 + sys_off = register_sys_off_handler(SYS_OFF_MODE_POWER_OFF, 349 + SYS_OFF_PRIO_DEFAULT, 350 + legacy_pm_power_off, NULL); 351 + if (IS_ERR(sys_off)) 352 + return PTR_ERR(sys_off); 353 + } 354 + 658 355 /* Instead of trying to make the power_off code look like 659 356 * halt when pm_power_off is not set do it the easy way. 660 357 */ 661 - if ((cmd == LINUX_REBOOT_CMD_POWER_OFF) && !pm_power_off) 358 + if ((cmd == LINUX_REBOOT_CMD_POWER_OFF) && !kernel_can_power_off()) 662 359 cmd = LINUX_REBOOT_CMD_HALT; 663 360 664 361 mutex_lock(&system_transition_mutex); ··· 727 394 break; 728 395 } 729 396 mutex_unlock(&system_transition_mutex); 397 + unregister_sys_off_handler(sys_off); 730 398 return ret; 731 399 } 732 400