Merge tag 'riscv-for-linus-5.18-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Pull RISC-V fix from Palmer Dabbelt:

- Fix the RISC-V section of the generic CPU idle bindings to comply
with the recently tightened DT schema.

* tag 'riscv-for-linus-5.18-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
dt-bindings: Fix phandle-array issues in the idle-states bindings

Linus Torvalds 4 years ago 1fdff407 8467b0ed

+10 -8

2 changed files

expand all

Documentation

devicetree

bindings

cpu

idle-states.yaml

riscv

cpus.yaml

+8 -8

Documentation/devicetree/bindings/cpu/idle-states.yaml

··· 719 719 reg = <0x0>; 720 720 riscv,isa = "rv64imafdc"; 721 721 mmu-type = "riscv,sv48"; 722 - cpu-idle-states = <&CPU_RET_0_0 &CPU_NONRET_0_0 723 - &CLUSTER_RET_0 &CLUSTER_NONRET_0>; 722 + cpu-idle-states = <&CPU_RET_0_0>, <&CPU_NONRET_0_0>, 723 + <&CLUSTER_RET_0>, <&CLUSTER_NONRET_0>; 724 724 725 725 cpu_intc0: interrupt-controller { 726 726 #interrupt-cells = <1>; ··· 735 735 reg = <0x1>; 736 736 riscv,isa = "rv64imafdc"; 737 737 mmu-type = "riscv,sv48"; 738 - cpu-idle-states = <&CPU_RET_0_0 &CPU_NONRET_0_0 739 - &CLUSTER_RET_0 &CLUSTER_NONRET_0>; 738 + cpu-idle-states = <&CPU_RET_0_0>, <&CPU_NONRET_0_0>, 739 + <&CLUSTER_RET_0>, <&CLUSTER_NONRET_0>; 740 740 741 741 cpu_intc1: interrupt-controller { 742 742 #interrupt-cells = <1>; ··· 751 751 reg = <0x10>; 752 752 riscv,isa = "rv64imafdc"; 753 753 mmu-type = "riscv,sv48"; 754 - cpu-idle-states = <&CPU_RET_1_0 &CPU_NONRET_1_0 755 - &CLUSTER_RET_1 &CLUSTER_NONRET_1>; 754 + cpu-idle-states = <&CPU_RET_1_0>, <&CPU_NONRET_1_0>, 755 + <&CLUSTER_RET_1>, <&CLUSTER_NONRET_1>; 756 756 757 757 cpu_intc10: interrupt-controller { 758 758 #interrupt-cells = <1>; ··· 767 767 reg = <0x11>; 768 768 riscv,isa = "rv64imafdc"; 769 769 mmu-type = "riscv,sv48"; 770 - cpu-idle-states = <&CPU_RET_1_0 &CPU_NONRET_1_0 771 - &CLUSTER_RET_1 &CLUSTER_NONRET_1>; 770 + cpu-idle-states = <&CPU_RET_1_0>, <&CPU_NONRET_1_0>, 771 + <&CLUSTER_RET_1>, <&CLUSTER_NONRET_1>; 772 772 773 773 cpu_intc11: interrupt-controller { 774 774 #interrupt-cells = <1>;

Documentation/devicetree/bindings/riscv/cpus.yaml

··· 101 101 102 102 cpu-idle-states: 103 103 $ref: '/schemas/types.yaml#/definitions/phandle-array' 104 + items: 105 + maxItems: 1 104 106 description: | 105 107 List of phandles to idle state nodes supported 106 108 by this hart (see ./idle-states.yaml).