[PATCH] ARM: 2832/1: BAST - limit clock-rate for IIC bus

Patch from Ben Dooks

The default clock rate does not specify a maximum, so the
default of 400KHz is used. This rate is too fast for the PMU
on the EB2410ITX, so we now specify platform data with a rate
of around 100KHz.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by Ben Dooks and committed by Russell King 1fcf8448 5cb4cc0d

+15 -1
+15 -1
arch/arm/mach-s3c2410/mach-bast.c
··· 30 * 28-Jun-2005 BJD Moved pm functionality out to common code 31 * 17-Jul-2005 BJD Changed to platform device for SuperIO 16550s 32 * 25-Jul-2005 BJD Removed ASIX static mappings 33 */ 34 35 #include <linux/kernel.h> ··· 61 #include <asm/arch/regs-mem.h> 62 #include <asm/arch/regs-lcd.h> 63 #include <asm/arch/nand.h> 64 65 #include <linux/mtd/mtd.h> 66 #include <linux/mtd/nand.h> ··· 306 } 307 308 static struct s3c2410_platform_nand bast_nand_info = { 309 - .tacls = 80, 310 .twrph0 = 80, 311 .twrph1 = 80, 312 .nr_sets = ARRAY_SIZE(bast_nand_sets), ··· 387 }, 388 }; 389 390 /* Standard BAST devices */ 391 392 static struct platform_device *bast_devices[] __initdata = { ··· 444 s3c24xx_uclk.parent = &s3c24xx_clkout1; 445 446 s3c_device_nand.dev.platform_data = &bast_nand_info; 447 448 s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); 449 s3c24xx_init_clocks(0);
··· 30 * 28-Jun-2005 BJD Moved pm functionality out to common code 31 * 17-Jul-2005 BJD Changed to platform device for SuperIO 16550s 32 * 25-Jul-2005 BJD Removed ASIX static mappings 33 + * 27-Jul-2005 BJD Ensure maximum frequency of i2c bus 34 */ 35 36 #include <linux/kernel.h> ··· 60 #include <asm/arch/regs-mem.h> 61 #include <asm/arch/regs-lcd.h> 62 #include <asm/arch/nand.h> 63 + #include <asm/arch/iic.h> 64 65 #include <linux/mtd/mtd.h> 66 #include <linux/mtd/nand.h> ··· 304 } 305 306 static struct s3c2410_platform_nand bast_nand_info = { 307 + .tacls = 40, 308 .twrph0 = 80, 309 .twrph1 = 80, 310 .nr_sets = ARRAY_SIZE(bast_nand_sets), ··· 385 }, 386 }; 387 388 + /* we have devices on the bus which cannot work much over the 389 + * standard 100KHz i2c bus frequency 390 + */ 391 + 392 + static struct s3c2410_platform_i2c bast_i2c_info = { 393 + .flags = 0, 394 + .slave_addr = 0x10, 395 + .bus_freq = 100*1000, 396 + .max_freq = 130*1000, 397 + }; 398 + 399 /* Standard BAST devices */ 400 401 static struct platform_device *bast_devices[] __initdata = { ··· 431 s3c24xx_uclk.parent = &s3c24xx_clkout1; 432 433 s3c_device_nand.dev.platform_data = &bast_nand_info; 434 + s3c_device_i2c.dev.platform_data = &bast_i2c_info; 435 436 s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); 437 s3c24xx_init_clocks(0);